Epitaxial wafers and SOI wafers, and methods for manufacturing them.

Abstract

To provide an epitaxial wafer, an SOI wafer, and their manufacturing method, which can be manufactured with a small number of steps without using a high resistivity substrate, have a simple processing process, and more reliably reduce harmonics.SOLUTION: An epitaxial wafer has a silicon epitaxial film on a silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less, and a carbon atom concentration in the silicon epitaxial film is 5×1017 atoms / cm3 or more and less than 2×1019 atoms / cm3, and carbon defects are formed in the silicon epitaxial film.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This invention relates to epitaxial wafers, SOI wafers, and methods for manufacturing them. [Background technology]

[0002] In recent years, the demand for high-capacity communication has been extremely high, and the development of equipment applicable to fifth and sixth generation mobile communication systems (commonly known as 5G and 6G) ​​is accelerating. These communication devices incorporate integrated circuits, and the active elements (such as transistors) and passive elements (such as inductors) that make up these integrated circuits require a high degree of operational stability in 5G and 6G environments. In particular, since these high-capacity communication systems are planned to use high frequency bands (millimeter wave to subterahertz band), there is a societal demand for device design and material development that combines excellent high-frequency characteristics with low power consumption.

[0003] Turning our attention to the materials required for semiconductor integrated circuits, silicon wafers fabricated by the Czochralski (CZ) method are sometimes used as substrates for high-frequency integrated circuits. In this case, the silicon wafers used need to have high substrate resistivity in order to achieve low resistance loss and good high-frequency characteristics. Furthermore, in applications where even better high-frequency characteristics are required, wafers with trap-rich layers, as described in Patent Documents 1 and 2, are often used. This is because it is known that when a high-frequency signal is input to a device formed on a high-resistivity substrate, an inversion layer is formed within the substrate, causing the resistivity to change. By trapping carriers generated in the inversion layer at deep levels in the trap-rich layer, high substrate resistivity can be maintained.

[0004] In particular, passive devices use wafers in which a polysilicon layer is formed as a trap-rich layer on a high-resistivity substrate. In contrast, SOI wafers with a trap-rich layer are widely used for active devices. In the structure of such an SOI wafer, a polysilicon layer as a trap-rich layer, an oxide film as a dielectric layer, and a single-crystal silicon layer are stacked in this order on a high-resistivity substrate.

[0005] However, manufacturing high-resistivity substrates, such as those with 10,000 Ω·cm, which are widely used as substrates for high-frequency integrated circuits, is technically difficult due to the need for resistivity control, resulting in low yields. In addition, polysilicon, which is used as a trap-rich layer, is difficult to process, leading to reduced productivity, and SOI structures using polysilicon as a trap-rich layer have complicated manufacturing processes and significant cost issues. Therefore, there has been a need to develop technologies that exhibit excellent high-frequency characteristics, particularly in reducing harmonics, in wafers formed by forming a silicon epitaxial film on a silicon single-crystal substrate without using high-resistivity substrates. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Special Publication No. 2015-503853 [Patent Document 2] Japanese Patent Publication No. 2019-129195 [Patent Document 3] Japanese Patent Publication No. 2009-164590 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] As described above, there has been a demand for epitaxial wafers and SOI wafers that can reduce harmonics without using high-resistivity substrates and that can replace polysilicon layers as trap-rich layers for high-frequency integrated circuits. Aiming to develop materials that meet these demands, the inventors have found that epitaxial wafers in which a silicon epitaxial film containing a high concentration of carbon is formed on a normal-resistivity substrate, and SOI wafers using such epitaxial wafers, are promising. This makes it possible to provide substrates for high-frequency integrated circuits that can be manufactured with a small number of steps and have an easy processing process.

[0008] However, the ability to reduce these harmonics was not achieved by conventional wafers using a polysilicon layer as a trap-rich layer, making the development of wafers exhibiting superior high-frequency characteristics an urgent need.

[0009] The present invention has been made in view of the above problems, and aims to provide epitaxial wafers and SOI wafers that can be manufactured with a small number of steps without using a high resistivity substrate, have an easy processing process, and more reliably reduce harmonics, as well as methods for manufacturing them. [Means for solving the problem]

[0010] To solve the above problems, the present invention provides an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate with a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, wherein the carbon atom concentration in the silicon epitaxial film is 5 × 10 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 The value is less than the specified value, and carbon defects are formed in the silicon epitaxial film.

[0011] With such an epitaxial wafer, the silicon epitaxial film with carbon defects acts as a trap-rich layer, inhibiting the formation of an inversion layer. Therefore, it is possible to exhibit excellent harmonic reduction capabilities using a silicon single-crystal substrate. As a result, it is not always necessary to use a high-resistivity substrate, allowing for manufacturing with fewer steps and simplifying the processing process.

[0012] Furthermore, such epitaxial wafers exhibit excellent harmonic reduction capabilities, making them preferable for use as wafers for high-frequency devices.

[0013] Furthermore, it is preferable that the SOI wafer of the present invention has a structure in which a dielectric layer and a silicon single crystal film are configured in this order on the silicon epitaxial film of the epitaxial wafer.

[0014] With such SOI wafers, the silicon epitaxial film with carbon defects acts as a trap-rich layer, inhibiting the formation of an inversion layer. Therefore, excellent harmonic reduction capabilities can be achieved using a silicon single-crystal substrate. As a result, it is not always necessary to use a high-resistivity substrate, allowing for manufacturing with fewer steps and simplifying the processing process.

[0015] Furthermore, because such SOI wafers exhibit excellent harmonic reduction capabilities, they are preferable for use as wafers for high-frequency devices.

[0016] Furthermore, the present invention's method for manufacturing an epitaxial wafer involves, on a silicon single crystal substrate with a resistivity of 10 Ω·cm to 5000 Ω·cm, under reduced pressure, with a carbon atom concentration of 5 × 10 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 It is preferable to form carbon defects in the silicon epitaxial film by vapor-phase growth of a silicon epitaxial film with a heat treatment temperature of 900°C to 1100°C and a heat treatment time of 1 hour to 36 hours.

[0017] This method of manufacturing epitaxial wafers makes it easy to produce epitaxial wafers that exhibit excellent harmonic reduction capabilities. Furthermore, since it does not require the use of high-resistivity substrates, it can be manufactured with fewer steps and the processing process can be simplified.

[0018] Furthermore, epitaxial wafers manufactured using this method exhibit excellent harmonic reduction capabilities, making them preferable for use as wafers for high-frequency devices.

[0019] Here, by applying heat treatment to an epitaxial wafer with the above carbon atom concentration, excellent harmonic characteristics can be achieved due to the action of the silicon epitaxial film on which carbon defects are formed. This is thought to be because the formation of carbon defects in the silicon epitaxial film by heat treatment creates deep energy levels, which enhances its function as a trap-rich layer and inhibits the formation of an inversion layer. Therefore, the epitaxial wafer of the present invention is suitable for use in high-frequency devices.

[0020] Furthermore, a preferable method for manufacturing an SOI wafer involves manufacturing an epitaxial wafer using the method described above, and then bonding the silicon epitaxial film of the epitaxial wafer to a silicon single crystal substrate on which a dielectric layer is formed on the surface, with the dielectric layer in between.

[0021] This method of manufacturing SOI wafers makes it easy to produce SOI wafers that exhibit excellent harmonic reduction capabilities. Furthermore, since it does not require the use of high-resistivity substrates, it can be manufactured with fewer steps and the processing process can be simplified.

[0022] Furthermore, since SOI wafers manufactured using this method exhibit excellent harmonic reduction capabilities, it is preferable to manufacture them as wafers for high-frequency devices. [Effects of the Invention]

[0023] The epitaxial wafer having a silicon epitaxial film with carbon defects formed on it according to the present invention can reduce harmonics more significantly due to the action of the silicon epitaxial film. This is thought to be because the silicon epitaxial film with carbon defects acts as a trap-rich layer, inhibiting the formation of an inversion layer. Furthermore, the SOI wafer having a silicon epitaxial film with carbon defects formed on it according to the present invention also exhibits excellent harmonic reduction capability due to the action of the silicon epitaxial film. The method for manufacturing epitaxial wafers and SOI wafers according to the present invention can easily manufacture epitaxial wafers and SOI wafers that exhibit the above-mentioned excellent harmonic reduction capability. In particular, it can exhibit excellent harmonic reduction capabilities even when using silicon single crystal substrates with normal resistivity, eliminating the need for high-resistivity substrates, allowing for manufacturing with fewer steps and simplifying the processing process. [Brief explanation of the drawing]

[0024] [Figure 1] This is a flowchart illustrating an example of a method for manufacturing an epitaxial wafer according to the present invention. [Figure 2] This is a flowchart illustrating an example of a method for manufacturing SOI wafers according to the present invention. [Figure 3] This is a planar TEM image including the silicon epitaxial film and substrate interface when the carbon atom concentration in Experimental Example 1 is 7.0 × 10¹⁸ atoms / cm³. [Figure 4] This is a cross-sectional TEM image including the interface between the silicon epitaxial film and the substrate in Experimental Example 1, where the carbon atom concentration is 7.0 × 10¹⁸ atoms / cm³. [Figure 5] This is a planar TEM image including the silicon epitaxial film and substrate interface when the carbon atom concentration in Experimental Example 1 is 2.0 × 10¹⁹ atoms / cm³. [Figure 6] These are the lifetime measurement results for epitaxial wafers in Experimental Example 1 and Experimental Example 2. [Figure 7] This graph shows the relationship between the second harmonic characteristics and carbon atom concentration of epitaxial wafers in Experimental Example 1 and Experimental Example 2.

Embodiments for Carrying Out the Invention

[0025] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0026] As described above, due to the requirements for miniaturization, power saving, and cost reduction of communication devices, an epitaxial wafer with further improved high-frequency characteristics, particularly capable of reducing harmonics, has been demanded.

[0027] The inventors of the present invention have intensively studied this problem. First, a carbon-doped silicon epitaxial film with a thickness of 0.5 to 5.5 μm and a carbon atom concentration of 5×10 17 atoms / cm 3 or more and 2×10 19 atoms / cm 3 or less was formed on a silicon single crystal substrate having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less under reduced pressure in a gas atmosphere containing silicon and carbon (for example, monomethylsilane gas or trimethylsilane gas). Then, the epitaxial wafer having the carbon-doped silicon epitaxial film was heat-treated in an atmosphere of 900°C or more and 1100°C or less so as to be able to reduce harmonics more highly. Electrodes with a line length of 2200 μm were formed on these wafers, and the second harmonic was measured. As a result, it was found that the heat-treated wafers showed an excellent second harmonic reduction effect compared to the non-heat-treated samples.

[0028] Among these, it was found that if the silicon epitaxial film has a carbon atom concentration of less than 2×10 19 atoms / cm 3 no defects other than carbon defects are formed, and there is no concern that other types of defects in the wafer will deteriorate the device characteristics. On the other hand, when the carbon atom concentration is 2×10 19 atoms / cm 3 or more, it was confirmed that white defects other than carbon defects are formed by applying heat treatment. From the above, the carbon atom concentration is 2×10 19 atoms / cm 3It is preferable to keep it below a certain value.

[0029] The reason why the heat-treated sample showed a greater reduction in second harmonics compared to an epitaxial wafer that had not undergone heat treatment is that the carbon atom concentration in the silicon epitaxial film was 5 × 10⁻¹⁰ 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 It is less than the typical carbon solid solubility in silicon, which is 3 × 10⁻⁶. 17 atoms / cm 3 This is because the concentration is significantly higher than that of carbon deposits, and therefore, the formation of carbon vacancies through heat treatment can be expected. The aggregation of carbon atoms and the formation of carbon vacancies create new, deeper energy levels in the silicon epitaxial film, resulting in a higher trap density compared to before heat treatment.

[0030] This revealed that silicon epitaxial films with carbon defects formed by heat treatment are effective as trap-rich layers, and that they can be applied to trap-rich SOI wafers used as substrates for active devices.

[0031] Based on the above findings, the inventors have come up with the present invention. That is, one aspect of the present invention is an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, wherein the carbon atom concentration in the silicon epitaxial film is 5 × 10 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 This epitaxial wafer is characterized by having a value less than [value missing] and having carbon defects formed in the silicon epitaxial film.

[0032] Another aspect of the present invention is a silicon single crystal substrate with resistivity of 10 Ω·cm to 5000 Ω·cm, on which a carbon atom concentration of 5 × 10¹⁶ is formed under reduced pressure. 17 atoms / cm 3 The above 2 x 10 19atoms / cm 3 This method for manufacturing an epitaxial wafer is characterized by forming carbon defects in the silicon epitaxial film by vapor-phase growth of a silicon epitaxial film of less than 100°C, followed by heat treatment at a heat treatment temperature of 900°C to 1100°C and a heat treatment time of 1 hour to 36 hours.

[0033] The present invention will be described in detail below with reference to the drawings, but the present invention is not limited thereto.

[0034] [Epitaxial wafer and method for manufacturing the same] Figure 1 shows an example of the method for manufacturing an epitaxial wafer according to the present invention. This method is a method for manufacturing an epitaxial wafer using a silicon epitaxial film on which carbon defects are formed as a trap-rich layer, as described above.

[0035] First, a silicon single crystal substrate 1 with a resistivity of 10 Ω·cm to 5000 Ω·cm is prepared. Next, a gas containing silicon atoms and carbon atoms is supplied onto the silicon single crystal substrate under reduced pressure, resulting in 5 × 10 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 A silicon epitaxial film 2 with a carbon atom concentration of less than 1 (hereinafter referred to as carbon-doped silicon epitaxial film) is grown in the vapor phase. Subsequently, by heat-treating the epitaxial wafer having the carbon-doped silicon epitaxial film 2, carbon defects can be formed within the silicon epitaxial film.

[0036] By performing vapor phase growth of the carbon-doped silicon epitaxial film 2 under reduced pressure, the concentration of impurities other than carbon doped into the silicon epitaxial film can be reduced. The pressure at which the carbon-doped silicon epitaxial film 2 is formed does not need to be particularly limited as long as it is reduced pressure, but it is preferable to perform it at around 10 Torr, for example, between 5 Torr and 20 Torr (10 Torr is approximately 1.3 kPa, and between 5 Torr and 20 Torr is approximately 0.67 kPa and 2.7 kPa).

[0037] As described above, carbon doping in the vapor phase growth of carbon-doped silicon epitaxial film 2 is performed using a gas (raw material gas) containing silicon atoms and carbon atoms. Preferably, the raw material gas contains at least one of monomethylsilane gas and trimethylsilane gas. By using these gases, good carbon doping can be easily performed on the silicon epitaxial film. In addition, the atmosphere of vapor phase growth may contain hydrogen or argon as a carrier gas when supplying the raw material gas.

[0038] By growing a carbon-doped silicon epitaxial film under reduced pressure in the vapor phase at 600-1000°C, a carbon-doped silicon epitaxial film 2 can be successfully formed.

[0039] Furthermore, it is preferable to appropriately set the pressure, temperature, time, and raw material gas concentration for vapor phase growth so that the thickness of the carbon-doped silicon epitaxial film 2 to be formed reaches the desired thickness. The upper and lower limits of the thickness of the carbon-doped silicon epitaxial film are not particularly limited, but considering productivity and cost, they can be, for example, 0.1 μm to 10 μm. Such a thickness would result in a lower cost while still having sufficient high-frequency characteristics. More preferably, the thickness can be 0.5 μm to 5.5 μm, but it is not limited to this.

[0040] The method for heat treatment after deposition of the carbon-doped silicon epitaxial film 2 is not particularly limited; for example, a general heat treatment furnace for silicon wafers or a chamber used for vapor phase growth of the carbon-doped silicon epitaxial film can be used.

[0041] The lower limit of the heat treatment temperature can be set to 900°C or higher. This promotes the formation of carbon defects and improves manufacturing efficiency. The heat treatment time can be set to 1 hour or longer. This ensures sufficient carbon defects are formed, resulting in improved quality. The upper limit of the heat treatment temperature can be set to 1100°C or lower. This minimizes the effects of heavy metal diffusion. The upper limit of the heat treatment time can be set to 36 hours or less. This results in an epitaxial wafer with superior manufacturing efficiency.

[0042] Based on the above, by directly placing an epitaxial wafer into a heat treatment furnace heated to a temperature of 900°C to 1100°C and heat treating it for a period of 1 hour to 36 hours, carbon defects are formed within the silicon epitaxial film formed by vapor phase growth under reduced pressure. In this process, the type of gas used during heat treatment can be selected according to the application, and can be, for example, oxygen gas or inert gases such as argon or nitrogen.

[0043] In this way, the epitaxial wafer of the present invention can be manufactured. The silicon epitaxial film 3, on which carbon defects are formed by heat treatment, functions as a trap-rich layer.

[0044] Of these, 5 x 10 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 If the carbon atom concentration is less than 2 × 10¹⁶, a sufficient number of carbon defects can be formed by heat treatment, and the second harmonic can be reduced more than before heat treatment. On the other hand, if the carbon atom concentration in the silicon epitaxial film is 2 × 10¹⁶ 19 atoms / cm 3 In the above cases, numerous defects other than carbon defects are formed after heat treatment, resulting in a deterioration of quality.

[0045] The resistivity of the silicon single crystal substrate 1 on which the carbon-doped silicon epitaxial film 2 is formed can be set to 10 Ω·cm or more and 5000 Ω·cm or less, as described above, making it suitable for use in high-frequency devices. It is particularly preferable that the resistivity is between 1000 Ω·cm and 5000 Ω·cm, as this provides good high-frequency characteristics and allows for resistivity control during crystal manufacturing.

[0046] Thus, the epitaxial wafer of the present invention is suitable as a wafer for high-frequency devices.

[0047] Furthermore, a wafer in which a carbon-doped epitaxial film is formed on a silicon single crystal substrate is described in Patent Document 3.

[0048] Patent Document 3 refers to an epitaxial film containing a high concentration of carbon, but the intended application is different, and therefore the structure, manufacturing process, and resistivity are different. The present invention is intended for use in wafers for high-frequency devices, while Patent Document 3 mainly refers to image sensors. Therefore, the wafer of the present invention has a two-layer structure of a silicon single-crystal substrate 1 and a silicon epitaxial film 3 on which carbon defects are formed, or the SOI structure described later. In contrast, the wafer of Patent Document 3 is manufactured with a three-layer structure of at least a silicon single-crystal substrate, a carbon-doped epitaxial film, and a silicon epitaxial film. Furthermore, focusing on the heat treatment process, the present invention forms a carbon-doped silicon epitaxial film 2 by vapor phase growth under reduced pressure, and then performs heat treatment to form a silicon epitaxial film 3 on which carbon defects are formed. In addition, when manufacturing an SOI structure, it is manufactured by bonding two substrates manufactured by different processes. In contrast, the wafer described in Patent Document 3 is characterized by requiring a temperature of 750°C or higher in the film deposition process using a conventional epitaxial growth furnace, and does not include a heat treatment process after film deposition. In addition, it does not require a bonding process when forming a multilayer structure.

[0049] Focusing on the required resistivity, the present invention is characterized by the fact that the resistivity of the silicon single crystal substrate 1 can be widely used in the range of 10 Ω·cm to 5000 Ω·cm. In contrast, the wafer of Patent Document 3 is clearly different, as at least one of the silicon epitaxial underlayer, carbon-doped epitaxial film, and silicon single crystal film is a low-resistivity film with a resistivity of 1 Ω·cm or less in order to improve the performance of the image sensor. Furthermore, the wafer of Patent Document 3 does not have the function of a trap-rich layer in the epitaxial film, making it difficult to use as a wafer for high-frequency devices.

[0050] As described above, according to the embodiments of the present invention, an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate 1 having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, wherein the carbon atom concentration in the silicon epitaxial film is 5 × 10 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 An epitaxial wafer can be provided, characterized in that it is less than [a certain value] and carbon defects are formed in the silicon epitaxial film.

[0051] Furthermore, such epitaxial wafers are suitable as wafers for high-frequency devices.

[0052] Furthermore, according to an embodiment of the present invention, on a silicon single crystal substrate 1 with a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, a carbon atom concentration of 5 × 10 is formed under reduced pressure. 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 A method for manufacturing an epitaxial wafer is provided, characterized by forming carbon defects in the silicon epitaxial film by vapor-phase growth of a silicon epitaxial film of less than 100°C, followed by heat treatment at a heat treatment temperature of 900°C to 1100°C and a heat treatment time of 1 hour to 36 hours.

[0053] Furthermore, this method provides a way to manufacture epitaxial wafers suitable for use in high-frequency devices.

[0054] [SOI wafers and methods for manufacturing the same] Next, we will describe a method for manufacturing SOI wafers. An example of the SOI wafer manufacturing method of the present invention is shown in Figure 2. In particular, step S1 in Figure 2 is a step in which an epitaxial wafer (first substrate 4) with carbon defects formed on it is fabricated, and is the same as the method for manufacturing an epitaxial wafer shown in Figure 1.

[0055] Here, the epitaxial wafer (first substrate 4) having a silicon epitaxial film 3 with carbon defects formed on it becomes the base wafer during bonding.

[0056] Furthermore, in step S2 of Figure 2, a second substrate 5 is prepared separately from the epitaxial wafer. The second substrate 5 can be fabricated by first preparing a silicon single crystal substrate 6 and then forming a dielectric layer 7 on its surface. The silicon single crystal substrate 6 can be, for example, a silicon single crystal substrate 6 with a resistivity of about 10 Ω·cm, but is not limited to this. An oxide film can be formed as the dielectric layer 7. When an oxide film is formed as the dielectric layer 7, the oxide film can be formed over the entire substrate surface by thermal oxidation. The second substrate 5 becomes a bond wafer.

[0057] The resistivity of the silicon single crystal substrate 6 on which the dielectric layer 7 is formed can be determined by the specifications of the device to be fabricated. On the other hand, the resistivity of the silicon single crystal substrate 1 on which the carbon-doped silicon epitaxial film 2 is formed is, as mentioned above, between 10 Ω·cm and 5000 Ω·cm.

[0058] The order of step S1, which fabricates the first substrate 4, and step S2, which fabricates the second substrate 5, in Figure 2 does not matter. Either step can be performed first, or they can be performed in parallel.

[0059] After preparing the first substrate 4 and the second substrate 5 as described above, in step S3 of Figure 2, the silicon epitaxial film 3 on which carbon defects are formed on the epitaxial wafer, which is the first substrate 4, and the silicon single crystal substrate 6 on which a dielectric layer 7 is formed on the surface, which is the second substrate 5, are bonded together via the dielectric layer 7. In this way, an SOI wafer 8 can be manufactured.

[0060] Furthermore, after bonding, in step S4 of Figure 2, the portion of the silicon single crystal substrate 6 on the dielectric layer 7 (e.g., oxide film) side can be thinned. This thinning can be achieved to the desired thickness according to the application by polishing, etching, or ion implantation delamination of the silicon single crystal substrate 6 on the dielectric layer 7 (e.g., oxide film) side. The ion implantation delamination method can be performed, for example, by implanting hydrogen ions from the dielectric layer 7 side of the silicon single crystal substrate 6 before bonding as shown in Figure 2 to form an ion implantation layer within the silicon single crystal substrate 6, and then delaminating along the ion implantation layer by heat treatment or the like after bonding. As a result, a thinned silicon single crystal film 9 (silicon single crystal film) is obtained.

[0061] In this way, the SOI wafer 8 of the present invention can be manufactured. The SOI wafer 8 of the present invention is made of a silicon single crystal substrate 1 with a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, with 5 × 10 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 The SOI wafer 8 of the present invention has a structure in which a silicon epitaxial film 3 with carbon defects formed on it, a dielectric layer 7, and a silicon single crystal film 9 are configured in this order, obtained by heat-treating a carbon-doped silicon epitaxial film 2 containing carbon at a concentration of less than 100%. In this case, the silicon epitaxial film 3 with carbon defects formed on it functions as a trap-rich layer. Therefore, the SOI wafer 8 of the present invention is suitable as a wafer for high-frequency devices.

[0062] As described above, according to the embodiments of the present invention, an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate 1 having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, wherein the carbon atom concentration in the silicon epitaxial film is 5 × 10 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 An SOI wafer 8 can be provided, characterized in that a dielectric layer 7 and a silicon single crystal film 9 are configured in this order on a silicon epitaxial film 3 on which carbon defects are formed, which is less than the required amount.

[0063] Furthermore, such SOI wafers 8 are suitable as wafers for high-frequency devices.

[0064] Furthermore, according to an embodiment of the present invention, on a silicon single crystal substrate 1 with a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, a carbon atom concentration of 5 × 10 is formed under reduced pressure. 17 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 This invention provides a method for manufacturing an SOI wafer 8, characterized by producing an epitaxial wafer by vapor-phase growth of a silicon epitaxial film less than 300°C, followed by heat treatment at a temperature of 900°C to 1100°C and a heat treatment time of 1 hour to 36 hours to form carbon defects in the silicon epitaxial film, and then bonding the silicon epitaxial film 3 on the epitaxial wafer, in which carbon defects have been formed, to a silicon single crystal substrate 6 on which a dielectric layer 7 has been formed on its surface, via the dielectric layer 7.

[0065] Furthermore, a method for manufacturing an SOI wafer 8 suitable for use as a wafer for high-frequency devices can be provided.

[0066] [Harmonic characteristics] This section describes the measurement of harmonic characteristics of epitaxial wafers and SOI wafers.

[0067] "In the case of SOI wafers" The harmonic characteristics of an SOI wafer are measured as follows: To measure the second harmonic characteristics (2HD characteristics), first, the top silicon single crystal film is removed, and then a co-planar waveguide (CPW) is formed on the dielectric layer (e.g., oxide film) using a metal (e.g., aluminum). Probes are then grounded to both ends of this metal electrode. Subsequently, a high-frequency signal is input from one of the electrodes, and the second harmonic output from the other side is measured (e.g., input signal frequency: 1 GHz, input power: 15 dBm).

[0068] As a result, when carbon defects are formed by heat treatment in a carbon-doped silicon epitaxial film on a silicon single crystal substrate, the trap density of the trap-rich layer increases compared to before heat treatment, and consequently the carrier trapping ability improves. Therefore, even when the silicon single crystal substrate does not have high resistivity, excellent second-harmonic characteristics can be obtained.

[0069] The harmonic characteristics improve as the thickness of the silicon epitaxial film with carbon defects increases.

[0070] “In the case of epitaxial wafers” The harmonic characteristics of an epitaxial wafer are measured as follows: When measuring the second harmonic characteristics of an epitaxial wafer having a silicon epitaxial film formed by heat treatment after a carbon-doped silicon epitaxial film has been formed on a silicon single crystal substrate, a co-planar waveguide (CPW) is formed on the silicon epitaxial film with carbon defects using the same procedure as above, and probes are grounded to both ends of this metal electrode. Then, a high-frequency signal is input from one of the electrodes, and the second harmonic output from the other side is measured (for example, input signal frequency: 1 GHz, input power: 15 dBm).

[0071] As a result, similar to the case of SOI wafers, when carbon defects are formed by heat treatment in a carbon-doped silicon epitaxial film on a silicon single-crystal substrate, the trap density of the trap-rich layer increases compared to before heat treatment. Consequently, the carrier trapping ability improves, and excellent second-harmonic characteristics can be obtained even when the silicon single-crystal substrate does not have high resistivity.

[0072] Thus, the epitaxial wafer and SOI wafer of the present invention can improve second-harmonic characteristics and are suitable as wafers for high-frequency devices. [Examples]

[0073] The present invention will be described in more detail below with reference to Experimental Examples 1 to 4, but the present invention is not limited to these.

[0074] (Experimental Example 1) An epitaxial wafer of the present invention was manufactured according to Figure 1. A 300 mm diameter silicon single crystal substrate 1 was obtained by slicing an ingot manufactured by the Czochralski method using a reduced-pressure CVD apparatus. On this substrate, a carbon-doped silicon epitaxial film 2 (carbon atom concentration: 2.0 × 10¹⁶) was applied using monomethylsilane as the carbon source gas. 18 ~2.0×10 19 atoms / cm 3 A film with a thickness of 5.5 μm was formed. After film formation, carbon defects were formed in the silicon epitaxial film by heat treatment at 1000°C for 12 hours under an oxygen atmosphere.

[0075] To investigate the structure of the epitaxial wafer, the carbon atom concentration during film deposition was set to 7.0 × 10⁻⁶ 18 atoms / cm 3 An epitaxial wafer with a carbon atom concentration of 2.0 × 10 19 atoms / cm 3Using an epitaxial wafer, TEM observation was performed after heat treatment. The TEM observation obtained a planar TEM image (Figure 3) including the interface between the silicon epitaxial film 3 with carbon defects and the silicon single-crystal substrate 1, and a cross-sectional TEM image (Figure 4) including the surface of the silicon epitaxial film 3 with carbon defects and the interface between the silicon epitaxial film 3 with carbon defects and the silicon single-crystal substrate 1. Here, Figure 3 is a planar TEM image of a thin section sample (approximately 500 nm thick) cut to a depth position including the silicon epitaxial film and substrate interface, and Figure 4 is a cross-sectional TEM image of a thin section sample (approximately 500 nm thick) cut to include the silicon epitaxial film and substrate interface. As a result, the carbon atom concentration during film formation was found to be 7.0 × 10⁻⁶. 18 atoms / cm 3 In the epitaxial wafer, it was found that black carbon defects were formed throughout the silicon epitaxial film after heat treatment following film deposition.

[0076] In contrast, the carbon atom concentration during film formation is 2.0 × 10 19 atoms / cm 3 In the epitaxial wafer, it was found that white defects, which are not carbon defects, are formed by applying heat treatment after film deposition (appearance of silicon epitaxial film 10 with white defects) (see Figure 5). Here, Figure 5 is a planar TEM image of a thin section sample (thickness approximately 500 nm) cut at a depth position that includes the silicon epitaxial film and the substrate interface.

[0077] The epitaxial wafer manufactured for Experimental Example 1 (carbon atom concentration: 2.0 × 10⁻¹⁶) 18 ~2.0×10 19 atoms / cm 3 To investigate the trap density of a wafer with a film thickness of 5.5 μm, the carrier lifetime was measured using the μ-PCD method. As a result, the carrier lifetime of the epitaxial wafer in Experimental Example 1 was found to be 2.0 × 10⁻¹⁶ carbon atom concentration. 18 atoms / cm 3 The wafer has a carbon atom concentration of approximately 7.0 × 10⁻¹⁶ μs.18 atoms / cm 3 The wafer has a carbon atom concentration of approximately 2.0 × 10⁻¹⁶ μs. 19 atoms / cm 3 The lifetime of the wafer was found to be approximately 10⁶ μs (see Figure 6). Here, Figure 6 shows the lifetime measurement results for an epitaxial wafer in which carbon defects were formed by heat treatment in Experimental Example 1, and an epitaxial wafer without heat treatment in Experimental Example 2, which will be described later.

[0078] Next, to investigate the harmonic characteristics of the epitaxial wafer in Experimental Example 1, the second harmonic characteristics were measured. An aluminum electrode with a line length of 2200 μm was formed on a silicon epitaxial film in which carbon defects were formed, and the second harmonic characteristics were measured. As a result, when the input signal frequency was 1 GHz, the second harmonic characteristics were such that the carbon atom concentration was 2.0 × 10⁻⁶ 18 atoms / cm 3 The wafer has a carbon atom concentration of approximately -19.6 dBm and 7.0 × 10⁻¹⁶ 18 atoms / cm 3 The wafer has a carbon atom concentration of approximately -19.0 dBm and 2.0 × 10⁻¹⁶ 19 atoms / cm 3 The wafer showed a harmonic of approximately -19.5 dBm. This result indicates that the epitaxial wafer of Experimental Example 1 can reduce second harmonics (see Figure 7). Here, Figure 7 is a graph showing the relationship between the second harmonic characteristics and carbon atom concentration of the epitaxial wafer in which carbon defects were formed by heat treatment in Experimental Example 1 and the epitaxial wafer in which no heat treatment was applied, as described later in Experimental Example 2.

[0079] (Experimental Example 2) An epitaxial wafer was manufactured using the same method as the epitaxial wafer in Experimental Example 1, differing only in that no heat treatment was performed after film deposition. First, a carbon-doped silicon epitaxial film (carbon atom concentration: 2.0 × 10¹⁶) was applied to a 300 mm diameter silicon single crystal substrate obtained by slicing an ingot manufactured by the Czochralski method using a reduced-pressure CVD apparatus, using monomethylsilane as the carbon source gas.18 ~2.0×10 19 atoms / cm 3 By forming (carbon atom concentration: ~2.0×10 19 atoms / cm, film thickness: 5.5 μm), the epitaxial wafer of Experimental Example 2 was prepared.

[0080] To investigate the trap density of this epitaxial wafer, the carrier lifetime was measured by the μ-PCD method. As a result, the carrier lifetime of the epitaxial wafer of Experimental Example 2 was such that the wafer with a carbon atom concentration of 2.0×10 18 atoms / cm was about 953 μs, the wafer with a carbon atom concentration of 7.0×10 18 atoms / cm was about 805 μs, and the wafer with a carbon atom concentration of 2.0×10 19 atoms / cm was about 101 μs. Referring to Figure 6, when comparing Experimental Example 1 and Experimental Example 2, Experimental Example 1 was able to reduce the carrier lifetime, and this result indicates that the trap density of the epitaxial wafer of Experimental Example 1 increased significantly due to heat treatment. 18 atoms / cm 3 18 atoms / cm 3 19 atoms / cm 3

[0081] Subsequently, to investigate the harmonic characteristics of this epitaxial wafer, the second harmonic characteristics were measured. An aluminum electrode with a line length of 2200 μm was formed on the silicon epitaxial film, and the second harmonic characteristics were measured. As a result, when the frequency of the input signal was 1 GHz, the second harmonic characteristics were such that the wafer with a carbon atom concentration of 2.0×10 18 atoms / cm was about -18.8 dBm, the wafer with a carbon atom concentration of 7.0×10 18 atoms / cm was about -18.5 dBm, and the wafer with a carbon atom concentration of 2.0×10 19 atoms / cm was about -19.3 dBm. Referring to Figure 7, when comparing Experimental Example 1 and Experimental Example 2, Experimental Example 1 was able to reduce the second harmonic characteristics, and this result indicates that the ability of the epitaxial wafer of Experimental Example 1 to reduce the second harmonic due to heat treatment was improved. 18 atoms / cm<​​​​​​​​​​​ Based on the above results, the carbon atom concentration of the carbon-doped silicon epitaxial film is 2 × 10⁻¹⁶. 18 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 It was found that by setting the temperature to less than [a certain value] and fabricating an epitaxial wafer having a silicon epitaxial film in which carbon defects are formed by heat treatment, an epitaxial wafer with excellent high-frequency characteristics can be obtained.

[0083] (Experimental Example 3) The SOI wafer of the present invention was manufactured according to Figure 2. First, a silicon single crystal substrate 1 with a diameter of 300 mm was placed on it with a carbon atom concentration of 2 × 10¹⁶ 18 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 An epitaxial wafer was prepared by depositing a carbon-doped silicon epitaxial film 2 (film thickness: 5.5 μm) under the same conditions as in Experimental Example 1. After film deposition, carbon defects were formed in the silicon epitaxial film by heat treatment at 1000°C for 12 hours in an oxygen atmosphere. This was used as the base wafer (first substrate 4). Separately, a silicon wafer was prepared as a bond wafer (second substrate 5) by forming a 400 nm thick oxide film as a dielectric layer 7 on the surface of a silicon single crystal substrate 6 with a diameter of 300 mm. Next, the surface of the silicon epitaxial film 3 on the base wafer with carbon defects was bonded to the oxide film surface (surface of the dielectric layer 7) of the bond wafer, and the silicon single crystal substrate 6 on the bond wafer side was polished to obtain an SOI wafer 8 with a 1 μm silicon single crystal film remaining.

[0084] (Experimental Example 4) An epitaxial wafer was manufactured using the same method as the epitaxial wafer in Experimental Example 3, differing only in that heat treatment was not performed after the deposition of the carbon-doped epitaxial film. First, a silicon single crystal substrate 1 with a diameter of 300 mm was used to fabricate an epitaxial wafer with a carbon atom concentration of 2.0 × 10⁶ 18 atoms / cm 3An epitaxial wafer was prepared by depositing a carbon-doped silicon epitaxial film 2 (film thickness: 5.5 μm) under the same conditions as in Experimental Example 1, and this was used as the base wafer. Separately, a silicon wafer was prepared as a bond wafer, in which a 400 nm thick oxide film was formed as a dielectric layer 7 on the surface of a silicon single crystal substrate 6 with a diameter of 300 mm. Next, the carbon-doped silicon epitaxial film 2 surface of the base wafer and the oxide film surface (surface of dielectric layer 7) of the bond wafer were bonded, and the silicon single crystal substrate 6 on the bond wafer side was polished to obtain an SOI wafer with a silicon single crystal film remaining at 1 μm.

[0085] The single crystal layers of the SOI wafers in (Experimental Example 3) and (Experimental Example 4) were polished and removed to expose the oxide film layer. Then, an aluminum electrode with a line length of 2200 μm was formed on the oxide film, and the second harmonic characteristics were measured using the same procedure as in Experimental Example 1. The results showed that (Experimental Example 3) was approximately -1 dB better than (Experimental Example 4). Based on these results, the carbon atom concentration of the carbon-doped silicon epitaxial film was set to 2 × 10⁻¹⁶ as shown in (Experimental Example 3). 18 atoms / cm 3 The above 2 x 10 19 atoms / cm 3 It was found that by setting the temperature to less than 350°C and fabricating an SOI wafer 8 having a silicon epitaxial film 3 with carbon defects formed by heat treatment, an SOI wafer 8 with excellent high-frequency characteristics can be obtained.

[0086] The present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention. [Explanation of symbols]

[0087] 1, 6…Silicon single crystal substrate, 2…Carbon-doped silicon epitaxial film, 3…Silicon epitaxial film with carbon defects, 4…First substrate, 5…Second substrate, 7…Dielectric layer, 8…SOI wafer, 9…Thinned silicon single crystal film (silicon single crystal film), 10…Silicon epitaxial film with white defects. S1, S2, S3, S4... Steps.

Claims

1. An epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate with resistivity of 10 Ω·cm to 5000 Ω·cm, wherein the carbon atom concentration in the silicon epitaxial film is 5 × 10 １７ atoms / cm ３ The above 2 x 10 １９ atoms / cm ３ An epitaxial wafer characterized by having a value less than and having carbon defects formed in the silicon epitaxial film.

2. The epitaxial wafer according to claim 1, characterized in that the epitaxial wafer is a wafer for high-frequency devices.

3. An SOI wafer characterized in that, on the silicon epitaxial film of the epitaxial wafer according to claim 1, a dielectric layer and a silicon single crystal film are configured in this order.

4. The SOI wafer according to claim 3, characterized in that the SOI wafer is a wafer for high-frequency devices.

5. On a silicon single crystal substrate with resistivity between 10 Ω·cm and 5000 Ω·cm, under reduced pressure, the carbon atom concentration is 5 × 10 １７ atoms / cm ３ The above 2 x 10 １９ atoms / cm ３ A method for manufacturing an epitaxial wafer, characterized by forming carbon defects in the silicon epitaxial film by vapor-phase growth of a silicon epitaxial film of less than 100°C and then heat-treating it under conditions of a heat treatment temperature of 900°C or more and 1100°C or less and a heat treatment time of 1 hour or more and 36 hours or less.

6. The method for manufacturing an epitaxial wafer according to claim 5, characterized in that the epitaxial wafer is a wafer for high-frequency devices.

7. A method for manufacturing an SOI wafer, characterized by manufacturing an epitaxial wafer by the method of claim 5, and bonding the silicon epitaxial film of the epitaxial wafer to a silicon single crystal substrate having a dielectric layer formed on its surface, via the dielectric layer.

8. The method for manufacturing an SOI wafer according to claim 7, characterized in that the SOI wafer is a wafer for high-frequency devices.

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