Semiconductor device, power converter, and method for manufacturing a semiconductor device

Abstract

The present invention provides a highly reliable semiconductor device by suppressing damage to a semiconductor element and changes in the properties thereof and suppressing the occurrence of insulation defects between conductor patterns of a substrate. A semiconductor device according to the present disclosure comprises: a substrate 20; a semiconductor element 4 that is joined to the substrate 20; a power lead 3 that has an adhesion part 30 in which is formed an adhesion surface 30a facing the substrate 20; an insulating adhesive 40 that is provided between the substrate 20 and the adhesion surface 30a formed in the adhesion part 30 of the power lead 3, and that adheres the substrate 20 and the adhesion surface 30a formed in the adhesion part 30 of the power lead 3; a conductive wire 8a that connects the substrate 20 and the power lead 3; and a resin sealing body 7 that seals the substrate 20, the semiconductor element 4, at least part of the power lead 3, the adhesive 40, and the wire 8a.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device.

Background Art

[0002] In a semiconductor device, a structure in which a substrate on which semiconductor elements are mounted and leads constituting a lead frame are attached to a case, and the case is filled with resin for sealing has been common. Further, as a structure for sealing without using a case, a structure in which a substrate on which semiconductor elements are mounted and leads are put into a molding die, filled with resin, and sealed by transfer molding is known. With such a structure, since a case is not used, miniaturization of the external dimensions of the semiconductor device becomes possible (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the conventional semiconductor device described in Patent Document 1, the substrate and leads are not mounted in a case, so it is necessary to precisely define the relative position of the substrate and leads. However, due to manufacturing variations during the production of semiconductor devices, it is difficult to maintain the distance between the substrate and leads according to the designed specifications. As a result, if the distance between the substrate and leads becomes larger than specified, when the substrate and leads are joined with solder, unsoldered areas occur between the substrate and leads, leading to a decrease in current conductivity and resulting in damage to the semiconductor element or a change in its characteristics. Conversely, if the distance between the substrate and leads becomes smaller than specified, when the substrate and leads are joined with solder, solder flows out from the joint surface of the leads to the surrounding area, causing insulation failure between the conductor patterns on the substrate. When damage to the semiconductor element or a change in its characteristics occurs, or when insulation failure occurs between the conductor patterns on the substrate occurs, the reliability of the semiconductor device decreases.

[0005] This disclosure is made to solve the above-mentioned problems and aims to obtain a highly reliable semiconductor device by suppressing damage and characteristic changes to semiconductor elements, as well as the occurrence of insulation failures between conductor patterns on the substrate. [Means for solving the problem]

[0006] The semiconductor device in this disclosure comprises a substrate, a semiconductor element bonded to the substrate, a power lead having an adhesive portion with an adhesive surface facing the substrate, an insulating adhesive provided between the substrate and the adhesive surface formed on the adhesive portion of the power lead, an insulating wire connecting the substrate and the power lead, a resin encapsulant sealing the substrate, the semiconductor element, at least a portion of the power lead, the adhesive, and the wire, wherein the power lead has an internal power lead sealed in the resin encapsulant, the internal power lead has an adhesive portion, a flat portion, and an inclined portion connecting the adhesive portion and the flat portion, and the wire connects the substrate and the flat portion. The substrate has an insulating substrate and a conductive conductor layer disposed on the surface of the insulating substrate, and the adhesive is provided between the conductive layer of the substrate and the adhesive surface formed at the bonding portion of the power lead, and the conductive layer of the substrate and the adhesive surface formed at the bonding portion of the power lead are bonded together. .

[0007] The power conversion device in this disclosure includes the semiconductor device described above, a main conversion circuit that converts and outputs input power, and a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit.

[0008] The method for manufacturing a semiconductor device in this disclosure includes a lead bonding step of bonding the substrate and the adhesive surface formed on the adhesive portion of the internal power lead to the substrate, with an insulating adhesive in between, and bonding the substrate and the adhesive surface formed on the adhesive portion of the internal power lead to the substrate; a semiconductor element bonding step of bonding a semiconductor element to the substrate; a wire wiring step of connecting the substrate to which the semiconductor element is bonded and the planar portion of the internal power lead bonded to the substrate with a conductive wire; and a sealing step of resin sealing the substrate, the semiconductor element, at least a portion of the power lead bonded to the substrate and the wire after the wire wiring step. Equipped with , The substrate has an insulating substrate and a conductive conductor layer disposed on the surface of the insulating substrate. The adhesive is provided between the conductive layer of the substrate and the adhesive surface formed at the bonding portion of the power lead, and bonds the conductive layer of the substrate and the adhesive surface formed at the bonding portion of the power lead. . [Effects of the Invention]

[0009] According to this disclosure, highly reliable semiconductor devices, power converters, and methods for manufacturing semiconductor devices can be obtained by suppressing damage and characteristic changes to semiconductor elements, as well as the occurrence of insulation failures between conductor patterns on a substrate. Furthermore, the objectives, features, aspects, and advantages related to the technology disclosed in this specification will become even clearer from the detailed description and accompanying drawings set forth below. [Brief explanation of the drawing]

[0010] [Figure 1] This is a plan view showing a semiconductor device in Embodiment 1 of the present disclosure. [Figure 2] This is a schematic cross-sectional view showing a semiconductor device in Embodiment 1 of the present disclosure. [Figure 3] This is a plan view of a main part of a semiconductor device in Embodiment 1 of the present disclosure. [Figure 4] This is a flowchart showing the method for manufacturing a semiconductor device according to Embodiment 1 of the present disclosure. [Figure 5]This is a schematic cross-sectional view showing a modified example of the semiconductor device in Embodiment 1 of the present disclosure. [Figure 6] This is a plan view of a modified part of the semiconductor device in Embodiment 1 of the present disclosure. [Figure 7] This is a schematic cross-sectional view showing a semiconductor device in Embodiment 2 of the present disclosure. [Figure 8] This is a schematic cross-sectional view showing a semiconductor device in Embodiment 3 of the present disclosure. [Figure 9] This is a partial plan schematic diagram showing a semiconductor device in Embodiment 3 of the present disclosure. [Figure 10] This is a plan view of a main part of a semiconductor device in Embodiment 4 of the present disclosure. [Figure 11] This is a block diagram showing the configuration of the power conversion system in Embodiment 5 of the present disclosure. [Modes for carrying out the invention]

[0011] The embodiments will be described below based on the drawings. In the following drawings, the same or corresponding parts will be denoted by the same reference numerals, and their descriptions will not be repeated. Furthermore, the XYZ Cartesian coordinate system is defined such that the Z direction is the vertical direction and the XY plane is the horizontal plane. When positive or negative signs are assigned to directions, the +X, +Y, and +Z directions will refer to the directions of the arrows in the Cartesian coordinate system shown in each figure, as described below.

[0012] Embodiment 1. The configuration of the semiconductor device in Embodiment 1 of this disclosure will be described with reference to Figures 1 to 3. Figure 1 is a plan view showing the semiconductor device in Embodiment 1 of this disclosure. Figure 2 is a schematic cross-sectional view showing the semiconductor device in Embodiment 1 of this disclosure. Figure 3 is a plan view of the main part of the semiconductor device in Embodiment 1 of this disclosure. Figure 3 shows the positional relationship between the substrate 20 and the power lead 3, which is a lead.

[0013] As shown in FIG. 1, the semiconductor device 100 has a heat sink 1 exposed on one side as a heat dissipation surface and is transfer molded by a resin sealing body 7, and has a plurality of power leads 3 and a plurality of control leads 5 protruding from the resin sealing body 7 to the outside. The power lead 3 is a main terminal, and the control lead 5 is a signal terminal. Hereinafter, the power lead 3 and the control lead 5 are collectively referred to as leads.

[0014] Also, as shown in FIGS. 2 and 3, the semiconductor device 100 includes a flat heat sink 1 arranged parallel to the XY plane, an insulating sheet 2 which is an insulating substrate provided on the heat sink 1, and a conductive conductor layer 11 arranged on the surface of the insulating sheet 2. A substrate 20, a semiconductor element 4 joined on the conductor layer 11 via a solder which is a joining member, a power lead 3 adhered on the conductor layer 11 via an insulating adhesive 40, a control lead 5, a control element 6 joined on the control lead 5 via a solder which is a joining member, a first power wire 8a which is a wire electrically connecting the conductor layer 11 and the power lead 3, a second power wire 8b which is a wire electrically connecting the semiconductor element 4 and the power lead 3, a signal wire 9 electrically connecting the semiconductor element 4 and the control element 6, and a control wire 10 electrically connecting the control element 6 and the control lead 5. It has a resin sealing body 7 for sealing at least a part of the substrate 20, the semiconductor element 4, the power lead 3, the control lead 5, the first power wire 8a, the second power wire 8b, and the signal wire 9. The power lead 3 is adhered to the conductor layer 11 of the substrate 20 via an adhesion part 30. The configuration of the adhesion part 30 will be described later. The power lead 3 is arranged on the end of the substrate 20. The control lead 5 is arranged near the end on the opposite side of the end where the power lead 3 is arranged on the substrate 20. Hereinafter, the first power wire 8a and the second power wire 8b are collectively referred to as a power wire 8 which is a wire.

[0015] The heat sink 1 can dissipate the heat generated inside the semiconductor device 100 to the outside, for example, by attaching heat dissipation fins (not shown). The heat sink 1 is made of an alloy obtained by adding magnesium (Mg) or manganese (Mn) to aluminum (Al), for example. Note that the material of the heat sink 1 may be other metals, or may not be limited to metals, but may be inorganic or organic substances with high thermal conductivity.

[0016] The insulating sheet 2 is a sheet composed of an insulating filler and a resin, and is joined to the heat sink 1. Note that instead of the insulating sheet 2, a ceramic substrate, a metal substrate with an insulating member sandwiched between layers, a glass epoxy substrate, or the like may be used.

[0017] The power lead 3 is formed of copper (Cu) and has a bent structure. The power lead 3 includes an adhesive portion 30 adhered to the conductor layer 11 via an adhesive 40 and a lead portion 33. The adhesive portion 30 has a flat plate shape, and an adhesive surface 30a facing the conductor layer 11 of the substrate 20 is formed. That is, the conductor layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 are adhered via the adhesive 40. The lead portion 33 is connected to the adhesive portion 30. In FIG. 2, L indicates the distance between the conductor layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. The lead portion 33 is composed of an internal power lead 31 sealed inside the resin sealing body 7 and an external power lead 32 protruding from the resin sealing body 7 toward the +X direction, as shown by the boundary line along the line A-A in FIG. 2.

[0018] The internal power lead 31 includes an inclined portion 31a and a flat portion 31b. The flat portion 31b is spaced apart from the conductive layer 11 and has a flat plate shape that extends parallel to the surface of the conductive layer 11. The adhesive portion 30 and the flat portion 31b of the internal power lead 31 are connected by the inclined portion 31a. This inclined portion 31a also has the effect of absorbing variations in the distance L between the substrate 20 and the adhesive surface 30a. The CC line in Figure 2 indicates the boundary line between the inclined portion 31a and the flat portion 31b of the internal power lead 31. The DD line in Figure 2 indicates the boundary line between the inclined portion 31a and the adhesive portion 30. In other words, the power lead 3 has a stepped portion including the inclined portion 31a formed in the internal power lead 31 connected to the adhesive portion 30.

[0019] The external power lead 32 is bent in the +Z direction on the semiconductor device 100, opposite to the side where the heat sink 1 is provided, and its surface is tin (Sn) plated.

[0020] The first power wire 8a electrically connects the flat portion 31b of the internal power lead 31 to the conductive layer 11, straddling the stepped portion including the inclined portion 31a. The number of first power wires 8a is not particularly limited. Furthermore, since the first power wire 8a is arranged to straddle the stepped portion including the inclined portion 31a, it can act as a reinforcing member for the stepped portion including the inclined portion 31a between the substrate 20 and the power lead 3. Note that the first power wire 8a electrically connects the flat portion 31b of the internal power lead 31 to the conductive layer 11, but is not limited to this. The first power wire 8a may also electrically connect the inclined portion 31a of the internal power lead 31 to the conductive layer 11, and in this case as well, it can act as a reinforcing member for the stepped portion including the inclined portion 31a. Furthermore, although the first power wire 8a is bent so that its central portion is separated from the stepped portion including the inclined portion 31a, the first power wire 8a may also have a straight shape.

[0021] The first power wire 8a and the second power wire 8b are made of a material such as aluminum (Al), which is a metal with high conductivity. However, the material constituting the first power wire 8a and the second power wire 8b is not limited to aluminum. The material constituting the first power wire 8a and the second power wire 8b may be any metal with high conductivity, such as an aluminum alloy containing trace amounts of additives such as iron (Fe) or copper (Cu).

[0022] The adhesive 40 is provided between the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and adheres the conductive layer 11 of the substrate 20 to the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. As shown in Figures 2 and 3, the adhesive 40 may be provided over the entire surface of the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, or it may be provided over a portion of the adhesive surface 30a.

[0023] The adhesive 40 is liquid at room temperature and is composed of a material containing an insulating thermosetting resin with a curing temperature of 100 to 240°C. Preferably, it is composed of a material containing at least one of a silicone resin, an epoxy resin, or an acrylic resin. The adhesive 40 composed of a material containing a thermosetting resin may be made liquid using a solvent. In this embodiment, an adhesive containing a silicone resin is used. The curing time of the adhesive 40 can be adjusted to a desired time by adjusting the ratio of thermosetting resin contained in the adhesive 40. For example, the curing time can be adjusted to within 60 to 120 seconds.

[0024] Furthermore, the adhesive 40 is not limited to a material containing a thermosetting resin, but may also be composed of a material containing a UV-curable resin, which is an insulating photocurable resin. The adhesive 40 composed of a material containing a UV-curable resin is liquid at room temperature. Preferably, the material containing the UV-curable resin is composed of a material containing at least one of the following: a silicone resin, a cationic epoxy resin, or a radical acrylic resin. The curing time of the adhesive 40 can be adjusted to a desired time by adjusting the ratio of the UV-curable resin contained in the adhesive 40 and the integrated amount of UV light irradiated, for example, the curing time can be adjusted to within 5 to 120 seconds.

[0025] The adhesive 40 may also be composed of an insulating composite material in which the above-mentioned thermosetting resin or photocurable resin is mixed with fillers, etc. In this case as well, the curing time can be adjusted to a desired time by adjusting the ratio of thermosetting resin contained in the adhesive 40 and the temperature at which the adhesive 40 is heated, or the ratio of UV-curable resin contained in the adhesive 40 and the integrated amount of UV light irradiated onto the adhesive 40.

[0026] The semiconductor element 4 is an IGBT (Insulated Gate Bipolar Transistor) made of silicon (Si) as the semiconductor material. The semiconductor element 4 is provided by being joined to the conductive layer 11 of the substrate 20 by solder, which is a bonding member. The gate electrode (not shown) of the semiconductor element 4 is electrically connected to the internal power lead 31 by a second power wire 8b and to the control element 6, which will be described later, by a signal wire 9. The control element 6 and the semiconductor element 4 transmit and receive signals from each other via the signal wire 9. The material that makes up the signal wire 9 is a metal such as gold (Au), copper (Cu), or a copper alloy.

[0027] In this embodiment, a semiconductor device equipped with an IGBT as the semiconductor element 4 is described, but it is not limited to this, and may also be equipped with semiconductor elements such as a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or a diode. Furthermore, in this embodiment, an example in which the semiconductor element 4 is made of Si is described, but it is not limited to this, and may be made of a wide-bandgap semiconductor material such as silicon carbide (SiC), gallium nitride (GaN), or diamond (C).

[0028] The control lead 5 is made of copper (Cu) and has a bent structure. The control lead 5 consists of an internal control lead 51 located inside the resin encapsulant 7, as indicated by the BB line in Figure 2, and an external control lead 52 that protrudes from the resin encapsulant 7 in the -X direction. The internal control lead 51 has a planar structure and is equipped with a control element 6. The external control lead 52 is bent in the +Z direction, and its surface is tin (Sn) plated.

[0029] The control element 6 is provided by being soldered onto the internal control lead 51. The control element 6 is also electrically connected to the control lead 5 by the control wire 10. Note that the bonding material between the control element 6 and the internal control lead 51 is not limited to solder; a die-bonding material such as silver paste may also be used.

[0030] The resin encapsulant 7 encapsulates at least the substrate 20, the semiconductor element 4, at least a portion of the power lead 3, the adhesive 40, and the first power wire 8a. The resin encapsulant 7 is formed by transfer molding. A portion of the power lead 3 and a portion of the control lead 5 include portions that protrude to the outside of the resin encapsulant 7. That is, the external power lead 32 and the external control lead 52 are exposed to the outside of the resin encapsulant 7. The back surface of the heat sink 1, which is the heat dissipation surface of the heat sink 1 and is opposite to the surface to which the insulating sheet 2 is connected, is exposed from the resin encapsulant 7. The resin encapsulant 7 is formed from an insulating resin such as epoxy resin, silicone resin, urethane resin, polyimide resin, polyamide resin, or acrylic resin, or an insulating composite material in which a filler is dispersed in any of these resins.

[0031] Next, a method for manufacturing a semiconductor device having semiconductor elements will be described. Figure 4 is a flowchart showing the method for manufacturing a semiconductor device in Embodiment 1 of this disclosure.

[0032] In step S11 of Figure 4, the lead bonding process begins by placing an insulating adhesive 40 between the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 so that it faces the conductive layer 11 of the substrate 20. In other words, the adhesive 40 is placed at a predetermined position on the conductive layer 11 of the substrate 20, and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 is placed on top of the adhesive 40.

[0033] If the adhesive 40 is made of a material containing a thermosetting resin, the liquid adhesive 40 wets and spreads over the entire area of ​​the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. With the entire area of ​​the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 covered with adhesive 40, the substrate 20 is heated, causing the temperature of the substrate 20 to rise, and the heat from the substrate 20 is transferred to the adhesive 40, accelerating the curing of the adhesive 40 until the curing of the adhesive 40 is completed.

[0034] Furthermore, if the adhesive 40 is made of a material containing a UV-curable resin, the liquid UV-curable resin wets and spreads over the entire surface of the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. With the entire surface of the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 covered by the adhesive 40, the curing of the adhesive 40 is accelerated by irradiating the adhesive 40 with UV light containing light in the wavelength range of 400 nm or less, and the curing of the adhesive 40 is completed.

[0035] As a result, the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 provided on the power lead 3 are bonded together by the adhesive 40.

[0036] Next, as part of the semiconductor element bonding process in step S12 in Figure 4, first, the semiconductor element 4 is placed on the conductive layer 11 of the substrate 20 with solder, which is the bonding member, in between. That is, solder is placed at a specified position on the conductive layer 11 of the substrate 20, and the semiconductor element 4 is placed on top of the solder. Similarly, solder is placed at a specified position on the internal control lead 51 of the control lead 5, and the control element 6 is placed on top of the solder. Then, the electrodes (not shown) on the back of the semiconductor element 4 are bonded to the conductive layer 11 of the substrate 20 by heating the solder. Similarly, the electrodes (not shown) on the back of the control element 6 are bonded to the internal control lead 51 of the control lead 5 by heating the solder.

[0037] In the semiconductor device manufacturing method, the semiconductor element bonding process in step S12 is performed after the lead bonding process in step S11, but the lead bonding process in step S11 may be performed after the semiconductor element bonding process in step S12.

[0038] Next, in step S13 of Figure 4, as a wire wiring process, the conductive layer 11 of the substrate 20 to which the semiconductor element 4 is bonded and the planar portion 31b of the internal power lead 31 provided on the power lead 3 are connected by a first power wire 8a using ultrasonic wire bonding. That is, the conductive layer 11 of the substrate 20 and the internal power lead 31 provided on the power lead 3 bonded to the substrate 20 are electrically connected by the first power wire 8a. Similarly, the semiconductor element 4 and the power lead 3 bonded to the substrate 20 are electrically connected by a second power wire 8b. Similarly, the semiconductor element 4 and the control element 6 are electrically connected by a signal wire 9. Similarly, the control element 6 and the control lead 5 are electrically connected by a control wire 10.

[0039] Furthermore, in step S14 of Figure 4, as a sealing process, the heat sink 1, the substrate 20 provided on the heat sink 1, the semiconductor element 4 bonded to the substrate 20, the power leads 3 which are leads bonded to the substrate 20, the control leads 5, the control element 6 bonded to the control leads 5, the first power wire 8a which connects the substrate 20 and the power leads 3, the second power wire 8b which connects the semiconductor element 4 and the power leads 3, the signal wire 9 which connects the semiconductor element 4 and the control element 6, and the control wire 10 which connects the control element 6 and the control leads 5 are placed in a mold (not shown). The substrate 20, the semiconductor element 4, at least a portion of the power leads 3 bonded to the substrate 20, the first power wire 8a, etc. are sealed in a resin encapsulant 7 that is pressurized and heated by transfer molding using a tablet-shaped molding resin. As a result, the resin encapsulant 7 forms the outer shape of the semiconductor device 100. One side of the heat sink 1 is exposed from the resin encapsulant 7.

[0040] As described above, according to Embodiment 1 of the present disclosure, the semiconductor device 100 includes an insulating adhesive 40 provided between the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, which adheres the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and a conductive first power wire 8a connecting the substrate 20 and the power lead 3.

[0041] Furthermore, the substrate 20 has an insulating sheet 2 which is an insulating substrate and a conductive conductor layer 11 disposed on the surface of the insulating sheet 2, and the adhesive 40 is provided between the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and adheres the conductive layer 11 and the adhesive surface 30a formed on the adhesive portion 30.

[0042] The effects of the semiconductor device 100 in this disclosure are described below. In a semiconductor device 100 with a structure sealed by transfer molding, manufacturing variations during the manufacturing of the semiconductor device 100 make it difficult to maintain the distance L between the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 in the lead bonding step S11 according to the designed specifications. Therefore, if the distance L between the substrate 20 and the adhesive surface 30a becomes larger than specified, when the substrate 20 and the adhesive surface 30a are joined with solder, unbonded areas will occur between the substrate 20 and the adhesive surface 30a, resulting in a decrease in current conductivity and causing damage to the semiconductor element 4 or a change in its characteristics. Also, if the distance L between the substrate 20 and the adhesive surface 30a becomes smaller than specified, when the substrate 20 and the adhesive surface 30a are joined with solder, solder will flow out from the adhesive surface 30a to the surrounding area, resulting in insulation failure between the conductor patterns of the substrate 20. Furthermore, damage to or changes in the characteristics of the semiconductor element 4, or insulation failures between the conductor patterns on the substrate 20, can potentially reduce the reliability of the semiconductor device.

[0043] By providing an insulating adhesive 40 to bond the substrate 20 to the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and a conductive first power wire 8a to connect the substrate 20 and the power lead 3, even if the distance L between the substrate 20 and the adhesive surface 30a becomes larger than specified, and an unbonded portion occurs between the substrate 20 and the adhesive surface 30a due to the adhesive 40, the substrate 20 and the power lead 3 are electrically connected by the conductive first power wire 8a, allowing current to flow without a decrease in conductivity. As a result, damage to the semiconductor element 4 or changes in its characteristics can be suppressed, and a highly reliable semiconductor device can be obtained.

[0044] Similarly, by providing an insulating adhesive 40 that bonds the substrate 20 to the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and a conductive first power wire 8a that connects the substrate 20 and the power lead 3, even if the distance L between the substrate 20 and the adhesive surface 30a becomes smaller than specified, and the adhesive 40 flows out from the adhesive surface 30a into the surrounding area, the occurrence of insulation failure between the conductor patterns of the substrate 20 can be prevented because the adhesive 40 is made of an insulating material. As a result, damage to the semiconductor element 4 or changes in its characteristics can be suppressed, and a highly reliable semiconductor device can be obtained.

[0045] In this embodiment of the semiconductor device 100, the adhesive surface 30a formed on the adhesive portion 30 provided on the power lead 3, one of the leads which are power leads 3 and control leads 5, is bonded to the conductive layer 11 of the substrate 20 with an insulating adhesive 40. This is because, in particular, if the substrate 20 and the adhesive portion 30 provided on the power lead 3 are joined with solder, there is a tendency for unbonded areas of solder or solder to leak out from the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 to the surrounding area.

[0046] A modified example of the semiconductor device of Embodiment 1 of this disclosure will now be described. Figure 5 is a schematic cross-sectional view showing a modified example of the semiconductor device in Embodiment 1 of this disclosure. Figure 6 is a plan view of the main part showing a modified example of the semiconductor device in Embodiment 1 of this disclosure.

[0047] In the modified embodiment 1 of this disclosure, the semiconductor device 101 differs from that of the semiconductor device 100 in the shape of the conductive layer 11 disposed on the surface of the insulating sheet 2 constituting the substrate 20. Also, the location where the adhesive 40 is provided on the substrate 20 differs from that of the semiconductor device 100 in embodiment 1 of this disclosure. Other configurations of the semiconductor device 101 in the modified embodiment 1 of this disclosure are the same as those of the semiconductor device 100 in embodiment 1 of this disclosure.

[0048] As shown in Figures 5 and 6, the semiconductor device 101 differs from the semiconductor device 100 in the shape of the conductive layer 11 disposed on the surface of the insulating sheet 2 that constitutes the substrate 20. Instead of the conductive layer 11 of the substrate 20, the insulating sheet 2 of the substrate 20 is provided at the position opposite to the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. The adhesive 40 is provided between the insulating sheet 2 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. In other words, the substrate 20 has an insulating sheet 2 which is an insulating substrate and a conductive conductive layer 11 disposed on the surface of the insulating sheet 2, and the adhesive 40 is provided between the insulating sheet 2 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and adheres the insulating sheet 2 and the adhesive surface 30a formed on the adhesive portion 30.

[0049] Next, a method for manufacturing a semiconductor device in a modified example of Embodiment 1 of this disclosure will be described. The flowchart corresponding to the method for manufacturing a semiconductor device in the modified example of Embodiment 1 of this disclosure corresponds to the flowchart showing the method for manufacturing a semiconductor device in Embodiment 1 of this disclosure shown in Figure 4. Furthermore, the semiconductor element bonding process, wire wiring process, and sealing process in the modified example of Embodiment 1 of this disclosure are the same manufacturing methods as those in Embodiment 1 of this disclosure. Therefore, in the modified example of Embodiment 1 of this disclosure, the explanation of the same processes as in Embodiment 1 of this disclosure will be omitted.

[0050] In a modified embodiment of the present disclosure, the method for manufacturing a semiconductor device is as follows, in the lead bonding step S11 in Figure 4, as shown in Figures 5 and 6, first, the adhesive 40 is placed on the insulating sheet 2 of the substrate 20, with the adhesive 40 in between, so that the adhesive surface 30a formed on the adhesive portion 30 provided on the power lead 3 faces the insulating sheet 2 of the substrate 20. In other words, the adhesive 40 is placed at a predetermined position on the insulating sheet 2 of the substrate 20, and the adhesive surface 30a formed on the adhesive portion 30 provided on the power lead 3 is placed so that it is in contact with the adhesive 40.

[0051] Next, by curing the adhesive 40 in the same manner as in Embodiment 1 of this disclosure, the insulating sheet 2 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 provided on the power lead 3 are bonded together by the adhesive 40.

[0052] The semiconductor device 101 configured in this way can achieve the same effects as the semiconductor device 100 shown in Figures 2 and 3. Furthermore, since the adhesive 40 adheres the insulating sheet 2 of the substrate 20 to the adhesive surface 30a of the power lead 3, the conductive layer 11 opposite the adhesive surface 30a of the power lead 3 becomes unnecessary, thus reducing the amount of material used in the conductive layer 11. In addition, it is no longer necessary to consider the position of the adhesive 40 on the conductive layer 11 of the substrate 20, improving the degree of freedom in the design of the arrangement of semiconductor elements and wiring in the conductive layer 11.

[0053] Embodiment 2. The configuration of the semiconductor device in Embodiment 2 of this disclosure will be described with reference to Figure 7. Figure 7 is a schematic cross-sectional view showing the semiconductor device in Embodiment 2 of this disclosure.

[0054] The semiconductor device 200 shown in Embodiment 2 of this disclosure differs from the semiconductor device 100 shown in Embodiment 1 of this disclosure in that the shape of the power lead 3 is different. Also, the semiconductor device 200 shown in Embodiment 2 of this disclosure differs from the semiconductor device 100 shown in Embodiment 1 of this disclosure in that it includes a support member 41 between the substrate 20 and the power lead 3. The other configurations of the semiconductor device 200 in Embodiment 2 of this disclosure are the same as those of the semiconductor device 100 in Embodiment 1 of this disclosure. Furthermore, although this description only describes the case in which the adhesive 40 is provided between the conductive layer 11 of the substrate 20 and the adhesive portion 30 of the power lead 3 to bond the conductive layer 11 and the adhesive portion 30, it goes without saying that the following description is also similar in the case in which the adhesive 40 is provided between the insulating sheet 2 of the substrate 20 and the adhesive portion 30 of the power lead 3 to bond the insulating sheet 2 and the adhesive portion 30.

[0055] As shown in Figure 7, the semiconductor device 200 has a different shape for the power lead 3 than the semiconductor device 100, and the internal power lead 31 includes a flat portion 31b but does not include an inclined portion 31a. The flat portion 31b is separated from the conductive layer 11 and the insulating sheet 2 and has a flat plate shape that extends parallel to the surfaces of the conductive layer 11 and the insulating sheet 2. The adhesive portion 30 and the flat portion 31b of the internal power lead 31 are connected. The EE line in Figure 7 indicates the boundary line between the adhesive portion 30 and the flat portion 31b of the internal power lead 31.

[0056] The semiconductor device 200 includes a support member 41 between the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. The support member 41 is a spacer member formed of a silicone resin and has the shape of a rectangular prism with a front surface and a back surface. In Embodiment 2 of this disclosure, the case in which the support member 41 is formed of a silicone resin is described, but it is not limited to this, and any resin having heat resistance and insulating properties may be used, such as a polyimide resin or an epoxy resin. Also, in Embodiment 2 of this disclosure, the support member 41 is described as having the shape of a rectangular prism, but the support member 41 does not need to be a strictly rectangular prism, and may have the shape of a cylinder or polygonal prism with a front surface and a back surface, for example, depending on the shape of the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3.

[0057] Furthermore, the semiconductor device 200 includes an adhesive 40 composed of a first adhesive 40a and a second adhesive 40b. The first adhesive 40a is provided between the conductive layer 11 of the substrate 20 and the back surface of the support member 41, and adheres the conductive layer 11 of the substrate 20 to the back surface of the support member 41. The second adhesive 40b is provided between the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 and the surface of the support member 41, and adheres the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 to the surface of the support member 41.

[0058] Next, the method for manufacturing a semiconductor device in Embodiment 2 of this disclosure will be described. The flowchart corresponding to the method for manufacturing a semiconductor device in Embodiment 2 of this disclosure corresponds to the flowchart showing the method for manufacturing a semiconductor device in Embodiment 1 of this disclosure, shown in Figure 4. Furthermore, the semiconductor element bonding process, wire wiring process, and sealing process in Embodiment 2 of this disclosure are the same manufacturing methods as those in Embodiment 1 of this disclosure. Therefore, the explanation of the same processes as in Embodiment 1 of this disclosure will be omitted in Embodiment 2 of this disclosure.

[0059] In the method for manufacturing a semiconductor device in Embodiment 2 of this disclosure, as shown in Figure 7, the lead bonding step S11 in Figure 4 is first performed by placing a first adhesive 40a at a predetermined position on the conductive layer 11 of the substrate 20, and positioning the support member 41 so that its back surface is in contact with the first adhesive 40a. Subsequently, a second adhesive 40b is placed so that the front surface of the support member 41 is in contact with the second adhesive 40b, and positioning the power lead 3 so that the adhesive surface 30a formed on the adhesive portion 30 is in contact with the second adhesive 40b.

[0060] Next, by curing the first adhesive 40a and the second adhesive 40b in the same manner as the curing method for the adhesive 40 in Embodiment 1 of this disclosure, the conductive layer 11 of the substrate 20 and the back surface of the support member 41 are bonded by the first adhesive 40a, and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 and the surface of the support member 41 are bonded by the second adhesive 40b.

[0061] As described above, according to Embodiment 2 of the present disclosure, the semiconductor device 200 further comprises a support member 41 having a front surface and a back surface, which is disposed between the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. The adhesive 40 is composed of a first adhesive 40a and a second adhesive 40b. The first adhesive 40a is provided between the substrate 20 and the back surface of the support member 41 to bond the substrate 20 and the back surface of the support member 41. The second adhesive 40b is provided between the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 and the front surface of the support member 41 to bond the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 and the front surface of the support member 41.

[0062] Since the support member 41 is a resin spacer member, its shape can be easily adjusted. Therefore, the support member 41 functions as a spacer member to support the power lead 3 so that the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 is positioned at a desired distance from the conductive layer 11 of the substrate 20. Consequently, it becomes unnecessary to form an inclined portion in the power lead 3 according to the distance between the substrate 20 and the power lead 3, making the manufacturing of the power lead 3 easier. Furthermore, since the support member 41 is less susceptible to large deformations due to the weight of the power lead 3, the distance between the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 can be adjusted with high precision, resulting in a highly reliable semiconductor device.

[0063] Furthermore, by forming the support member 41 from a highly insulating resin, the impact on the overall electrical characteristics of the semiconductor device 200 can be suppressed, resulting in a semiconductor device with improved reliability.

[0064] Embodiment 3. The configuration of the semiconductor device in Embodiment 3 of this disclosure will be described with reference to Figures 8 and 9. Figure 8 is a schematic cross-sectional view showing the semiconductor device in Embodiment 3 of this disclosure. Figure 9 is a schematic partial plan view showing the semiconductor device in Embodiment 3 of this disclosure, and as indicated by arrow Z1 in Figure 8, it is a partial plan view showing the adhesive surface 30a within the dotted line frame as seen in the direction of the adhesive surface 30a formed on the adhesive portion 30 of the opposing power lead 3 from the surface of the conductive layer 11 of the substrate 20.

[0065] The semiconductor device 300 shown in Embodiment 3 of this disclosure differs from the semiconductor device 100 shown in Embodiment 1 of this disclosure in that the shape of the power lead 3 is different. The other configurations of the semiconductor device 300 in Embodiment 3 of this disclosure are the same as those of the semiconductor device 100 in Embodiment 1 of this disclosure. Furthermore, although this description only describes the case in which the adhesive 40 is provided between the conductive layer 11 of the substrate 20 and the adhesive portion 30 of the power lead 3 to bond the conductive layer 11 and the adhesive portion 30, it goes without saying that the following description is also applicable to the case in which the adhesive 40 is provided between the insulating sheet 2 of the substrate 20 and the adhesive portion 30 of the power lead 3 to bond the insulating sheet 2 and the adhesive portion 30.

[0066] As shown in Figure 8, the semiconductor device 300 has a recess 34a formed in the adhesive surface 30a of the adhesive portion 30 of the power lead 3. The recess 34a, viewed from the direction of arrow Z1 in Figure 8, is circular in plan view, as shown in Figure 9(A), which shows a partial plan view within the dotted line frame of Figure 8. The adhesive 40 is held in place by the recess 34a.

[0067] As described above, according to Embodiment 3 of the present disclosure, the semiconductor device 300 has a recess 34a in the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3.

[0068] In this way, by further providing a recess 34a in the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, when the adhesive 40 is applied between the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, the adhesive portion 30 can stably hold the liquid adhesive 40, thereby obtaining a highly reliable semiconductor device.

[0069] In the embodiment 3 of this disclosure, as shown in Figure 9(A), the recess 34a formed in the adhesive surface 30a of the adhesive portion 30 of the power lead 3 is described as being circular in plan view, but it is not limited to this. The shape of the recess may be, for example, as shown in Figure 9(B), the recess 34b may be elliptical in plan view, or as shown in Figure 9(C), the recess 34c may be rectangular in plan view. The same effects as the recess 34a shown in Figure 9(A) can be obtained with the recess 34b shown in Figure 9(B) and the recess 34c shown in Figure 9(C) provided in this way.

[0070] Embodiment 4. The configuration of the semiconductor device in Embodiment 4 of this disclosure will be described with reference to Figure 10. Figure 10 is a plan view of the main part of the semiconductor device in Embodiment 4 of this disclosure.

[0071] The semiconductor device 400 shown in Embodiment 4 of this disclosure has an internal power lead 131 with a different shape from the internal power lead 31 in the semiconductor device 100 shown in Embodiment 1 of this disclosure. The other configurations of the semiconductor device 400 in Embodiment 4 of this disclosure are the same as those of the semiconductor device 100 in Embodiment 1 of this disclosure.

[0072] As shown in Figure 10, the semiconductor device 400 has multiple adhesive portions 30 connected to the inclined portions 131a of the internal power leads 131. The positions where the adhesive 40 is placed are predetermined positions on the conductive layer 11 of the substrate 20.

[0073] In the semiconductor device described herein, due to manufacturing variations during the manufacturing of the semiconductor device, it may be difficult to maintain the distance L between the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 in the lead bonding process of step S11. Therefore, by providing multiple adhesive portions 30 connected to the inclined portion 131a of the internal power lead 131, even if a portion of the distance L between the substrate 20 and the adhesive surface 30a becomes larger than specified, the total adhesive area between the substrate 20 and the adhesive surface 30a can be increased, thereby improving stability against manufacturing variations.

[0074] Furthermore, by providing multiple adhesive portions 30 connected to the inclined portion 131a of the internal power lead 131, the total adhesive area between the substrate 20 and the adhesive surface 30a is increased, thereby avoiding problems such as the substrate 20 and the adhesive surface 30a peeling off in processes after lead bonding.

[0075] Embodiment 5. Embodiment 5 of this disclosure applies the semiconductor device described in any of Embodiments 1 to 3 above to a power converter. Although this disclosure is not limited to a specific power converter, Embodiment 5 of this disclosure will be described below in which the disclosure is applied to a three-phase inverter.

[0076] Figure 11 is a block diagram showing the configuration of a power conversion system to which the power conversion device in Embodiment 5 of this disclosure is applied.

[0077] The power conversion system shown in Figure 11 consists of a power source 500, a power converter 600, and a load 700. The power source 500 is a DC power source and supplies DC power to the power converter 600. The power source 500 can be composed of various components, for example, a DC grid, a solar cell, or a battery, or it may be composed of a rectifier circuit or AC / DC converter connected to an AC grid. Alternatively, the power source 500 may be composed of a DC / DC converter that converts DC power output from a DC grid into a predetermined power.

[0078] The power converter 600 is a three-phase inverter connected between the power supply 500 and the load 700. It converts the DC power supplied from the power supply 500 into AC power and supplies the AC power to the load 700. As shown in Figure 11, the power converter 600 includes a main conversion circuit 601 that converts DC power into AC power and outputs it, and a control circuit 603 that outputs a control signal to the main conversion circuit 601 to control the main conversion circuit 601.

[0079] Load 700 is a three-phase motor driven by AC power supplied from power converter 600. Note that Load 700 is not limited to a specific application; it is a motor installed in various electrical devices, such as hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.

[0080] The details of the power converter 600 are described below. The main conversion circuit 601 includes switching elements and freewheeling diodes (not shown), and the switching elements convert the DC power supplied from the power supply 500 into AC power, which is then supplied to the load 700. There are various specific circuit configurations for the main conversion circuit 601, but the main conversion circuit 601 in Embodiment 5 of this disclosure is a two-level three-phase full-bridge circuit and can be composed of six switching elements and six freewheeling diodes antiparallel to each switching element. Each switching element and each freewheeling diode of the main conversion circuit 601 is composed of a semiconductor device 602 corresponding to any of the embodiments 1, 2, 3, or 4 described above. The six switching elements are connected in series in pairs to form upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 601, are connected to the load 700.

[0081] Furthermore, the main conversion circuit 601 includes a drive circuit (not shown) for driving each switching element. The drive circuit may be built into the semiconductor device 602, or it may be configured to be a separate drive circuit from the semiconductor device 602. The drive circuit generates a drive signal to drive the switching elements of the main conversion circuit 601 and supplies it to the control electrodes of the switching elements of the main conversion circuit 601. Specifically, according to the control signal from the control circuit 603, which will be described later, it outputs a drive signal to turn on the switching element and a drive signal to turn off the switching element to the control electrodes of each switching element. When the switching element is kept in the ON state, the drive signal is a voltage signal (ON signal) that is greater than or equal to the threshold voltage of the switching element, and when the switching element is kept in the OFF state, the drive signal is a voltage signal (OFF signal) that is less than or equal to the threshold voltage of the switching element.

[0082] The control circuit 603 controls the switching elements of the main converter circuit 601 so that the desired power is supplied to the load 700. Specifically, it calculates the time (on time) that each switching element of the main converter circuit 601 should be in the ON state based on the power to be supplied to the load 700. For example, the main converter circuit 601 can be controlled by PWM (Pulse Width Modulation) control, which modulates the on time of the switching elements according to the voltage to be output. The control circuit 603 then outputs a control command (control signal) to the drive circuit of the main converter circuit 601 so that an ON signal is output to the switching elements that should be in the ON state at each point in time, and an OFF signal is output to the switching elements that should be in the OFF state. The drive circuit outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element according to this control signal.

[0083] In the power conversion device of Embodiment 5 of this disclosure, since the semiconductor device described in any of Embodiments 1 to 4 is used as the switching element and freewheeling diode of the main conversion circuit 601, improved reliability can be achieved.

[0084] Embodiment 5 of this disclosure describes an example of applying the disclosure to a two-level three-phase inverter, but the disclosure is not limited to this and can be applied to various power conversion devices. Although Embodiment 5 of this disclosure uses a two-level power conversion device, it may also be a three-level or multi-level power conversion device, and the disclosure may be applied to a single-phase inverter when supplying power to a single-phase load. Furthermore, the disclosure can also be applied to a DC / DC converter or an AC / DC converter when supplying power to a DC load, etc.

[0085] Furthermore, the power conversion device to which this disclosure is applied is not limited to cases where the load is an electric motor, but can also be used, for example, as a power supply for electrical discharge machining equipment, laser processing equipment, induction heating cookers, or non-contact power supply systems, and can even be used as a power conditioner for solar power generation systems or energy storage systems.

[0086] Although preferred embodiments have been described in detail above, the invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims.

[0087] The various aspects of this disclosure are summarized below as an appendix.

[0088] (Note 1) circuit board and A semiconductor element bonded to the aforementioned substrate, A power lead having an adhesive portion with an adhesive surface facing the substrate, An insulating adhesive is provided between the substrate and the adhesive surface formed on the adhesive portion of the power lead, and the substrate and the adhesive surface formed on the adhesive portion of the power lead are bonded together. A conductive wire connecting the substrate and the power lead, A resin encapsulant that seals the substrate, the semiconductor element, at least a portion of the power lead, the adhesive, and the wire, A semiconductor device equipped with the following features. (Note 2) The power lead comprises an internal power lead sealed with the resin sealant, The semiconductor device according to Appendix 1, wherein the internal power lead has an adhesive portion, a flat portion, and an inclined portion connecting the adhesive portion and the flat portion. (Note 3) The adhesive material includes at least one of a silicone resin, an epoxy resin, and an acrylic resin. Semiconductor device as described in Appendix 1 or 2. (Note 4) The semiconductor device according to any one of the appendices 1 to 3, wherein the material of the wire comprises at least one of Al and Cu. (Note 5) The substrate comprises an insulating substrate and a conductive layer disposed on the surface of the insulating substrate. The adhesive is provided between the conductive layer of the substrate and the adhesive surface formed on the adhesive portion of the power lead, and adheres the conductive layer of the substrate and the adhesive surface formed on the adhesive portion of the power lead. A semiconductor device as described in any one of the items 1 to 4 of the appendix. (Note 6) The substrate comprises an insulating substrate and a conductive layer disposed on the surface of the insulating substrate. The adhesive is provided between the insulating substrate of the substrate and the adhesive surface formed on the adhesive portion of the power lead, and adheres the insulating substrate of the substrate and the adhesive surface formed on the adhesive portion of the power lead. A semiconductor device as described in any one of the items 1 to 4 of the appendix. (Note 7) The support member is further disposed between the substrate and the adhesive surface formed on the adhesive portion of the power lead, and has a front surface and a back surface. The adhesive consists of a first adhesive and a second adhesive, the first adhesive being provided between the substrate and the back surface of the support member to bond the substrate and the back surface of the support member, and the second adhesive being provided between the adhesive surface formed on the adhesive portion of the power lead and the surface of the support member to bond the adhesive surface formed on the adhesive portion of the power lead and the surface of the support member. A semiconductor device as described in any one of the appendices 1 to 6. (Note 8) The power lead is a semiconductor device according to any one of the appendices 1 to 7, having a recess in the adhesive surface formed in the adhesive portion. (Note 9) Multiple adhesive portions are provided to connect to the inclined portion of the internal power lead. Semiconductor device as described in Appendix 2. (Note 10) A semiconductor device described in any one of the appendices 1 to 9, and a main conversion circuit that converts and outputs the input power, A power conversion device comprising: a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit. (Note 11) A lead bonding step is performed by placing an insulating adhesive between the substrate and the power lead so that the adhesive surface formed on the adhesive portion of the power lead faces the substrate, and bonding the substrate and the adhesive surface formed on the adhesive portion of the power lead. A semiconductor element bonding step of bonding a semiconductor element to the substrate, A wire wiring step of connecting the substrate on which the semiconductor elements are bonded and the power leads bonded to the substrate with a conductive wire, Following the wire wiring process, a sealing process is performed in which the substrate, the semiconductor element, at least a portion of the power lead, and the wire are sealed with resin. A method for manufacturing a semiconductor device equipped with [the specified features]. [Explanation of Symbols]

[0089] 1 Heat sink, 2 Insulating sheet (insulating substrate), 3 Power lead (lead), 4 Semiconductor element, 5 Control lead (lead), 6 Control element, 7 Resin encapsulant, 8 Power wire (wire), 8a First power wire (wire), 8b Second power wire (wire), 9 Signal wire, 10 Control wire, 11 Conductive layer, 20 Substrate, 30 Adhesive part, 30a Adhesive surface, 31, 131 Internal power lead, 31a, 131a Inclined part, 31b Flat part, 32 External power lead, 33 Lead part, 34a, 34b, 34c Recess, 40 Adhesive, 40a First adhesive, 40b Second adhesive, 41 Support member, 51 Internal control lead, 52 External control lead, 100, 101, 200, 300, 400, 602 Semiconductor device, 500 Power supply, 600 power converter, 601 main converter circuit, 603 control circuit, 700 load.

Claims

1. circuit board and A semiconductor element bonded to the aforementioned substrate, A power lead having an adhesive portion with an adhesive surface facing the substrate, An insulating adhesive is provided between the substrate and the adhesive surface formed on the adhesive portion of the power lead, and the substrate and the adhesive surface formed on the adhesive portion of the power lead are bonded together. A conductive wire connecting the substrate and the power lead, A resin encapsulant that seals the substrate, the semiconductor element, at least a portion of the power lead, the adhesive, and the wire, Equipped with, The power lead has an internal power lead sealed in the resin sealant, The internal power lead has an adhesive portion, a flat portion, and an inclined portion connecting the adhesive portion and the flat portion. The wire connects the substrate and the flat portion. The substrate comprises an insulating substrate and a conductive layer disposed on the surface of the insulating substrate. The adhesive is provided between the conductive layer of the substrate and the adhesive surface formed on the adhesive portion of the power lead, and adheres the conductive layer of the substrate and the adhesive surface formed on the adhesive portion of the power lead. Semiconductor equipment.

2. circuit board and A semiconductor element bonded to the aforementioned substrate, A power lead having an adhesive portion with an adhesive surface facing the substrate, An insulating adhesive is provided between the substrate and the adhesive surface formed on the adhesive portion of the power lead, and the substrate and the adhesive surface formed on the adhesive portion of the power lead are bonded together. A conductive wire connecting the substrate and the power lead, A resin encapsulant that seals the substrate, the semiconductor element, at least a portion of the power lead, the adhesive, and the wire, Equipped with, The power lead has an internal power lead sealed in the resin sealant, The internal power lead has an adhesive portion, a flat portion, and an inclined portion connecting the adhesive portion and the flat portion. The wire connects the substrate and the flat portion. The substrate comprises an insulating substrate and a conductive layer disposed on the surface of the insulating substrate. The adhesive is provided between the insulating substrate of the substrate and the adhesive surface formed on the adhesive portion of the power lead, and adheres the insulating substrate of the substrate and the adhesive surface formed on the adhesive portion of the power lead. Semiconductor equipment.

3. The adhesive material includes at least one of a silicone resin, an epoxy resin, and an acrylic resin. The semiconductor device according to claim 1 or 2.

4. The semiconductor device according to claim 1 or 2, wherein the material of the wire comprises at least one of Al and Cu.

5. The support member is further disposed between the substrate and the adhesive surface formed on the adhesive portion of the power lead, and has a front surface and a back surface. The adhesive consists of a first adhesive and a second adhesive, the first adhesive being provided between the substrate and the back surface of the support member to bond the substrate and the back surface of the support member, and the second adhesive being provided between the adhesive surface formed on the adhesive portion of the power lead and the surface of the support member to bond the adhesive surface formed on the adhesive portion of the power lead and the surface of the support member. The semiconductor device according to claim 1 or 2.

6. The semiconductor device according to claim 1 or 2, wherein the power lead has a recess in the adhesive surface formed in the adhesive portion.

7. Multiple adhesive portions are provided to connect to the inclined portion of the internal power lead. The semiconductor device according to claim 1 or 2.

8. A semiconductor device according to claim 1 or 2, comprising a main conversion circuit that converts and outputs input power, A power conversion device comprising: a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit.

9. A lead bonding step is performed by placing an insulating adhesive between the substrate and the power lead so that the adhesive surface formed on the adhesive portion of the internal power lead faces the substrate, and bonding the substrate and the adhesive surface formed on the adhesive portion of the internal power lead. A semiconductor element bonding step of bonding a semiconductor element to the substrate, A wire wiring step of connecting the substrate on which the semiconductor elements are bonded and the planar portion of the internal power lead bonded to the substrate with a conductive wire, The process includes, after the wire wiring step, a sealing step in which the substrate, the semiconductor element, at least a portion of the power lead bonded to the substrate, and the wire are sealed with resin. The substrate comprises an insulating substrate and a conductive layer disposed on the surface of the insulating substrate. The adhesive is provided between the conductive layer of the substrate and the adhesive surface formed on the adhesive portion of the power lead, and adheres the conductive layer of the substrate and the adhesive surface formed on the adhesive portion of the power lead. A method for manufacturing a semiconductor device.

10. A lead bonding step is performed by placing an insulating adhesive between the substrate and the power lead so that the adhesive surface formed on the adhesive portion of the internal power lead faces the substrate, and bonding the substrate and the adhesive surface formed on the adhesive portion of the internal power lead. A semiconductor element bonding step of bonding a semiconductor element to the substrate, A wire wiring step of connecting the substrate on which the semiconductor elements are bonded and the planar portion of the internal power lead bonded to the substrate with a conductive wire, The process includes, after the wire wiring step, a sealing step in which the substrate, the semiconductor element, at least a portion of the power lead bonded to the substrate, and the wire are sealed with resin. The substrate comprises an insulating substrate and a conductive layer disposed on the surface of the insulating substrate. The adhesive is provided between the insulating substrate of the substrate and the adhesive surface formed on the adhesive portion of the power lead, and adheres the insulating substrate of the substrate and the adhesive surface formed on the adhesive portion of the power lead. A method for manufacturing a semiconductor device.

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