Multiplexing control device for motors

Abstract

This invention provides technology for applying a multiplexing control device to motor control. [Solution] The multiplexing control device 210 comprises three controllers C that output analog voltage signals including current command values ​​for the U-phase, V-phase, and W-phase of the motor 300; switches SW1 to SW3 provided for each controller C that switch between connecting and disconnecting the output line; a U-phase intermediate value selection unit 211U that receives the U-phase output value of each switch SW and selects the midpoint of the input U-phase output value; a V-phase intermediate value selection unit 211V that receives the V-phase output value of each switch SW and selects the midpoint of the input V-phase output value; a W-phase intermediate value selection unit 211W that receives the W-phase output value of each switch SW and selects the midpoint of the input W-phase output value; and a PWM output unit 212 that generates and outputs a PWM signal based on the respective midpoint values ​​of the U-phase, V-phase, and W-phase.

Description

Technical Field

[0001] The present invention relates to a multiplexing control technology for motors.

Background Art

[0002] A multiplexing control device disclosed in Patent Document 1 may be used for controlling various parts such as a hydraulic actuator of an aircraft. The multiplexing control device disclosed in Patent Document 1 includes three controllers. The same input signal is input to the three controllers, and the three controllers output the same output signal. The respective output signals of the three controllers are input to a majority decision circuit. The majority decision circuit takes a majority decision of the inputs from the three controllers to determine the final output. In this way, the multiplexing control device disclosed in Patent Document 1 constitutes a multiple redundant system processing circuit that can obtain a correct processing result as output data even if a failure occurs in some systems.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] It is required to use a multiplexing control device such as the technology described in Patent Document 1 for controlling a motor that drives a rotor of a flying object such as an electric vertical take-off and landing aircraft (hereinafter referred to as eVTOL).

[0005] In view of the above, an object of the present invention is to provide a technology for applying a multiplexing control device to motor control.

Means for Solving the Problems

[0006] To solve the above problems, a multiplexing control device according to one aspect of the present invention includes: three controllers that output U-phase, V-phase, and W-phase analog voltage signals including current command values ​​for the U-phase, V-phase, and W-phase, respectively, for a motor; an output line provided for each controller that transmits the U-phase, V-phase, and W-phase analog voltage signals output from each controller; a switch provided for each controller that switches between connecting and disconnecting the output line; a U-phase intermediate value selection unit that receives the U-phase output value of each switch via the output line and selects the second largest intermediate value among the input U-phase output values; a V-phase intermediate value selection unit that receives the V-phase output value of each switch via the output line and selects the second largest intermediate value among the input V-phase output values; a W-phase intermediate value selection unit that receives the W-phase output value of each switch via the output line and selects the second largest intermediate value among the input W-phase output values; and a PWM output unit that generates and outputs a PWM signal based on the respective intermediate values ​​of the U-phase, V-phase, and W-phase.

[0007] Furthermore, any combination of the above components, as well as conversions of the expression of the present invention between methods, apparatus, systems, recording media, computer programs, etc., are also valid embodiments of the present invention. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a technique for applying a multiplexing control device to motor control. [Brief explanation of the drawing]

[0009] [Figure 1] This is a schematic top view showing an eVTOL according to an embodiment. [Figure 2] This is a schematic diagram of the motor control device according to the embodiment. [Figure 3] This is a schematic diagram of the first controller of the embodiment. [Figure 4] This is a schematic diagram of the first switch according to the embodiment. [Figure 5] This diagram shows the status of the multiplexing control device for each case. [Modes for carrying out the invention]

[0010] Embodiment Below, an embodiment of a multiplexing control device applicable to aircraft such as eVTOLs will be described with reference to the drawings.

[0011] Figure 1 is a schematic top view of the eVTOL1 of this embodiment. The eVTOL1 of this embodiment is configured as an unmanned aerial vehicle capable of taking off and landing vertically. The eVTOL1 comprises a main body 10 that constitutes the fuselage portion of the eVTOL1, six arms 20, and six rotor blades 30. Each arm 20 supports the rotor blade 30 provided on it. The six rotor blades 30 are each located at the end of the arm 20. Each rotor blade 30 has three blades 35 arranged at equal angular intervals from each other. The eVTOL1 of this embodiment is an example of an aircraft.

[0012] Each rotor section 30 includes a motor control device 200, a motor 300, and a rotation detection sensor 400. The motor 300 is rotationally driven by power supplied from the battery 50. The motor 300 is, for example, a three-phase brushless motor. The motor control device 200 controls the drive of the motor 300 based on a speed command from the higher-level control device 100. The rotation detection sensor 400 detects the rotational speed of the rotor section 30. In this embodiment, the rotation detection sensor 400 detects the rotational speed of the rotor (not shown) of the motor 300 as the rotational speed of the rotor section 30, but is not limited to this, and may, for example, detect the rotational speed of the blades 35 of the rotor section 30. The detection result of the rotation detection sensor 400 is output to the higher-level control device 100.

[0013] The main unit 10 houses a battery 50 and a higher-level control unit 100. The battery 50 supplies power to the higher-level control unit 100, motor control units 200, motors 300, rotation detection sensors 400, etc., provided on each rotor blade section 30. The battery 50 is a rechargeable secondary battery, such as a lithium-ion battery.

[0014] The higher-level control unit 100 performs various processes in the eVTOL 1. The higher-level control unit 100 is configured to communicate with motor control devices 200 provided on each rotor section 30. The higher-level control unit 100 outputs a speed command to the motor control device 200 for controlling the motor 30 to control the rotational speed of the rotor section 30. The speed command in this embodiment includes a command value for the rotational speed of the rotor section 30 (hereinafter referred to as the speed command value). The higher-level control unit 100 generates the speed command value in the speed command in response to user input via a user controller (not shown) for the user to operate the eVTOL 1.

[0015] Figure 2 is a schematic diagram of the motor control device 200 of this embodiment. As shown in Figure 2, the motor control device 200 comprises a multiplexing control device 210 and a gate driver 220.

[0016] The multiplexing control device 210 comprises first to third controllers C1 to C3, first to third switches SW1 to SW3, U-phase intermediate value selection unit 211A, V-phase intermediate value selection unit 211B, W-phase intermediate value selection unit 211C, PWM output unit 212, first to third U-phase output lines OU1 to OU3, first to third V-phase output lines OV1 to OV3, and first to third W-phase output lines OW1 to OW3. The first to third controllers C1 to C3 have basically the same function, except where specifically mentioned, but are configured with different designs. The first to third switches SW1 to SW3 have basically the same configuration, except where specifically mentioned. In this specification, when describing any of the first to third controllers C1 to C3, they may be collectively referred to as controller C. Similarly, when describing any of the first to third switches SW1 to SW3, they may be collectively referred to as switch SW. Furthermore, when describing any of the U-phase intermediate value selection unit 211A, V-phase intermediate value selection unit 211B, and W-phase intermediate value selection unit 211C, they may be collectively referred to as the intermediate value selection unit 211.

[0017] The first U-phase output line OU1, the first V-phase output line OV1, and the first W-phase output line OW1 connect the first controller C1 and the three-phase intermediate value selection unit 211. The second U-phase output line OU2, the second V-phase output line OV2, and the second W-phase output line OW2 connect the second controller C2 and the three-phase intermediate value selection unit 211. The third U-phase output line OU3, the third V-phase output line OV3, and the third W-phase output line OW3 connect the third controller C3 and the three-phase intermediate value selection unit 211.

[0018] The first controller C1 generates a three-phase analog value voltage signal (hereinafter referred to as an analog voltage signal) indicating the current command values CurU_1, CurV_1, and CurW_1 of the U-phase, V-phase, and W-phase for the motor 300 based on the speed command from the upper controller 100. The second controller C2 generates a three-phase analog voltage signal indicating the current command values CurU_2, CurV_2, and CurW_2 of each phase for the motor 300 based on the speed command from the upper controller 100. The third controller C3 generates a three-phase analog voltage signal indicating the current command values CurU_3, CurV_3, and CurW_3 of each phase for the motor 300 based on the speed command from the upper controller 100.

[0019] Also, the first controller C1 outputs the state signals St1_1, St1_2, and St1_3 to the first to third switches SW1 to SW3 respectively. The second controller C2 outputs the state signals St2_1, St2_2, and St2_3 to the first to third switches SW1 to SW3 respectively. The third controller C3 outputs the state signals St3_1, St3_2, and St3_3 to the first to third switches SWI to SW3 respectively. Hereinafter, when explaining any of the state signals St1_1, St1_2, St1_3, St2_1, St2_2, St2_3, St3_1, St3_2, and St3_3, they may be collectively referred to as the state signal St. The state signal St will be described later.

[0020] The first switch SW1 switches the connection and disconnection of the first U-phase output line OU1, the first V-phase output line OV1, and the first W-phase output line OW1. The first switch SW1 is turned on when the first controller C1 is normal (not faulty), and supplies three-phase analog voltage signals including current command values CurU_1, CurV_1, and CurW_1 to each of the intermediate value selection units 211 from the first controller C1. The first switch SW1 is turned off when the first controller C1 fails, and cuts off the supply of three-phase analog voltage signals including current command values CurU_1, CurV_1, and CurW_1 to each of the intermediate value selection units 211 from the first controller C1. As a result, a value of 0 is input to each intermediate value selection unit 211 as the current command value of each phase of the first controller C1.

[0021] The second switch SW2 switches the connection and disconnection of the second U-phase output line OU2, the second V-phase output line OV2, and the second W-phase output line OW2. The second switch SW2 is turned on when the second controller C2 is normal, and supplies three-phase analog voltage signals including current command values CurU_2, CurV_2, and CurW_2 to each of the intermediate value selection units 211 from the second controller C2. The second switch SW2 is turned off when the second controller C2 fails, and cuts off the supply of three-phase analog voltage signals including current command values CurU_2, CurV_2, and CurW_2 to each of the intermediate value selection units 211 from the second controller C2. As a result, a value of 0 is input to each intermediate value selection unit 211 as the current command value of each phase of the second controller C2.

[0022] The third switch SW3 switches between connecting and disconnecting the third U-phase output line OU3, the third V-phase output line OV3, and the third W-phase output line OW3. The third switch SW3 is ON when the third controller C3 is functioning correctly, and supplies three-phase analog voltage signals, including current command values ​​CurU_3, CurV_3, and CurW_3, from the third controller C3 to each of the intermediate value selection units 211. The third switch SW3 is OFF when the third controller C3 fails, and disconnects the supply of three-phase analog voltage signals, including current command values ​​CurU_3, CurV_3, and CurW_3, from the third controller C3 to each of the intermediate value selection units 211. As a result, each intermediate value selection unit 211 receives a value of 0 as the current command value for each phase of the third controller C3.

[0023] The U-phase intermediate value selection unit 211A is connected to the first to third switches SW1 to SW3 via the first to third U-phase output lines OU1 to OU3. The output values ​​for the U-phase of the first to third switches SW1 to SW3 are input to the U-phase intermediate value selection unit 211A via the first to third U-phase output lines OU1 to OU3.

[0024] The V-phase intermediate value selection unit 211B is connected to the first to third switches SW1 to SW3 via the first to third V-phase output lines OV1 to OV3. The V-phase intermediate value selection unit 211B receives the output values ​​for the V-phase of the first to third switches SW1 to SW3 via the first to third V-phase output lines OV1 to OV3.

[0025] The W-phase intermediate value selection unit 211C is connected to the first to third switches SW1 to SW3 via the first to third W-phase output lines OW1 to OW3. The W-phase intermediate value selection unit 211C receives the output values ​​for the W phase of the first to third switches SW1 to SW3 via the first to third W-phase output lines OW1 to OW3.

[0026] The U-phase intermediate value selection unit 211A selects the intermediate value from three values ​​for the U-phase input from the first to third switches SW1 to SW3 to set the U-phase current target value CurU, and outputs an analog voltage signal including the U-phase current target value CurU to the PWM output unit 212. The V-phase intermediate value selection unit 211B selects the intermediate value from three values ​​for the V-phase input from the first to third switches SW1 to SW3 to set the V-phase current target value CurV, and outputs an analog voltage signal including the V-phase current target value CurV to the PWM output unit 212. The W-phase intermediate value selection unit 211C selects the intermediate value from three values ​​for the W-phase input from the first to third switches SW1 to SW3 to set the W-phase current target value CurW, and outputs an analog voltage signal including the W-phase current target value CurW to the PWM output unit 212. Here, the intermediate value refers to the second largest value among the three values ​​input to the intermediate value selection unit 211. For example, if the intermediate value selection unit 211 receives the values ​​0, 2, and 3, the second largest value, 2, will be selected as the intermediate value. Also, for example, if the intermediate value selection unit 211 receives the values ​​0, 0, and 3, the second largest value, 0, will be selected as the intermediate value.

[0027] For example, if the first to third controllers C1 to C3 are all functioning correctly, the U-phase intermediate value selection unit 211A receives a voltage signal containing three current command values ​​CurU_1, CurU_2, and CurU_3. For example, if the current command values ​​CurU_1, CurU_2, and CurU_3 are in increasing order, the U-phase intermediate value selection unit 211A selects current command value CurU_2 as the intermediate value from among the current command values ​​CurU_1, CurU_2, and CurU_3 and outputs it to the PWM output unit 212. Similarly, the V-phase intermediate value selection unit 211B selects an intermediate value from the current command values ​​CurV_1, CurV_2, and CurV_3 and outputs it to the PWM output unit 212. Similarly, the W-phase intermediate value selection unit 211C selects an intermediate value from the current command values ​​CurW_1, CurW_2, and CurW_3 and outputs it to the PWM output unit 212.

[0028] On the other hand, for example, if only the first controller C1 among the first to third controllers C1 to C3 is faulty, the first switch SW1 will be in the off state. A value of 0 is input to the U-phase intermediate value selection unit 211A as the current command value. In this case, the U-phase intermediate value selection unit 211A selects an intermediate value from the current command values ​​0, CurU_2, and CurU_3. For example, if the current command value CurU_3 is greater than the current command value CurU_2, the U-phase intermediate value selection unit 211A selects the current command value CurU_2 as the intermediate value and outputs it to the PWM output unit 212. Similarly, the V-phase intermediate value selection unit 211B selects the current command value CurV_2 or CurV_3 as the intermediate value and outputs it to the PWM output unit 212. Similarly, the W-phase intermediate value selection unit 211C selects the current command value CurW_2 or CurW_3 as the intermediate value and outputs it to the PWM output unit 212.

[0029] The PWM output unit 212 receives analog voltage signals including the U-phase current target value CurU, the V-phase current target value CurV, and the W-phase current target value CurW. Based on the U-phase current target value CurU, the V-phase current target value CurV, and the W-phase current target value CurW, and a carrier wave (carrier wave) such as a triangular wave carrier, the PWM output unit 212 generates and outputs PWM signals Up, Ud, Vp, Vd, Wp, and Wd to drive each switching element (not shown) of the three-phase bridge circuit.

[0030] The gate driver 220 has a U-phase arm, a V-phase arm, and a W-phase arm, each consisting of two switching elements (not shown) connected in series. Coils for the corresponding phases in the motor 300 are connected between the two switching elements of the U, V, and W-phase arms of the gate driver 220. The gate driver 220 generates U-phase, V-phase, and W-phase currents Iu, Iv, and Iw, respectively, based on the PWM signals Up and Ud, Vp, and Vd, as well as Wp and Wd, using a known method, and outputs them to the motor 300 via the U-phase, V-phase, and W-phase arms. The motor 300 is controlled by the U-phase, V-phase, and W-phase currents Iu, Iv, and Iw of the gate driver 220. The switching elements used in the gate driver 220 in this embodiment are IGBTs, but are not limited to them; for example, FETs may also be used.

[0031] The multiplex control device 210 includes first to fourth detection units 213A to 213C and 214. The first to third detection units 213A to 213C detect three-phase current command values output from the switch SW. For example, the first detection unit 213A detects the current command values in the first U-phase output line OU1, the first V-phase output line OV1, and the first W-phase output line OW1, and supplies them to the second switch SW2 and the third switch SW3, respectively. For example, the second detection unit 213B detects the current command values in the second U-phase output line OU2, the second V-phase output line OV2, and the second W-phase output line OW2, and supplies them to the first switch SW1 and the third switch SW3, respectively. For example, the third detection unit 213C detects the current command values in the third U-phase output line OU3, the third V-phase output line OV3, and the third W-phase output line OW3, and supplies them to the first switch SW1 and the second switch SW2, respectively.

[0032] The fourth detection unit 214 detects each analog voltage signal including the three-phase currents Cur_U, Cur_V, and Cur_W output from the intermediate value selection unit 211, and outputs them to the first to third controllers C1 to C3.

[0033] Also, a fifth detection unit 215 is connected to the gate driver 220. The fifth detection unit 215 detects the three-phase currents Iu, Iv, and Iw output from the gate driver 220, and outputs them to the first to third controllers C1 to C3.

[0034] FIG. 3 is a schematic configuration diagram of the first controller C1 of the present embodiment. The first controller C1 includes a current command generation unit 51, a Clarke conversion unit 52, a Park conversion unit 53, a d-axis target value generation unit 54, a q-axis target value generation unit 55, an inverse Park conversion unit 56, an inverse Clarke conversion unit 57, and first to third state monitoring units 58 to 60.

[0035] The current command generation unit 51 generates d-axis current command values ​​and q-axis current command values ​​based on the difference between the speed command input from the higher-level control device 100 and the rotational speed detected by the rotation detection sensor 33, so as to follow the speed command from the higher-level control device 100. The current command generation unit 51 outputs the d-axis current command value to the d-axis target value generation unit 54 and the q-axis current command value to the q-axis target value generation unit 55.

[0036] The Clarke transformer 52 performs a Clarke transform on the measured values ​​of the three-phase currents Iu, Iv, and Iw generated by the fifth detection unit 215 to calculate the currents Iα and Iβ in a two-phase Cartesian coordinate (fixed coordinate) system (α,β) and outputs them to the Parke transformer 53. The Parke transformer 53 performs a Parke transform on the currents Iα and Iβ to calculate the q-axis detection value Iq and the d-axis detection value Id of the rotating coordinate from the two-phase fixed coordinate currents Iα and Iβ and outputs them to the d-axis target value generation unit 54 and the q-axis target value generation unit 55.

[0037] The d-axis target value generation unit 54 sets the d-axis current target value based on the d-axis current command value output from the current command generation unit 51, the rotation speed output from the rotation detection sensor 33, and the d-axis detection value Id output from the park conversion unit 53. The d-axis target value generation unit 54d also calculates the d-axis voltage target value at predetermined intervals based on the d-axis current target value. For example, the d-axis target value generation unit 54 performs current feedback control, such as proportional-integral control (PI control), on the current deviation between the d-axis detection value Id and the d-axis current target value. As a result, the d-axis voltage target value is calculated so that the d-axis detection value Id approaches the d-axis current target value, and output to the inverse park conversion unit 56. Similarly, the q-axis target value generation unit 55 sets the q-axis current target value based on the q-axis current command value and the q-axis detection value Iq output from the park conversion unit 53, calculates the q-axis voltage target value, and outputs it to the inverse park conversion unit 56.

[0038] The reverse Park transformer 56 calculates the voltages Vα and Vβ of the two-phase fixed coordinates from the rotating coordinates by performing a reverse Park transform on the d-axis voltage target value and the q-axis voltage target value. The reverse Clark transformer 57 generates a three-phase analog voltage signal including current command values ​​CurU_1, CurV_1, and CurW_1 by performing a reverse Clark transform on the voltages Vα and Vβ of the two-phase fixed coordinates, and outputs it to the first switch SW1 and the first to third state monitoring units 58 to 60.

[0039] The first state monitoring unit 58 receives the current command values ​​CurU_1, CurV_1, and CurW_1 included in the three-phase analog voltage signals generated by the inverse Clarke converter 57, and the detection results from the second detection unit 213B as input. The first state monitoring unit 58 compares the difference between the three-phase current command values ​​CurU_1, CurV_1, and CurW_1 generated by the inverse Clarke converter 57 and the three-phase detection results from the second detection unit 213B with a predetermined threshold. For example, if the difference between this difference and the predetermined threshold for all three phases is smaller than the other predetermined threshold, the first state monitoring unit 58 determines that the second controller C2 is not faulty and outputs a value of 1 as a state signal St1_2 to the second switch SW2. For example, if the difference between this difference and the predetermined threshold for any of the three phases is greater than or equal to the other threshold, the first state monitoring unit 58 determines that the second controller C2 is faulty and outputs a value of 0 as a state signal St1_2 to the second switch SW2. For example, if the second controller C2 malfunctions and abnormal values ​​are output as CurU_2, CurV_2, and CurW_2, or if the second switch SW2 is shut off and outputs a value of 0 from the second switch SW2, the status signal St1_2 will output a value of 0.

[0040] The second state monitoring unit 59 receives the current command values ​​CurU_1, CurV_1, and CurW_1 included in the three-phase analog voltage signal generated by the inverse Clarke converter 57, and the detection result of the third detection unit 213C as input. The second state monitoring unit 59 compares the difference between the current command values ​​CurU_1, CurV_1, and CurW_1 included in the three-phase analog voltage signal generated by the inverse Clarke converter 57 and the detection result of the three phases of the third detection unit 213C with a predetermined threshold. For example, if the difference between this difference and the predetermined threshold for all three phases is smaller than the other predetermined threshold, the second state monitoring unit 59 determines that the third controller C3 is not faulty and outputs a value of 1 as a state signal St1_3 to the third switch SW3. For example, if the difference between this difference and the predetermined threshold for any of the three phases is greater than or equal to the other threshold, the second state monitoring unit 59 determines that the third controller C3 is faulty and outputs a value of 0 as a state signal St1_3 to the third switch SW3. For example, if the third controller C3 fails and abnormal values ​​are output as CurU_3, CurV_3, and CurW_3, or if the third switch SW3 is shut off and outputs a value of 0 from the third switch SW3, the status signal St1_3 will output a value of 0.

[0041] The third state monitoring unit 60 receives the current command values ​​CurU_1, CurV_1, and CurW_1 included in the three-phase analog voltage signals generated by the inverse Clarke converter 57, and the detection results of the fourth detection unit 214 as input. For example, the third state monitoring unit 60 compares the difference between the current command values ​​CurU_1, CurV_1, and CurW_1 included in the three-phase analog voltage signals generated by the inverse Clarke converter 57 and the detection results of the three phases of the fourth detection unit 214 with a predetermined threshold. For example, if the difference between this difference and the predetermined threshold for all three phases is smaller than the other predetermined threshold, the third state monitoring unit 60 determines that the first controller C1 is not faulty and outputs a value of 1 as a state signal St1_1 to the first switch SW1. For example, if the difference between this difference and the predetermined threshold for any of the three phases is greater than or equal to the other threshold, the third state monitoring unit 60 determines that the first controller C1 is faulty and outputs a value of 0 as a state signal St1_1 to the first switch SW1. For example, if the first controller C1 malfunctions and abnormal values ​​are output as CurU_1, CurV_1, and CurW_1, or if the first switch SW1 is shut off and a value of 0 is output from the first switch SW1, a value of 0 will be output as the status signal St1_1.

[0042] The second controller C2 outputs status signals St2_1, St2_2, and St2_3 in the same manner as the first controller C1. For example, the first state monitoring unit 58 of the second controller C2 determines whether there is an abnormality in the first controller C1 based on the current command values ​​CurU_2, CurV_2, and CurW_2 included in the three-phase analog voltage signal generated by the inverse Clarke converter 57 and the detection result of the first detection unit 213A, and outputs a status signal St2_1 with a value of 0 or 1 to the first switch SW1. Also, for example, the second state monitoring unit 59 of the second controller C2 determines whether there is an abnormality in the third controller C3 based on the current command values ​​CurU_2, CurV_2, and CurW_2 included in the three-phase analog voltage signal generated by the inverse Clarke converter 57 and the detection result of the third detection unit 213C, and outputs a status signal St2_3 with a value of 0 or 1 to the third switch SW3. Furthermore, for example, the third state monitoring unit 60 of the second controller C2 determines whether there is an abnormality in the second controller C2 based on the current command values ​​CurU_2, CurV_2, and CurW_2 included in the three-phase analog voltage signal generated by the inverse Clarke converter unit 57 and the three-phase detection results of the fourth detection unit 214, and outputs a state signal St2_2 having a value of 0 or 1 to the second switch SW2.

[0043] The third controller C3 outputs status signals St3_1, St3_2, and St3_3 in the same manner as the first controller C1. For example, the first state monitoring unit 58 of the third controller C3 determines whether there is an abnormality in the first controller C1 based on the current command values ​​CurU_3, CurV_3, and CurW_3 included in the three-phase analog voltage signal generated by the inverse Clarke converter 57 and the detection result of the first detection unit 213A, and outputs a status signal St3_1 with a value of 0 or 1 to the first switch SW1. Also, for example, the second state monitoring unit 59 of the third controller C3 determines whether there is an abnormality in the second controller C2 based on the current command values ​​CurU_3, CurV_3, and CurW_3 included in the three-phase analog voltage signal generated by the inverse Clarke converter 57 and the detection result of the third detection unit 213C, and outputs a status signal St3_2 with a value of 0 or 1 to the second switch SW2. Furthermore, for example, the third state monitoring unit 60 of the third controller C3 determines whether there is an abnormality in the third controller C3 based on the current command values ​​CurU_3, CurV_3, and CurW_3 included in the three-phase analog voltage signal generated by the inverse Clarke converter 57 and the three-phase detection results of the fourth detection unit 214, and outputs a state signal St3_3 having a value of 0 or 1 to the third switch SW3.

[0044] Figure 4 is a schematic diagram of the first switch SW1 of this embodiment. The first switch SW1 includes an OR circuit 61, an AND circuit 62, a latch circuit 63, and switching elements 64U to 64W.

[0045] The OR circuit 61 receives status signals St2_1 and St3_1 from the second controller C2 and the third controller C3, respectively. The OR circuit 61 outputs a value of 0 if both of the input status signals St2_1 and St3_1 are 0 (i.e., both the second controller C2 and the third controller C3 determine that there is a problem with the first controller C1). On the other hand, the OR circuit 61 outputs a value of 1 if at least one of the input status signals St2_1 and St3_1 is 1 (i.e., at least one of the second controller C2 and the third controller C3 determines that there is no problem with the first controller C1).

[0046] The AND gate 62 receives a status signal St1_1 output from the first controller C1 and an output signal from the OR gate 61. The AND gate 62 outputs a value of 0 if either the input status signal St1_1 or the output signal from the OR gate 61 is 0. On the other hand, the AND gate 62 outputs a value of 1 if both the input status signal St1_1 and the output signal from the OR gate 61 are 1.

[0047] The latch circuit 63 receives the output signal from the AND circuit 62. When the value of the output signal from the AND circuit 62 is 1, the latch circuit 63 turns on the switching elements 64U~64W. As a result, CurU_1, CurV_1, and CurW_1 are output from the first switch SW1 and input to the intermediate value selection unit 211. On the other hand, when the value of the output signal from the AND circuit 62 is 0, the latch circuit 63 turns off the switching elements 64U~64W. As a result, a value of 0 is output from the first switch SW1 for each phase and input to the intermediate value selection unit 211. After the input to the latch circuit 63 transitions from 1 to 0 and the output transitions to 0, the output remains fixed at 0 regardless of the input.

[0048] The second and third switches SW2 and SW3 have the same configuration as the first switch SW1, except that the input signals are different. The OR circuit 61 of the second switch SW2 receives status signals St1_2 and St3_2 from the first controller C1 and the third controller C3, respectively. The AND circuit 62 of the second switch SW2 receives the status signal St2_2 output from the second switch SW2 and the output signal from the OR circuit 61 of the second switch SW2. The latch circuit 63 of the second switch SW2 turns on the switching elements 64U~64W of the second switch SW2 when the value of the output signal of the AND circuit 62 of the second switch SW2 is 1, and turns off the switching elements 64U~64W of the second switch SW2 when the value of the output signal of the AND circuit 62 of the second switch SW2 is 0.

[0049] The OR circuit 61 of the third switch SW3 receives status signals St1_3 and St2_3 from the first controller C1 and the second controller C2, respectively. The AND circuit 62 of the third switch SW3 receives the status signal St3_3 output from the third switch SW3 and the output signal from the OR circuit 61 of the third switch SW3. The latch circuit 63 of the third switch SW3 turns on the switching elements 64U~64W of the third switch SW3 when the value of the output signal of the AND circuit 62 of the third switch SW3 is 1, and turns off the switching elements 64U~64W of the third switch SW3 when the value of the output signal of the AND circuit 62 of the third switch SW3 is 0.

[0050] Figure 5 shows the state of the multiplexing control device 210 for each case. For example, when all controllers C are active (Case 5: "Normal"), the status signals St are all 1, indicating normal, and all switches SW are ON. As a result, the state of the intermediate value selection unit 211 is a "3-output selection state" in which an intermediate value is selected from the three current command values ​​of the first to third controllers C1 to C3.

[0051] For example, let's consider the case where the first controller C1 fails, starting from a normal state with the first to third controllers C1 to C3 (Case 5 in Figure 5: "C1 failure"). Because the first controller C1 has failed, the status signal St1_1 output from the first controller C1 is undefined and can be either 0 or 1. In Figure 5, the undefined state of the status signal St1_1 is indicated by "X". In the case of "C1 failure", the current command value output from the first controller C1 becomes significantly different from the current command values ​​output from the second and third controllers C2 and C3, respectively, and the current command value of the first controller C1 takes the maximum or minimum value among the current command values ​​of each controller C. As a result, the current command value of the first controller C1 is no longer selected as an intermediate value by the intermediate value selection unit 211 for each phase. Furthermore, because the current command value of the first controller C1 indicates an abnormality, the status signals St2-1 and St3-1 become 0, indicating an abnormality. As a result, the current command value of the first controller C1 is interrupted by the first switch SW1, and a value of 0 is output from the first switch SW1. Here, if the second and third controllers C2 and C3 are in a normal state, the value of 0 output from the first switch SW1 will be the minimum value. Therefore, the state of the intermediate value selection unit 211 becomes a "two-output selection state" output state, which selects an intermediate value from the two current command values ​​of the two controllers C (the second and third controllers C2 and C3 in this example).

[0052] For example, let's consider the case where the second controller C2 fails after the first controller C1 fails (the case in Figure 5: "C1 failure → C2 failure"). In this case, first, because the first controller C1 has failed, the status signal St1_1 becomes undefined, similar to the case in Figure 5: "C1 failure," and a value of 0 is output from the first switch SW1. Subsequently, the status signals St2_1, St2_2, and St2_3 output from the second controller C2 also become undefined. Therefore, in the case of "C1 failure → C2 failure," the intermediate value selection unit 211 may select the current command value of the failed second controller C2 as the intermediate value. In this case, the current command value of the normal third controller C3 and the current target values ​​for each phase as intermediate values ​​become significantly different, the status signals St3-3 become a value of 0 indicating an abnormality, the third switch SW3 turns off, and a value of 0 is output from the first switch SW1 and the third switch SW3. As a result, the intermediate value selection unit 211 receives the value 0, the current command value of the third controller C2, and the value 0 as input, and selects the value 0 as the intermediate value from these three values. Therefore, the state of the intermediate value selection unit 211 becomes the "output 0" state, which outputs a signal of the value 0. When the intermediate value selection unit 211 outputs the value 0, the motor 300 stops.

[0053] For example, let's consider the case of an external fault (Case 5 in Figure 5: "External Fault"). Here, an external fault refers to a failure of any part of the motor control device 200 other than the first to third controllers C1 to C3 (however, failures of the first to third switches SW1 to SW3 can be excluded by intermediate value selection and are therefore also external faults, but are excluded from the external faults explained in Figure 5). External faults other than those of the first to third controllers C1 to C3 and the first to third switches SW1 to SW3 related to the motor control device 200 are detected using the detection devices of the first to third controllers C1 to C3. These detection devices of the first to third controllers C1 to C3 also include general monitors that are not compared by the first to third controllers C1 to C3, such as overcurrent. When an external fault is detected, the status signals St1-1, St2-2, and St3-3 are set to 0, indicating an abnormality, which turns off the first to third switches SW1 to SW3. Therefore, the state of the intermediate value selection unit 211 becomes the "Output 0" state, which outputs a signal with a value of 0. If the intermediate value selection unit 211 outputs a value of 0, the motor 300 stops.

[0054] The multiplexing control device 210 of this embodiment includes three controllers C1 to C3 that output U-phase, V-phase, and W-phase analog voltage signals including the current command values ​​for the U-phase, V-phase, and W-phase, respectively, for the motor 300; output lines OU1 to OU3, OV1 to OV3, and OW1 to OW3 provided for each controller C that transmit the U-phase, V-phase, and W-phase analog voltage signals output from each controller C; switches SW1 to SW3 provided for each controller C that switch the connection and disconnection of the output lines OU1 to OU3, OV1 to OV3, and OW1 to OW3; and the U-phase of each switch SW1 to SW3 via the output lines OU1 to OU3. The system includes a U-phase intermediate value selection unit 211U that receives the output values ​​of the phases and selects the second largest intermediate value among the input U-phase output values; a V-phase intermediate value selection unit 211V that receives the output values ​​of the V-phases of each switch SW1 to SW3 via output lines OV1 to OV3 and selects the second largest intermediate value among the input V-phase output values; a W-phase intermediate value selection unit 211W that receives the output values ​​of the W-phases of each switch SW1 to SW3 via output lines OW1 to OW3 and selects the second largest intermediate value among the input W-phase output values; and a PWM output unit 212 that generates and outputs a PWM signal based on the intermediate values ​​of the U-phase, V-phase, and W-phase. Here, if digital signals are output as command values ​​from each controller, the intermediate value selection unit 211 will compare the digital signals from each controller C. However, it is difficult to extract the duty cycle at the appropriate synchronization timing and compare the digital signals. Therefore, in this case, it may not be possible to appropriately select intermediate values ​​for each of the U-phase, V-phase, and W-phase. Furthermore, attempting to appropriately compare digital signals leads to circuit complexity. In contrast, according to the configuration of this embodiment, the analog voltage signals output from each controller C are compared and an intermediate value is selected. Therefore, an intermediate value can be appropriately selected for each of the U-phase, V-phase, and W-phase. Consequently, it becomes possible to apply the multiplexing control device 210 to motor control with a simple configuration. Moreover, even if one of the three controllers C fails, an intermediate value is selected from the three controllers C, including the failed controller C, thus preventing the motor 300 from temporarily stopping.

[0055] In the multiplexing control device 210 of this embodiment, each controller C has a first state monitoring unit 58 that generates a first state signal indicating whether or not one of the other controllers C is faulty based on a comparison between the current command values ​​of the U-phase, V-phase, and W-phase generated by each controller C and the output values ​​of the U-phase, V-phase, and W-phase of a switch SW provided on one of the other controllers C, and the other controller C The system includes a second state monitoring unit 59 that generates a second state signal indicating whether or not the other controller C is faulty, and a third state monitoring unit 60 that generates a third state signal indicating whether or not its own controller C is faulty based on a comparison of the current command values ​​for the U-phase, V-phase, and W-phase generated by each controller with the selection results of the U-phase intermediate value selection unit 211U, the V-phase intermediate value selection unit 211V, and the W-phase intermediate value selection unit 211W. Each switch SW disconnects the output line connected to the faulty controller C based on the first state signal, second state signal, and third state signal output from each controller C. With this configuration, the supply of analog voltage signals from the faulty controller C to the intermediate value selection unit 211 can be blocked, thus preventing the intermediate value selection unit 211 from selecting the analog voltage signal of the faulty controller C as an intermediate value. In addition, since the output line connected to the faulty controller C is disconnected, it is possible to prevent the motor 300 from running out of control if both controllers C fail.

[0056] In the multiplexing control device 210 of this embodiment, each switch SW includes an OR circuit 61 that outputs a signal indicating that there is no fault in the controller C if at least one of the input first status signal and second status signal indicates that there is no fault in the controller C, and outputs a signal indicating that there is a fault in the controller C otherwise; an AND circuit 62 that outputs a signal indicating that there is a fault in the controller C if either the third status signal and the signal output from the OR circuit 61 indicates that there is a fault in the controller C, and outputs a signal indicating that there is no fault in the controller C otherwise; and a latch circuit 63 that blocks the output line when the AND circuit 62 outputs a signal indicating that there is a fault in the controller C. With this configuration, it is possible to appropriately block the output line by the switch SW based on the status signal.

[0057] In this embodiment, an example of applying the multiplexing control device 210 to the motor 300 of the eVTOL1 is shown, but it is not limited to this. The multiplexing control device 210 of this embodiment is applicable to various motors.

[0058] As explained above, in a multiplexed motor control system, by incorporating the state of other lines different from the one line outputting the UVW control signal, providing a switch to disconnect if the line itself is abnormal, and selecting an intermediate value for the control signals of the remaining multiplexed UVW phases, it is possible to perform PWM control of the motor with reduced transients (temporary changes) when switching between each output line and ensuring redundancy.

[0059] The present invention has been described above based on embodiments. The embodiments are illustrative, and it will be understood by those skilled in the art that various modifications are possible in combinations of their components and processing processes, and that such modifications also fall within the scope of the present invention.

[0060] The functional configurations of each device described in the embodiments can be realized using hardware resources, software resources, or through the collaboration of hardware and software resources. Hardware resources can include processors, ROMs, RAMs, and other LSIs. Software resources can include operating systems, applications, and other programs.

[0061] In the embodiments disclosed herein, those in which multiple functions are provided in a distributed manner may have some or all of those multiple functions integrated into a single unit, and conversely, those in which multiple functions are integrated may have some or all of those functions provided in a distributed manner. Whether the functions are integrated or distributed, the configuration should be such that the objective of the invention can be achieved. [Explanation of Symbols]

[0062] 1 eVTOL, 10 main body, 20 arm, 30 rotor blade section, 35 blades, 50 battery, 100 higher control unit, 200 motor control unit, 210 multiplexing control unit, 211 intermediate value selection unit, 212 PWM output unit, 220 gate driver, 300 motor, 400 rotation detection sensor, C controller, SW switch.

Claims

1. Three controllers that output U-phase, V-phase, and W-phase analog voltage signals, including the respective current command values ​​for the U-phase, V-phase, and W-phase of the motor, Each controller is provided with an output line that transmits the U-phase, V-phase, and W-phase analog voltage signals output from each controller, Each controller is provided with a switch for switching between connecting and disconnecting the output line, The current command value of the U phase of each switch is input via the output line, and the U phase intermediate value selection unit selects the second largest intermediate value among the input U phase current command values. The V-phase current command values ​​of each switch are input via the output line, and the V-phase intermediate value selection unit selects the second largest intermediate value among the input V-phase current command values. The W-phase current command value of each switch is input via the output line, and the W-phase intermediate value selection unit selects the second largest intermediate value among the input W-phase current command values. A PWM output unit that generates and outputs a PWM signal based on the respective intermediate values ​​of the U-phase, V-phase, and W-phase, A multiplexing control device equipped with the following features.

2. Each controller, A first status monitoring unit generates a first status signal indicating whether or not one of the other controllers is faulty, based on a comparison between the current command values ​​for the U-phase, V-phase, and W-phase generated by each controller and the current command values ​​for the U-phase, V-phase, and W-phase of the switch provided on one of the other controllers. A second status monitoring unit generates a second status signal indicating whether or not the other controller is faulty, based on a comparison of the current command values ​​for the U-phase, V-phase, and W-phase generated by each controller with the current command values ​​for the U-phase, V-phase, and W-phase of the switch provided on the other controller. A third state monitoring unit generates a third state signal indicating whether or not its own controller is faulty, based on a comparison of the current command values ​​for the U-phase, V-phase, and W-phase generated by each controller with the selection results of the U-phase intermediate value selection unit, the V-phase intermediate value selection unit, and the W-phase intermediate value selection unit. Includes, The multiplexing control device according to claim 1, wherein each switch outputs a value of 0 by blocking the output line connected to the faulty controller, based on the first status signal, the second status signal, and the third status signal output from each controller.

3. Each switch, An OR circuit that outputs a signal indicating that the controller is not faulty if at least one of the input first status signal and the second status signal indicates that the controller is not faulty, and outputs a signal indicating that the controller is faulty otherwise. An AND circuit that outputs a signal indicating a fault in the controller if either the third status signal or the signal output from the OR circuit indicates a fault in the controller, and outputs a signal indicating that there is no fault in the controller otherwise. A latch circuit that blocks the output line when the AND circuit outputs a signal indicating a fault in the controller, The multiplexing control device according to claim 2, including the above.

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