Multilayer wiring board, semiconductor device, method for manufacturing a multilayer wiring board

Abstract

To provide a multilayer wiring board having an adhesion layer between a conductor and an insulating resin layer and having increased insulation reliability.SOLUTION: The multilayer wiring board includes a first insulating resin layer, a seed layer stacked on the first insulating resin layer, a conductor layer that has a plating layer stacked on the opposite side of the first insulating resin layer of the seed layer and is configured to form a plurality of conductors, an adhesion layer covering the conductor layer, a second insulating resin layer covering the conductor layer, the adhesion layer, and the first insulating resin layer. The adhesion layer has a first portion covering the top surface of the conductor, a second portion covering the side surface of the conductor, and a third portion formed in a linear area extending along the outer edge of the seed layer on the first insulating resin layer between adjacent conductors. Between adjacent conductors, the third portion of the adhesion layer provided on one of the conductors and the third portion of the adhesion layer provided on the other of the conductors are separated from each other.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a multilayer wiring board used for mounting electronic components such as semiconductor elements (chips) and a method for manufacturing the same.

Background Art

[0002] In recent years, with the demands for high functionality and the like of electronic devices, high integration has been progressing, and the frequency of electrical signals, so-called operating frequency, has been increasing due to high-speed signal processing of electronic devices. In multilayer wiring boards used for these, there is a demand for miniaturization of wiring due to high density and compatibility with high frequencies.

[0003] Normally, a multilayer wiring board is manufactured by laminating one or more layers of a conductor layer and an insulating resin layer respectively. At this time, if the adhesion between the conductor constituting the conductor layer and the insulating resin layer is insufficient, problems such as delamination between layers, cracks, and deterioration of insulation reliability will occur.

[0004] Therefore, conventionally, as a method for improving the adhesion between a conductor and an insulating resin layer, a technique of roughening the conductor surface to produce an anchor effect has been used. However, it is difficult to roughen the wiring (conductor) miniaturized due to high density, and there is a problem that the transmission characteristics of high-frequency signals deteriorate (skin effect) due to the roughened surface.

[0005] Therefore, as a method for improving the adhesion between a conductor and an insulating resin layer without roughening the conductor surface, a method of forming an adhesion layer (film) as in Patent Document 1 has been proposed.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] Figure 4 is a magnified cross-sectional view showing a portion of a conventional multilayer wiring board.

[0008] In conventional methods for forming an adhesion layer 114, such as that disclosed in Patent Document 1, the adhesion layer 114 is formed continuously on the insulating resin between the conductors 113. Furthermore, even when forming an adhesion layer 114 that chemically bonds only to the conductors 113, the material constituting the adhesion layer 114 is applied to the insulating resin 111 during the process. Therefore, a step to remove the coating liquid by washing with water is necessary, but there is a risk that residue will remain on the insulating resin 111 between the conductors 113 due to insufficient washing, etc.

[0009] In other words, when materials with low insulation resistance were used for the adhesion layer, conventional methods for forming the adhesion layer risked a decrease in the insulation reliability between the wires.

[0010] Therefore, the present invention aims to provide a multilayer wiring board having an adhesion layer between a conductor and an insulating resin layer, and having high insulation reliability. [Means for solving the problem]

[0011] One aspect of the present invention for solving the above problems is a conductor layer comprising a first insulating resin layer, a seed layer laminated on the first insulating resin layer, a plating layer laminated on the side of the seed layer opposite to the first insulating resin layer, a plurality of conductors, and an adhesion layer covering the conductor layer. dense The adhesive layer comprises a bonding layer and a second insulating resin layer covering the first insulating resin layer, the bonding layer having a first portion covering the upper surface of the conductor, a second portion covering the side surface of the conductor, and a portion along the outer edge of the seed layer on the first insulating resin layer between adjacent conductors. Ta This is a multilayer wiring board having a third portion formed in a region, wherein, between adjacent conductors, the third portion of the adhesion layer provided on one conductor and the third portion of the adhesion layer provided on the other conductor are spaced apart.

[0012] Another aspect of the present invention is a method for manufacturing a multilayer wiring board, comprising the steps of: forming a seed layer on a first insulating resin layer; forming a first resist pattern on the seed layer; forming a plating layer on the seed layer on which the first resist pattern is formed; removing the first resist pattern; removing the seed layer exposed as a result of the removal of the first resist pattern; forming a second resist pattern on the first insulating resin layer exposed as a result of the removal of the seed layer, which does not come into contact with the seed layer and the plating layer; forming an adhesion layer on the surface of the second resist pattern, the surface of the plating layer, the surface of the seed layer and the surface of the first insulating resin layer; removing the adhesion layer on the second resist pattern and its surface; and forming a second insulating resin layer that covers the adhesion layer and the first insulating resin layer. [Effects of the Invention]

[0013] According to the present invention, it is possible to provide a multilayer wiring board having an adhesion layer between a conductor and an insulating resin layer, and having high insulation reliability. [Brief explanation of the drawing]

[0014] [Figure 1] A cross-sectional enlarged view showing a part of a multilayer wiring board according to an embodiment of the present invention. [Figure 2A] An explanatory diagram showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2B] An explanatory diagram showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2C] An explanatory diagram showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2D] An explanatory diagram showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2E] An explanatory diagram showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2F] An explanatory diagram showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2G]Explanatory drawing showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2H] Explanatory drawing showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2I] Explanatory drawing showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2J] Explanatory drawing showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2K] Explanatory drawing showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2L] Explanatory drawing showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 2M] Explanatory drawing showing a multilayer wiring board and a manufacturing method according to an embodiment of the present invention. [Figure 3] Cross-sectional view showing an example of a semiconductor device using a wiring board according to an embodiment. [Figure 4] Enlarged cross-sectional view showing a part of a conventional multilayer wiring board.

Mode for Carrying Out the Invention

[0015] Embodiments according to the present invention will be described with reference to the drawings. Here, the dimensional ratios in the drawings may differ from the actual ratios for convenience of explanation, or a part of the configuration may be omitted from the drawings.

[0016] FIG. 1 is an enlarged cross-sectional view showing a part of a multilayer wiring board according to an embodiment of the present invention.

[0017] The multilayer wiring board 100 includes a first insulating resin layer 11, a second insulating resin layer 12, a conductor layer 13, and an adhesion layer 14. The multilayer wiring board 100 may be, for example, a core board formed on a core board 1 described later, or a coreless board having no core layer. Hereinafter, the upper surface is the surface far from the core board, or in the case of a coreless board, the surface far from the carrier board.

[0018] (First Insulating Resin Layer) The first insulating resin layer 11 is composed of a thermosetting resin, a thermoplastic resin, a photosensitive resin, or a resin mixture thereof, for example, an epoxy resin, an acrylic resin, a phenolic resin, a melamine resin, a silicone resin, a polyimide resin, a polyphenylene ether resin, a maleimide resin, a liquid crystal polymer, a fluororesin, or a combination of two or more thereof, and may contain an inorganic filler or an organic filler.

[0019] (Conductor layer) The conductor layer 13 has a seed layer 13a and a plating layer 13b in that order from the side of the first insulating resin layer 11. Multiple conductors 13' are formed by patterning the conductor layer 13 by etching. The conductor layer 13 may contain various patterns such as wiring, vias, shields, grounds, and dummies, but Figure 1 shows the wiring portion. Adjacent conductors 13' are formed spaced apart in the planar direction of the first insulating resin layer 11. An adhesion layer 14 is formed on the surface of the conductors 13'.

[0020] (Seed layer) The seed layer 13a is laminated on the first insulating resin layer 11. The material constituting the seed layer 13a is not particularly limited, but when formed by electroless plating, metallic materials such as Cu, Pd, Al, Sn, Ni, and Cr can be used. When formed by sputtering, materials such as Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), AZO (Aluminum-doped Zinc Oxide), ZnO, PZT (Lead Zirconate Titanate), TiN, Cu3N4, Cu alloy, or a combination of two or more of these can be used. Considering the ease of formation, copper is preferable.

[0021] (Plating layer) The plating layer 13b is laminated on the upper surface of the seed layer 13a (the surface opposite to the first insulating resin layer 11). The material constituting the plating layer 13b is mainly a metal, and the type is not particularly limited, but for example, Cu and Cu alloys, Ag and Ag alloys, Sn, Pd, Au, Ni, Cr, Pt, Fe, or a combination of two or more of these can be used. Considering the ease of formation, copper is preferred.

[0022] (Intense layer) The adhesion layer 14 consists of a first portion 14a that covers the upper surface of the conductor 13', a second portion 14b that covers the side surface of the conductor 13', and a third portion 14c formed on the first insulating resin layer 11 between adjacent conductors 13' in a linear region extending along the outer edge of the seed layer 13a (in a direction perpendicular to the plane of the paper in Figure 1). In this way, the adhesion layer 14 covers all surfaces of the conductor 13' except the bottom surface, ensuring sufficient adhesion between the conductor 13' and the second insulating resin layer 12. Furthermore, between adjacent conductors 13', the third portion of the adhesion layer 14 provided on one conductor 13' is spaced apart from the third portion of the adhesion layer provided on the other conductor. Therefore, insulation between adjacent conductors 13' is ensured, and high insulation reliability can be obtained. Moreover, the area of ​​the third portion 14c of the adhesion layer 14 is smaller than the area of ​​the first portion 14a of the adhesion layer 14. Therefore, the distance between the third portion of the adhesion layer 14 provided on the adjacent conductor 13' can be sufficiently secured, further improving insulation reliability.

[0023] The thickness of the adhesion layer 14 is preferably between 10 nm and 100 nm. If it is 10 nm or more, sufficient adhesion can be achieved. If it exceeds 100 nm, there is a risk that the adhesion layer 14 will remain between adjacent conductors 13' during the manufacturing process of the multilayer wiring board 100, making it difficult to ensure the insulation reliability between the conductors 13'. The material constituting the adhesion layer 14 is not particularly limited, but examples include silane coupling agents, azole compounds, thiol compounds, and triazine thiol compounds.

[0024] (Second insulating resin layer) The second insulating resin layer 12 is laminated on the first insulating resin layer 11 so as to cover the conductor 13', the adhesion layer 14, and the first insulating resin layer 11. The second insulating resin layer 12 can be formed using the material exemplified for the first insulating resin layer 11.

[0025] The manufacturing method of the multilayer wiring board 100 according to this embodiment will be described with reference to Figures 2A to 2M. Figures 2A to 2M are explanatory diagrams showing a multilayer wiring board and manufacturing method according to an embodiment of the present invention. In Figures 2A to 2M, the description of the core substrate 1 is omitted except for the portion of the pad 43 provided on the core substrate 1.

[0026] First, a first insulating resin layer 11 is formed on the core substrate 1.

[0027] Next, via openings 8 are formed using a laser such as UV or CO2 in the case of thermosetting resin, or photolithography in the case of photosensitive resin, so that the lower layer electrical connection pad portion 43 is exposed (Figure 2A).

[0028] Next, a seed layer 13a is formed on the pad portion 43 corresponding to the upper surface of the first insulating resin layer 11, the wall surface of the via opening 8, and the bottom surface of the via opening 8 by electroless plating or sputtering (Figure 2B).

[0029] Next, a resist is applied or laminated onto the seed layer 13a and exposed and developed to form a first resist pattern 16a corresponding to the pattern of the plating layer 13b (Figure 2C).

[0030] Next, a plating layer 13b is formed on the seed layer 13a on which the first resist pattern 16a is formed by electroplating (Figure 2D).

[0031] Next, the first resist pattern 16a is completely removed (Figure 2E). A preferred removal method is to use a melt-peel type resist and melt it off with a stripping solution.

[0032] Next, the seed layer 13a (the seed layer 13a not covered by the plating layer 13b) that was exposed after the removal of the first resist pattern 16a is removed by etching (Figure 2F).

[0033] Next, a resist is applied or laminated onto the first insulating resin layer 11, which is exposed by the removal of the seed layer 13a, and then exposed and developed to form a second resist pattern 16b corresponding to the pattern of the adhesion layer 14 (Figure 2G). At this time, the second resist pattern 16b is formed with a width narrower than the spacing between adjacent plating layers 13b (the spacing in the planar direction of the first insulating resin layer 11) so as not to come into contact with the sides of the seed layer 13a and the plating layer 13b.

[0034] Next, an adhesion layer 14 is formed on the surface of the second resist pattern 16b, the surface of the plating layer 13b, the surface of the seed layer 13a, and the surface of the first insulating resin layer 11 (Figure 2H). The adhesion layer 14 can be formed by dipping, spraying, sputtering, etc.

[0035] Next, the second resist pattern 16b and the adhesion layer 14 on its surface are removed (Figure 2I).

[0036] Next, the second insulating resin layer 12 is laminated on the first insulating resin layer 11 so as to cover the conductor 13', the adhesion layer 14, and the first insulating resin layer 11 (Figure 2J). This step is omitted if a circuit with the desired number of layers has been formed.

[0037] The process described in Figures 2A to 2J above is repeated until a circuit with the desired number of layers is formed (Figure 2K). Note that in forming the nth (where n is a natural number greater than or equal to 2) and subsequent conductor layers 13, the (n-1)th second insulating resin layer 12 formed in Figure 2J is replaced with the first insulating resin layer 11 described in Figures 2A to 7J.

[0038] After forming a circuit with the desired number of layers, a solder resist layer 17 is applied or laminated to the outermost layer, and solder resist openings 18 are formed on the pad portion 53 by photolithography or the like. The solder resist layer 17 is, for example, a photosensitive epoxy resin and may contain inorganic fillers. If a non-photosensitive thermosetting resin is used, the solder resist openings 18 are formed by a UV laser, CO2 laser, photolithography, or the like.

[0039] Next, a multilayer wiring board 100 can be formed by forming solder bumps 20 within the solder resist openings 18 (Figure 2L). The solder bumps 20 can be formed by screen printing when using solder paste, or by screen printing flux, then placing the solder balls on top of the flux, and finally melting them by reflow soldering.

[0040] Furthermore, a multilayer wiring board 100 can be formed by creating a similar wiring board structure on the other side of the core substrate 1 as needed (Figure 2M).

[0041] The above describes a method for manufacturing a multilayer wiring board 100 by laminating wiring boards on a core substrate 1. However, a multilayer wiring board 100 without a core substrate 1 may also be manufactured by laminating wiring boards on a support substrate using the same procedure and then peeling off the support substrate at the end. A general glass epoxy substrate with through holes can be used as the core substrate 1.

[0042] Figure 3 shows an example of a mounting configuration, illustrating a semiconductor device 200 with a semiconductor element 34 (silicon chip) mounted on a multilayer wiring board 100. In this semiconductor device 200, the electrode terminals of the semiconductor element 34 are electrically connected to the corresponding pads 53 on the multilayer wiring board 100 via conductive materials such as solder bumps 20 (flip-chip mounting). Furthermore, the gap between the mounted semiconductor element 34 and the multilayer wiring board 100 is filled with an underfill resin 35, such as a thermosetting epoxy resin, and mechanical bonding between the semiconductor element 34 and the multilayer wiring board 100 is ensured by heat curing.

[0043] On the other hand, solder bumps 20, which are used as external connection terminals, are attached to the pad portions 53 exposed from the solder resist layer 17 on the side opposite to the semiconductor element 34 mounting surface. The multilayer wiring board 100 is mounted on a motherboard or the like via these solder bumps 20.

[0044] As described above, in the multilayer wiring board 100 according to this embodiment, an adhesion layer 14 is formed on the surface of the conductor 13'. Therefore, the adhesion between the conductor layer 13 and the second insulating resin layer 12 can be improved.

[0045] Furthermore, since the adhesion layer 14 is formed on the upper surface of the conductor 13', the side surface of the conductor 13', and on the first insulating resin layer 11 between adjacent conductors 13', specifically in a linear region extending along the outer edge of the seed layer 13a, the area of ​​the adhesion layer 14 is large, resulting in higher adhesion.

[0046] Furthermore, in the adhesion layer 14, the third portion 14c of the adhesion layer 14 provided on one conductor 13' and the third portion 14c of the adhesion layer provided on the other conductor are spaced apart between adjacent conductors 13'. Therefore, insulation between adjacent conductors 13' is ensured, and high insulation reliability can be obtained.

[0047] Furthermore, since the seed layer 13a and the plating layer 13b are made of copper, they are easy to form.

[0048] Furthermore, the thickness of the adhesion layer 14 is between 10 nm and 100 nm. Therefore, while achieving sufficient adhesion, it is possible to suppress the residue of the adhesion layer 14 between adjacent conductors 13' during the manufacturing process of the multilayer wiring board 100, which would otherwise reduce insulation reliability.

[0049] Furthermore, the area of ​​the third portion 14c of the adhesion layer 14 is smaller than the area of ​​the first portion 14a of the adhesion layer 14. Therefore, sufficient distance can be ensured between the third portions of the adhesion layer 14 provided on adjacent conductors 13', thereby improving insulation reliability. [Industrial applicability]

[0050] The present invention can be used as a multilayer wiring board for mounting electronic components such as semiconductor elements (chips). [Explanation of Symbols]

[0051] 11. First insulating resin layer 12. Second insulating resin layer 13 Conductor layer 13' Conductor 13a Seed layer 13b Plating layer 14. Contact layer 14a Part 1 14b Part 2 14c Third part 16a First resist pattern 16b First Resist Pattern 100 Multilayer wiring board 200 Semiconductor Equipment

Claims

1. A first insulating resin layer, A conductor layer comprising a seed layer laminated on the first insulating resin layer and a plating layer laminated on the side of the seed layer opposite to the first insulating resin layer, constituting a plurality of conductors, An adhesion layer covering the conductor layer, The system comprises the aforementioned adhesion layer and a second insulating resin layer that covers the first insulating resin layer, The aforementioned adhesion layer is A first portion covering the upper surface of the conductor, A second portion covering the side surface of the conductor, It has a third portion formed on the first insulating resin layer between adjacent conductors, in a region along the outer edge of the seed layer, A multilayer wiring board in which, between adjacent conductors, the third portion of the adhesion layer provided on one conductor and the third portion of the adhesion layer provided on the other conductor are spaced apart.

2. The multilayer wiring board according to claim 1, wherein the seed layer and the plating layer are made of copper.

3. The multilayer wiring substrate according to claim 1 or 2, wherein the thickness of the adhesion layer is 10 nm or more and 100 nm or less.

4. The multilayer wiring board according to any one of claims 1 to 3, wherein the area of ​​the third portion of the adhesion layer is smaller than the area of ​​the first portion of the adhesion layer.

5. A multilayer wiring board according to any one of claims 1 to 4, wherein two or more conductor layers sandwiched between the first insulating resin layer and the second insulating resin layer are laminated together.

6. A semiconductor device comprising a semiconductor element mounted on a multilayer wiring board according to any one of claims 1 to 5.

7. A step of forming a seed layer on a first insulating resin layer, The process involves forming a first resist pattern on the seed layer, A step of forming a plating layer on the seed layer on which the first resist pattern is formed, The process of removing the first resist pattern, A step of removing the seed layer that has been exposed as a result of the removal of the first resist pattern, A step of forming a second resist pattern on the first insulating resin layer exposed by the removal of the seed layer, which does not come into contact with the seed layer and the plating layer. A step of forming an adhesion layer on the surface of the second resist pattern, the surface of the plating layer, the surface of the seed layer, and the surface of the first insulating resin layer, The process involves removing the second resist pattern and the adhesion layer on its surface, A method for manufacturing a multilayer wiring board, comprising the step of forming a second insulating resin layer that covers the adhesion layer and the first insulating resin layer.

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