Semiconductor equipment

The semiconductor device addresses inner lead tilting through individual chip-to-lead connections, improving insulation and structural strength by enhancing connection points.

JP7856869B1Active Publication Date: 2026-05-11SHINDENGEN ELECTRIC MANUFACTURING CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
SHINDENGEN ELECTRIC MANUFACTURING CO LTD
Filing Date
2025-05-30
Publication Date
2026-05-11

AI Technical Summary

Technical Problem

Conventional semiconductor devices experience inner lead tilting due to resin encapsulation, leading to uneven product characteristics and insufficient insulation performance.

Method used

A semiconductor device design with first and second connectors that individually connect semiconductor chips to inner leads, increasing connection points and structural strength, thereby reducing the influence of sealing resin on inner leads.

Benefits of technology

The design suppresses inner lead tilting, enhancing insulation performance and structural integrity by increasing connection points and structural strength.

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Abstract

A semiconductor device 1 comprises multiple semiconductor chips, multiple inner leads, multiple connectors, and a sealing resin 70. The multiple inner leads include a first common inner lead 20 having a portion extending along a first direction D1 or being arranged along the first direction D1, multiple individual inner leads 31, 32, 33, and a second common inner lead 40. The multiple connectors include first connectors 51, 52, 53 connecting semiconductor chips (diodes 11, 12, 13) mounted on the first common inner lead 20 to the individual inner leads 31, 32, 33, and second connectors 61, 62, 63 connecting semiconductor chips (diodes 14, 15, 16) mounted on the individual inner leads 31, 32, 33 to the second common inner lead 40. Therefore, the semiconductor device 1 of the present invention is a semiconductor device that can suppress the tilting of the inner leads in the sealing resin compared to conventional semiconductor devices.
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Description

Cross-reference

[0001] This application claims priority based on Japanese Patent Application No. 2024-114765 filed on July 18, 2024 in Japan, and all the contents described in the application are incorporated herein by reference as they are.

Technical Field

[0002] The present invention relates to a semiconductor device.

Background Art

[0003] Conventionally, a semiconductor device including a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin has been known (see, for example, Patent Document 1). In such a semiconductor device, it is common for a plurality of semiconductor chips to be collectively connected to one connector.

[0004] A conventional semiconductor device 900 includes a plurality of semiconductor chips 911, 912, 913, 914, 915, 916, a plurality of inner leads 921, 922, 923, 924, 925, a plurality of connectors 951, 952, and a sealing resin 970 (see FIG. 3). The conventional semiconductor device 900 can also be expressed as a three-phase bridge diode package.

[0005] In the semiconductor device 900, the semiconductor chips 911, 912, 913 are collectively connected to the connector 951. Also, in the semiconductor device 900, the semiconductor chips 914, 915, 916 are collectively connected to the connector 952.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] Incidentally, in conventional semiconductor devices such as the semiconductor device 900, the inner leads are often shaped to extend in a specific direction (elongated shape) due to the electrical connection requirements. Therefore, in such semiconductor devices, depending on the manufacturing method, the inner leads may be affected by the sealing resin poured in during resin encapsulation, and may tilt within the sealing resin (see Figure 4, especially Figures 4(b) and 4(c)). If the inner leads tilt, it can lead to uneven product characteristics and insufficient insulation performance.

[0008] The present invention has been made in view of the above problems, and aims to provide a semiconductor device that can suppress the tilting of inner leads in the sealing resin compared to conventional semiconductor devices. [Means for solving the problem]

[0009] The semiconductor device of the present invention is a semiconductor device comprising a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin, wherein the plurality of inner leads include a first common inner lead having a portion extending along a predetermined first direction, a plurality of individual inner leads arranged along the first direction, and a second common inner lead disposed between the first common inner lead and the plurality of individual inner leads and having a portion extending along the first direction, wherein at least two of the semiconductor chips are mounted on the first common inner lead in an arrangement along the first direction, and at least one of the semiconductor chips is mounted on the individual inner lead, and the plurality of connectors include a first connector that connects the semiconductor chips mounted on the first common inner lead and the individual inner leads on a one-to-one basis, and a second connector that connects the semiconductor chips mounted on the individual inner leads and the second common inner lead on a one-to-one basis. [Effects of the Invention]

[0010] The semiconductor device of the present invention comprises a first connector and a second connector for individually connecting semiconductor chips to inner leads. Therefore, compared to conventional semiconductor devices, the semiconductor device of the present invention can increase the number of connection points of components in the internal structure of the semiconductor device, and can increase the strength of the structure around the inner leads. When the strength of the structure around the inner leads is high, it is possible to reduce the influence of the sealing resin on the inner leads. Accordingly, the semiconductor device of the present invention is a semiconductor device that can suppress the tilting of the inner leads in the sealing resin compared to conventional semiconductor devices. [Brief explanation of the drawing]

[0011] [Figure 1] This figure shows the internal configuration of the semiconductor device 1 according to Embodiment 1. Figure 1(a) is a plan view, Figure 1(b) is a cross-sectional view of Figure 1(a) taken along line A1-A1, and Figure 1(c) is a cross-sectional view of Figure 1(a) taken along line A2-A2. In the drawings, "a diagram showing the internal configuration" refers to a diagram showing the components sealed in the sealing resin. For this reason, in Figure 1, only the outer shape of the sealing resin 70 is shown with a dashed line. Also, in Figure 1(a), components hidden by the first connectors 51, 52, 53 and the second connectors 61, 62, 63 are shown with dashed lines. [Figure 2] This figure shows the internal configuration of the semiconductor device 2 according to Embodiment 2. Figure 2(a) is a plan view, Figure 2(b) is a cross-sectional view of Figure 2(a) taken along line A3-A3, and Figure 2(c) is a cross-sectional view of Figure 2(a) taken along line A4-A4. In Figure 2, as well, only the outer shape of the sealing resin 70 is shown with a dashed line. In Figure 2(a), components hidden by the first connectors 51, 52 and the second connectors 61, 62 are shown with dashed lines. [Figure 3] This is a plan view showing the internal configuration of a conventional semiconductor device 900. [Figure 4]This is a cross-sectional view AA of Figure 3. Figure 4(a) is a cross-sectional view showing the inner lead 923 in an untilted state, while Figures 4(b) and 4(c) are cross-sectional views showing the inner lead 923 in an tilted state. Note that in Figures 4(b) and 4(c), the tilt of the inner lead 923 is exaggerated. [Modes for carrying out the invention]

[0012] The semiconductor device of the present invention will be described below based on the embodiments shown in the figures. In the embodiments described below, components having exactly the same or substantially the same function will be given common reference numerals in each embodiment, even if their shape or other characteristics differ slightly, and explanations that have already been given may be omitted. The embodiments described below do not limit the invention as defined in the claims. Furthermore, not all of the elements and combinations described in each embodiment are necessarily essential to the solution of the present invention.

[0013] [Embodiment 1] 1. Configuration of the semiconductor device 1 according to Embodiment 1 The semiconductor device 1 according to Embodiment 1 comprises a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin 70 (see Figure 1). The semiconductor device 1 can also be described as a three-phase bridge diode package. The components of the semiconductor device 1 will be described below.

[0014] Multiple semiconductor chips include diodes. Multiple semiconductor chips include six diodes 11, 12, 13, 14, 15, and 16. Diodes 11, 12, 13, 14, 15, and 16 each have electrodes (not shown) on the side facing the inner lead and the side facing the connector.

[0015] The multiple inner leads include a first common inner lead 20, multiple individual inner leads, and a second common inner lead 40. The inner leads constituting the multiple inner leads are made of conductive metal plates (for example, copper plates). Each inner lead will be described below.

[0016] The first common inner lead 20 has a portion 20A that extends along a predetermined first direction D1. In the semiconductor device 1, the first direction D1 is parallel to the long side LS (described later) of the sealing resin 70. At least two semiconductor chips are mounted on the first common inner lead 20 in an arrangement that follows the first direction D1. Three diodes 11, 12, and 13 are mounted on the first common inner lead 20.

[0017] In this specification, "a semiconductor chip is mounted on an inner lead" means that the semiconductor chip is fixed to the inner lead in a state where the electrodes of the semiconductor chip and the inner lead are electrically connected. Preferably, the semiconductor chip is fixed to the inner lead by a conductive bonding material (so-called "solder (including lead-free solder)") (not shown).

[0018] The first common inner lead 20 is connected to a first outer lead 20B, one end of which is exposed to the outside of the sealing resin 70. In Embodiment 1, the first outer lead 20B extends along a direction substantially perpendicular to the first direction D1 when viewed from above. In Embodiment 1, the first common inner lead 20 and the first outer lead 20B are integral. For this reason, the first common inner lead 20 and the first outer lead 20B can also be described as forming a substantially L-shaped lead as a whole.

[0019] The plurality of individual inner leads are arranged along the first direction D1. The plurality of individual inner leads includes three individual inner leads 31, 32, and 33. At least one semiconductor chip is placed on the individual inner leads 31, 32, and 33. One diode 14, 15, and 16 is placed on each of the individual inner leads 31, 32, and 33. That is, in Embodiment 1, diode 14 is placed on individual inner lead 31, diode 15 is placed on individual inner lead 32, and diode 16 is placed on individual inner lead 33.

[0020] The individual inner leads 31, 32, and 33 are respectively connected to individual outer leads 31B, 32B, and 33B whose one ends are exposed outside the sealing resin 70. The individual outer leads 31B, 32B, and 33B in Embodiment 1 extend along a direction substantially perpendicular to the first direction D1 when viewed in plan.

[0021] In Embodiment 1, the individual inner leads 31, 32, and 33 and the individual outer leads 31B, 32B, and 33B corresponding to the respective individual inner leads are integral. Therefore, it can also be expressed that the individual inner lead 31 and the individual outer lead 31B constitute one lead as a whole. The individual inner lead 32 and the individual outer lead 32B, and the individual inner lead 33 and the individual outer lead 33B are the same as the individual inner lead 31 and the individual outer lead 31B.

[0022] The second common inner lead 40 is disposed between the first common inner lead 20 and the plurality of individual inner leads 31, 32, and 33, and has a portion 40A extending along the first direction D1. The second common inner lead 40 is connected to a second outer lead 40B whose one end is exposed outside the sealing resin 70.

[0023] In Embodiment 1, the second outer lead 40B extends along a direction substantially perpendicular to the first direction D1 when viewed from above. In Embodiment 1, the second common inner lead 40 and the second outer lead 40B are integrated. Therefore, the second common inner lead 40 and the second outer lead 40B can be described as forming a substantially L-shaped lead as a whole.

[0024] Each connector constituting the plurality of connectors is made of a conductive metal plate (for example, a copper plate). The plurality of connectors includes first connectors 51, 52, and 53 in a number equal to the number of semiconductor chips (diodes 11, 12, 13) mounted on the first common inner lead 20 (3 connectors). Preferably, the first connectors 51, 52, and 53 are all the same shape. The plurality of connectors also includes second connectors 61, 62, and 63 in a number equal to the number of semiconductor chips (diodes 14, 15, 16) mounted on the plurality of individual inner leads (individual inner leads 31, 32, 33) (3 connectors). Preferably, the second connectors 61, 62, and 63 are all the same shape.

[0025] The first connectors 51, 52, and 53 connect the semiconductor chips (diodes 11, 12, and 13) mounted on the first common inner lead 20 to the individual inner leads 31, 32, and 33 on a one-to-one basis. The first connectors 51, 52, and 53 are each positioned to straddle the second common inner lead 40 and are not connected to the second common inner lead 40. It is preferable that the first connectors 51, 52, and 53 are arranged at equal intervals along the first direction D1. The second connectors 61, 62, and 63 connect the semiconductor chips (diodes 14, 15, and 16) mounted on the individual inner leads 31, 32, and 33 to the second common inner lead 40 on a one-to-one basis. It is preferable that the second connectors 61, 62, and 63 are arranged at equal intervals along the first direction D1.

[0026] In this specification, "to connect" means to connect electrically. Furthermore, with respect to a connector, "one-to-one connection" means that the connector electrically connects two components and is not electrically connected to anything else. It is preferable to use a conductive bonding material (not shown) for the connection using the connector.

[0027] When the semiconductor device 1 is viewed from above, the sealing resin 70 has a shape that can define two parallel long sides LS and two parallel short sides SS that are perpendicular to the long sides LS. The sealing resin 70 can also be described as having a substantially rectangular shape when viewed from above. Note that when considering the long sides and short sides, the presence of additional shapes (notches C in Embodiment 1) is not taken into consideration.

[0028] When the semiconductor device 1 is viewed from above, the length of each of the first common inner lead 20, the multiple individual inner leads (individual inner leads 31, 32, 33), and the second common inner lead 40 in the direction perpendicular to the first direction D1 is less than or equal to half the length of the sealing resin 70 in the direction perpendicular to the first direction D1.

[0029] 2. Effects of the semiconductor device 1 according to Embodiment 1 The semiconductor device 1 according to Embodiment 1 includes first connectors 51, 52, 53 and second connectors 61, 62, 63 that individually connect semiconductor chips (diodes 11, 12, 13, 14, 15, 16) to inner leads. Therefore, compared to conventional semiconductor devices, the semiconductor device 1 can increase the number of connection points of the components in its internal structure, thereby increasing the strength of the structure around the inner leads. When the strength of the structure around the inner leads is high, the influence of the sealing resin 70 on the inner leads can be reduced. Consequently, the semiconductor device 1 is a semiconductor device that can suppress the tilting of the inner leads in the sealing resin 70 compared to conventional semiconductor devices.

[0030] Furthermore, in the semiconductor device 1 according to Embodiment 1, the plurality of connectors include first connectors 51, 52, 53 in a number equal to the number of semiconductor chips mounted on the first common inner lead 20, and second connectors 61, 62, 63 in a number equal to the number of semiconductor chips mounted on the plurality of individual inner leads. Therefore, according to the semiconductor device 1 according to Embodiment 1, it is possible to efficiently increase the number of connection points for the components in the internal configuration of the semiconductor device 1 by using first connectors 51, 52, 53 and second connectors 61, 62, 63 in a number equal to the number of semiconductor chips.

[0031] Furthermore, in the semiconductor device 1 according to Embodiment 1, the plurality of semiconductor chips include diodes 11, 12, 13, 14, 15, and 16. Therefore, according to the semiconductor device 1 according to Embodiment 1, it is possible to make the semiconductor device 1 a useful product using diodes 11, 12, 13, 14, 15, and 16.

[0032] Furthermore, in the semiconductor device 1 according to Embodiment 1, the plurality of semiconductor chips include six diodes 11, 12, 13, 14, 15, and 16, and three diodes 11, 12, and 13 are mounted on the first common inner lead 20. Also, in the semiconductor device 1 according to Embodiment 1, the plurality of individual inner leads include three individual inner leads 31, 32, and 33, and one diode 14, 15, and 16 is mounted on each individual inner lead 31, 32, and 33. Therefore, according to the semiconductor device 1 according to Embodiment 1, it is possible to make the semiconductor device 1 a useful product as a so-called three-phase bridge diode package.

[0033] Furthermore, in the semiconductor device 1 according to Embodiment 1, when the semiconductor device 1 is viewed from above, the sealing resin 70 has a shape that can define two parallel long sides LS and two parallel short sides SS perpendicular to the long sides LS, and the first direction D1 is parallel to the long sides LS. According to the semiconductor device 1 according to Embodiment 1, the first connectors 51, 52, 53 and the second connectors 61, 62, 63 can be arranged at appropriate intervals (for example, at equal intervals) and then easily connected to the first common inner lead 20 and the second common inner lead 40. For this reason, according to the semiconductor device 1 according to Embodiment 1, it is possible to increase the number of connection points of the components while adopting an appropriate arrangement, and to further increase the strength of the structure around the inner leads.

[0034] Furthermore, in the semiconductor device 1 according to Embodiment 1, when the semiconductor device 1 is viewed from above, the length of each of the first common inner lead 20, the plurality of individual inner leads, and the second common inner lead 40 in the direction perpendicular to the first direction D1 is less than half the length of the sealing resin 70 in the direction perpendicular to the first direction D1. Therefore, according to the semiconductor device 1 according to Embodiment 1, by suppressing the length of each inner lead in the direction perpendicular to the first direction D1, it is possible to further reduce the influence that each inner lead receives from the sealing resin 70.

[0035] Furthermore, in the semiconductor device 1 according to Embodiment 1, the first common inner lead 20 is connected to the first outer lead 20B, the individual inner leads 31, 32, and 33 are connected to the individual outer leads 31B, 32B, and 33B, and the second common inner lead 40 is connected to the second outer lead 40B. Therefore, according to the semiconductor device 1 of Embodiment 1, it is possible to appropriately connect the internal structure of the semiconductor device 1 to the outside.

[0036] [Embodiment 2] The semiconductor device 2 according to Embodiment 2 has basically the same configuration as the semiconductor device 1 according to Embodiment 1, but differs in the number of semiconductor chips (diodes), the number of individual inner leads, and the number of connectors. The configuration of the semiconductor device 2 will be described below, focusing on the differences from the semiconductor device 1.

[0037] The semiconductor device 2 according to Embodiment 2 is the same as the semiconductor device 1 in that it comprises a plurality of semiconductor chips, a plurality of inner leads, a plurality of connectors, and a sealing resin 70 (see Figure 2). The semiconductor device 2 can also be described as a single-phase bridge diode package. The components of the semiconductor device 2 will be described below. In the following description, the description of the components of the semiconductor device 2 that are substantially the same as the components of the corresponding components in the semiconductor device 1 may be omitted.

[0038] In Embodiment 2, the multiple semiconductor chips include four diodes 11, 12, 13, and 14. The difference in configuration between semiconductor device 2 and semiconductor device 1 is mainly due to the number of diodes.

[0039] In Embodiment 2, two diodes 11 and 12 are mounted on the first common inner lead 20. Also in Embodiment 2, the plurality of individual inner leads include two individual inner leads 31 and 32.

[0040] In Embodiment 2, the plurality of connectors includes a number of first connectors 51, 52 equal to the number of semiconductor chips (diodes 11, 12) mounted on the first common inner lead 20 (2 connectors). The plurality of connectors also includes a number of second connectors 61, 62 equal to the number of semiconductor chips (diodes 14, 15) mounted on the plurality of individual inner leads (individual inner leads 31, 32) (3 connectors).

[0041] The semiconductor device 2 according to Embodiment 2 differs from the semiconductor device 1 according to Embodiment 1 in the number of semiconductor chips (diodes), the number of individual inner leads, and the number of connectors. However, the semiconductor device 2 includes first connectors 51, 52 and second connectors 61, 62 that individually connect the semiconductor chips (diodes 11, 12, 13, 14) to the inner leads. Therefore, the semiconductor device 2, like the semiconductor device 1, is a semiconductor device that can suppress the tilting of the inner leads in the sealing resin 70 compared to conventional semiconductor devices.

[0042] Since the semiconductor device 2 according to Embodiment 2 has basically the same configuration as the semiconductor device 1 according to Embodiment 1, it also has the corresponding effects of the semiconductor device 1.

[0043] Although the present invention has been described above based on the embodiments described above, the present invention is not limited to the embodiments described above. It can be implemented in various forms without departing from the spirit of the invention, and for example, the following modifications are also possible.

[0044] (1) The positions, sizes, shapes, etc. of each component described in the above embodiments and shown in the drawings are illustrative examples and can be changed within the scope that does not impair the effects of the present invention.

[0045] (2) In each of the above embodiments, the plurality of connectors includes the first connectors 51, 52, 53 and the second connectors 61, 62, 63, but the present invention is not limited thereto. The plurality of connectors may include connectors other than the first connectors and the second connectors.

[0046] (3) In each of the above embodiments, the plurality of semiconductor chips includes diodes 11, 12, 13, 14, 15, and 16, but the present invention is not limited thereto. The plurality of semiconductor chips may also include semiconductor chips other than diodes (for example, MOSFETs and IGBTs).

[0047] (4) In each of the above embodiments, the sealing resin 70 has a substantially rectangular shape when viewed from above, but the present invention is not limited thereto. The sealing resin may have a shape other than a substantially rectangular shape when viewed from above (for example, a square shape).

[0048] (5) In each of the above embodiments, each inner lead was connected to an outer lead, but the present invention is not limited thereto. For example, each inner lead may be connected to a terminal or the like that is separate from each inner lead. [Explanation of Symbols]

[0049] 1,2…Semiconductor equipment, 11,12,13,14,15,16…Diode, 20…First common inner lead, 20B…First outer lead, 31,32,33…Individual inner leads, 31B,32B,33B…Individual outer leads, 40…Second common inner lead, 40B…Second outer lead, 51,52,53…First connector, 61,62,63…Second connector, 70…Sealing resin, D1…First direction, LS…Long side, SS…Short side

Claims

1. A semiconductor device comprising multiple semiconductor chips, multiple inner leads, multiple connectors, and a sealing resin, The aforementioned multiple inner leads are A first common inner lead having a portion extending along a predetermined first direction, A plurality of individual inner leads arranged along the first direction, It includes a second common inner lead that is positioned between the first common inner lead and the plurality of individual inner leads and has a portion that extends along the first direction, At least two of the semiconductor chips are mounted on the first common inner lead in an arrangement that follows the first direction. At least one of the semiconductor chips is mounted on the individual inner lead. The aforementioned plurality of connectors are, A first connector that connects the semiconductor chip mounted on the first common inner lead to the individual inner lead on a one-to-one basis, It includes a second connector that connects the semiconductor chip placed on the individual inner lead and the second common inner lead on a one-to-one basis, The plurality of semiconductor chips include diodes, The plurality of semiconductor chips include six diodes as the diodes, Three of the diodes are mounted on the first common inner lead. The plurality of individual inner leads include three of the individual inner leads, A semiconductor device characterized in that one diode is mounted on the inner lead of the individual piece.

2. The semiconductor device according to claim 1, wherein the plurality of connectors include a number of first connectors equal to the number of semiconductor chips mounted on the first common inner lead, and a number of second connectors equal to the number of semiconductor chips mounted on the plurality of individual inner leads.

3. When the semiconductor device is viewed from above, the sealing resin has a shape that can define two parallel long sides and two parallel short sides that are perpendicular to the long sides. The semiconductor device according to claim 1, characterized in that the first direction is parallel to the long side.

4. The semiconductor device according to claim 3, characterized in that, when the semiconductor device is viewed in plan view, the length of each of the first common inner lead, the plurality of individual inner leads, and the second common inner lead in the direction perpendicular to the first direction is half or less of the length of the sealing resin in the direction perpendicular to the first direction.

5. The first common inner lead is connected to a first outer lead, one end of which is exposed to the outside of the sealing resin. The individual inner lead is connected to an individual outer lead, one end of which is exposed to the outside of the sealing resin. The semiconductor device according to claim 3, characterized in that the second common inner lead is connected to a second outer lead, one end of which is exposed to the outside of the sealing resin.

6. The semiconductor device according to claim 5, characterized in that, when the semiconductor device is viewed in plan, one end of the first outer lead and one end of the second outer lead are exposed on the side opposite to the side on which one end of the individual outer lead is exposed to the outside of the sealing resin.

7. The semiconductor device according to claim 6, characterized in that when the semiconductor device is viewed in plan, the first outer lead, the second outer lead, and the individual outer leads are arranged symmetrically with respect to one of the individual outer leads.

8. The semiconductor device according to claim 1, characterized in that when the semiconductor device is viewed in plan view, each of the six diodes is covered by either the first connector or the second connector.