Semiconductor equipment

Abstract

A resistor element and a thin film transistor manufactured using an oxide semiconductor layer with controlled electrical characteristics, a logic circuit using the same, and a semiconductor device using the logic circuit are provided. 【Solution means】A silicon nitride layer 910 formed by a plasma CVD method using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided so as to be in direct contact with an oxide semiconductor layer 905 applied to a resistor element 354, and an oxide semiconductor layer 906 applied to a thin film transistor 355 is provided with a silicon nitride layer 910 via a silicon oxide layer 909 that functions as a barrier layer. Therefore, hydrogen is introduced into the oxide semiconductor layer 905 at a higher concentration than in the oxide semiconductor layer 906. As a result, the resistance value of the oxide semiconductor layer 905 applied to the resistor element 354 becomes lower than the resistance value of the oxide semiconductor layer 906 applied to the thin film transistor 355. ​

Description

[Technical Field]

[0001] The present invention is a drive circuit composed of an element formed using a metal oxide exhibiting semiconductor properties. This relates to semiconductor devices that utilize the drive circuit. Note that a semiconductor device utilizes semiconductor properties. This refers to all devices that can function by being semiconductors, and includes display devices, semiconductor circuits, and electronic devices. It is a body device. [Background technology]

[0002] Metal oxides exist in a wide variety of forms and are used in various applications. Indium oxide is well known. It is a material that has been developed and is used as a transparent electrode material required for liquid crystal displays and other applications. Yes, they are.

[0003] Some metal oxides exhibit semiconductor properties. Metal oxides that exhibit semiconductor properties are compound It is a type of material semiconductor. Compound semiconductors are composed of two or more atoms bonded together by ionic bonds. It is a semiconductor that can be formed. Generally, metal oxides are insulators. However, metal oxides are composed of It is known that depending on the combination of elements, the electrostatic attraction is weak, resulting in a semiconductor.

[0004] For example, among metal oxides, tungsten oxide, tin oxide, indium oxide, zinc oxide, These are known to exhibit semiconductor properties. Transparent semiconductors composed of such metal oxides are known to be semiconductors. Thin-film transistors in which the body layer is used as a channel-forming region have been disclosed (Patent Documents 1 to 4, Non-patent document 1).

[0005] By the way, metal oxides are known not only as monocrystalline oxides but also as multicrystalline oxides. For example InGaO3(ZnO) having a homologous phase m (m: natural number) is a known material. Non-patent documents 2 to 4).

[0006] Then, the above-mentioned In-Ga-Zn oxide is used as the channel formation region of the thin-film transistor. It has been confirmed that it is applicable in this region (Patent Document 5, Non-Patent Documents 5 and 6). [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Application Publication No. 1988-1986 [Patent Document 2] Japanese Patent Application Publication No. 8-264794 [Patent Document 3] Special Publication No. 11-505377 [Patent Document 4] Japanese Patent Publication No. 2000-150900 [Patent Document 5] Japanese Patent Publication No. 2004-103957 [Non-patent literature]

[0008] [Non-Patent Document 1] MW Prins, KO Grosse-Holz, G. Muller, JFM Cillessen, JB Giesbers, RP Weening, and RM Wolf, "A ferroelectric transparent thin-film transistor", Appl. Phys. Lett., 17 June 1996, Vol.68 p.3650-3652 [Non-Patent Document 2] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, p.298-315

Non-Patent Document 3

Non-Patent Document 4

Non-Patent Document 5

Non-Patent Document 6

Summary of the Invention

Problems to be Solved by the Invention

[0009] Thin film transients using metal oxides exhibiting semiconductor properties (hereinafter also called oxide semiconductors) The star is an active-matrix display device (liquid crystal display, electroluminescent display). It is being considered for application to displays or electronic paper, etc. Activema A TRIX-type display device has hundreds of thousands to millions of pixels arranged in a matrix, and each pixel has a It has a drive circuit that receives a LS signal.

[0010] In an active-matrix display device, thin-film transistors are provided for each pixel, driving A switch that switches between on and off when a pulse signal is input from the power circuit. It functions as a driving element, enabling the display of images. Furthermore, the thin-film transistor is used for driving cycles. It is also used as an element that makes up a circuit.

[0011] The drive circuit for driving the pixel section consists of thin-film transistors, capacitive elements, resistive elements, etc. It is composed of elements.

[0012] One aspect of the present invention comprises an active element and a passive element made using an oxide semiconductor. One of the objectives is to provide a logic circuit and a semiconductor device having said logic circuit. . [Means for solving the problem]

[0013] One aspect of the present invention comprises an enhancement-type thin-film transistor and a resistive element. Transistors and resistive elements are formed using oxide semiconductor layers. Furthermore, thin-film transistors The hydrogen concentration of the oxide semiconductor layer applied to the resistor, Lower the hydrogen concentration below this level. This will lower the resistance value of the oxide semiconductor layer applied to the resistive element. However, it is characterized by having a lower resistance value than the oxide semiconductor layer applied to thin-film transistors. do.

[0014] One aspect of the present invention relates to thin-film transistors and resistive elements formed using oxide semiconductor layers. The resistive element has an oxide semiconductor layer on which silane (SiH4) and ammonia are present. Formed by plasma CVD using a gas containing hydrogen compounds such as NH3. An oxide that is provided so as to be in direct contact with the silicon nitride layer and is applied to thin-film transistors. On the semiconductor layer, the silicon nitride layer described above is used via a silicon oxide layer that functions as a barrier layer. A thin film transistor layer is provided. Therefore, in the oxide semiconductor layer applied to the resistive element, a thin film transistor is provided. A higher concentration of hydrogen is introduced into the oxide semiconductor layer applied to the DISTA. As a result, the resistance The resistance value of the oxide semiconductor layer applied to the device is the same as that of the oxide semiconductor applied to the thin-film transistor. It is characterized by having a resistance value lower than that of the body layer.

[0015] In other words, one aspect of the present invention is a resistive element in which a first oxide semiconductor layer is applied to the resistive component, The second oxide semiconductor layer, which has a lower hydrogen concentration than the first oxide semiconductor layer, forms the channel formation region. A thin-film transistor applied to a second oxide semiconductor layer and a silicon oxide layer provided on the second oxide semiconductor layer The material comprises a first oxide semiconductor layer and a silicon nitride layer provided on the silicon oxide layer. This is a logic circuit.

[0016] Furthermore, the acid applied to the resistive component of the resistive element and the channel formation region of the thin-film transistor A configuration in which a low-resistance oxide semiconductor layer is provided between the oxide semiconductor layer and the conductive wiring. This is also one aspect of the present invention.

[0017] In other words, in one aspect of the present invention, in the above configuration, one terminal or the other of the resistive element A terminal and a third oxide semiconductor layer in contact with the first oxide semiconductor layer, and a thin-film transistor. A fourth oxide semiconductor layer in contact with the first terminal and second oxide semiconductor layer, and a thin film transistor The device has a second terminal and a fifth oxide semiconductor layer in contact with the second oxide semiconductor layer, and a third The oxide semiconductor layer to the fifth oxide semiconductor layer has a lower resistance than the second oxide semiconductor layer. It is a logic circuit.

[0018] Furthermore, one aspect of the present invention is formed using an oxide semiconductor layer containing a high concentration of nitrogen. It has a resistive element and a thin-film transistor. Furthermore, a barrier layer and A silicon oxide layer that functions in this way is provided. At this stage, a substance that will be a source of hydrogen atoms is provided. Heat treatment at 200°C to 600°C in a specific atmosphere, typically 250°C to 500°C. The process is carried out. Nitrogen in the oxide semiconductor layer is densely packed within the film by the atoms that make up the oxide semiconductor layer. Because it inhibits filling and promotes the diffusion and solid solution of hydrogen into the film, Through heat treatment, a thin film is applied to the oxide semiconductor layer containing a high concentration of nitrogen, which is used in resistive elements. A higher concentration of hydrogen is introduced than in the oxide semiconductor layer applied to the lampistor. As a result, The resistance value of an oxide semiconductor layer containing a high concentration of nitrogen applied to a resistive element is related to thin-film transients. The resistance value will be lower than that of an oxide semiconductor layer containing a high concentration of nitrogen, which is applied to the st.

[0019] In other words, one aspect of the present invention involves a first oxide semiconductor layer containing a high concentration of nitrogen, which is used to create a resistive material. The resistive element applied to the first oxide semiconductor layer has a lower hydrogen concentration and a higher nitrogen concentration. A thin-film transistor having a second oxide semiconductor layer containing the material applied to the channel formation region, This is a logic circuit.

[0020] Furthermore, an oxide semiconductor layer containing a high concentration of nitrogen is defined as having nitrogen (N) relative to oxygen (O). The ratio (N / O) is in the range of 0.05 to 0.8, preferably 0.1 to 0.5. This refers to an oxide semiconductor layer.

[0021] Furthermore, on an oxide semiconductor layer containing a high concentration of nitrogen applied to a resistive element, silane ( Plasma CV using gases containing hydrogen compounds such as SiH4 and ammonia (NH3) A configuration in which the silicon nitride layer formed by method D is provided in direct contact is also a form of the present invention. It is a state.

[0022] In other words, in one aspect of the present invention, in the above configuration, provided on the second oxide semiconductor layer A silicon oxide layer, a first oxide semiconductor layer, and a nitride layer provided on the silicon oxide layer It is a logic circuit having a recon layer.

[0023] In this document (specification, claims, or drawings, etc.), "film" refers to the entire substrate. It is formed on a surface and later processed into a desired shape using a photolithography process or the like. The term "layer" refers to something that is in its pre-processed state. And "layer" refers to something that is photophotographically separated from a "film". A product that has been processed and formed into a desired shape by a lithography process, etc., and a product that is formed on the entire surface of the substrate. It refers to something that is intended to achieve a certain purpose.

[0024] Furthermore, in this document (specification, claims, or drawings, etc.), A and B are connected. "Connected" means that A and B are not only directly connected, but also electrically connected. This shall include. Here, A and B are electrically connected to mean that there is no electrical connection between A and B. When an object with such an electrical effect exists, A and B are approximately the same through the object. This represents the case where it becomes "do".

[0025] Specifically, A and B are connected via a switching element such as a transistor, When A and B are at approximately the same potential due to the conduction of the switching element, or when a resistive element is used... A and B are connected, and the potential difference generated across the resistor element is the dynamic of the circuit including A and B. When considering circuit operation, such as when it does not affect the operation, A and B are the same number This indicates a state where it is acceptable to treat it as a "do" (a type of object).

[0026] Furthermore, the source and drain terminals of a thin-film transistor are determined by the structure of the thin-film transistor and Since it varies depending on the operating conditions, etc., it is necessary to identify which is the source terminal and which is the drain terminal. It is difficult to do so. Therefore, in this document (specification, claims, or drawings, etc.) In this configuration, one of the source terminal and the drain terminal is designated as the first terminal, and the other of the source terminal and the drain terminal is designated as the other terminal. This terminal will be referred to as the second terminal to distinguish it from the others. [Effects of the Invention]

[0027] According to one aspect of the present invention, the hydrogen concentration of the oxide semiconductor layer applied to the resistive component of the resistive element This is more than the hydrogen concentration of the oxide semiconductor layer applied to the channel formation region of the thin-film transistor. It can be made higher. Therefore, it is possible to selectively lower the resistance of the oxide semiconductor layer. Yes, it is possible. This allows for the separate fabrication processes for thin-film transistors and resistive elements. A logic circuit that does not require and has a reduced manufacturing process, and a semiconductor device equipped with the logic circuit. We can provide a place for you. [Brief explanation of the drawing]

[0028] [Figure 1] This figure shows an example configuration of a semiconductor device. [Figure 2] This is a block diagram showing an example configuration of a drive circuit. [Figure 3] (A) and (B) are circuit diagrams showing one example configuration of the drive circuit. [Figure 4] This figure shows an example of a timing chart for a drive circuit. [Figure 5] This is a circuit diagram showing one example configuration of a drive circuit. [Figure 6] This is a circuit diagram showing one example configuration of a drive circuit. [Figure 7] This is a block diagram showing an example configuration of a drive circuit. [Figure 8] This is a layout diagram showing one example configuration of a drive circuit. [Figure 9] This is a layout diagram showing one example configuration of a drive circuit. [Figure 10] This is a layout diagram showing one example configuration of a drive circuit. [Figure 11] (A) to (C) are diagrams showing one example configuration of the drive circuit. [Figure 12] (A) and (B) are diagrams showing an example configuration of a drive circuit. [Figure 13] (A) and (B) are diagrams showing an example configuration of a drive circuit. [Figure 14] (A) and (B) are diagrams showing an example configuration of a drive circuit. [Figure 15] (A) to (C) are diagrams illustrating an example of the manufacturing process for a drive circuit. [Figure 16] (A) to (C) are diagrams illustrating an example of the manufacturing process for a drive circuit. [Figure 17] This figure shows an example of a drive circuit configuration. [Figure 18] (A) to (C) are diagrams illustrating an example of the manufacturing process for a drive circuit. [Figure 19](A) and (B) are diagrams showing an example of the manufacturing process for a drive circuit. [Figure 20] (A) and (B) are circuit diagrams showing an example configuration of a drive circuit, and (C) is a diagram showing an example of a timing chart for a drive circuit. [Figure 21] This figure shows an example configuration of a semiconductor device. [Figure 22] This is a circuit diagram showing one example of a protection circuit configuration. [Figure 23] This is a circuit diagram showing one example of the pixel configuration of a semiconductor device. [Figure 24] This figure shows an example configuration of a semiconductor device. [Figure 25] This figure shows an example configuration of a semiconductor device. [Figure 26] This figure shows an example configuration of a semiconductor device. [Figure 27] This is a diagram showing an example of a semiconductor device. [Figure 28] This is a diagram showing an example of a semiconductor device. [Modes for carrying out the invention]

[0029] Embodiments of the invention disclosed below will be illustrated with reference to the drawings. However, the disclosed The invention is not limited to the following embodiments, and does not depart from the spirit and scope of the invention. It will be easily understood by those skilled in the art that its form and details can be changed in various ways. Therefore, the disclosed invention should be interpreted as being limited to the descriptions of the embodiments shown below. No. In the embodiments illustrated below, the same reference numerals refer to the same thing across different drawings. It may be used throughout.

[0030] (Embodiment 1) In this embodiment, Figures 1 to 16 show a drive circuit fabricated using an oxide semiconductor. An example of a display device equipped with the following will be described. Specifically, the pixel portion of the display device is driven by As an example of a source line drive circuit and gate line drive circuit, which are drive circuits for this purpose, enhance An inverter (hereinafter referred to as ER) is formed by combining a ment-type thin-film transistor and a resistive element. A drive circuit having a MOS circuit will be described. Note that in this embodiment, it is unipolar. As the thin-film transistor that constitutes the drive circuit, an n-channel type thin-film transistor is applied. An example of this is shown below.

[0031] A display device refers to a device that has a display element such as a light-emitting element or a liquid crystal element. The display device may include peripheral drive circuits for driving multiple pixels. The peripheral drive circuit that drives the pixels is formed on the same substrate as multiple pixels. The location is a flexible printed circuit board (F It may also include a PC. Furthermore, the display device may include a flexible printed circuit board (FPC), etc. IC chips, resistors, capacitives, inductors, transistors, etc. are connected via this. It may also include an attached printed circuit board (PWB). Furthermore, the display device is Optical sheets such as polarizers or phase difference plates, lighting devices, housings, audio input / output devices, or optical sensors It is acceptable to include "sa," etc.

[0032] Figure 1 shows an overall diagram of the display device. A source line drive circuit is located on the substrate 100. 101, first gate line drive circuit 102A, second gate line drive circuit 102B, and The element part 103 is integrally formed. In the pixel part 103, the part enclosed by the dotted line frame 110 It is 1 pixel. In the example in Figure 1, the gate line driving circuit is the first gate line driving circuit 102 A. The second gate line drive circuit 102B is shown, but either one alone may be used. Furthermore, in the pixels of a display device, the display elements are controlled by thin-film transistors. Gate wire drive circuit 101, first gate wire drive circuit 102A, second gate wire drive circuit 102 The signals that drive B (clock signal, start pulse, etc.) are transmitted via a flexible printed circuit board. Flexible Print Circuit (FPC) via 104A, 104B It is input from an external source.

[0033] The source line drive circuit and gate line drive circuit for driving the pixel section use thin-film transistors. It has logic circuits such as inverter circuits composed of capacitive elements, resistive elements, etc. It is constructed using. When forming an inverter circuit using a unipolar thin-film transistor, Combining enhancement-type thin-film transistors and depletion-type thin-film transistors When formed by (hereinafter referred to as EDMOS circuit), and enhancement type thin film transistor There are two types: those formed by two transistors (hereinafter referred to as EEMOS circuits) and ERMOS circuits. Furthermore, if the threshold voltage of the n-channel thin-film transistor is positive, the enhancement type Defined as a transistor, if the threshold voltage of an n-channel thin-film transistor is negative, then A compression transistor is defined as such, and this definition shall be followed throughout this specification.

[0034] As a thin-film transistor provided in the pixel section, an enhancement type with a positive threshold voltage is used. When a transistor is applied, the current that flows is determined by the voltage between the gate terminal and the source terminal. The current can be made smaller than that of a depletion-type transistor, thereby reducing power consumption. This can be done. Also, thin-film transistors are used in the drive circuit to drive the pixel portion. Therefore, it is preferable to use the same enhancement-type thin-film transistor as the pixel section. By using an enhancement-type thin-film transistor as the thin-film transistor in the barta circuit... Therefore, the type of transistor used when manufacturing the pixel section and the driving circuit is limited to one type, The manufacturing process can be reduced. Furthermore, enhancement transistors use oxide semiconductors. It uses a conductor, and its electrical characteristics are such that when the gate voltage is between -20V and 20V, it is on- The ratio is 10 9 Therefore, the leakage current between the source terminal and the drain terminal is low. This enables power-efficient operation.

[0035] Furthermore, the oxide semiconductor used in this document (specification, claims, or drawings, etc.) is I nMO3(ZnO) m A thin film is formed, denoted as (m>0), and this thin film is used to create a semiconductor. The element is fabricated. Note that M is gallium (Ga), iron (Fe), nickel (Ni), and man. This indicates one or more metallic elements selected from magnesium (Mn) and cobalt (Co). For example, M can be gallium (Ga), and also gallium (Ga) and nickel Ni (or gallium (Ga)) and iron (Fe), etc., other metal elements besides gallium (Ga) It may contain elements. Also, in the above oxide semiconductor, the metal element M is included. In addition, iron (Fe), nickel (Ni), and other transition metal elements may be impurity elements, or Some contain transition metal oxides. In addition, the above oxide semiconductors contain Thorium (Na) is 5 × 10 18 (atoms / cm 3 ) Preferably 1 × 10 1 8 (atoms / cm 3)It is assumed as follows. In this document (specification, claims, or drawings, etc.), this thin film is also referred to as an In-Ga-Zn-O-based non-single crystal film.

[0036] Typical measurement examples by inductively coupled plasma mass spectrometry (ICP-MS analysis) are shown in Table 1. A target (In:Ga:Zn = 1:1:0.5) with a molar ratio of In2O3:Ga2O3:ZnO = 1:1:1 was used, and the oxide semiconductor film obtained under Condition 1 with a pressure of 0.4 Pa, a DC power supply of 5 00 W, an argon gas flow rate of 10 sccm, and oxygen of 5 sccm is InGa Zn 0.94 Zn 0.40 O 3.31 O. Also, the oxide semiconductor film obtained under Condition 2 where only the film formation atmosphere conditions were changed from the above conditions to an argon gas flow rate of 40 sccm and oxygen of 0 sccm is InGa Zn Zn 0.95 Zn 0.41 O 3.33 O.

[0037]

Table *********1

[0038] Also, the results of quantification by changing the measurement method to Rutherford backscattering spectrometry (RBS analysis) are shown in Table 2. As a result of measuring the sample of Condition 1 by RBS analysis, the oxide semiconductor film is InGaNote: The original text seems to have some incomplete or incorrect tags (e.g., - , - , - which are just presented as they are in the translation as per the instruction to preserve all 7 - digit tags exactly). Also, the specific content of some tags like 0.94 - 3.33 is not fully clear in terms of what they represent in a way that can be translated more precisely, so they are translated as is. If there is more context or clarification about these tags, the translation could be further refined.​​​​​​​​​​​​​​​0.92 Zn 0.45 O 3.86 Furthermore, the results of measuring the sample under condition 2 by RBS analysis showed that the oxide semi-oxide was... The conductive film is InGa 0.93 Zn 0.44 O 3.49 That is the case.

[0041] The crystal structure of the In-Ga-Zn-O non-single crystal film was determined after deposition by sputtering at 200°C. Even after heat treatment at ~500℃, typically 300~400℃ for 10~100 minutes, Amo The Rufus structure is observed in XRD (X-ray diffraction) analysis. Furthermore, the electrical components of thin-film transistors... The characteristics also show that the on / off ratio is 10 at gate voltages from -20V to 20V. 9 Above, the degree of mobility More than 10 can be fabricated. Oxide semiconductor layers having such electrical properties The thin-film transistors fabricated using this method are thin-film transistors made using amorphous silicon. It has higher mobility than a zista and drives the drive circuit, which is composed of a shift register, at high speed. It is possible.

[0042] Next, we will discuss the circuit diagrams for the gate line drive circuit and source line drive circuit using ERMOS circuits. Let me give an example and explain.

[0043] First, let's discuss the configuration of a source line drive circuit using an ERMOS circuit as the inverter circuit. Give an explanation.

[0044] Figure 2 shows the configuration of the source line drive circuit 101 in the display device shown in Figure 1. The source line drive circuit includes a level shifter 201 for the clock signal and a level for the start pulse. Shifter 202, pulse output circuit 203 and NAND circuit 2 which constitute the shift register 251 It has 04, a buffer 205, and a sampling switch 206, and receives input from an external source. The signals are the first clock signal (CLK1), the second clock signal (CLK2), and the start signal. These are pulses (SP) and analog video signals (Video). Among these, the first clock signal Regarding the first clock signal (CLK1), the second clock signal (CLK2), and the start pulse (SP) Therefore, immediately after receiving a low-voltage amplitude signal from an external source, level shifter 201 or 2 The signal undergoes amplitude conversion by 02 and is input to the drive circuit as a high-voltage amplitude signal.

[0045] Furthermore, the source line drive circuit in the display device of this embodiment is a single stage in the shift register. The sampling pulse output from the pulse output circuit is used to activate the sampling switch 206. By driving it, analog video signals from 12 source signal lines are simultaneously sampled. I will explain what is being done. In addition, there is a scanning direction switching signal to switch the scanning direction. It is also possible to configure it to input numbers, etc. In this embodiment, the first clock signal is used as the clock signal. The two-phase clock signal consists of a lock signal (CLK1) and a second clock signal (CLK2). An example of driving is shown, but the drive circuit is configured to be driven by a clock signal input other than a two-phase signal. That's fine.

[0046] Figures 3(A) and (B) show the multiple pulse output circuits 203 of the shift register 251. The configuration is shown. The pulse output circuit 300 is connected to the terminal to which the start pulse SP is input. The first switch 301 is used to invert the signal input via the first switch 301 and output it. The first inverter circuit 302 that is powered, and the signal output from the first inverter circuit 302 A second inverter circuit 303 and a third inverter circuit 305 that invert and output the signal, The second switch is connected to the terminal to which the signal output from the inverter circuit 303 of 2 is input. It consists of a 304 and a .

[0047] In the circuit diagram shown in Figure 3(A), the dotted line indicates one sampling stage. The pulse output circuit 350 outputs a pulse, and the shift register in Figure 3(A) has N stages (N It is composed of pulse output circuits (where is a natural number). From the N-stage pulse output circuit, Output signals out1 to outN are generated from the output terminals of each third inverter circuit 305. Output is produced. Note that in the pulse output circuit of the next stage after the first stage described above, the first switch 3 Between 01 and the second switch 304, the input first clock signal and the second clock signal The wiring that receives the signal is switched and connected. From the third row onward, the first crossover alternates. The wiring that inputs the first clock signal and the second clock signal connects the first switch 301 and the second switch It switches between and connects to Chi304 alternately.

[0048] Figure 3(B) shows a detailed circuit configuration of the pulse output circuit. The main body consists of thin-film transistors 351, 353, 355, 356, 358 and resistor element 35 It has 2, 354, and 357. It also has odd-numbered pulse output circuits 331 and even-numbered pulse The output circuit 332 has wiring 359 for supplying the first clock signal (CLK1), and It is connected to wiring 360 for supplying the second clock signal (CLK2). Next, using the first-stage pulse output circuit 331 as an example, we will discuss the specific connection relationships of semiconductor elements. To state.

[0049] The first terminal of thin-film transistor 351 is connected to the terminal to which the start pulse SP is input. The gate terminal is then connected to wiring 359.

[0050] One terminal of the resistor element 352 is connected to the wiring to which the high power supply potential VDD is supplied (high power supply potential line and It is connected to (also known as).

[0051] The first terminal of the thin-film transistor 353 is connected to the other terminal of the resistor element 352, and The terminal is connected to the second terminal of thin-film transistor 351, and the second terminal is at a low power supply potential VS S is connected to the wiring that supplies power (also called the low-power potential line).

[0052] One terminal of the resistor element 354 is connected to the high power supply potential line.

[0053] The first terminal of the thin-film transistor 355 is connected to the other terminal of the resistor element 354, and The terminal is connected to the other terminal of the resistor element 352 and the first terminal of the thin-film transistor 353. The second terminal is connected to the low power supply potential line.

[0054] The first terminal of the thin-film transistor 356 is connected to the other terminal of the resistive element 354 and the thin-film transistor The first terminal of sta355 is connected, the gate terminal is connected to wiring 360, and the second terminal is, It is connected to the second terminal of thin-film transistor 351 and the gate terminal of thin-film transistor 353. ru.

[0055] One terminal of the resistor element 357 is connected to the high power supply potential line, and the other terminal is connected to the second stage It is connected to the first terminal of the thin-film transistor 351 in the LS output circuit 332.

[0056] The first terminal of the thin-film transistor 358 is connected to the other terminal of the resistor 357 and the second stage pulse. It is connected to the first terminal of the thin-film transistor 351 in the output circuit 332, and the gate terminal is , the other terminal of the resistor element 352, the first terminal of the thin-film transistor 353, and the thin-film transistor It is connected to the gate terminal of the STA355, and the second terminal is connected to the low power supply potential line.

[0057] The second stage pulse output circuit also has connections to the first stage pulse output circuit, specifically wiring 359 and wiring 360. The configuration is the same except that it is reversed. Pulse output circuits 331 for odd-numbered stages from the 3rd stage onward and The even-numbered pulse output circuits 332 are connected sequentially in accordance with this.

[0058] In Figure 3(B), the thin-film transistor 351 is the first switch shown in Figure 3(A). This corresponds to 301. The resistor 352 and thin-film transistor 353 are shown in Figure 3(A). This corresponds to the first inverter circuit 302, and the first inverter circuit 302 is an ERMOS circuit Yes. The resistor element 354 and the thin-film transistor 355 are the second transistor shown in Figure 3(A). This corresponds to the first inverter circuit 303, and the second inverter circuit 303 is an ERMOS circuit. The transistor 356 corresponds to the second switch 304 shown in Figure 3(A). Resistor 3 57 and thin-film transistor 358 are connected to the third inverter circuit 305 shown in Figure 3(A). Correspondingly, the third inverter circuit 305 is an ERMOS circuit.

[0059] Note that thin-film transistors 351 and 356 are the same as thin-film transistors 353, 355, and 358. Similarly, it is preferable to use enhancement transistors as switches. By using an enhancement transistor, the transistor's off-current can be reduced. This allows for lower power consumption and reduces the number of manufacturing steps. ru.

[0060] Now, referring to the timing chart shown in Figure 4, the circuits shown in Figures 3(A) and (B) The circuit operation will be explained. Note that in Figure 4, for illustrative purposes, the circuit shown in Figure 3(B) is shown in the diagram. As a node, in the first stage pulse output circuit, the second terminal of the thin-film transistor 351 is used as a node. A (indicated as A in Figures 3(B) and 4), the other terminal of the resistor element 352 to node B (Figure 3 (B) and shown as B in Figure 4), the other terminal of the resistor element 354 is connected to node C (Figure 3(B) and (and shown as C in Figure 4), the other terminal of the resistor element 357 is connected to node out1 (Figure 3(B) and (In Figure 4, this is referred to as out1).

[0061] Furthermore, in the circuit shown in Figure 3(B), the second stage pulse output circuit is a thin film. The second terminal of transistor 351 is node D (indicated as D in Figures 3(B) and 4), and the resistor element The other terminal of child 352 is connected to node E (indicated as E in Figures 3(B) and 4), and resistor element 354 The other terminal is node F (indicated as F in Figures 3(B) and 4), and the other terminal of resistor element 357 Let the terminal be node out2 (indicated as out2 in Figures 3(B) and 4). Also, Figure 3(B In the circuit shown by ), the third stage pulse output circuit is represented by thin-film transistor 35 Let the second terminal of 1 be node G (indicated as G in Figures 3(B) and 4).

[0062] In Figure 4, during period T1, the start pulse SP is at a high level, and the first clock signal (CLK1) is at a high level. This section describes the operation when the first signal (CLK2) is at a high level and the second clock signal (CLK2) is at a low level. .

[0063] When the first clock signal (CLK1) becomes high, the first stage pulse output circuit Thin-film transistor 351 turns ON.

[0064] Then, the voltage level of the start pulse, which is H level, sets the voltage level of node A to H level. Raise the bell.

[0065] Then, as the voltage level at node A rises to the H level, the first stage pulse output The thin-film transistor 353 in the circuit turns ON.

[0066] Then, the low power supply voltage level, which is L level, sets the voltage level of node B to L level. Lower it.

[0067] Then, as the voltage level at node B drops to the L level, the first stage pulse output Thin-film transistors 355 and 358 in the circuit are turned off.

[0068] Then, the thin-film transistor 355 of the first stage pulse output circuit turns off. Therefore, the H level, which is the voltage level of the high power supply potential, raises the voltage level of node C to the H level. This causes the thin-film transistor 358 of the first-stage pulse output circuit to turn off. As a result, the H level, which is the voltage level of the high power supply potential, sets the voltage level of node out1 to H level. Raise the bell.

[0069] Note that the second clock signal (CLK2) is at a low level, so the first stage pulse output Thin-film transistor 356 of the circuit and thin-film transistor 351 of the second stage pulse output circuit are It will switch to the off state.

[0070] Next, in Figure 4, during period T2, the start pulse SP is at the L level, and the first clock signal (CL) is at the L level. This section describes the operation when K1) is at a low level and the second clock signal is at a high level.

[0071] When the first clock signal becomes low, the thin-film transient of the first stage pulse output circuit The 351 switch turns off. Meanwhile, the second clock signal (CLK2) is at a high level. Therefore, the thin-film transistor 356 of the first-stage pulse output circuit is turned ON. The voltage level of node A was at a high level due to the voltage level of node C, which was at a high level during period T1. The level will be maintained.

[0072] Then, each node in the first stage pulse output circuit maintains the same level as during period T1. This is the result.

[0073] On the other hand, when the second clock signal (CLK2) goes to a high level, the second stage pulse output The thin-film transistor 351 in the circuit turns ON.

[0074] Then, the H level, which is the voltage level of node out1, sets the H level of the voltage level of node D. Raise the bell.

[0075] Then, as the voltage level at node D rises to the H level, the second stage pulse output is generated. The thin-film transistor 353 in the circuit turns ON.

[0076] Then, the low power supply voltage level, which is L level, sets the voltage level at node E to L level. Lower it.

[0077] Then, as the voltage level at node E drops to the L level, the second stage pulse output is activated. Thin-film transistor 355 of the circuit and thin-film transistor 358 of the second stage pulse output circuit It will switch to the off state.

[0078] Then, the thin-film transistor 355 of the second-stage pulse output circuit turns off. Therefore, the H level, which is the voltage level of the high power supply potential, raises the voltage level of node F to the H level. This causes the thin-film transistor 358 of the second-stage pulse output circuit to be in the OFF state. As a result, the H level, which is the voltage level of the high power supply potential, sets the voltage level of node out2 to H level. Raise the bell.

[0079] Note that the first clock signal (CLK1) is at a low level, so the second stage pulse output Thin-film transistor 356 of the circuit and thin-film transistor 351 of the third stage pulse output circuit are It will switch to the off state.

[0080] Next, in Figure 4, during period T3, the start pulse SP is at the L level, and the first clock signal (CL) is at the CL level. The operation when K1) is at a high level and the second clock signal is at a low level will be explained.

[0081] When the first clock signal becomes high level, the thin film transient of the first stage pulse output circuit The 351 switch turns ON. Meanwhile, the second clock signal (CLK2) is at a low level. Therefore, the thin-film transistor 356 of the first stage pulse output circuit is turned off. This will cause the voltage level at node A to drop to the low level.

[0082] Then, as the voltage level at node A drops to the L level, the first stage pulse output The thin-film transistor 353 in the circuit turns off.

[0083] Then, the voltage level of the high power supply potential, which is H level, raises the voltage level of node B to H level. To raise it.

[0084] Then, as the voltage level at node B rises to the H level, the first stage pulse output Thin-film transistor 355 of the circuit and thin-film transistor 358 of the first stage pulse output circuit It will turn on.

[0085] Then, the thin-film transistor 355 of the first stage pulse output circuit turns ON. Therefore, the low power supply voltage level, which is L level, lowers the voltage level of node C to L level. As a result, the thin-film transistor 358 of the first-stage pulse output circuit turns on, The low power supply voltage level, L level, lowers the voltage level of node out1 to L level. Let them get off.

[0086] Note that the second clock signal (CLK2) is at a low level, so the first stage pulse output The thin-film transistor 356 in the circuit is turned off.

[0087] Furthermore, similar to the first-stage pulse output circuit during period T2, the second clock signal is at a low level. As a result, the thin-film transistor 351 of the second-stage pulse output circuit is turned off. On the other hand, the first clock signal (CLK1) is at a high level, so the second stage pulse output circuit The thin-film transistor 356 turns ON. Therefore, the NO, which was at the H level during period T2, The voltage level of node F will cause the voltage level of node D to remain at the H level.

[0088] Then, each node in the second stage pulse output circuit maintains the same level as during period T2. This is the result.

[0089] On the other hand, when the first clock signal (CLK1) goes to a high level, the third stage pulse output The thin-film transistor 351 in the circuit turns ON.

[0090] Then, the H level, which is the voltage level of node out2, sets the H level of the voltage level of node G to H level. Raise the bell.

[0091] Then, as the voltage level of node G rises to the H level, the third stage pulse output is activated. The thin-film transistor 353 in the circuit turns ON.

[0092] Subsequently, the on and off states of the transistors are controlled sequentially, thereby functioning as a shift register. It can be driven.

[0093] Furthermore, in the pulse output circuit described in Figures 3(A) and (B), node A and node C The following describes a configuration in which a thin-film transistor 356 (second switch 304) is provided between them. This is because the voltage level of node C is reduced from the high voltage potential VDD by the resistor element 354. This is because pressure drop was taken into consideration. Thin-film transistor 356 (second switch 304) By ) disconnecting the connection between node A and node C and driving it, node A This is preferable because it can increase the driving capability of the thin-film transistor 353 due to the potential. Furthermore, even if the thin-film transistor 356 (second switch 304) is not provided, this concrete implementation The circuit in the form of the application can be driven.

[0094] Furthermore, in the source line drive circuit configuration, the negation logic of the signals output from each pulse output circuit is used. The product (NAND) is taken to generate the signal to drive each source line. Therefore, In a source line drive circuit, more pulse output circuits are provided than the number of source lines, It is preferable to have a configuration that generates a signal for output to the line.

[0095] FIG. 5(A) shows a configuration example of the clock signal level shifter 201 shown in FIG. 2. . In FIG. 5(A), since the configurations of the level shifter for the first clock signal (CLK1) and the level shifter for the second clock signal (CLK2) are the same, only the level shifter for the first clock signal (CLK1) is shown. In FIG. 5(A), the first clock signal (CLK1) is amplitude-converted by the ERMOS circuit (Stage1), and buffer stages (Stage2, Stage3) are provided thereafter.

[0096] The operation of the circuit shown in FIG. 5(A) will be described. Here, the potentials of the power supplies used are three potentials of VSS, VDD0, and VDD, and VSS < VDD0 < VDD. By configuring to level-shift the amplitude of the first clock signal (CLK1) at the source line drive circuit input section, low power consumption and noise reduction can be achieved.

[0097] From the signal input section (CLK in1), the first input clock signal (CLK1) having an amplitude of L level / H level = VSS / VDD0 is input.

[0098] When the first input clock signal is at the H level, the thin film transistor 602 is turned on. Here, the on-resistance of the thin film transistor 602 is designed to be sufficiently lower than the resistance value of the resistance element 601. Therefore, the node α becomes the L level.

[0099] When the node α is at the L level, the thin film transistor 604 is turned off. Here, the off-resistance of the thin film transistor 604 is designed to be sufficiently higher than the resistance value of the resistance element 603. Therefore, the node β becomes the H level, and the H level becomes approximately the same as VDD. As described above, ​​​​​​​​​​​​The amplitude conversion is now complete.

[0100] The level shifter explained in Figure 5(A) takes into account the load on the pulse after amplitude conversion. A buffer stage is provided after the level shifter circuit (Stage 1) (Stage 2, S Stage 3). In Stage 2 and Stage 3, the same process is performed, ultimately leading to the belief A pulse is output to the output section.

[0101] Figure 5(A) shows the level shifter for the first clock signal (CLK1). However, the level shifter for the start pulse (SP) has the same configuration.

[0102] Figure 5(B) shows the amplitude conversion of the clock signal. The amplitude of the input signal is The L level / H level = VSS / VDD0, and the amplitude of the output signal is L level / H level The formula is r = VSS / VDD.

[0103] Figure 5(C) shows the amplitude conversion of the start pulse (SP). The amplitude of the signal is the same as the clock signal, L level / H level = VSS / VDD0, and the output signal The amplitude is given by L level / H level = VSS / VDD.

[0104] Figure 6(A) shows the two-input NAND circuit 204 shown in Figure 2. The configuration of path 204 is similar to that of an ERMOS circuit. Specifically, in an ERMOS circuit... The signal input section has two inputs, and thin-film transistors 702 and 703 are arranged in series. They are different.

[0105] When both signal input (In1) and signal input (In2) receive an H level input, As thin-film transistors 702 and 703 are turned ON, an L is present in the signal output section (Out). The level appears.

[0106] On the other hand, either one or both of the signal input section (In1) and the signal input section (In2) When an L level is input, an H level (ΔV) appears at the signal output (Out).

[0107] Figure 6(B) shows buffer 205 as shown in Figure 2. Buffer 205 is ERMO It is composed of S-circuits (Stage 1-4). Regarding the operation of the ERMOS circuit: As explained in the section on level shifter circuits, we will refer to the previous explanation here.

[0108] Figure 6(C) shows the sampling switch 206 shown in Figure 2. Switch 206 receives a sampling pulse from the signal input section (25) and is arranged in parallel. The 12 thin-film transistors 731 are controlled simultaneously. Analog video signals are input to the input electrodes (1) to (12) of the 731, and sampling pulses are applied. Its function is to write the potential of the video signal when a signal is input to the source signal line.

[0109] Figure 7 shows the circuit configuration of the gate line drive circuit in the display device shown in Figure 1. Level shifter 751 for clock signal, level shifter 752 for start pulse, shifter The pulse output circuit 753, NAND circuit 754, and buffer 755 that make up the ZISTA 781 To possess.

[0110] The gate line drive circuit receives a first clock signal (CLK1) and a second clock signal (CL1). K2) A start pulse (SP) is input. These input signals are transmitted from an external low-voltage oscillator. Immediately after being input as a width signal, a level shifter 751 for the clock signal and a start pulse are used. The signal undergoes amplitude conversion by the level shifter 752 and is input to the drive circuit as a high-voltage amplitude signal. It can be done.

[0111] Furthermore, the level shifter 751 for the clock signal, the level shifter 752 for the start pulse, and Regarding the configuration and operation of the output circuit 753, the NAND circuit 754, and the buffer 755. Since this is the same as the one used in the source line drive circuit, we will refer to the explanation given above. .

[0112] Next, examples of the layout diagram of the pulse output circuit shown in Figure 3(B) are shown in Figures 8 to 10. In Figures 8 to 10, the first stage of the multi-stage pulse output circuit is shown. This shows a pulse output circuit.

[0113] The pulse output circuits in Figures 8 to 10 include power line 801, power line 802, and control signal line 803. Control signal line 804, control signal line 805, thin film transistors 351, 353, 355, 3 It consists of 56, 358, and resistor elements 352, 354, and 357.

[0114] In Figures 8 to 10, the oxide semiconductor layer 806, the first wiring layer 807, and the second wiring layer 8 08. The contact hole 809 is shown. Note that the first wiring layer 807 is a thin film. The second wiring layer 808 contains the gate terminal of the transistor. This layer includes the source terminal and the drain terminal (first terminal and second terminal).

[0115] Furthermore, the connection relationships of each circuit element in Figures 8 to 10 are the same as in Figure 3(B). In other words, power line 801 is a wire that is supplied with a high power potential VDD (also called a high power potential line). ) and power line 802 is a wiring (also called a low power potential line) to which the low power potential VSS is supplied. ) and control signal line 803 is the wiring to which the start pulse (SP) is supplied, control Signal line 804 is the wiring to which the first clock signal is supplied, and control signal line 805 is the This is the wiring to which the clock signal 2 is supplied.

[0116] The resistive elements 352, 354, and 357 of the ERMOS circuit shown in Figure 8 have rectangular-shaped acid A synthetic semiconductor layer is applied. Therefore, the resistive elements 352, 354, and 357 shown in Figure 8 This is a resistive element with a wide current path and high current driving capability. As shown in Figures 9 and 10... The resistor elements 352, 354, and 357 of the ERMOS circuit have a meander shape (serpentine shape). An oxide semiconductor layer is applied. By making it meander shape, the resistive elements 352, 3 It is possible to increase the resistance value to 54 or 357.

[0117] Note that in the pulse output circuit layout diagrams shown in Figures 8 to 10, thin-film transistor 3 The channel regions 51, 353, 355, 356, and 358 may be shaped like a U. Also, although the size of each thin-film transistor is shown as being the same in Figure 8, the load of the subsequent stage The size of the thin-film transistor may be appropriately changed depending on the size of the object.

[0118] Next, the resistive element 354 and thin film transistor in the layout diagrams explained in Figures 8 to 10. Figures 11(A) to (C) show the structure of the inverter circuit composed of ZISTA 355. This will be explained using the resistive element 354 and thin film transistor shown in Figures 11(A) to (C). The Zista 355 is shown in the cross-sectional view corresponding to the dotted lines AB and CD in Figures 8 to 10, respectively. This will show you the details.

[0119] Figure 11(A) is a cross-sectional view corresponding to the dotted lines AB and CD in Figure 8. In A), the resistive element 354 utilizes the first oxide semiconductor layer 905 as a resistive component. Furthermore, one end of the first oxide semiconductor layer 905 is included in the first wiring layer 807. The wiring 901 is connected to the insulating layer 903 via a contact hole 904, and the other The end is connected to a second wiring 907 included in the second wiring layer 808.

[0120] In Figure 11(A), the thin-film transistor 355 has a gate terminal 902 on the substrate, and a gate Insulating layer 903 on gate terminal 902 which functions as an insulating layer, insulating region which forms a channel A second oxide semiconductor layer 906 on layer 903, source terminal and drain terminal (first terminal and The second wiring 907 and third wiring on the second oxide semiconductor layer 906 function as the second terminal It has wiring 908.

[0121] Note that the first wiring 901 is one terminal for the resistor element 354. Also, the second Wiring 907 is the other terminal for the resistor 354, and thin-film transistor 355 For it, it is the first terminal and also the wiring that connects the two. Similarly, the third wiring 90 Terminal 8 is the second terminal for the thin-film transistor 355 and is supplied with a low power supply potential VSS. It is also a type of wiring (also called a low-voltage potential line). In other words, it is a connecting wire and a low (high) A portion of the source potential line is used as the first or second terminal of each thin-film transistor. .

[0122] Also, in FIG. 11(A), the film thicknesses of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 are not uniform. Specifically, the film thicknesses of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 corresponding to the region overlapping with the second wiring 907 and the third wiring 908 are thicker than those of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 not corresponding to the region. This is because a part of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 is also etched during the etching for forming the second wiring 907 and the third wiring 908. thicknesses of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 corresponding to the region overlapping with the second wiring 907 and the third wiring 908 are thicker than those of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 not corresponding to the region. This is because a part of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 is also etched during the etching for forming the second wiring 907 and the third wiring 908. etching for forming the second wiring 907 and the third wiring 908, a part of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 is also etched. etching for forming the second wiring 907 and the third wiring 908, a part of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 is also etched. etching for forming the second wiring 907 and the third wiring 908, a part of the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 is also etched.

[0123] FIG. 11(B) is a cross-sectional view corresponding to the dotted lines A - B and C - D in FIG. 9... In FIG. 11(B), the resistance element 354 uses the first oxide semiconductor layer 905 formed in a meander shape as a resistance component. Also, one end of the first oxide semiconductor layer 905 is connected to the first wiring 901 through the contact hole 904 provided in the insulating layer 903, and the other end is connected to the second wiring 907. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. 5 as a resistance component. Also, one end of the first oxide semiconductor layer 905 is connected to the first wiring 901 through the contact hole 904 provided in the insulating layer 903, and the other end is connected to the second wiring 907. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. 901 through the contact hole 904 provided in the insulating layer 903, and the other end is connected to the second wiring 907. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. 901 through the contact hole 904 provided in the insulating layer 903, and the other end is connected to the second wiring 907. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. 901 through the contact hole 904 provided in the insulating layer 903, and the other end is connected to the second wiring 907. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated.

[0124] FIG. 11(C) is a cross-sectional view corresponding to the dotted lines A - B and C - D in FIG. 10... In FIG. 11(C), the resistance element 354 uses the first oxide semiconductor layer 9 formed in a meander shape as a resistance component. Also, one end of the first oxide semiconductor layer 905 is connected to the fourth wiring 912 included in the second wiring layer 808, and the other end is connected to the second wiring 907 included in the second wiring layer 808. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. (C), the resistance element 354 uses the first oxide semiconductor layer 9 formed in a meander shape as a resistance component. Also, one end of the first oxide semiconductor layer 905 is connected to the fourth wiring 912 included in the second wiring layer 808, and the other end is connected to the second wiring 907 included in the second wiring layer 808. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. 05 as a resistance component. Also, one end of the first oxide semiconductor layer 905 is connected to the fourth wiring 912 included in the second wiring layer 808, and the other end is connected to the second wiring 907 included in the second wiring layer 808. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. 808, and the other end is connected to the second wiring 907 included in the second wiring layer 808. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. 808, and the other end is connected to the second wiring 907 included in the second wiring layer 808. Since the structure of the thin film transistor is the same as that of the thin film transistor described in FIG. 11(A), the above description is incorporated. Since it is the same as the thin film transistor described above, the foregoing description is incorporated herein. As shown in FIG. 11(C), the resistance element 354 has the fourth wiring 912 formed directly on the first oxide semiconductor layer 905, so that a good junction can be formed between the first oxide semiconductor layer and the fourth wiring.

[0125] Next, the specific material configuration of the ERMOS circuit shown in FIGS. 11(A) to (C) will be described.

[0126] In FIGS. 11(A) to (C), a glass substrate such as barium borosilicate glass or aluminoborosilicate glass can be used for the substrate 900. The first wiring 901 and the gate terminal 902 can be formed of a low-resistance conductive material such as aluminum (Al) or copper (Cu). Also, aluminum (Al) can be combined with a heat-resistant conductive material for formation. As the heat-resistant conductive material, an element selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), scandium (Sc), an alloy containing the above-described elements as components, an alloy film combining the above-described elements, or a nitride containing the above-described elements as components can be applied.

[0127] The insulating layer 903 can be formed of an insulating film such as a silicon oxide film, a silicon nitride film, a silicon oxynitride film, a silicon nitride oxide film, an aluminum oxide film, or a tantalum oxide film. Also, it may be formed as a laminated structure composed of these insulating films. The silicon oxynitride film has a composition with a higher oxygen content than nitrogen, and in terms of concentration range, oxygen is 55 to 65 atomic%, nitrogen is 1 to 20 atomic%, silicon is 25 to 35 atomic%, and hydrogen is 0. ​​​​​​​​​​​​​ Within the range of 0.1 to 10 atomic percent, each element is added at any concentration so that the total is 100 atomic percent. It refers to something that contains [something]. Furthermore, silicon nitride film, in terms of its composition, contains more nitrogen than oxygen. These substances are present in large quantities, with a concentration range of 15-30 atomic percent oxygen and 20-35 atomic percent nitrogen. %, with Si in the range of 25-35 atoms and hydrogen in the range of 15-25 atoms, for a total of 100 atoms. This refers to a substance that contains each element at a desired concentration so that it reaches a certain percentage.

[0128] The first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 are made of InMO3(ZnO ) m It is formed from a thin film denoted as (m>0). Note that M is gallium (Ga) or iron (F). e) one selected from nickel (Ni), manganese (Mn), or cobalt (Co) This indicates a metallic element or multiple metallic elements. For example, M may represent gallium (Ga). In addition, gallium (Ga) and nickel (Ni), or gallium (Ga) and iron ( Other metal elements besides gallium (Ga), such as Fe, may be included. In the ionized semiconductor layer, in addition to the metal element M, iron (Fe) is included as an impurity element. , containing nickel (Ni) or other transition metal elements, or oxides of said transition metals In addition, the sodium (Na) contained in the above oxide semiconductor layer is 5 × 10 18 ( atoms / cm 3 ) Preferably 1 × 10 18 (atoms / cm 3 ) is below It shall be considered as such.

[0129] The materials for the second wiring 907 and the third wiring 908 are aluminum (Al), chrome Elements selected from chromium (Cr), tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten ( W), or alloys containing the above-described elements as components, or alloy films formed by combining the above-described elements, etc. may be mentioned. Further, it may be formed as a laminated structure made of these materials.

[0130] The silicon oxide layer 909 is formed from a silicon oxide film formed by a sputtering method. The silicon nitride layer 910 formed over the entire surface of the substrate is formed by a plasma CVD method using a gas containing a hydrogen compound such as silane (SiH4) and ammonia ( NH3). Therefore, the silicon nitride layer 910 contains hydrogen at a high concentration.

[0131] Also, as shown in FIG. 12(A), buffer layers 911a to 9 11c can be provided between the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906, and the second wiring 907 and the third wiring 908.

[0132] The above-described buffer layers 911a to 911c are formed under film formation conditions different from the film formation conditions for forming the first oxide semiconductor layer 95 and the second oxide semiconductor layer 906, and are formed based on an In-Ga-Zn-O-based non-monocrystalline film, which is a low-resistance oxide semiconductor layer. Further, in the following description, for convenience, the oxide semiconductor film on which the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906 are formed later is referred to as the first oxide semiconductor film, and the oxide semiconductor film on which the buffer layers 911a to 911c are formed later is referred to as the second oxide semiconductor film. For example, when forming an oxide semiconductor film by a sputtering method, the sputtering used for film formation

[0133] By changing the oxygen concentration of the condensate gas, the resistance of the oxide semiconductor film can be changed. This can be achieved by increasing the oxygen concentration of the sputtering gas. The resistance value of the body film can be increased. First oxide semiconductor film and second by sputtering method One of the conditions for depositing the oxide semiconductor film is the sputtering used for depositing the first oxide semiconductor film. The gas flow rate for argon gas was set to 10 sccm and the flow rate for oxygen gas to 5 sccm, and the second acid For the deposition of semiconductor films, the sputtering gas used is argon gas flow rate at 40 sccm. These are the conditions. Note that buffer layers 911a to 911c have an n-type conductivity and are activated. The energy (ΔE) is 0.1 eV or less. Note that this refers to an In-Ga-Zn-O non-single crystal film. The buffer layers 911a to 911c formed based on this contain at least an amorphous component. Assume that the buffer layers 911a to 911c have an amorphous structure with crystalline grains (nanocrystals). May contain (stal) crystal grains (nanocris) in this buffer layer 911a~911c The diameter of a barrel is typically between 1 nm and 10 nm, and usually between 2 nm and 4 nm.

[0134] A buffer with lower resistance than the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906. By providing layers 911a to 911c, the second wiring 907, which is a conductor, and the first oxidation The semiconductor layer 905, the second wiring 907 and third wiring 908 which are conductors, and the second oxide It forms a better junction with the semiconductor layer 906 compared to a Schottky junction, and is also thermally stable. It can demonstrate operation. Also, in the thin-film transistor 355, buffer layers 911b, 91 By providing 1c, good mobility can be maintained even at high drain voltages.

[0135] Furthermore, as shown in Figure 12(B), the first oxide semiconductor layer 905 and the second oxide semiconductor Buffer layers 911a, 911b, 911c, 911d, and 911e are provided above and below the body layer 906. It can also be kicked.

[0136] By providing the buffer layer 911d, the first wiring 901, which is a conductor, and the first oxidation It forms a better junction with the monocrystalline semiconductor layer 905 compared to a Schottky junction, and is also thermally stable. It can be made to perform a fixed action.

[0137] Next, unlike the thin-film transistors shown in Figures 11(A)-(C) and 12(A) and (B), A thin-film transistor with the following structure is shown and explained in Figures 13(A) and (B). A) and (B) correspond to the resistive elements and thin-film transistors on lines AB and CD in Figure 8. The cross-sectional structure of the object is shown, and the same symbols are used for the same elements as in Figures 11(A), (B), and (C). It is attached.

[0138] In Figure 13(A), a silicon oxide layer is located on the second oxide semiconductor layer 906. A channel protection layer 1001 is provided, and the channel protection layer 1001 and the second oxide semiconductor layer 9 The structure is such that the second wiring 907 and the third wiring 908 are provided on 06. , second wiring 907, third wiring 908, and silicon nitride on channel protection layer 1001 A layer 910 is provided. Also, as shown in Figure 13(B), the first oxide semiconductor layer 9 05 and the second oxide semiconductor layer 906, and the second wiring 907 and the third wiring 908 It is also possible to configure the system by providing buffer layers 911a, 911b, and 911c between them.

[0139] In Figures 11(A)-(C), 12(A), (B), and 13(A), (B), the reverse staggered shape is shown. Although we have described a thin-film transistor of a certain type, the configuration of the thin-film transistor in this embodiment is reversed. This is not limited to staggered transistors. For example, the same applies to coplanar thin-film transistors. This is effective. An example of the cross-sectional structure is shown and explained in Figures 14(A) and (B). Note that in Figures 14(A) and (B), the resistive elements corresponding to lines AB and CD in Figure 8 are shown. And the cross-sectional structure of the thin-film transistor is shown, and the same configuration as in Figures 11(A), (B), and (C) The same symbols are used for those.

[0140] In Figure 14(A), one end of the first oxide semiconductor layer 905 is on the first wiring 901. The other end of the first oxide semiconductor layer 905 and one end of the second oxide semiconductor layer 906 are provided. The other end of the second oxide semiconductor layer 906 is located on the second wiring 907, and the third wiring 9 The structure is provided on 08. Furthermore, on the second oxide semiconductor layer 906, acid A silicon oxide layer 909 and a silicon nitride layer 910 are stacked, forming the first oxide semiconductor layer. Only a silicon nitride layer 910 is provided on 905. Also, as shown in Figure 14(B) As shown, a buffer layer 1 is placed between the second wiring 907 and the third wiring 908 and the insulating layer 903. It is also possible to configure the system to include 010a and 1010b.

[0141] Figures 11(A)-(C), 12(A), (B), 13(A), (B), 14(A) In (B), silane (SiH4) and are in direct contact with the first oxide semiconductor layer 905. By using a plasma CVD method with gases containing hydrogen compounds such as ammonia (NH3) A silicon nitride layer 910 is formed.

[0142] In the ERMOS circuit having the structure described above, the silicon nitride layer 910 is in direct contact with the first acid A resistive element with a silicon oxide semiconductor layer 905 as the resistive component, and a silicon oxide layer 909 (channel protection A second oxide semiconductor layer 906 is provided with a silicon nitride layer 910 via layer 1001). It has a thin-film transistor that forms a channel formation region. Therefore, the first oxide semiconductor Hydrogen can be introduced into layer 905 at a higher concentration than in the second oxide semiconductor layer 906. As a result, the resistance value of the first oxide semiconductor layer 905 is determined by the resistance of the second oxide semiconductor layer 906. It can be made lower than the value.

[0143] Next, the process of fabricating the ERMOS circuit will be explained using the cross-sectional diagrams in Figures 15(A) to (C). This will be explained. Furthermore, the fabrication process for the ERMOS circuit shown in Figure 14(B) will be described here.

[0144] A first conductive film is deposited on the substrate 900. The first conductive film is deposited using sputtering, and Thin film deposition methods such as empty deposition, pulsed laser deposition, and ion plating are used. The material used for the first conductive film is a low-resistance conductive material such as aluminum (Al) or copper (Cu). It can be formed from materials. Also, aluminum (Al) can be combined with heat-resistant conductive materials. It can also be formed by combining these materials. Examples of heat-resistant conductive materials include titanium (Ti) and tantalum (T). a) Tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), Elements selected from scandium (Sc), or alloys containing the above-mentioned elements, or the above-mentioned Applying an alloy film made of the aforementioned elements, or a nitride containing the aforementioned elements. Next, a first photolithography process is performed to apply a resist to the first conductive film. Form. Furthermore, using the resist as a mask, selectively etch the first conductive film. The first wiring 901 and gate terminal 902 are formed.

[0145] Next, an insulating film is formed to cover the first wiring 901 and the gate terminal 902. The film can be produced using sputtering, vacuum deposition, pulsed laser deposition, ion plating, and plastic deposition. Thin film deposition methods such as the Zuma CVD method are used. Silicon oxide film and nitrogen Silicon oxide film, silicon oxide nitride film, silicon nitride oxide film, aluminum oxide film, oxide Insulating films such as luminescent films can be used. Furthermore, these insulating films can be formed as a laminated structure. It is permissible to do so. Next, a second photolithography process is performed to form a resist on the insulating film. Furthermore, using the resist as a mask, the insulating film is selectively etched, and the first distribution An insulating layer 903 is formed, which has contact holes 904 that reach the wire. Figure 15(A) shows a cross-sectional view at the stage after the process is complete.

[0146] Next, a second oxide semiconductor film is deposited. For depositing the second oxide semiconductor film, spa Methods such as vacuum deposition, pulsed laser deposition, ion plating, and plasma CVD. Thin film deposition methods such as those listed above are used. When performing film deposition by sputtering, In2O3, G It is preferable to use a target made by sintering a2O3 and ZnO. For the sputtering gas, aluminum A noble gas, such as Gon, is used. One of the conditions for film deposition by sputtering is In2O3:Ga Using a target made by mixing and sintering 2O3:ZnO=1:1:1, at a pressure of 0.4 Pa and DC current. The DC power supply is 500W, and the argon gas flow rate is 40 sccm.

[0147] Next, a second conductive film is deposited. The second conductive film is deposited using sputtering or vacuum deposition. Thin-film deposition methods such as pulsed laser deposition and ion plating are used. The second conductive film material is aluminum (Al), chromium (Cr), tantalum (T). a) Elements selected from titanium (Ti), molybdenum (Mo), and tungsten (W), Examples include alloys composed of the aforementioned elements, or alloy films combining the aforementioned elements. They may also be formed as a laminated structure made of these materials.

[0148] Next, a third photolithography process is performed to form a resist on the second conductive film. Furthermore, using the resist as a mask, the second oxide semiconductor film and the second conductive film can be selectively processed. Etched to the second wiring 907 and the third wiring 908 and the buffer layer 1010a, Form 1010b. The etching method used for this is wet etching or dry etching. Etching is used. For example, an aluminum (Al) film or aluminum film is used as the second conductive film. When using a nium alloy film, wet etching is performed using a solution of phosphoric acid, acetic acid, and nitric acid. This can be done. Similarly, a titanium (Ti) film or a titanium alloy can be used as the second conductive film. When using a membrane, use ammonia hydrochloride (hydrogen peroxide:ammonia:water = 5:2:2). Wet etching can be performed.

[0149] Next, a first oxide semiconductor film is deposited. For depositing the first oxide semiconductor film, spa Thin films, such as those produced by the ion deposition method, vacuum deposition method, pulsed laser deposition method, and ion plating method. Deposition is used. The first oxide semiconductor film is produced using a sputtering method compared to the second oxide semiconductor film. One of the conditions for film deposition by sputtering, where the oxygen concentration in the material is high, is In2O Using a target made by mixing and sintering 3:Ga2O3:ZnO=1:1:1, at a pressure of 0.4P a. DC power supply 500W, argon gas flow rate 10 sccm, oxygen gas flow rate 5 s It is ccm.

[0150] Furthermore, before depositing the first oxide semiconductor film, argon gas is introduced to generate plasma. A reverse sputtering process is performed to the insulating layer 903, the first wiring 901, the second wiring 907, and It is preferable to remove any debris adhering to the third wiring 908. Furthermore, reverse sputtering By performing the process in an atmosphere of argon with added oxygen, the first wiring 90, which is a conductor, 1. The surfaces of the second wiring 907 and the third wiring 908 are oxidized, forming a second oxide semiconductor film. The area near the contact interface can be made highly resistant. Therefore, the thin film transient that is formed later The value of the sta's off-current can be reduced. Note that reverse sputtering is a process that targets Without applying voltage to the substrate side, voltage is applied to the substrate side using an RF power supply under an argon atmosphere. This is a processing method that modifies the surface of a plate by forming plasma on it.

[0151] Next, a fourth photolithography step is performed to apply a resist onto the first oxide semiconductor film. Form a resist. Furthermore, the first oxide semiconductor film is selectively etched using the resist as a mask. This process forms the first oxide semiconductor layer 905 and the second oxide semiconductor layer 906. Figure 15(B) shows a cross-sectional view at the stage after completing the process up to that point.

[0152] Next, a silicon oxide film is deposited by sputtering. For example, the silicon oxide film is made by The process involves targeting a ricon and depositing a film using a sputtering gas containing argon and oxygen. This can be done. Also, by targeting silicon oxide and using argon as the sputtering gas, A silicon oxide film can also be formed. Next, a fifth photolithography step is performed. A resist is formed on the silicon oxide film. Furthermore, the resist is used as a mask to form a resist on the silicon oxide film. The silicon oxide layer 90 is selectively etched onto the silicon oxide layer 90 on the second oxide semiconductor layer 906. Form 9.

[0153] Next, a silicon nitride layer 910 having the function of a passivation film is applied to the entire substrate. A film is formed. The silicon nitride layer 910 is composed of silane (SiH4) and ammonia (NH3). These are formed using a plasma CVD method with a gas containing hydrogen compounds, and contain high concentrations of hydrogen. It is a silicon nitride layer.

[0154] Next, a heat treatment is performed at 200°C to 600°C, typically 250°C to 500°C. Then, it is placed in a furnace and heat-treated at 350°C for 1 hour under a nitrogen atmosphere. This completes the process up to this point. The cross-sectional view of the stage corresponds to Figure 15(C).

[0155] Based on the above, a resistive element 354 and a thin-film transistor 355 are fabricated using an oxide semiconductor layer. It can be manufactured.

[0156] The above-mentioned process sequence is merely an example and is not particularly limited. Figure 16 shows a different sequence from that in Figure 15. An example of the manufacturing process will be shown and explained.

[0157] A first conductive film is formed on the substrate 900. Next, a first photolithography process is performed. This is done, and a resist is formed on the first conductive film. Furthermore, the resist is used as a mask, and the first The conductive film is selectively etched to form the first wiring 901 and gate terminal 902.

[0158] Next, an insulating film is formed to cover the first wiring 901 and the gate terminal 902. A second oxide semiconductor film is deposited. Next, a second conductive film is deposited. Next, the second film A trisography process is performed to form a resist on the second conductive film. Furthermore, the resist Using as a mask, the second conductive film and the second oxide semiconductor film are selectively etched, and the second The wiring 907 and the third wiring 908 and the buffer layers 1010a and 1010b are formed. Figure 16(A) shows a cross-sectional view at the stage after completing the steps up to this point.

[0159] Next, a third photolithography process is performed to form a resist on the insulating film. Then, using the resist as a mask, the insulating film is selectively etched to reach the first wiring 901. An insulating layer 903 is formed, which has contact holes 904.

[0160] Next, the first oxide semiconductor film is formed. Then, the fourth photolithography step is performed. This is done to form a resist on the first oxide semiconductor film. Furthermore, the resist is used as a mask. The first oxide semiconductor film is selectively etched, and the first oxide semiconductor layer 905 and the second The oxide semiconductor layer 906 is formed. A cross-sectional view of the stage after completing the process up to this point is shown in Figure 16(B). This corresponds to ).

[0161] Next, a silicon oxide film is deposited using the sputtering method. Then, the fifth photolithography... A graphing process is performed to form a resist on the silicon oxide film. Furthermore, the resist is then... As a result, the silicon oxide film is selectively etched and the second oxide semiconductor layer 906 is covered. A silicon oxide layer 909 is formed.

[0162] Next, gases containing hydrogen compounds such as silane (SiH4) and ammonia (NH3) are used. Using the plasma CVD method employed, a passivation film with the same function is applied to the entire substrate surface. A silicon nitride layer 910 is deposited.

[0163] Next, a heat treatment is performed at 200°C to 600°C under a nitrogen atmosphere. The cross-sectional view of the stage corresponds to Figure 16(C).

[0164] Based on the above, a resistive element 354 and a thin-film transistor formed using an oxide semiconductor layer are constructed. 355 can be produced. In addition, in the process described in Figures 16(A) to (C) After forming the contact hole 904, the first oxide semiconductor film can be deposited. Therefore, the number of processes in which the bottom surface of the contact hole is exposed can be reduced, and the first This expands the degree of freedom in material selection for wiring 901.

[0165] The resistive element and thin-film transistor described in this embodiment are formed using an oxide semiconductor layer. Therefore, the drive circuit having the resistive element and thin-film transistor exhibits good dynamic characteristics. It has the property of having a silane (SiH) on the first oxide semiconductor layer applied to the resistive element. 4) Plasma CVD method using gases containing hydrogen compounds such as ammonia (NH3) The silicon nitride layer formed is provided so as to be in direct contact with the first oxide semiconductor layer. Furthermore, on the second oxide semiconductor layer applied to the thin-film transistor, an oxide layer that serves as a barrier layer is provided. A silicon nitride layer is provided via a silicon nitride layer. Therefore, the silicon nitride contains a high concentration of hydrogen. The first oxide semiconductor layer, which is in direct contact with the silicon oxide layer, has a higher concentration than the second oxide semiconductor layer. Hydrogen is introduced each time. As a result, the resistance value of the first oxide semiconductor layer is changed to that of the second oxide semiconductor. This allows the resistance to be lower than that of the layer. This improves the fabrication process of thin-film transistors and This provides a drive circuit with reduced manufacturing steps, eliminating the need for a separate manufacturing process for the resistive elements. It is possible.

[0166] (Embodiment 2) In this embodiment, we will describe an example of a resistive element and a thin-film transistor that differ from those in Embodiment 1. This will be explained using Figure 17. Figure 17 shows the AB line of Figure 8 described in Embodiment 1. The cross-sectional structures of the resistive element and thin-film transistor corresponding to the CD line are also shown.

[0167] A first wiring 901 and a gate terminal 902 are provided on the substrate 900. Furthermore, the first wiring An insulating layer 903 is provided on the wire 901 and the gate terminal 902. Note that the substrate 900 and the first wiring The materials for wire 901, gate terminal 902, and insulating layer 903 are the materials described in Embodiment 1. Since this can be applied, the description of Embodiment 1 will be used in this embodiment.

[0168] On the insulating layer 903, a first oxide semiconductor containing a high concentration of nitrogen is placed, overlapping with the first wiring 901. A second oxide semiconductor containing a high concentration of nitrogen overlaps with the conductive layer 2001 and the gate terminal 902. A conductor layer 2002 is provided. The first wiring 901 is a contact formed in the insulating layer 903. In Tohol 904, in contact with a first oxide semiconductor layer 2001 containing a high concentration of nitrogen Yes, they are.

[0169] Furthermore, the first oxide semiconductor layer 2001 contains a high concentration of nitrogen and contains a high concentration of nitrogen The second oxide semiconductor layer 2002 is the first oxide semiconductor film shown in Embodiment 1 and Nitrogen formed from oxide semiconductor films formed under different deposition conditions than the second oxide semiconductor film. It is an oxide semiconductor layer with a high elementary concentration. Specifically, the oxygen (O) in the oxide semiconductor layer The ratio of nitrogen (N) (N / O) is in the range of 0.05 to 0.8, preferably 0.1 or less. This is an oxide semiconductor layer with a value in the range of 0.5 or less.

[0170] For example, when depositing an oxide semiconductor film containing a high concentration of nitrogen by sputtering, The film can be deposited using a sputtering gas containing nitrogen gas. One of the conditions for film deposition by sputtering is , target with In2O3:Ga2O3:ZnO=1:1:1 (In:Ga:Zn= Using a 1:1:0.5 ratio, pressure 0.4 Pa, DC power supply 500 W, argon gas flow The volume is set to 35 sccm and the nitrogen gas flow rate to 5 sccm. Note that pulsed DC (D C) Using a power supply is preferable because it reduces dust and ensures a uniform film thickness distribution. Next, From an oxide semiconductor film containing a high concentration of nitrogen, a photolithography process is used to obtain a high concentration of nitrogen. A first oxide semiconductor layer 2001 containing nitrogen and a second oxide containing a high concentration of nitrogen A semiconductor layer 2002 is formed.

[0171] Next, the second wiring 907 and the third wiring 908 are provided. The second wiring 907 is high concentration One end of the first oxide semiconductor layer 2001 containing nitrogen at a certain degree and the second layer containing nitrogen at a high concentration The third wiring 908 covers one end of the oxide semiconductor layer 2002 and contains nitrogen at a high concentration. It covers the other end of the second oxide semiconductor layer 2002. Since the wiring 908 can be made of the material described in Embodiment 1, the present embodiment The description of Embodiment 1 will be used in this explanation.

[0172] Next, a silicon oxide layer is placed on a second oxide semiconductor layer 2002 containing a high concentration of nitrogen. A 909 is provided. The silicon oxide layer is selected from silicon oxide films deposited by sputtering. It is formed by etching silicon. The film is formed using a sputtering gas containing argon and oxygen, or by using silica oxide. The process involves using cone as the target and depositing a film by using argon as the sputtering gas. It is possible.

[0173] At this stage, in an atmosphere containing a substance that serves as a source of hydrogen atoms, at 200°C to 600°C Heat treatment is typically performed at 250°C to 500°C. One of the heat treatment conditions is 350°C, 1 This is a thermal treatment over time. The atmosphere containing the substance that serves as the source of hydrogen atoms is hydrogen and A mixed atmosphere with noble gases such as argon can be applied.

[0174] Nitrogen in the oxide semiconductor layer helps the atoms constituting the oxide semiconductor layer to densely pack within the film. It inhibits the process and also promotes the diffusion and solid solution of hydrogen into the film. Therefore, the heat Through this process, hydrogen is introduced into the first oxide semiconductor layer 2001, which contains a high concentration of nitrogen. As a result, the hydrogen concentration of the first oxide semiconductor layer 2001 containing a high concentration of nitrogen is high The hydrogen concentration in the second oxide semiconductor layer 2002, which contains nitrogen, becomes higher. The resistance value of the first oxide semiconductor layer 2001 containing a high concentration of nitrogen is determined by the high concentration of nitrogen. The resistance value can be made lower than that of the second oxide semiconductor layer 2002.

[0175] Furthermore, hydrogen compounds such as silane (SiH4) and ammonia (NH3) are applied to the entire substrate surface. A silicon nitride layer 910 is formed by a plasma CVD method using a gas containing a specific gas. The silicon nitride layer 910 is silicon nitride containing a high concentration of hydrogen. A first oxide semiconductor layer 200 containing a high concentration of nitrogen is in direct contact with the silicon nitride layer 910. The hydrogen concentration in step 1 can be further increased to reduce resistance.

[0176] As described above, a first oxide semiconductor layer 2001 containing a high concentration of nitrogen with reduced resistance is obtained. The resistive element 354 used, and the second oxide semiconductor containing a high concentration of nitrogen to maintain a high resistance value A thin-film transistor 355 can be formed using the conductive layer 2002.

[0177] In this embodiment, the cross-sectional structure of the resistive element corresponding to line A and B in Figure 8 is shown. However, as shown in Figures 9 and 10, the first oxide semiconductor layer containing a high concentration of nitrogen It is also possible to create a meander shape (serpentine shape). Furthermore, as shown in Figure 10, high concentration It is also possible to form wiring layers on both ends of an oxide semiconductor layer containing nitrogen.

[0178] Furthermore, this embodiment shows the cross-sectional structure of a channel-etched thin-film transistor. However, it is also possible to use a channel-stop type thin-film transistor. In terms of form, we have shown an inverse staggered thin-film transistor, but a coplanar thin-film transistor... It is also possible to use it as a generator.

[0179] The resistive element and thin-film transistor described in this embodiment are acid containing a high concentration of nitrogen. It is formed using a synthetic semiconductor layer. Therefore, the resistive element and the thin-film transistor are The drive circuit has good dynamic characteristics. Also, the atmosphere contains a substance that serves as a source of hydrogen atoms. Perform heat treatment under air pressure at 200°C to 600°C, typically 250°C to 500°C. As a result, hydrogen is added to the first oxide semiconductor layer containing a high concentration of nitrogen, which is applied to the resistive element. It is introduced. Therefore, the first oxide semiconductor layer containing a high concentration of nitrogen is introduced. Hydrogen is introduced at a higher concentration than in the second oxide semiconductor layer containing the element. As a result, high concentration The resistance value of the first oxide semiconductor layer containing nitrogen is determined by the second oxide semiconductor layer containing a high concentration of nitrogen. The resistance can be made lower than that of the semiconductor layer. This enables the fabrication of thin-film transistors. A drive circuit with reduced manufacturing steps, eliminating the need to separately set up processes for manufacturing the process and the resistive element. We can provide this.

[0180] (Embodiment 3) In this embodiment, the oxide semiconductor layer described in Embodiment 1 and the layer described in Embodiment 2 are used. Resistor elements and thin-film transients fabricated using an oxide semiconductor layer containing a high concentration of nitrogen. The concept of "sta" will be explained using Figures 18(A)-(C) and Figures 19(A) and (B). Figures 18(A)-(C) and 19(A),(B) are shown in relation to lines AB and CD in Figure 8. The cross-sectional structures of the corresponding resistive element and thin-film transistor are shown.

[0181] Specifically, in this embodiment, the oxide containing a high concentration of nitrogen as described in Embodiment 2 is used. Figure 18 shows a configuration in which a semiconductor layer is applied instead of the buffer layer described in Embodiment 1. This will be explained using (A) to (C) and Figures 19(A) and (B).

[0182] First, a first conductive film is deposited on the substrate 900. The method for depositing the first conductive film involves a spatula. Thin film deposition methods such as vacuum deposition, pulsed laser deposition, and ion plating. The method is used. Next, a first photolithography step is performed to apply a resist to the first conductive film. This forms the resist. Furthermore, using the resist as a mask, the first conductive film is selectively etched. Then, the first wiring 901 and gate terminal 902 are formed. An insulating film is formed to cover the terminal 902. The insulating film is deposited using sputtering, vacuum deposition, etc. Thin films, such as those produced by pulsed laser deposition, ion plating, and plasma CVD. A deposition method is used. Next, a second photolithography step is performed to remove the resist from the insulating film. Form. Furthermore, using the resist as a mask, selectively etch the insulating film and contour An insulating layer 903 is formed, with a hole 904 provided. The materials for the terminal 902 and the insulating layer 903 are the materials described in Embodiment 1. Therefore, in this embodiment, we will refer to the explanation of Embodiment 1. The cross-sectional view at that stage corresponds to Figure 18(A).

[0183] Next, an oxide semiconductor film 950 is deposited. For depositing the oxide semiconductor film 950, spa Methods such as vacuum deposition, pulsed laser deposition, ion plating, and plasma CVD. Thin film deposition methods such as those listed above are used. When performing film deposition by sputtering, In2O3, G It is preferable to use a target made by sintering a2O3 and ZnO. Film deposition by sputtering method. One of the conditions is a target made by mixing and sintering In2O3:Ga2O3:ZnO=1:1:1. Using a pressure of 0.4 Pa, a DC power supply of 500 W, and an argon gas flow rate of 10 sccm², the following settings were used: The oxygen gas flow rate is 5 sccm.

[0184] Next, an oxide semiconductor film 951 containing a high concentration of nitrogen is formed. The oxide semiconductor film 951 is deposited using sputtering, vacuum deposition, and pulsed laser deposition. Thin film deposition methods such as ion plating are used. When performing this procedure, it is preferable to use targets made of sintered In2O3, Ga2O3, and ZnO. It is difficult. One of the conditions for depositing an oxide semiconductor film 951 containing a high concentration of nitrogen by sputtering is Using a target made by mixing and sintering In2O3:Ga2O3:ZnO=1:1:1, pressure Force 0.4 Pa, DC power supply 500 W, argon gas flow rate 35 sccm, nitrogen gas The flow rate is 5 sccm. Figure 18(B) shows a cross-sectional view at the stage after completing the process up to this point. ru.

[0185] Next, a third photolithography process is performed to obtain an oxide semiconductor containing a high concentration of nitrogen. A resist is formed on the film 951. Furthermore, the oxide semiconductor film is formed using the resist as a mask. 950 and the oxide semiconductor film 951 containing a high concentration of nitrogen are selectively etched, and the first Lamination of an oxide semiconductor layer 960 and a first oxide semiconductor layer 961 containing a high concentration of nitrogen. , and a second oxide semiconductor layer 962 and a second oxide semiconductor layer containing a high concentration of nitrogen A layer of 963 is formed. The cross-sectional view at the stage after completing the process up to this point corresponds to Figure 18(C). ru.

[0186] At this stage, in an atmosphere containing a substance that serves as a source of hydrogen atoms, at 200°C to 600°C Heat treatment is typically performed at 250°C to 500°C. One of the heat treatment conditions is 350°C, 1 This is a thermal treatment over time. The atmosphere containing the substance that serves as the source of hydrogen atoms is hydrogen and A mixed atmosphere with noble gases such as argon can be applied.

[0187] Nitrogen in the oxide semiconductor layer helps the atoms constituting the oxide semiconductor layer to densely pack within the film. It inhibits the process and also promotes the diffusion and solid solution of hydrogen into the film. Therefore, the heat The process results in a first oxide semiconductor layer 961 containing a high concentration of nitrogen and a first oxide semiconductor layer 961 containing a high concentration of nitrogen Hydrogen is introduced into the second oxide semiconductor layer 963 containing it. As a result, nitrogen is contained in high concentration. The first oxide semiconductor layer 961 and the second oxide semiconductor layer 9 containing a high concentration of nitrogen The resistance value of 63 can be reduced.

[0188] Next, a second conductive film is deposited. The second conductive film is deposited using sputtering or vacuum deposition. Thin-film deposition methods such as pulsed laser deposition and ion plating are used. Next, a fourth photolithography process is performed to form a resist on the second conductive film. Furthermore, using the resist as a mask, the second conductive film is selectively etched, and the second wiring 9 The second wiring 907 and the third wiring 908 are formed. Since the material can be the material described in Embodiment 1, this embodiment can be implemented. The explanation of Form 1 will be used with reference. In addition, in the etching process, the second wiring 907 and The oxide semiconductor layer containing a high concentration of nitrogen in the region not overlapping with the third wiring 908 is etched. It is etched and removed. In addition, the oxide semiconductor layer in that region is also partially etched and the oxide Semiconductor layers 964, 966 and oxide semiconductor layers 965, 967, 9 containing high concentrations of nitrogen 68 is formed. Figure 19(A) shows a cross-sectional view at the stage after completing the process up to this point.

[0189] Next, a silicon oxide film is deposited by sputtering. For example, the silicon oxide film is made by The process involves targeting a ricon and depositing a film using a sputtering gas containing argon and oxygen. This can be done. Also, by targeting silicon oxide and using argon as the sputtering gas, A silicon oxide film can also be formed. Next, a fifth photolithography step is performed. Then, a resist is formed on the silicon oxide film. Furthermore, the resist is used as a mask to oxidize The silicon film is selectively etched to form a silicon oxide layer 909.

[0190] Next, a silicon nitride layer 910, which functions as a passivation film, is formed. The silicon nitride layer 910 contains hydrogenated silane (SiH4) and ammonia (NH3). The resistive element 354 is formed by a plasma CVD method using a gas containing a compound. And the thin-film transistor 355 is formed. Figure 1 shows a cross-sectional view at the stage after the process up to this point has been completed. This corresponds to 9(B).

[0191] The resistive element 354 and thin-film transistor 355 shown in this embodiment are made of an oxide semiconductor layer Between the conductive wiring layer and the acid containing a high concentration of nitrogen, hydrogen is introduced to reduce resistance. Oxide semiconductor layers 965, 967, and 968 are formed. Therefore, the oxide semiconductor layer and the wiring layer This connection provides a better bond compared to Schottky junctions and exhibits thermally stable operation. This is possible. In addition, the thin-film transistor 355 has an oxide semiconductor layer containing a high concentration of nitrogen. The formation of 967 and 968 maintains good mobility even at high drain voltages. It is possible.

[0192] Furthermore, in the above-described manufacturing process, a high concentration of nitrogen is used after the etching process of the oxide semiconductor layer. An example of a heat treatment in which hydrogen is introduced into an oxide semiconductor layer has been shown, but this heat treatment is high concentration If the nitrogen-containing oxide semiconductor film has been deposited and the second conductive film has not yet been deposited, when should it be done? It is acceptable to do so. For example, after forming an oxide semiconductor film containing a high concentration of nitrogen, as the next step It is also possible to perform this heat treatment.

[0193] In this embodiment, the cross-sectional structure of the resistive element corresponding to line A and B in Figure 8 is shown. However, as shown in Figures 9 and 10, the oxide semiconductor layer is given a meander shape (serpentine shape). It is also possible to do so. Furthermore, as shown in Figure 10, oxide semiconductors containing high concentrations of nitrogen It is also possible to form wiring layers on both ends of the body layer.

[0194] Furthermore, this embodiment shows the cross-sectional structure of a channel-etched thin-film transistor. However, it is also possible to use a channel-stop type thin-film transistor. In terms of form, we have shown an inverse staggered thin-film transistor, but a coplanar thin-film transistor... It is also possible to use it as a generator.

[0195] The resistive element and thin-film transistor described in this embodiment have an oxide semiconductor layer and a high concentration It is formed using an oxide semiconductor layer containing nitrogen. A drive circuit with thin-film transistors has good dynamic characteristics. Furthermore, when applied to resistive elements... On the first oxide semiconductor layer, water such as silane (SiH4) and ammonia (NH3) is present. A silicon nitride layer formed by a plasma CVD method using a gas containing elementary compounds is the first A second component is provided so as to be in direct contact with the oxide semiconductor layer and is applied to a thin-film transistor. On the oxide semiconductor layer, a silicon nitride layer is provided via a silicon oxide layer that acts as a barrier layer. Therefore, the first oxide that is in direct contact with the silicon nitride layer containing a high concentration of hydrogen Hydrogen is introduced into the semiconductor layer at a higher concentration than in the second oxide semiconductor layer. As a result, the first The resistance of the first oxide semiconductor layer can be made lower than that of the second oxide semiconductor layer. This necessitates separate manufacturing processes for thin-film transistors and resistive elements. This eliminates the need for a drive circuit, thus reducing the manufacturing process.

[0196] (Embodiment 4) In this embodiment, the drive has a shift register configured by a dynamic circuit. An example of the circuit configuration will be explained using Figures 20(A) to (C).

[0197] The pulse output circuit 1400 shown in Figure 20(A) has a start pulse (SP) that is connected to the input terminal. The inverter circuit 1401 receives the input, and one end is connected to the output terminal of the inverter circuit 1401. A child is connected to switch 1402, and a capacitive element is connected to the other terminal of switch 1402. It consists of child 1403 and . Note that the switch 1402 of the odd-numbered stage pulse output circuit is The on / off state is controlled by the first clock signal (CLK1). Also, the even-numbered stages Switch 1402 of the output circuit is turned on by the second clock signal (CLK2). The F is controlled.

[0198] Figure 20(B) shows the circuit configuration of the pulse output circuit in detail. The path 1400 consists of thin-film transistors 1411 and 1413, a resistor 1412, and a capacitive element 14 It has 14. In addition, the odd-numbered pulse output circuits receive the first clock signal (CLK1). Connected to wiring 1415 for supplying power, the even-numbered stage pulse output circuit is the second clock It is connected to wiring 1416 for supplying the signal (CLK2). Pulse output circuit 14 In 00, the thin-film transistor 1411 and the resistor element 1412 are shown in Figure 20(A). This corresponds to the inverter circuit 1401 and is an ERMOS circuit. Also, thin-film transistor 1 413 corresponds to switch 1402 shown in Figure 17(A), and capacitive element 1414 corresponds to Figure 2 This corresponds to the capacitive element 1403 indicated by 0(A). Note that the thin-film transistor 1413 is thin Similar to the film transistor 1411, it is preferable to construct it using an enhancement-type transistor. It seems. By using an enhancement transistor as a switch, the transition Because the off-current of the starter can be reduced, power consumption can be reduced, and the manufacturing process This can be reduced.

[0199] Here, regarding the circuit operation of the circuits shown in Figures 20(A) and (B), Figure 20(C) shows the same operation. A turning chart is shown. Note that in Figure 20(C), for explanatory purposes, the circuit in Figure 20(B) is shown. Nodes will be described using the letters A through E.

[0200] First, the first clock signal (CLK1) is at a high level and the second clock signal (CL The state where K2 is at the L level will be explained.

[0201] In response to the start pulse (SP), an inverted signal appears at node A. The signal at node B This is equal to node A because the first clock signal (CLK1) is at a high level. Then, the signal from node B is inverted by the next stage inverter circuit, and the signal from node B is sent to node C. A signal that is the inverted version of the signal appears. The signal at node C is the second clock signal (CLK2) Because it is at the L level and the switch is closed, it does not appear at node D.

[0202] Next, when the first clock signal (CLK1) is at a low level, the second clock signal (CL K2) explains the state at the H level.

[0203] The signal from node C is transferred to node D, and the signal from node C is reflected and appears on node D. Then, the signal from node D is inverted by the inverter circuit, and the signal from node D is sent to node E. A signal with the numbers reversed appears. Then the first clock signal (CLK1) and the second clock... By alternately setting the signal (CLK2) to a high level, it can function as a shift register. It is possible.

[0204] Furthermore, the shift register equipped with the pulse output circuit shown in this embodiment is source line driven It can be used in circuits and gate line drive circuits. Note that it is output from a shift register. The signal may also be output via logic circuits or the like to obtain the desired signal.

[0205] The dynamic circuit described in this embodiment has an ERMOS circuit. The circuit is composed of the resistive elements and thin-film transistors described in Embodiments 1 to 3. Therefore, the dynamic circuit has good dynamic characteristics.

[0206] (Embodiment 5) In this embodiment, Figures 21 and 22 show an example of a display device equipped with a protection circuit. I will use it to explain.

[0207] Figure 21 shows an overall view of the display device. On the substrate 500, source line drive circuits The circuits include: track 501, first gate line drive circuit 502A, second gate line drive circuit 502B, and The pixel portion 503 is integrally formed. In the pixel portion 503, the portion enclosed by the dotted line frame 510 This represents one pixel. In the example in Figure 21, the gate line driving circuit is the first gate line driving circuit 5 Although 02A and the second gate line drive circuit 502B are shown, either one alone may be used. Furthermore, in the pixels of a display device, thin-film transistors control the display elements. Source line drive circuit 501, first gate line drive circuit 502A, second gate line drive circuit The signals that drive the 502B (clock signal, start pulse, etc.) are printed on a flexible printable board. Flexible Printed Circuit (FPC) boards 504A and 504B It is input from an external source via this method.

[0208] Furthermore, the source line drive circuit 501 and the first gate line drive circuit 502A and the pixel section Protection circuits 550 and 551 are provided between them. The source line drive circuit 501 and the first gate line drive circuit 502A extend to the pixel section 503. It is connected to the wiring. Protection circuits 550 and 551 receive noise along with the signal and power supply voltage. Even if power is applied, noise may cause malfunctions in subsequent circuits or degradation of semiconductor elements. This makes it possible to prevent damage. Therefore, reliability and yield can be improved. .

[0209] Next, regarding the specific circuit configuration examples of the protection circuits 550 and 551 shown in Figure 21, see Figure 2 Refer to 2(A) and (B) for further explanation.

[0210] The protection circuit shown in Figure 22(A) consists of diode-connected diodes that function as protection diodes. It has n-type thin-film transistors 560-567 and a resistive element 568. In a do-connected n-type thin-film transistor, the gate terminal and the first terminal side are anodes, and the second The terminal with two terminals is the cathode.

[0211] The anode of the diode-connected n-type thin-film transistor 560 is at a low power supply potential VSS. It is connected to the supplied wiring. Diode-connected n-type thin-film transistor 561 The anode is connected to the cathode of the diode-connected n-type thin-film transistor 560. The cathode is connected to wiring 569. Also, a diode-connected n-type thin-film transistor The anode of ZISTA 562 is connected to wiring 569. Diode-connected n-type thin film. The anode of transistor 563 is connected to the diode-connected n-type thin-film transistor 562. The cathode is connected, and the cathode is connected to the high power supply potential VDD. Diode connection n-type thin-film transistor 564 to diode-connected n-type thin-film transistor 56 7 is a diode-connected n-type thin-film transistor 560 or a diode-connected n-type It is connected in the same way as the thin-film transistor 563. The resistor 568 has an input potential Vin. The input terminal and the output terminal (Vout) are connected in series.

[0212] The operation of the protection circuit shown in Figure 22(A) will be explained below.

[0213] If the input potential Vin from the drive circuit is abnormally high, specifically, if the input potential Vin is high Source potential VDD and the forward current of diode-connected n-type thin-film transistors 562 and 563 If the pressure drop is higher than the sum of the pressure drops, diode-connected n-type thin-film transistors 562 and 563 The circuit conducts, and the potential of wiring 569 is high voltage potential VDD and diode-connected n-type thin film This will result in a potential equivalent to the sum of the forward voltage drops of transistors 562 and 563.

[0214] On the other hand, if the input potential Vin from the drive circuit is abnormally low, specifically, the low power supply potential VS The forward voltage drop of n-type thin-film transistors 560 and 561, which are diode-connected from S, is When the voltage is low, the diode-connected n-type thin-film transistors 560 and 561 conduct, and The potential of line 569 is from the low voltage potential VSS to the diode-connected n-type thin-film transistor 5 The potential will be similar to the potential after the forward voltage drop of 60 and 561.

[0215] Therefore, the protection circuit can keep the output potential Vout within a certain range.

[0216] In this embodiment, the diode-connected n-type thin-film transistor 560 to the diode Similar to the diode-connected n-type thin-film transistor 563, the diode-connected n A thin-film transistor 564 or an n-type thin-film transistor 567 connected by a diode is provided. This shows the configuration. Diode-connected n-type thin-film transistor 564 to diode By providing the connected n-type thin-film transistor 567, the input potential V from the drive circuit The current path can be increased when in is abnormally high or low. Therefore, the table This can further improve the reliability of the display device.

[0217] Furthermore, the resistive element 568 mitigates rapid fluctuations in the potential of the wiring 569, and the semiconductor element of the pixel part This can prevent the deterioration or destruction of the child.

[0218] The protection circuit shown in Figure 22(B) consists of resistor element 570, resistor element 571, and a diode contact. It has a connected n-type thin-film transistor 572, a resistor element 570, a resistor element 571, And the diode-connected n-type thin-film transistor 572 is connected in series with the wiring 573. It is.

[0219] Resistor elements 570 and 571 mitigate rapid fluctuations in the potential of the wiring 573. This prevents degradation or destruction of the semiconductor elements in the pixel area. Also, diode connection The n-type thin-film transistor 572 causes a reverse via in the wiring 573 due to potential fluctuations. This prevents the current from flowing.

[0220] Furthermore, when only a resistive element is connected in series with the wiring, it mitigates sudden fluctuations in the potential of the wiring. This can prevent degradation or destruction of the semiconductor elements in the pixel area. Furthermore, it is diode-connected. When only n-type thin-film transistors are connected in series with the wiring, potential fluctuations can cause reverse current in the wiring. This prevents the flow of biased current.

[0221] Note that the protection circuit in this embodiment is limited to the configuration shown in Figures 22(A) and (B). No, there isn't. If the circuit configuration performs a similar function, the design can be modified as needed.

[0222] The protection circuit described in this embodiment uses the resistive elements and thin film described in Embodiments 1 to 3. It has a transistor. Therefore, the protection circuit has good dynamic characteristics.

[0223] (Embodiment 6) This embodiment includes the resistive element and thin-film transistor shown in Embodiments 1 to 3. As an example of a semiconductor device, a light-emitting display device is shown. Here, electroluminescence is utilized. This describes a light-emitting display device having a light-emitting element. It utilizes electroluminescence. Light-emitting devices are distinguished by whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former are called organic EL elements, and the latter are called inorganic EL elements.

[0224] Organic EL elements emit electrons and positive voltages from a pair of electrodes when a voltage is applied to the light-emitting element. Each pore is injected into a layer containing a luminescent organic compound, and an electric current flows through it. The recombination of carriers (electrons and holes) causes the luminescent organic compound to form an excited state. It then emits light when the excited state returns to the ground state. From this mechanism, These light-emitting elements are called current-excited light-emitting elements.

[0225] Inorganic EL elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements depending on their element configuration. It is classified as follows: Dispersed inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. It possesses a donor-acceptor level, and the luminescence mechanism utilizes donor-acceptor levels. This is acceptor-recombination type light emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. Furthermore, it has a structure where it is sandwiched between electrodes, and the light emission mechanism involves the inner-shell electron transition of metal ions. The method used is localized light emission. Here, we will explain using an organic EL element as the light-emitting element.

[0226] The applicable pixel configuration and pixel operation are described here. This describes a pixel containing an n-channel thin-film transistor applied to a channel formation region.

[0227] Figure 23 shows an example of a pixel configuration. Pixel 6400 in Figure 23 is a thin-film tracer It has transistors 6401 and 6402, and light-emitting element 6403. Thin-film transistor 640 In terminal 1, the gate terminal is connected to gate wire 6406, and terminal 1 is connected to source wire 6405. Thin-film transistor 6402 has a gate terminal that is the second terminal of thin-film transistor 6401. It is connected to the child, with the first terminal connected to the power line 6407 and the second terminal connected to the light-emitting element 6403. It is connected to one electrode (pixel electrode). Note that the power line 6407 has a high power supply potential VDD. It is set.

[0228] The second electrode of the light-emitting element 6403 corresponds to the common electrode 6408. The common electrode 6408 is It is electrically connected to a common potential line formed on a single substrate. The electrode (common electrode 6408) has a low power supply potential VSS set. For example, low power supply potential VSS can be set to GND, 0V, etc. It can also be set to power line 6407. The potential difference between the high power supply potential VDD and the low power supply potential VSS set for the second electrode is used by the light-emitting element. A high power supply potential V is applied to the sub-unit 6403 to allow current to flow and cause the light-emitting element 6403 to emit light. The potential difference between the DD and the low power supply potential VSS is greater than or equal to the forward threshold voltage of the light-emitting element 6403. Set the respective potentials accordingly.

[0229] Next, the configuration of the light-emitting element will be explained using Figure 24. Note that in this embodiment, The thin-film transistor shown in Figure 12(A) is applied as the thin-film transistor for the light-emitting display device. An example is shown, but the thin-film transistor of the light-emitting display device shown in this embodiment is the same as in Embodiment 1 Any of the thin-film transistors shown in 3 to 4 are applicable.

[0230] In order to extract light from a light-emitting element, it is sufficient that at least one of the electrodes, either the anode or the cathode, is transparent. Then, a thin-film transistor and a light-emitting element are formed on the substrate, and light is emitted from the side opposite to the substrate. This includes top-side emission for extraction, bottom-side emission for extraction from the substrate side, and the substrate side and the opposite side of the substrate. There is a light-emitting element with a double-sided emission structure that extracts light from the opposite side, and the pixel configuration described in Figure 23 is It can be applied to any light-emitting element with an injection structure.

[0231] The light-emitting element with an upper surface injection structure will be explained using Figure 24(A).

[0232] Figure 24(A) shows that the thin-film transistor 7001 is of type n, and is emitted from the light-emitting element 7002. Figure 24(A) shows a cross-sectional view of the pixel when the light passes through to the anode 7005 side. The cathode 7003 of sub 7002 and the thin-film transistor 7001 are electrically connected, and the cathode The light-emitting layer 7004 and the anode 7005 are stacked in order on top of 7003. The cathode 7003 does work. A variety of materials can be used as long as the function is small and the conductive layer reflects light. For example, Ca, Al, CaF, MgAg, AlLi, etc. are desirable. And the emissive layer 7004 Whether it consists of a single layer or multiple layers stacked on top of each other, But that's fine. If it consists of multiple layers, then on cathode 7003 there is an electron injection layer, an electron transport layer, The layers are stacked in the order of light-emitting layer, hole transport layer, and hole injection layer. Note that it is not necessary to provide all of these layers. It is not necessary. The anode 7005 is formed using a conductive material that is translucent and transmits light, for example indium oxide containing tungsten oxide, indium zinc acid containing tungsten oxide Indium oxides containing titanium oxide, indium tin oxide containing titanium oxide, Indium tin oxide with added zinc oxide, zinc oxide, and silicon oxide. Any conductive oxide with light-transmitting properties may be used.

[0233] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 is the light-emitting element 7002. This corresponds to the pixel shown in Figure 24(A), where the light emitted from the light-emitting element 7002 is As indicated by the arrow, the material is injected towards the anode 7005.

[0234] Next, the light-emitting element with a bottom-surface injection structure will be explained using Figure 24(B). Thin film transient The st 7011 is of type n, and the light emitted from the light-emitting element 7012 is directed toward the cathode 7013. Figure 24(B) shows a cross-sectional view of the pixel in this case. In Figure 24(B), the thin-film transistor 7011 is electrically connected. The cathode 7013 of the light-emitting element 7012 is formed on the connected translucent conductive layer 7017. The cathode 7013 is stacked with the light-emitting layer 7014 and the anode 7015 in that order. If the anode 7015 is translucent, then reflect or block the light so as to cover the anode. A shielding layer 7016 may be formed for this purpose. The cathode 7013 is as shown in Figure 24(A) Similarly, various materials can be used as long as they are conductive materials with a small work function. However, The film thickness should be such that it transmits light (preferably about 5 nm to 30 nm). For example 2 Aluminum with a film thickness of 0 nm can be used as cathode 7013. The light-emitting layer 7014, as in Figure 24(A), may consist of a single layer, or multiple layers may be stacked. It doesn't matter whether it's configured in layers or not. The anode 7015 does not need to transmit light. However, it can be formed using a light-transmitting conductive material, similar to Figure 24(A). The shielding layer 7016 can be made of, for example, a metal that reflects light, but the metal It is not limited to this. For example, a resin to which black pigment has been added can also be used.

[0235] The region between the cathode 7013 and anode 7015, sandwiching the light-emitting layer 7014, is the light-emitting element 701 This corresponds to 2. In the case of the pixel shown in Figure 24(B), the light emitted from the light-emitting element 7012 is As indicated by the arrow, it is injected towards the cathode 7013.

[0236] Next, a light-emitting element with a double-sided injection structure will be explained using Figure 24(C). Figure 24(C) ) In this case, a transparent conductive layer 7027 is electrically connected to the thin-film transistor 7021. On top of the cathode 7023 of the light-emitting element 7022, a light-emitting layer 70 is formed, and on the cathode 7023 24. The anodes 7025 are stacked in order. The cathode 7023 is the same as in Figure 24(A). Therefore, various materials can be used as long as they are conductive materials with a small work function. However, The film thickness should be such that it transmits light. For example, Al with a film thickness of 20 nm is used as the cathode 7023 It can be used as such. And the light-emitting layer 7024 is a single layer, as in Figure 24(A). It can be composed of one layer or multiple layers stacked on top of each other; either is fine. Pole 7025, similar to Figure 24(A), uses a conductive material that is translucent and transmits light. It can be formed.

[0237] The portion where the cathode 7023, the light-emitting layer 7024, and the anode 7025 overlap is the light-emitting element 7 This corresponds to 022. In the case of the pixel shown in Figure 24(C), it is emitted from the light-emitting element 7022. Light is emitted towards both the anode 7025 and the cathode 7023, as indicated by the arrows.

[0238] Here, we have discussed organic EL elements as light-emitting elements, but inorganic elements can also be used as light-emitting elements. It is also possible to incorporate EL elements.

[0239] Next, the appearance of a light-emitting display panel (also called a light-emitting panel) which corresponds to one form of display device, and The cross-section will be explained using Figure 25. Figure 25(A) shows a thin layer formed on the first substrate. A panel in which a film transistor and a light-emitting element are sealed between a second substrate and a sealing material. This is a top view, and Figure 25(B) corresponds to the cross-sectional view at EF in Figure 25(A).

[0240] Pixel section 4502, source line driving circuit 4503a, 4 provided on the first substrate 4501 A sealing material 45 surrounds 503b and the gate wire drive circuits 4504a and 4504b. 05 is provided. Also, the pixel section 4502 and source line driving circuits 4503a and 4503b , and a second substrate 4506 is provided on gate line drive circuits 4504a and 4504b. Therefore, the pixel section 4502, source line drive circuits 4503a, 4503b, and gate line The drive circuits 4504a and 4504b consist of a first substrate 4501, a sealing material 4505 and a second substrate It is sealed together with the filler material 4507 by plate 4506. In this way it is exposed to the outside air. A protective film that is highly airtight and minimizes degassing (laminated film, UV-cured film) to prevent this. It is preferable to package (enclose) the product with a cover material such as a synthetic resin film.

[0241] Furthermore, the pixel section 4502 provided on the first substrate 4501 is a source line drive circuit 450 Similar to 3a, 4503b and gate line drive circuits 4504a and 4504b, oxide semiconductor It has a thin-film transistor fabricated using [a specific method], and in Figure 25(B), the pixel portion 4502 is The thin-film transistor 4510 included and the thin-film transistor included in the source line drive circuit 4503a The example given is the 4509.

[0242] Furthermore, thin-film transistors 4509 and 4510 have the structure shown in Figure 12(A). An example of applying thin-film transistors is shown, but the thin-film transistors of the light-emitting display device shown in this embodiment Any of the thin-film transistors shown in Embodiments 1 to 3 can be applied to the zista.

[0243] Furthermore, 4511 corresponds to a light-emitting element, and the first electrode is a pixel electrode of the light-emitting element 4511. The polar layer 4517 is electrically connected to the source electrode layer or drain electrode layer of the thin-film transistor 4510. They are connected precisely. The configuration of the light-emitting element 4511 is a first electrode layer 4517, and an electroluminescent element. The structure is a laminated structure of layer 4512 and a second electrode layer 4513, but is not limited to the configuration shown in this embodiment. It is not fixed. The direction of the light emitted from the light-emitting element 4511 is adjusted according to the direction of the light emitted from the light-emitting element 4511. The configuration can be changed as needed.

[0244] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the side of the opening It is preferable to form the wall into an inclined surface with a continuous curvature.

[0245] Even if the electroluminescent layer 4512 consists of a single layer, it is configured to be stacked with multiple layers. It doesn't matter whether it's done or not.

[0246] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 4511, the second electrode A protective film may be formed on layer 4513 and partition wall 4520. The protective film may be silicone nitride. It can form layers such as a silicon nitride layer, a silicon oxide layer, and a DLC layer.

[0247] Also, source line drive circuits 4503a, 4503b, gate line drive circuits 4504a, 45 04b, or the various signals and potentials applied to the pixel section 4502, are FPC4518a, 4 It is supplied from 518b.

[0248] In this embodiment, the connection terminal electrode 4515 is the first electrode layer of the light-emitting element 4511 Formed from the same conductive film as 4517, the terminal electrode 4516 is a thin-film transistor 4509. It is formed from the same conductive film as the source electrode layer and drain electrode layer of 4510.

[0249] The connecting terminal electrode 4515 connects to the terminals of FPC4518a and the anisotropic conductive film 4519. They are electrically connected via [a certain means].

[0250] The substrate located in the direction of light extraction from the light-emitting element 4511 is a second substrate which is light-transmitting. It must be. In that case, glass plates, plastic plates, polyester film, Alternatively, a light-transmitting material such as acrylic film can be used.

[0251] Furthermore, in addition to inert gases such as nitrogen and argon, filler material 4507 also contains UV-curable gases. Resins or thermosetting resins can be used, such as PVC (polyvinyl chloride) and acrylic. Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or E VA (ethylene vinyl acetate) can be used as a filler. In this embodiment, Nitrogen was used.

[0252] Additionally, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plate) may be placed on the emission surface of the light-emitting element. Even if optical films such as phase difference plates (λ / 4 plate, λ / 2 plate) and color filters are appropriately provided, Good. Alternatively, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, due to surface irregularities... It is possible to apply an anti-glare treatment that diffuses reflected light and reduces glare.

[0253] Source line drive circuits 4503a, 4503b and gate line drive circuits 4504a, 4504 b may be implemented as a drive circuit formed on a separately prepared circuit board. The S-wire drive circuit, or only a part of it, or the gate wire drive circuit, or only a part of it, can be formed separately. This embodiment may also be implemented in the manner shown in Figure 25, and is not limited to the configuration shown in Figure 25.

[0254] The light-emitting display device shown in this embodiment is a resistive element and thin film as shown in Embodiments 1 to 3. It has transistors. Therefore, the light-emitting display device has good dynamic characteristics.

[0255] (Embodiment 7) This embodiment includes the resistive element and thin-film transistor shown in Embodiments 1 to 3. As an example of a semiconductor device, we show electronic paper.

[0256] Figure 26 shows an active-matrix type electronic paper. The electronic paper in Figure 26 is It uses a twistball display method. The twistball display method is a method that divides the display into white and black. The kicked spherical particles are used as a display element, and between the first electrode layer and the second electrode layer, which are electrode layers, By arranging the electrodes and creating a potential difference between the first and second electrode layers, the orientation of the spherical particles is controlled. This is a method of displaying information.

[0257] The thin-film transistor 581 provided on the first substrate 580 is a thin-film transistor with a bottom gate structure. It is an inverter, and the first electrode layer 587 and the insulating layer 585 are connected by the first terminal or the second terminal. The first electrode layer 587 and the second electrode layer 5 are in contact at the opening they form and are electrically connected. Between 88 and the other is a black region 590a and a white region 590b, surrounded by liquid. Spherical particles 589 containing cavities 594 are located on the first substrate 580 and the second substrate 596. It is placed in between, and the area around the spherical particles 589 is filled with a filler material 595 such as resin. See Figure 26. In this embodiment, the first electrode layer 587 corresponds to the pixel electrode, and the Electrode layer 588 of the second electrode corresponds to the common electrode.

[0258] Alternatively, an electrophoretic element can be used instead of a twist ball. The body contains positively charged white particles and negatively charged black particles, with a diameter of 10 μm to 2 Microcapsules of approximately 00 μm are used. They are placed between the first electrode layer and the second electrode layer. The microcapsules, when an electric field is applied by the first electrode layer and the second electrode layer, White and black particles move in opposite directions, allowing for the display of either white or black. An electrophoretic display element is a display element that applies this principle, and is commonly called electronic paper. Yes. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not necessary. Furthermore, it consumes little power and the display can be seen even in dimly lit places. Furthermore, even if power is not supplied to the display unit, it is possible to retain the image that has been displayed. Therefore, a semiconductor device with a display function (simply a display device, or a device equipped with a display device) is transmitted from the radio wave source. Even when the semiconductor device (also known as the one equipped with it) is moved away, the displayed image is saved. This becomes possible.

[0259] The electronic paper shown in this embodiment is a resistive element and thin film as shown in Embodiments 1 to 3. It contains transistors. Therefore, electronic paper has good dynamic characteristics.

[0260] (Embodiment 8) In this embodiment, the resistive element and thin-film transistor shown in Embodiments 1 to 3 are used. Examples of electronic devices that have this feature will be described.

[0261] Figure 27(A) shows a portable gaming machine, consisting of a casing 9630, a display unit 9631, and a speaker 963 2. It has an operation key 9633, a connection terminal 9634, a recording medium reading unit 9635, etc. Yes, it is possible. The portable gaming machine shown in Figure 27(A) has a program or recorded on the recording medium. Functions to read data and display it on the display unit, and to communicate wirelessly with other portable gaming machines to exchange information. It can have shared functions, etc. Note that the portable gaming machine shown in Figure 27(A) has... The functions are not limited to these, and it can have a variety of functions.

[0262] Figure 27(B) shows a digital camera, consisting of a housing 9640, a display unit 9641, and a speaker 96 42, Operation key 9643, Connection terminal 9644, Shutter button 9645, Image receiving unit 964 It can have 6, etc. The digital camera with television receiving function shown in Figure 27(B) is Features for taking still images, recording videos, and automatically or manually correcting captured images. Functions, functions to acquire various information from the antenna, captured images, or information acquired from the antenna It has a function to save the information it has collected, and it displays the captured image or information acquired from the antenna on the display unit. It can have functions such as the ability to receive television signals. The functions of a camera are not limited to these; it can have a variety of functions.

[0263] Figure 27(C) shows a television receiver, consisting of a housing 9650, a display unit 9651, and a speaker 965 2. It may have an operation key 9653, a connection terminal 9654, etc., as shown in Figure 27(C). A television receiver has the function of processing television signals and converting them into image signals, and processing the image signals. It has functions such as converting signals to those suitable for display, and converting the frame frequency of image signals. It is possible to do so. However, the functions of the television receiver shown in Figure 27(C) are not limited to this. Furthermore, it can have a variety of functions.

[0264] Figure 28(A) shows a computer, consisting of a casing 9660, a display unit 9661, and a speaker 966. 2. Operation key 9663, connection terminal 9664, pointing device 9665, external connection It can have ports such as 9666. The computer shown in Figure 28(A) can handle various information Functions to display information (still images, videos, text images, etc.) on the display unit, various software ( Functions that control processing by a program, communication functions such as wireless or wired communication, communication Functions that connect to various computer networks using functions, and communication functions that connect to various It may have functions for transmitting or receiving data, etc. (See Figure 28(A)) The functions that a computer possesses are not limited to these; it can have a variety of functions.

[0265] Next, Figure 28(B) shows a mobile phone, consisting of a casing 9670, a display unit 9671, and a speaker 96 72, operation keys 9673, microphone 9674, etc. may be included. Figure 28(B The mobile phones shown in the image have the ability to display various types of information (still images, videos, text images, etc.). Functions to display a calendar, date, or time on the display unit, and the ability to operate the information displayed on the display unit. Alternatively, editing functions, functions to control processing by various software (programs), etc. It may have the following features. However, the functions of the mobile phone shown in Figure 28(B) are not limited to these. It is not limited to that and can have various functions.

[0266] The electronic device shown in this embodiment is a resistive element and thin-film transistor as shown in Embodiments 1 to 3. It has an inverter. Therefore, the electronic device has good dynamic characteristics. [Explanation of Symbols]

[0267] 100 circuit boards 101 Source Line Drive Circuit 102A Gate Line Drive Circuit 102B Gate Line Drive Circuit 103 pixel section 104A FPC 104B FPC 201 Level shifter for clock signal 202 Level shifter for start pulse 203 Pulse output circuit 204 NAND Circuits 205 buffer 206 Sampling Switch 251 Shift Register 300 pulse output circuit 301 Switch 302 Inverter Circuit 303 Inverter Circuit 304 switch 305 Inverter Circuit 331 Pulse output circuit 332 Pulse output circuit 350 pulse output circuit 351 Thin-film transistors 352 Resistor elements 353 Thin-film transistors 354 Resistors 355 Thin-Film Transistors 356 Thin-Film Transistors 357 Resistor element 358 Thin-film transistors 359 Wiring 360 Wiring 500 circuit boards 501 Source Line Drive Circuit 502A Gate Line Drive Circuit 502B Gate Line Drive Circuit 503 pixel section 504A FPC 504B FPC 550 protection circuit 551 Protection circuit 560 Thin-Film Transistors 561 Thin-film transistors 562 Thin-Film Transistors 563 Thin-film transistors 564 Thin-film transistors 565 Thin-film transistors 566 Thin-Film Transistors 567 Thin-film transistors 568 Resistors 569 Wiring 570 Resistor element 571 Resistor element 572 Thin-film transistors 573 Wiring 580 circuit boards 581 Thin-film transistor 585 Insulating layer 587 Electrode layer 588 Electrode layer 589 Spherical particles 590a black area 590b White area 594 Cavity 595 Filling material 596 circuit boards 601 Resistor element 602 Thin-Film Transistor 603 Resistor element 604 Thin-Film Transistor 605 Resistor element 606 Thin-Film Transistor 607 Resistor element 608 Thin-film transistor 701 Resistor element 702 Thin-Film Transistor 703 Thin-film transistor 730 Capacitive elements 731 Thin-film transistor 721 Thin-film transistor 751 Level shifter for clock signal 752 Level shifter for start pulse 753 Pulse output circuit 754 NAND gate 755 buffer 781 Shift Register 801 Power line 802 Power line 803 Control signal line 804 Control signal line 805 Control signal line 806 Oxide Semiconductor Layer 807 Wiring layer 808 wiring layer 809 Contact Hole 900 circuit boards 901 First wiring 902 Gate terminal 903 Insulating layer 904 Contact Hole 905 oxide semiconductor layer 906 oxide semiconductor layer 907 Wiring 908 Wiring 909 Silicon Oxide Layer 910 Silicon Nitride Layer 911a Buffer Layer 911b buffer layer 911c buffer layer 911d buffer layer 911e buffer layer 912 Wiring 950 Oxide semiconductor film 951 Oxide semiconductor film 960 oxide semiconductor layer 961 Oxide semiconductor layer 962 Oxide semiconductor layer 963 Oxide semiconductor layer 964 oxide semiconductor layer 965 oxide semiconductor layer 966 oxide semiconductor layer 967 Oxide semiconductor layer 968 Oxide semiconductor layer 1001 Channel protection layer 1010a Buffer Layer 1010b Buffer Layer 1400 pulse output circuit 1401 Inverter Circuit 1402 Switch 1403 Capacitive element 1411 Thin-film transistor 1412 Resistor element 1413 Thin-film transistor 1414 Capacitive element 1415 Wiring 1416 Wiring 2001 Oxide semiconductor layer 2002 Oxide semiconductor layer 4501 circuit board 4502 pixel section 4503a Source Line Drive Circuit 4503b Source Line Drive Circuit 4504a Gate wire drive circuit 4504b Gate wire drive circuit 4505 Sealant 4506 circuit board 4507 Filling material 4509 Thin-film transistor 4510 Thin-Film Transistor 4511 Light-emitting element 4512 Electroluminescent layer 4513 Electrode layer 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode layer 4518a FPC 4518b FPC 4519 Anisotropic conductive film 4520 Bulkhead 6400 pixels 6401 Thin-Film Transistor 6402 Thin-Film Transistor 6403 Light-emitting element 6405 Source Line 6406 Gate Line 6407 Power line 6408 Common electrode 7001 Thin-Film Transistor 7002 Light-emitting element 7003 Cathode 7004 Emitting layer 7005 Anode 7011 Thin-Film Transistor 7012 Light-emitting element 7013 Cathode 7014 Emitting layer 7015 Anode 7016 Shielding layer 7017 Conductive layer 7021 Thin-Film Transistor 7022 Light-emitting element 7023 Cathode 7024 Emitting layer 7025 Anode 7027 Conductive layer 9630 cabinet 9631 Display section 9632 speaker 9633 Operation Keys 9634 Connection terminal 9635 Recording medium reading unit 9640 cabinet 9641 Display section 9642 speaker 9643 Operation Keys 9644 Connection terminal 9645 Shutter button 9646 Image receiving unit 9650 chassis 9651 Display section 9652 speaker 9653 Operation Keys 9654 Connection terminal 9660 cabinet 9661 Display section 9662 Speaker 9663 Operation Keys 9664 Connection terminal 9665 Pointing device 9666 External connection port 9670 cabinet 9671 Display section 9672 Speaker 9673 Operation Keys 9674 Microphone

Claims

1. A pixel section having multiple pixels, The pixel section has a protection circuit connected via a source line, The protection circuit is supplied with the high power potential from the wiring that is supplied with the high power potential. The protection circuit has a resistive element, The resistive element has a first oxide semiconductor layer, In a top view, the first oxide semiconductor layer has a curved shape. One terminal of the resistor element is connected to the source line. When the other terminal of the resistive element is electrically connected to the wiring, the high power supply potential is supplied to the other terminal of the resistive element. At least one of the plurality of pixels has a first transistor, a second transistor, and a light-emitting element. The first transistor has a second oxide semiconductor layer, The second transistor has a third oxide semiconductor layer, Either the source or the drain of the first transistor is connected to the source line. The source or drain of the first transistor, the other of which is connected to the gate of the second transistor, Either the source or the drain of the second transistor is connected to the first electrode of the light-emitting element. The high power supply potential is supplied to the other of the source or drain of the second transistor. Each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises In, Ga, and Zn. Semiconductor equipment.

2. A pixel section having multiple pixels, The pixel section has a protection circuit connected via a source line, The protection circuit is supplied with the high power potential from the wiring that is supplied with the high power potential. The protection circuit has a resistive element, The resistive element has a first oxide semiconductor layer, In a top view, the first oxide semiconductor layer has a meander shape. One terminal of the resistor element is connected to the source line. When the other terminal of the resistive element is electrically connected to the wiring, the high power supply potential is supplied to the other terminal of the resistive element. At least one of the plurality of pixels has a first transistor, a second transistor, and a light-emitting element. The first transistor has a second oxide semiconductor layer, The second transistor has a third oxide semiconductor layer, Either the source or the drain of the first transistor is connected to the source line. The source or drain of the first transistor, the other of which is connected to the gate of the second transistor, Either the source or the drain of the second transistor is connected to the first electrode of the light-emitting element. The high power supply potential is supplied to the other of the source or drain of the second transistor. Each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises In, Ga, and Zn. Semiconductor equipment.

3. A pixel section having multiple pixels, The pixel section has a protection circuit connected via a source line, The protection circuit is supplied with the high power potential from the wiring that is supplied with the high power potential. The protection circuit has a resistive element, The resistive element has a first oxide semiconductor layer, In a top view, the first oxide semiconductor layer has a meandering shape. One terminal of the resistor element is connected to the source line. When the other terminal of the resistive element is electrically connected to the wiring, the high power supply potential is supplied to the other terminal of the resistive element. At least one of the plurality of pixels has a first transistor, a second transistor, and a light-emitting element. The first transistor has a second oxide semiconductor layer, The second transistor has a third oxide semiconductor layer, Either the source or the drain of the first transistor is connected to the source line. The source or drain of the first transistor, the other of which is connected to the gate of the second transistor, Either the source or the drain of the second transistor is connected to the first electrode of the light-emitting element. The high power supply potential is supplied to the other of the source or drain of the second transistor. Each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises In, Ga, and Zn. Semiconductor equipment.

4. A pixel section having a plurality of pixels, The pixel section has a protection circuit connected via a source line, The protection circuit is supplied with the high power potential from the wiring that is supplied with the high power potential. The protection circuit has a resistive element, The resistive element has a first oxide semiconductor layer, In a top view, the first oxide semiconductor layer has a curved shape. One terminal of the resistor element is connected to the source line. When the other terminal of the resistive element is electrically connected to the wiring, the high power supply potential is supplied to the other terminal of the resistive element. At least one of the plurality of pixels has a first transistor, a second transistor, and a light-emitting element. The first transistor has a second oxide semiconductor layer, The second transistor has a third oxide semiconductor layer, Either the source or the drain of the first transistor is connected to the source line. The source or drain of the first transistor, the other of which is connected to the gate of the second transistor, Either the source or the drain of the second transistor is connected to the first electrode of the light-emitting element. The high power supply potential is supplied to the other of the source or drain of the second transistor. Each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises In, Ga, and Zn. The region of the second oxide semiconductor layer that does not overlap with the gate electrode of the first transistor has a region that is in contact with the source electrode or drain electrode of the first transistor. The region of the third oxide semiconductor layer that does not overlap with the gate electrode of the second transistor has a region that is in contact with the source electrode or drain electrode of the second transistor. Semiconductor equipment.

5. A pixel section having a plurality of pixels, The pixel section has a protection circuit connected via a source line, The protection circuit is supplied with the high power potential from the wiring that is supplied with the high power potential. The protection circuit has a resistive element, The resistive element has a first oxide semiconductor layer, In a top view, the first oxide semiconductor layer has a meander shape. One terminal of the resistor element is connected to the source line. When the other terminal of the resistive element is electrically connected to the wiring, the high power supply potential is supplied to the other terminal of the resistive element. At least one of the plurality of pixels has a first transistor, a second transistor, and a light-emitting element. The first transistor has a second oxide semiconductor layer, The second transistor has a third oxide semiconductor layer, Either the source or the drain of the first transistor is connected to the source line. The source or drain of the first transistor, the other of which is connected to the gate of the second transistor, Either the source or the drain of the second transistor is connected to the first electrode of the light-emitting element. The high power supply potential is supplied to the other of the source or drain of the second transistor. Each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises In, Ga, and Zn. The region of the second oxide semiconductor layer that does not overlap with the gate electrode of the first transistor has a region that is in contact with the source electrode or drain electrode of the first transistor. The region of the third oxide semiconductor layer that does not overlap with the gate electrode of the second transistor has a region that is in contact with the source electrode or drain electrode of the second transistor. Semiconductor equipment.

6. A pixel section having a plurality of pixels, The pixel section has a protection circuit connected via a source line, The protection circuit is supplied with the high power potential from the wiring that is supplied with the high power potential. The protection circuit has a resistive element, The resistive element has a first oxide semiconductor layer, In a top view, the first oxide semiconductor layer has a meandering shape. One terminal of the resistor element is connected to the source line. When the other terminal of the resistive element is electrically connected to the wiring, the high power supply potential is supplied to the other terminal of the resistive element. At least one of the plurality of pixels has a first transistor, a second transistor, and a light-emitting element. The first transistor has a second oxide semiconductor layer, The second transistor has a third oxide semiconductor layer, Either the source or the drain of the first transistor is connected to the source line. The source or drain of the first transistor, the other of which is connected to the gate of the second transistor, Either the source or the drain of the second transistor is connected to the first electrode of the light-emitting element. The high power supply potential is supplied to the other of the source or drain of the second transistor. Each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises In, Ga, and Zn. The region of the second oxide semiconductor layer that does not overlap with the gate electrode of the first transistor has a region that is in contact with the source electrode or drain electrode of the first transistor. The region of the third oxide semiconductor layer that does not overlap with the gate electrode of the second transistor has a region that is in contact with the source electrode or drain electrode of the second transistor. Semiconductor equipment.

7. In any one of claims 1 to 6, The protection circuit is provided between the source line drive circuit and the pixel section. Semiconductor equipment.

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