Method for manufacturing a circuit board, circuit board, and assembled circuit board

Abstract

To provide a manufacturing method of a circuit board capable of efficiently manufacturing the circuit board by reducing man-hour relating to measurement of electric characteristics, the circuit board obtained by the manufacturing method, and an aggregate substrate.SOLUTION: A manufacturing method of a circuit board includes: an aggregate substrate manufacturing step of manufacturing an aggregate substrate for taking a number of circuit boards each including an insulation substrate, a first metal plate bonded to one face of the insulation substrate, and a second metal plate bonded to the other face of the insulation substrate; and an electric characteristic measuring step of collectively measuring electric characteristics of a plurality of circuit boards by pressing a plurality of probes, with a pressure of 1,000 kPa or more, to the first metal plate and the second metal plate of each of the plurality of circuit boards in the aggregate substrate.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a circuit board, a circuit board, and an assembly board, and more particularly to a technique for collectively measuring the electrical characteristics of a plurality of circuit boards in an assembly board including a plurality of circuit boards each including an insulating substrate, a first metal plate joined to one surface of the insulating substrate, and a second metal plate joined to the other surface of the insulating substrate.

Background Art

[0002] A circuit board obtained by bonding a ceramic substrate, which is an insulating substrate, and a metal plate is used as an electrical component for an automobile. With the spread of electric vehicles, the production volume of circuit boards is considered to increase. Circuit boards are used for semiconductor modules, power modules, etc., and are required to have excellent thermal conductivity, insulation properties, strength, etc. As the ceramic substrate in the circuit board, alumina materials have been widely used, but recently, silicon nitride with high strength and improved thermal conductivity has been used so that it can be used in a more severe environment.

[0003] In addition, as a technique for mass-producing circuit boards, a metal plate such as a Cu plate is joined to a single assembly board having a size capable of cutting out a large number of circuit boards by an active metal brazing method, a direct bonding method, etc., and a metal circuit board and a metal heat sink are formed by etching, etc., and the assembly board is divided into a predetermined size to obtain individual circuit boards.

[0004] As a method for dividing into individual circuit boards, for example, a method is adopted in which a recess or groove is formed in the assembly board by laser processing before joining a Cu plate or the like, and after joining the Cu plate or the like, the assembly board is bent and divided by the recess or groove.

[0005] Note that measuring the electrical characteristics of each circuit board one by one is disclosed in Patent Document 1 (Japanese Patent Application Laid-Open No. 2010-76948) and Patent Document 2 (WO2009 / 154295).

Prior Art Documents

[0006] [Patent Document 1] Japanese Patent Publication No. 2010-76948 [Patent Document 2] WO2009 / 154295 publication [Overview of the project] [Problems that the invention aims to solve]

[0007] Circuit boards have a structure in which an insulating substrate is sandwiched between metal plates. Required electrical characteristics include the insulating properties between the metal plates and the partial discharge characteristics to detect the presence or absence of pinholes in the insulating substrate. Traditionally, these electrical characteristics were measured one by one after the manufacture of the circuit board, but this presented a challenge as the time and personnel required for measurement increased with the increase in the production volume of circuit boards.

[0008] The object of the present invention is to provide a method for manufacturing a circuit board that enables efficient manufacturing of the circuit board by reducing the man-hours required for measuring electrical characteristics, as well as a circuit board and a composite board obtained by this manufacturing method. [Means for solving the problem]

[0009] One aspect of the present invention is a method for manufacturing a circuit board, comprising: a step of manufacturing a composite substrate for producing a composite substrate for producing a large number of circuit boards, each comprising an insulating substrate, a first metal plate bonded to one side of the insulating substrate, and a second metal plate bonded to the other side of the insulating substrate; and a step of measuring electrical characteristics for measuring the electrical characteristics of a plurality of circuit boards collectively by pressing a plurality of probes against the first metal plate and the second metal plate of each of the plurality of circuit boards in the composite substrate with a pressing force of 1000 kPa or more.

[0010] One aspect of the present invention is a circuit board comprising an insulating substrate, a first metal plate bonded to one side of the insulating substrate, and a second metal plate bonded to the other side of the insulating substrate, wherein the first metal plate and the second metal plate have indentations with a depth of 4 μm to 13 μm.

[0011] One aspect of the present invention is a composite substrate comprising a plurality of circuit boards, each of which comprises an insulating substrate, a first metal plate bonded to one side of the insulating substrate, and a second metal plate bonded to the other side of the insulating substrate, wherein the first metal plate and the second metal plate have indentations with a depth of 4 μm or more and 13 μm or less. [Effects of the Invention]

[0012] According to the present invention, the man-hours required for measuring electrical characteristics such as insulation properties and partial discharge properties can be reduced, thereby enabling more efficient manufacturing of circuit boards. [Brief explanation of the drawing]

[0013] [Figure 1] This is a schematic diagram illustrating the measurement of electrical characteristics in relation to the present invention. [Figure 2] This is a schematic diagram illustrating the silicon nitride substrate according to the present invention. [Figure 3] This is a schematic diagram illustrating the assembled substrate obtained from the substrate in Figure 2. [Figure 4] This is a schematic diagram showing a second break line formed on the substrate shown in Figure 3. [Figure 5] Figure 4 is a schematic diagram showing the substrate with brazing material applied, where (5a) is the front side and (5b) is the back side. [Figure 6] Figure 5 shows a schematic diagram of the original Cu plate placed on the substrate and brazed, with (6a) showing the front side and (6b) showing the back side. [Figure 7] Figure 6 is a schematic diagram showing the original Cu board patterned on the substrate and the excess brazing material removed, with (7a) showing the front side and (7b) showing the back side. [Figure 8]It is a schematic diagram of a circuit board obtained from the substrate of FIG. 7. [Figure 9] It is a graph showing the relationship between the load when the probe is pressed against the copper plate and the diameter of the probe mark. [Figure 10] It is a graph showing the relationship between the load when the probe is pressed against the copper plate and the depth of the probe mark.

Embodiments for Carrying Out the Invention

[0014] The configuration of the present invention will be described below, but the present invention is not necessarily limited thereto. The description of each configuration can be applied to other configurations unless otherwise specified.

[0015] In the measurement of the electrical characteristics of a circuit board, in the state of an "aggregate substrate" including a plurality of circuit boards before being divided into individual circuit boards, the electrical characteristics of the plurality of circuit boards are measured collectively, thereby shortening the time related to the measurement and efficiently manufacturing the circuit board. Here, "measurement of electrical characteristics" is used as a term including measurement of insulation characteristics or partial discharge characteristics.

[0016] As a method for measuring partial discharge characteristics, for example, there may be a case where the circuit board is immersed in an insulating medium (such as insulating oil) for measurement. In that case, it is difficult to rapidly transport the circuit board, and it takes time and effort to install and remove the circuit board from the measuring jig. Also, it takes time and effort to remove the insulating medium. That is, not only does the measurement time for one circuit board become long, but when the number of circuit boards increases, the total measurement work increases. In contrast, when applying the method for manufacturing a circuit board of the present invention, the work related to measurement can be reduced, and the manufacturing of the circuit board can be efficiently performed.

[0017] When the circuit board is immersed in an insulating medium for measurement, the insulating medium is carried out by the circuit board when taken out from the measuring jig. However, by measuring the electrical characteristics in the state of an "aggregate substrate" having a plurality of circuit boards as in the present invention, the number of times of taking in and out of the measuring jig is reduced, and the amount of insulating medium carried out can be reduced.

[0018] The method for manufacturing a circuit board according to the present invention comprises a composite substrate manufacturing step, an electrical characteristics measurement step, and a composite substrate division step. The composite substrate manufacturing step is a step of manufacturing a composite substrate for producing a large number of circuit boards, each comprising an insulating substrate, a first metal plate bonded to one side of the insulating substrate, and a second metal plate bonded to the other side of the insulating substrate. The electrical characteristics measurement step is a step of measuring the electrical characteristics of a plurality of circuit boards in the composite substrate collectively by pressing a plurality of probes against the first metal plate and the second metal plate of each of the plurality of circuit boards with a pressing force of 1000 kPa or more. The composite substrate division step is a step of obtaining individual circuit boards by dividing the composite substrate after the electrical characteristics measurement step.

[0019] The electrical characteristics measurement process related to the measurement of electrical characteristics in the method for manufacturing a circuit board according to the present invention will be explained with reference to the schematic diagram in Figure 1. Here, the assembled substrate 12 comprises a plurality of circuit boards 16 (first metal plates) joined to one side of a silicon nitride substrate 1 (insulating substrate) via a brazing layer (not shown), and a plurality of heat sinks 16' (second metal plates) joined to the other side of the silicon nitride substrate 1 via a brazing layer (not shown). The plurality of circuit boards 16 and the plurality of heat sinks 16' face each other in a side view and are in a pair relationship. This pair of circuit boards 16 and heat sinks 16' and the silicon nitride substrate 1 sandwiched between them via a brazing layer constitute the circuit board according to the present invention. Note that the assembled substrate in Figure 7, which will be described later, has a configuration comprising four circuit boards (corresponding to a 2x2 arrangement of circuit boards), whereas the assembled substrate 12 in Figure 1 has a configuration comprising 24 circuit boards (corresponding to a 3x8 arrangement of circuit boards). Here, the silicon nitride substrate 1 can be any insulating substrate, and may be a ceramic substrate, a resin substrate, or the like. Examples of ceramic substrates other than silicon nitride include aluminum nitride substrates, silicon carbide substrates, alumina substrates, etc. Examples of resin substrates include phenolic resin substrates, epoxy resin substrates, polyimide resin substrates, fluororesin substrates, etc.

[0020] The measurement system 50 for measuring the electrical characteristics of the manifold substrate 12 comprises a measurement jig 53 and a measurement instrument 54. The measurement jig 53 comprises a container 531, a lid member 532 provided to close the upper opening of the container 531, an upper probe fixing member 533 provided on the side of the lid member 532 facing the manifold substrate 12 for fixing a probe 51a, a lower probe fixing member 534 provided on the lower side of the container 531 for fixing a probe 51b, and an insulating medium (insulating oil) 55 provided inside the container 531 so that the probes 51a, 51b and the manifold substrate 12 are immersed in it. The insulating medium (insulating oil) 55 is optional. A cylindrical socket 535a with a hole is fixed to the side of the upper probe fixing member 533 facing the manifold substrate 12. A cylindrical socket 535b with a hole is fixed to the side of the lower probe fixing member 534 facing the manifold substrate 12. Sockets 535a and 535b are arranged in a matrix pattern, with the number of sockets corresponding to the number of circuit boards, and their positions corresponding to the positions facing the circuit boards (circuit board 16 or heat sink 16'). In Figure 1, since the arrangement of circuit boards is 3 x 8, sockets 535a and 535b are also arranged in a 3 x 8 arrangement at equal intervals. Note that the number of sockets 535a and 535b is not limited to a 3 x 8 arrangement; there may be multiple sockets. Also, sockets 535a and 535b may be arranged at unequal intervals.

[0021] The probes 51a and 51b each include barrel portions 512a and 512b, which are inserted into and fixed into the respective holes of the cylindrical sockets 535a and 535b, and plunger portions 511a and 511b, which are connected to the barrel portions 512a and 512b via an elastic portion (spring portion) and are displaceable relative to the barrel portions 512a and 512b. The probes 51a and 51b are positioned so that the barrel portions 512a and 512b are fixed to the sockets 535a and 535b, and the plunger portions 511a and 511b face the circuit board (circuit board 16 or heat sink 16'). The barrel portions 512a and 512b of probes 51a and 51b may be directly fixed to the upper probe fixing member 533 or the lower probe fixing member 534 without using sockets 535a and 535b, but fixing them via sockets 535a and 535b makes it easier to replace probes 51a and 51b.

[0022] Multiple measuring wires 52a are connected to each socket 535a. The multiple measuring wires 52a are combined into a single measuring wire 52b, which is connected to one terminal of the measuring instrument 54. Multiple measuring wires 52c are connected to each socket 535b. The multiple measuring wires 52c are combined into a single measuring wire 52d, which is connected to the other terminal of the measuring instrument 54. When the probe 51a is inserted into the socket 535a, it is electrically connected to the measuring wires 52a, 52b, and one terminal of the measuring instrument 54. When the probe 51b is inserted into the socket 535b, it is electrically connected to the measuring wires 52c, 52d, and the other terminal of the measuring instrument 54. The multiple probes 51a are at the same potential via the measuring wires 52b and constitute a first measuring electrode. The multiple probes 51b are at the same potential via the measuring wires 52d and constitute a second measuring electrode.

[0023] The following describes a method for measuring the electrical characteristics of the assembly substrate 12 using the measurement system 50. First, the lid member 532 is removed from the container 531, and the assembly substrate 12 is placed inside the container 531 so that each of the heat sinks 16' of the assembly substrate 12 contacts the plunger portion 511b of the corresponding probe 51b. Guide members may be attached to the lower probe fixing member 534 or the like to facilitate positioning when placing the assembly substrate 12 inside the container 531.

[0024] Next, by attaching the lid member 532 to the container 531, each of the circuit boards 16 of the assembly substrate 12 is pressed against the corresponding plunger portion 511a of the probe 51a. Then, by applying a load to the upper probe fixing member 533 from above the lid member 532, the probe 51a (plunger portion 511a) is pressed against the circuit board 16 with a predetermined load (pressing force), and the probe 51b (plunger portion 511b) is pressed against the heat sink 16' with a predetermined load (pressing force).

[0025] The probe 51a (plunger portion 511a) is displaced toward the barrel portion 512a when pressed against the circuit board 16 and is biased by an elastic member. The probe 51b (plunger portion 511b) is displaced toward the barrel portion 512b when pressed against the heat sink 16' and is biased by an elastic member. In other words, the elastic members of probes 51a and 51b apply a pressing force (load) to the circuit board 16 or heat sink 16' by displacing in a direction opposite to the circuit board 16 or heat sink 16'. Hereafter, the length by which probes 51a and 51b (plunger portions 511a and 511b) are displaced toward the barrel portions 512a and 512b when pressed against the circuit board 16 or heat sink 16' will also be referred to as the amount of indentation. Each probe 51a, 51b (plunger portion 511a, 511b) is biased by an elastic member to be displaced relative to the circuit board 16 and the heat sink 16', so that it can be pressed against each circuit board 16 and the heat sink 16' even if the silicon nitride substrate 1 is warped.

[0026] The pressing force applied to each probe 51a, 51b (plunger portion 511a, 511b) against the circuit board 16 and the heat sink 16' can be adjusted by the load applied to the upper side of the cover member 532. Alternatively, the pressing force may be adjusted by changing the amount of indentation of the probe 51a or by changing the spring constant of the elastic members of each probe 51a, 51b, by adjusting the thickness of the upper probe fixing member 533 or the position in which each probe 51a is fixed to the upper probe fixing member 533.

[0027] Figures 9 and 10 show the relationship between the load applied when a probe with a hemispherical plunger tip (radius 0.25 mm) is pressed against a copper plate, and the diameter (inner and outer diameters) and depth of the probe mark. In Figure 9, when the curve connecting the minimum values ​​of the probe mark diameter (inner diameter) when the same pressing load is applied (dashed line in Figure 9) is extrapolated, it was estimated that the probe mark diameter becomes 0 μm when the pressing load is less than 0.2 N (20 gf). Similarly, in Figure 10, when the curve connecting the minimum values ​​of the probe mark depth when the same pressing load is applied (dashed line in Figure 10) is extrapolated, it was estimated that the probe mark depth becomes 0 μm when the pressing load is 0.2 N (20 gf). Therefore, in order to ensure sufficient contact between the tip of the probe (plunger part) and the copper plate, the probe pressing load should be 0.2 N (20 gf) or greater. Furthermore, calculating the pressure from the shape of the probe (plunger part) tip, the pressing force from the probe is 1000 kPa (101.9 g / mm²). 2 It is preferable that the pressure applied by the probe is greater than or equal to 1000 kPa (101.9 g / mm). Furthermore, it is preferable that the pressing force applied by the probe is within the range in which the elastic member can be elastically deformed. Note that if the tip of the probe (plunger part) has a radius of 0.25 mm and the spring constant of the elastic member is 490 N / m (50 gf / mm), the pressing force applied by the probe should be 1000 kPa (101.9 g / mm). 2To achieve a depth of 0.4 mm or more, the measuring jig can be adjusted so that the indentation amount is 0.4 mm or more. If a warpage of up to 1 mm in the assembled substrate is to be tolerated, the measuring jig can be adjusted so that the indentation amount is 1.4 mm or more, taking into account the 1 mm warpage, thereby ensuring sufficient contact area and pressing force for all probes 51a, 51b (plunger parts 511a, 511b) with respect to the circuit board 16 and the heat sink 16'. In other words, even if the assembled substrate has a warpage of 1 mm or less, by adjusting the measuring jig, sufficient contact area and pressing force for all probes 51a, 51b (plunger parts 511a, 511b) with respect to the circuit board 16 and the heat sink 16' can be ensured, and the electrical characteristics of the assembled substrate 12 can be accurately measured. Note that if the contact area is insufficient, the load will be concentrated on a small area, which tends to result in deeper probe marks. If the probe marks become too deep, there is a risk of gaps forming when the surface of the copper plate is plated in a subsequent process. If a gap forms between the copper plate surface and the plating, partial discharge may occur when high voltage is applied, potentially leading to a reduction in product lifespan. If the pressing force is insufficient, vibrations caused by AC application during insulation testing may result in non-contact between the probe and the copper plate, potentially leading to product damage due to corona discharge at the non-contact points, or hindering accurate measurement of electrical characteristics.

[0028] Probe marks are formed on the surfaces of the circuit board 16 and heat sink 16' of each circuit board when probes 51a and 51b (plunger portions 511a and 511b) are pressed against them during electrical characteristic measurement. Preferably, the diameter of the probe marks is 40 μm or more and 200 μm or less, and the depth of the probe marks is 4 μm or more and 13 μm or less. By setting the diameter of the probe marks to 40 μm or more, sufficient contact area between the probes 51a and 51b (plunger portions 511a and 511b) and the circuit board 16 and heat sink 16' can be ensured during electrical characteristic measurement. By setting the diameter of the probe marks to 200 μm or less, changes in appearance due to probe marks can be suppressed. By setting the depth of the probe marks to 4 μm or more, sufficient pressing force of the probes 51a and 51b (plunger portions 511a and 511b) against the circuit board 16 and heat sink 16' can be ensured during electrical characteristic measurement. By limiting the probe mark depth to 13 μm or less, it is possible to suppress the occurrence of voids when the copper plate surface is plated in a subsequent process. The surface roughness Rz of the surfaces of the circuit board 16 and heat sink 16' that come into contact with the probes 51a and 51b (plunger parts 511a and 511b) is 6.5 μm or less, and by limiting the probe mark depth to 13 μm or less (less than twice the surface roughness Rz), changes in appearance due to probe marks can be suppressed. Here, the surface roughness Rz is the maximum height measured by the method specified in JIS B 0601:2001. It is conceivable that the first and second measuring electrodes each be made from a single metal plate, but if the silicon nitride substrate or metal plate is warped, it may be difficult to secure sufficient contact area and pressing force with the circuit board and heat sink, making it difficult to accurately measure electrical characteristics.

[0029] By increasing the diameter of the probes 51a and 51b or selecting a material with high rigidity, the probes 51a and 51b become less likely to bend during the measurement of electrical characteristics, and scratches on the surface of the circuit board 16 or heat sink 16' caused by the tips of the probes 51a and 51b (running parts 511a and 511b) sliding on the surface of the circuit board 16 or heat sink 16', as well as wear of the probes, can be suppressed. For example, the diameter of the probes 51a and 51b is preferably 0.5 mm or more, and the material is preferably carbon steel or beryllium copper (BeCu).

[0030] Furthermore, in the case of a multi-unit circuit board 12 with a large number of circuit boards, the load required to press the probe against the board increases. For example, when 60 circuit boards are mounted on the multi-unit circuit board 12, if a load of 300 gf is required for each probe, then a load of 18 kgf must be applied to the entire measuring jig 53. If the load applied to the measuring jig 53 is increased, the measuring jig 53 may become larger and heavier, potentially making it difficult to handle. In contrast, by reducing the diameter of the probe, even if the load applied to the entire measuring jig 53 is reduced, it is possible to suppress a decrease in the pressing force that the probe applies to the circuit board 16 or heat sink 16'. For example, the diameter of probes 51a and 51b is preferably 1 mm or less.

[0031] Next, when the measuring instrument 54 is activated, for example, the electrical characteristics can be measured all at once. That is, since the multiple circuit boards on the assembled substrate 12 (each circuit board consists of a circuit board, a silicon nitride substrate, and a heat sink) are sandwiched between multiple first measuring electrodes and multiple second measuring electrodes, the electrical characteristics of multiple circuit boards can be measured all at once. In other words, since a corresponding pair of circuit boards 16 and heat sinks 16' via the silicon nitride substrate 1 corresponds to one circuit board, the electrical characteristics of multiple circuit boards are measured all at once. If the electrical characteristics of all the circuit boards on the assembled substrate 12 are normal, the measuring instrument 54 outputs data indicating that the electrical characteristics are normal. If the electrical characteristics of one or more of the circuit boards on the assembled substrate 12 are abnormal, the measuring instrument 54 outputs data indicating that the electrical characteristics are abnormal. If the measuring instrument 54 outputs data indicating that the electrical characteristics are abnormal, the electrical characteristics of each individual circuit board can be measured to identify which circuit boards on the aggregate board 12 have normal electrical characteristics and which do not.

[0032] In this way, after measuring the electrical characteristics of multiple circuit boards simultaneously, multiple circuit boards can be obtained by dividing the assembled board 12 after measurement. For example, the division can be done along a break line formed between the circuit boards. The break line may be formed before or after measuring the electrical characteristics of the circuit boards.

[0033] The manufacturing method of the composite substrate 12 will be explained using Figures 2 to 7. First, as shown in Figure 2, multiple scribe holes 13a (non-penetrating holes) are formed along the outer edge 10 of the silicon nitride substrate 1 obtained by sintering, using a carbon dioxide laser (CO2 laser) or the like, in a position inward from the outer edge 10 of the silicon nitride substrate 1. This forms a first break line 13 (hereinafter referred to as the edge break line 13) by a dividing line connecting the centers of the scribe holes (scribe hole formation process). Hereinafter, "scribe hole" refers to a hole that does not penetrate the substrate (non-penetrating hole). In Figure 2, the area between the outer edge 10 and the break line 13 corresponds to the ear portion (first ear portion), and the area inward from the edge break line 13 corresponds to the composite substrate 12. Note that when the scribe holes are arranged so that they are in contact with each other to form the break line, the break line 13 can be called a groove.

[0034] Then, at the corners where the edge break lines 13 intersect, a slit 14 is formed that penetrates in the thickness direction of the silicon nitride substrate 1 in a direction inclined with the edge break lines 13, so as to chamfer the corner (chamfering through-hole formation process (more specifically, slit formation process)). Hereinafter, "slit" refers to an elongated cut that penetrates the substrate from one side to the other side. "Chamfering through-hole" refers to a hole that penetrates the substrate from one side to the other side. The slit 14 is formed by connecting a plurality of through-holes and constitutes a break line 15 (hereinafter referred to as a corner break line) by a dividing line connecting the centers of the through-holes. The corner break line 15 may intersect the edge break line and protrude from the edge break line by a length L2. The length L2 is preferably larger than the beam spot diameter of the laser used to form the slit and less than 3.5 mm. Note that instead of a slit 14, a corner break line made up of a plurality of through-holes arranged in a row can also be used (the through-holes are spaced apart and do not touch each other). While it is possible to omit the corner break lines, providing them is preferable for suppressing cracks at the corners of the assembled substrate. Also, for example, Figures 5 to 7 illustrate the manufacturing of an assembled substrate 12 having four circuit boards, but the number of circuit boards in the assembled substrate 12 may be more than four.

[0035] Then, of the four sides that make up the outer edge 10 of the silicon nitride substrate 1, the longer side is designated as the long side, and a positioning through-hole 5 is formed at a predetermined distance L1 on the inside (opposite side from the outer edge 10) of the edge break line 13 formed along this long side (positioning through-hole formation step). There are two edge break lines along the long side, and one through-hole 5 is formed near each corner break line 15, so a silicon nitride substrate 1 with a total of four positioning through-holes 5 is obtained (the distance between the edge break line 13 and the positioning through-hole 5 is L1 in all cases). The diameter of the positioning through-hole 5 is preferably 100 to 500 μm, and more preferably 150 to 300 μm. The distance L1 is preferably 0.1 to 4.0 mm, more preferably 0.2 to 3.0 mm, and even more preferably 0.5 mm to 2.0 mm. The reason for defining the numerical range in this way is that if L1 is too small, there is a risk that the positioning through-hole 5 will come into contact with the edge break line, and if the through-hole is placed near the edge break line, there is a risk that the strength of the substrate will decrease. Also, if L1 is too large, the width of the cutout (corresponding to the second tab) for providing the positioning through-hole becomes large, which relatively reduces the area of ​​the silicon nitride substrate 1 on the circuit board when viewed from above, and reduces the number of cutouts for the circuit board.

[0036] Next, the four edges of the silicon nitride substrate 1 are sequentially bent, and tensile stress due to bending is applied in a direction perpendicular to the edge break line 13, thereby separating the four edges 11 from the silicon nitride substrate 1 (edge ​​separation step). The resulting assembled substrate 12a has positioning through holes 5 near the ends of the edge portion 17, that is, near the chamfered corners, and at a predetermined distance L1 from the edge break line 13, as shown in Figure 3.

[0037] Next, as shown in Figure 4, second break lines 18, 18' are formed on the surface of the aggregate substrate 12a by second scribe holes. The second break line 18 is formed along the edge break line 13, and the distance between the edge break line 13 and the second break line 18 is greater than the distance L1. The through hole 5 is located at the location corresponding to the second ear portion. For example, the two second break lines 18' are formed to intersect with the midpoints of the four second break lines 18. Note that on the aggregate substrate 12a, diagonals can be drawn and the intersection of the diagonals can be determined as the center point of the aggregate substrate 12a.

[0038] Next, as shown in Figure 5(5a), the brazing material 16a is placed on the front surface of the assembled substrate 12a in Figure 4 by applying brazing paste to the areas demarcated by the second break lines 18, 18' (each of the four areas in Figure 5) using screen printing. Furthermore, as shown in Figure 5(5b), the assembled substrate 12a is flipped over, and the brazing material 16a' is placed on the back surface by applying brazing paste using screen printing.

[0039] Next, as shown in Figure 6(6a), a Cu plate 16b of the original plate (the Cu plate before patterning is referred to as the original plate) is placed on the front surface of the assembled substrate 12a of Figure 5 so as to cover the four brazing material 16a. Furthermore, as shown in Figure 6(6b), the assembled substrate 12a is inverted and another Cu plate 16b' of the original plate is placed on the back surface so as to cover the four brazing material 16a'. Next, the laminate, which is stacked in the order of Cu plate 16b' / brazing material 16a' / assembled substrate 12a / brazing material 16a / Cu plate 16b, is heat-treated to make the brazing material 16a and 16a' into a brazing material layer and perform brazing.

[0040] When installing Cu plates 16b and 16b', their positions should be adjusted so that they do not cover the through-holes 5. This is because if the positioning through-holes 5 are covered and not visible, they cannot be used to position the resist pattern in later processes. To adjust the positions of Cu plates 16b and 16b', for example, a pair of pins or stoppers can be used as a jig, and one pin or stopper can be brought into contact with one side of Cu plate 16b, while the other pin or stopper can be brought into contact with the adjacent side of Cu plate 16b.

[0041] Next, using an image analysis device or the like, the center of each positioning through-hole 5 on the front surface is calculated, and the first center point of the assembled substrate 12a is calculated from the four centers related to the positioning through-holes 5. Based on the first coordinates of the assembled substrate 12a obtained from the "four centers" and the "first center point," four resist patterns are formed on the Cu board 16b using a photoresist formation method or a resist film application method. The outlines and positions of the resist patterns can be determined by the first coordinates. Alternatively, one can draw a line (virtual line) connecting the upper right and lower left centers of the four centers, and another line (virtual line) connecting the lower right and upper left centers, and calculate the intersection of these two lines as the first center point.

[0042] Furthermore, the front and back sides of the aggregate substrate 12a are reversed, and on the back side, the center of each positioning through-hole 5 is calculated, and the second center point of the aggregate substrate 12a is calculated from the four centers related to the positioning through-hole 5. Based on the second coordinates of the aggregate substrate obtained from the "four centers" and the "second center point," four resist patterns are formed on the Cu plate 16b' using a photoresist formation method or a resist film application method. The outlines and positions of the resist patterns can be determined by the second coordinates. By using the same four through-holes 5 on the front and back sides (using them as a common positioning reference), the first and second coordinates can be made common, or the first center point and the second center point can be made to coincide, so that the positions of the resist patterns facing each other across the aggregate substrate 12a can be precisely aligned so that they overlap when viewed through.

[0043] Next, Cu plates 16b and 16b' are patterned by etching, and the brazing material layer that protrudes outward from the edge of the Cu plate is removed by selective etching, thereby forming four copper circuit boards 16 from Cu plate 16b as shown in Figure 7(7a), and four copper heat sinks 16' from Cu plate 16b' as shown in Figure 7(7b). Since the patterning corresponds to the shape of the area covered by the resist pattern, the positions of the copper circuit boards 16 and copper heat sinks 16' are precisely aligned so that they face each other across the assembled substrate 12a. After this, Ni plating, Ag plating, or Au plating may be applied to the copper circuit boards 16 and copper heat sinks 16'.

[0044] Subsequently, the assembled substrate 12a is divided along the second break lines 18, 18' to separate the circuit formation portion (corresponding to the circuit board 20) and the edge portion 17 (corresponding to the second ear portion), thereby obtaining each circuit board 20. As shown in Figure 8, the circuit board 20 has a copper circuit board 16, a copper heat sink (not shown), and a substrate portion 19. When viewed from a direction perpendicular to the surface of the substrate portion 19 (the surface on which the circuit board or heat sink is provided), the position of the copper circuit board 16 on the front surface and the position of the copper heat sink on the back surface are aligned within the plane of the substrate portion 19.

[0045] Furthermore, in the silicon nitride substrate 1 according to the present invention, as shown in Figure 2, for example, corner break lines 14 are formed at the corners where the edge break lines 13 intersect, in a direction inclined with the edge break lines 13, so as to chamfer the corners. These corner break lines 14 may be slits that penetrate the silicon nitride substrate 1, slits 14 formed by a series of through holes for chamfering, or multiple through holes (through holes for chamfering) arranged in series (however, it is preferable to make the pitch of the through holes smaller than the pitch of the scribe holes of the edge break lines). The presence of corner break lines makes it possible to suppress the occurrence of cracks or chips at the four corners of the aggregate substrate 12 when the silicon nitride substrate 1 is bent and divided into the aggregate substrate 12 and the ear portion 11.

[0046] Furthermore, in the silicon nitride substrate 1 according to the present invention, the scribe holes 13a preferably have a diameter of, for example, 300 μm or less on the substrate surface and a depth of, for example, 1 / 3 or more of the substrate thickness. The diameter of the scribe holes largely depends on the beam spot diameter of the laser used, but is more preferably 30 to 200 μm, and even more preferably 50 to 150 μm. The depth of the scribe holes is, for example, 80 to 300 μm, and even more preferably 100 to 250 μm, when the substrate thickness is 0.32 mm. The pitch of the scribe holes is preferably 2 times or less the diameter of the scribe hole, more preferably equal to the diameter of the scribe hole, and is particularly preferably determined by the cleavage when dividing the substrate. This pitch control can be adjusted by processing speed control and may be linked to the number of laser output pulses, etc.

[0047] Furthermore, in the silicon nitride substrate 1 according to the present invention, the slit 14 formed at the corners where the edge break lines formed by scribe holes intersect, and connected by chamfering through holes, preferably has a slit width of 30 to 200 μm and a slit length of 2.8 to 8.4 mm. The diameter of the chamfering through holes or the slit width is more preferably 20 to 150 μm, and even more preferably 30 to 100 μm. The slit length is more preferably 3.0 to 8.0 mm, and even more preferably 3.5 to 7.5 mm. In addition, the width and length of the break lines formed by the chamfering through holes can be the same as the slit dimensions.

[0048] Furthermore, in the silicon nitride substrate 1 according to the present invention, the corner break lines or slits formed by through holes are inclined at, for example, 30° to 60° with respect to the edge break lines formed by scribe holes. More specifically, inclining them at, for example, 45° with respect to the edge break lines formed by scribe holes is preferable because it allows for efficient and uninhibited use of the substrate area.

[0049] Furthermore, in the method for manufacturing the silicon nitride substrate 1 according to the present invention, it is preferable that positioning through holes, scribe holes, chamfering through holes, or slits are formed by laser. For example, a YAG laser or a carbon dioxide laser (CO2 laser) can be used. Processing by irradiation with a YAG laser or a carbon dioxide laser is suitable for forming through holes that penetrate the substrate or for intermittently forming deep holes.

[0050] Furthermore, in the method for manufacturing the silicon nitride substrate 1 according to the present invention, it is preferable to repeat the irradiation of the laser beam spot multiple times when forming through holes for positioning. By repeating the irradiation multiple times to deepen the hole, the energy density with each irradiation can be reduced, making it less likely for cracks to form on the surface (inner wall) of the through hole due to thermal shock.

[0051] Furthermore, the silicon nitride substrate 1 and composite substrate 12 according to the present invention have a substrate thickness of, for example, 0.2 mm to 1.0 mm. More specifically, it is preferable that the substrate thickness be, for example, 0.25 mm to 0.65 mm.

[0052] Furthermore, the silicon nitride substrate 1 and composite substrate 12 according to the present invention have a fracture toughness value of, for example, 5.0 MPa·m 1 / 2 That concludes the explanation. More specifically, the fracture toughness value should be, for example, 5.0 to 7.5 MPa·m. 1 / 2 It is preferable to do so. Furthermore, in the method for manufacturing a circuit board according to the present invention, the metal plate can be at least one of Cu plates or Al plates. Also, the method for joining the assembled substrate 12 and the metal plate is not limited to brazing, but may also be a direct joining method or the like.

[0053] The present invention will be described below with reference to embodiments. However, the present invention is not necessarily limited to the embodiments described below.

[0054] (Fabrication of a composite substrate) First, a composite substrate is fabricated using the same method as in Figures 2 to 7 (however, the number of circuit boards and heat sinks may be increased). For example, a 130 mm × 190 mm × 0.5 mm thick rolled copper plate is bonded to the front and back surfaces of a 140 mm × 200 mm × 0.3 mm thick silicon nitride substrate using an AgCu-based brazing agent, and then heat-treated to create a bond between the silicon nitride substrate and the copper plate. This bond is cooled to room temperature, a mask resin pattern is printed on the surface of the copper plate, and a copper pattern is formed by dissolving a portion of the copper using a cupric chloride-based solution. Furthermore, the mask resin pattern is removed using an aqueous sodium hydroxide solution to create a "composite substrate" that will become an assembly of circuit boards. On the front and back surfaces of the resulting composite substrate, 20 mm × 40 mm copper patterns are arranged in 8 vertical and 3 horizontal rows (this composite substrate can be divided to obtain 24 circuit boards).

[0055] (Embodiment 1) Using the aggregate substrate obtained in the "fabrication of aggregate substrates" described above, the first and second measuring electrodes are pressed against the front and back surfaces of the 24 copper patterns contained in one aggregate substrate, respectively, and an AC voltage of 2kV is applied for 1 second to measure the leakage current flowing between the copper plates (copper patterns). The measuring device is, for example, a device manufactured by Soken Electric (the same device is used in Reference Embodiment 1 below). The connection of the measuring circuit can be as shown in Figure 1. The value of the leakage current is, for example, 2.84 to 2.99 mA. This is approximately 24 times the value of the leakage current in Reference Embodiment 1, which will be described later. The time required for this measurement is approximately 1 minute. Note that this aggregate substrate may or may not have break lines formed by a fiber laser in the stage prior to leakage current measurement (in either case, it is not divided along the break lines). The man-hours required to form the break lines are the same in both the embodiment and the reference embodiment below.

[0056] (Reference form 1) Using the composite substrate obtained in the "fabrication of composite substrates" described above, a groove of approximately 50 μm (corresponding to a break line) is carved in the center between the copper patterns of the composite substrate using a fiber laser, and 24 circuit boards are obtained by dividing along the break line. Electrodes with a diameter of 1 mm are pressed against the front and back of each circuit board, and a 2 kV AC voltage is applied for 1 second using a measuring device to measure the leakage current flowing between the copper plates (copper patterns). The leakage current value is, for example, 0.12 to 0.13 mA. If the remaining circuit boards are then measured, the time required for this measurement is estimated to be approximately 24 minutes.

[0057] (Embodiment 2) Using the composite substrate obtained in the "fabrication of composite substrates" described above, the first and second measuring electrodes are pressed against the front and back of each of the 24 copper patterns contained in one composite substrate, respectively. The composite substrate and electrodes are then immersed in Fluorinert FC-40 (manufactured by 3M), and a 5kV AC voltage is applied for 5 seconds using a partial discharge tester to measure the amount of discharge charge generated. The value of the discharge charge is, for example, 2-3 pC. This level of value is thought to be obtained by measuring the base noise of the partial discharge tester, and the actual amount of discharge charge can be considered to be almost zero. The time required for this measurement is approximately 1 minute and 30 seconds. The amount of insulating medium consumed due to removal and volatilization is, for example, 20 ml.

[0058] (Reference form 2) Using the composite substrate obtained in the "fabrication of composite substrates" described above, a groove of approximately 50 μm (corresponding to a break line) is carved in the center between the copper patterns of the composite substrate using a fiber laser, and 24 circuit boards are obtained by dividing along the break line. Electrodes with a diameter of 1 mm are pressed against the front and back of each circuit board, and the board is immersed in Fluorinert FC-40 (manufactured by 3M), an insulating solvent. An AC voltage of 5 kV is applied for 5 seconds using the same partial discharge tester as in Embodiment 2, and the amount of discharge charge generated is measured. The value of the discharge charge is, for example, 2 to 3 pC, which is at a similar level to Embodiment 2. However, if the remaining circuit boards are measured (removal from immersion → replacement of circuit boards → electrode application → immersion → discharge charge measurement), the time required is estimated to be 36 minutes or more. The amount of insulating medium consumed by removal and volatilization during this measurement is, for example, 30 ml.

[0059] In measuring insulation properties, measuring the leakage current in the assembled circuit board state allows for measurement that is approximately proportional to the number of individual circuit boards, making measurement possible in the assembled circuit board state. Furthermore, the time required for measurement can be significantly reduced. On the other hand, in measuring partial discharge test characteristics, the discharge charge amount remains almost unchanged at the base noise level, making measurement possible in the assembled circuit board state. This significantly reduces measurement time and the amount of insulating medium used during measurement. [Explanation of Symbols]

[0060] 1: Silicon nitride substrate 5: Through hole 10: Outer edge 11:Ear part 12,12a: Assembly board 13: Edge breakline, 13a: Scrib hole 14: Slit, 15: Corner break line 16: Circuit board 16': Heat sink 16a, 16a': Brazing material 16b, 16b': Original Cu plate 17: Edge 18,18': Second break line 19: Circuit board section 20: Circuit board 50: Measurement System 51a, 51b: Probe 511a, 511b: Plunger section 512a, 512b: Barrel section 52a, 52b, 52c, 52d: Measurement wiring 53: Measuring fixtures 531: Container 532: Lid component 533: Upper probe fixing member 534: Lower probe fixing member 535a, 535b: Sockets 54: Measuring equipment 55: Insulating medium

Claims

1. A process for manufacturing a composite substrate for producing a large number of circuit boards, each comprising an insulating substrate, a first metal plate bonded to one side of the insulating substrate, and a second metal plate bonded to the other side of the insulating substrate. An electrical characteristics measurement step is performed by pressing multiple probes against the first metal plate and the second metal plate of each of the multiple circuit boards in the aggregate substrate with a pressing force of 1000 kPa or more, thereby measuring the electrical characteristics of the multiple circuit boards collectively. It has, Each of the plurality of probes has a number of first terminals corresponding to the first metal plate and a number of second terminals corresponding to the second metal plate. The first measuring electrode is formed by the first terminal and the first wiring section that connects the first terminals to each other at the same potential, The second measuring electrode is formed by the second terminal and the second wiring section that connects the two second terminals to the same potential, The electrical characteristic measurement step involves sandwiching the assembly substrate between the first measuring electrode and the second measuring electrode, causing the first metal plate to come into contact with the first measuring electrode, and the second metal plate to come into contact with the second measuring electrode, thereby measuring the electrical characteristics of the multiple circuit boards simultaneously. A method for manufacturing circuit boards.

2. The plurality of probes are equipped with elastic members that apply a pressing force to the first metal plate or the second metal plate by being displaced in a direction opposite to the first metal plate or the second metal plate. A method for manufacturing a circuit board according to claim 1.

3. The first metal plate and the second metal plate have indentation depths of 4 μm or more and 13 μm or less, resulting from the electrical characteristic measurement process. A method for manufacturing a circuit board according to claim 1 or 2.

4. The first metal plate and the second metal plate have a surface roughness Rz of 6.5 μm or less on the surface that the probe contacts. A method for manufacturing a circuit board according to any one of claims 1 to 3.

5. The insulating substrate has a warp of 1 mm or less. A method for manufacturing a circuit board according to any one of claims 1 to 4.

6. The process includes a substrate division step, which involves dividing the substrate after the electrical characteristics measurement step to obtain individual circuit boards. A method for manufacturing a circuit board according to any one of claims 1 to 5.

7. A circuit board assembly comprising multiple circuit boards, Each of the aforementioned plurality of circuit boards is Insulating substrate and A first metal plate bonded to one side of the insulating substrate, The insulating substrate comprises a second metal plate bonded to the other side of the insulating substrate, The aforementioned substrate assembly has a warp of 1 mm or less. All of the first and second metal plates have a surface roughness Rz of 6.5 μm or less, and are provided with indentations with a diameter of 40 μm or more and 200 μm or less, and a depth of 4 μm or more and 13 μm or less, which is 2 times or less the respective surface roughness Rz. A circuit board assembly.

Images