Substrate processing apparatus and substrate processing method
The substrate processing apparatus optimizes module utilization by determining processing destinations based on cumulative processing and conditioning times, addressing inefficiencies in existing systems to enhance overall efficiency.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- TOKYO ELECTRON LTD
- Filing Date
- 2022-03-15
- Publication Date
- 2026-06-03
AI Technical Summary
Existing substrate processing apparatuses with multiple processing modules face inefficiencies due to overlapping conditioning times, leading to underutilization of some modules and reduced processing capacity.
A substrate processing apparatus with a control unit that determines the destination processing module based on cumulative substrate processing, conditioning execution time, and processing time per substrate, ensuring a difference of at least 'n' substrates processed after conditioning across modules, optimizing transport to utilize all modules efficiently.
This approach enhances the processing efficiency of the substrate processing apparatus by ensuring all modules are utilized effectively, preventing underutilization and maintaining high throughput.
Smart Images

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Abstract
Description
Technical Field
[0001] The present disclosure relates to a substrate processing apparatus and a substrate processing method.
Background Art
[0002] In a substrate processing apparatus used for manufacturing semiconductor devices, a semiconductor wafer (hereinafter referred to as a wafer) is stored in a processing chamber, and processing such as film formation is performed. For the processing chamber, conditioning may be performed to adjust the internal environment after processing a predetermined number of wafers. Patent Document 1 discloses a substrate processing apparatus (substrate processing system) provided with four processing modules each including a processing chamber and performing similar processing. In this substrate processing apparatus, the substrates are transported based on a predetermined rule so that the timings of conditioning in each processing module do not overlap.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] The present disclosure provides a technique capable of increasing the processing efficiency of substrates in a substrate processing apparatus including a plurality of processing modules that perform similar processing.
Means for Solving the Problems
[0005] The substrate processing apparatus of the present disclosure includes a plurality of processing modules each including a processing chamber for storing a substrate and performing similar processing, and each performing conditioning of the inside of the processing chamber, a transport mechanism for transporting the substrate to each of the plurality of processing modules, A control unit that determines which processing module will be the destination for the substrate from among the plurality of processing modules, based on a parameter corresponding to the cumulative number of substrates processed after conditioning for each of the processing modules, the execution time of the conditioning, and the processing time per substrate in the processing module. Equipped with picture, If we divide the execution time of the conditioning by the processing time per substrate, and round up any non-zero decimal values, then the resulting integer value n is obtained, The substrates are transported to each processing module such that a difference of n or greater is formed between each processing module with respect to the parameter corresponding to the number of substrates processed after the conditioning. The substrate processing apparatus of this disclosure comprises a processing container for storing substrates and performing similar processing, and a plurality of processing modules for each of which perform conditioning inside the processing container, A transport mechanism for transporting the substrate to each of the plurality of processing modules, A control unit that determines which processing module will be the destination for the substrate from among the plurality of processing modules, based on a parameter corresponding to the cumulative number of substrates processed after conditioning for each of the processing modules, the execution time of the conditioning, and the processing time per substrate in the processing module. Equipped with, If we divide the execution time of the conditioning by the processing time per substrate, and round up any non-zero decimal values, then the resulting integer value n is obtained, The control unit sets all of the plurality of processing modules as destinations for transporting substrates, provided that the conditioning has not been performed in any of the processing modules, and a difference of at least n is formed between each processing module regarding the parameter corresponding to the cumulative number of substrates processed after the conditioning. [Effects of the Invention]
[0006] According to this disclosure, a substrate processing apparatus equipped with multiple processing modules that perform similar processing can improve the processing efficiency of the substrate. [Brief explanation of the drawing]
[0007] [Figure 1] This is a plan view of a substrate processing apparatus, which is one embodiment of the present disclosure. [Figure 2] This is a longitudinal cross-sectional side view of a processing module included in a substrate processing apparatus. [Figure 3] This is a flowchart illustrating the decision-making process for determining which rules to apply. [Figure 4] This is a table showing the status of each processing module in Example 1. [Figure 5] This is a table showing the status of each processing module in Comparative Example 1. [Figure 6] This is a table showing the status of each processing module in Example 2. [Figure 7] This is a table showing the status of each processing module in Comparative Example 2. [Figure 8]It is a table diagram showing the states of each processing module in Example 3. [Figure 9] It is a table diagram showing the states of each processing module in Comparative Example 3. [Figure 10] It is a table diagram showing the states of each processing module in Example 4. [Figure 11] It is a table diagram showing the states of each processing module in Comparative Example 4. [Figure 12] It is a table diagram showing the states of each processing module in Example 5. [Figure 13] It is a table diagram showing the states of each processing module in Comparative Example 5. [Figure 14] It is a table diagram showing the states of each processing module in Example 6. [Figure 15] It is a table diagram showing the states of each processing module in Comparative Example 6. [Figure 16] It is a table diagram showing the states of each processing module in Example 7. [Figure 17] It is a table diagram showing the states of each processing module in Comparative Example 7. [Figure 18] It is a table diagram showing the states of each processing module in Example 8. [Figure 19] It is a table diagram showing the states of each processing module in Comparative Example 8.
Mode for Carrying Out the Invention
[0008] 〔Overall Configuration of Substrate Processing Apparatus〕 A substrate processing apparatus 1, including a substrate transport device, which is one embodiment of the present disclosure, will be described with reference to the plan view in Figure 1. The substrate processing apparatus 1 performs film deposition on a wafer W. It comprises a loader module 11, a load lock module 16, a vacuum transport module 17, and processing modules PM1 to PM4. The loader module 11, the load lock module 16, and the vacuum transport module 17 are arranged in this order in the lateral direction. In the following description of the substrate processing apparatus 1, the side where the loader module 11 is located will be referred to as the front side, and the side where the vacuum transport module 17 is located will be referred to as the rear side. Also, the right and left sides in the description refer to the right and left sides when viewed from the front to the rear.
[0009] The loader module 11 comprises a housing that maintains atmospheric pressure internally, a wafer W transport mechanism 12 provided within the housing, and a plurality of load ports 13. The load ports 13 are arranged side by side on the front side of the housing. A transport container 14 for storing wafers W, called a FOUP (Front Opening Unified Pod), is placed on each load port 13. Additionally, an alignment module 15 for adjusting the orientation and eccentricity of wafers W is provided on the left side of the loader module 11 when viewed from the rear. The transport mechanism 12 is capable of transporting wafers W between the transport container 14 on each load port 13, the alignment module 15, and each load lock module 16.
[0010] In this example, two load lock modules 16 are provided side by side. Each load lock module 16 has a housing, which is connected to the loader module 11 and the vacuum transport module 17 via gate valves G located on its front and rear sides, respectively. When the gate valves G on the front and rear sides of the housing are closed, the pressure inside the housing can be freely changed between atmospheric pressure and vacuum pressure. A stage (not shown) on which the wafer W is placed is provided inside the housing, and this stage is configured to be able to transfer the wafer W to the transport mechanism 12 and the transport mechanism 18 (described later), which access the load lock module 16, respectively.
[0011] The vacuum transfer module 17 is equipped with a housing. The inside of the housing is maintained in a vacuum atmosphere at a desired pressure by exhausting through an exhaust port (not shown). Processing modules PM1 to PM4 are each connected to the housing of the vacuum transfer module 17 via gate valves G1. The gate valves G1 are closed except when transferring wafers W to the processing modules PM. A transfer mechanism 18 is also provided inside the housing of the vacuum transfer module 17. The transfer mechanism 18 transfers wafers W between the load lock module 16 and each of the processing modules PM1 to PM4. Processing modules PM1 to PM4 have similar configurations, and the numbers after PM may be omitted, and they may simply be referred to as processing modules PM without distinction. In addition, the term processing module may be omitted, and they may simply be referred to as PM.
[0012] [Configuration of the control unit] The substrate processing apparatus 1 is equipped with a control unit 40, which is a computer. This control unit 40 includes a program 41 and a memory 42. The program 41 incorporates instructions (each step) to enable the transport of wafers W between the modules constituting the substrate processing apparatus 1, the processing of wafers W in the processing module PM, and the conditioning described later. The control unit 40 outputs control signals to each part of the substrate processing apparatus 1 according to the program 41, and the operation of each part is controlled by these control signals, thereby enabling the transport of wafers W within the apparatus, the processing of wafers W in the processing module PM, and the conditioning, described later. Specifically, the supply of various gases to the processing container 21 for film formation, cleaning, and conditioning in the processing module PM, the transport of wafers W by the transport mechanisms 12 and 18, the opening and closing of gate valves G and G1, and the switching of pressure in the load lock module 16 are all controlled by the control signals. The transport of wafers W is controlled to be carried out according to rules described later.
[0013] Furthermore, it should be noted that the program 41 described above is configured to perform the calculations, judgments, and counting of the cumulative number of items to be processed (described later) necessary for transporting items in accordance with the rules. This program 41 is stored on a storage medium such as a compact disc, hard disk, memory card, or DVD, and installed in the control unit 40.
[0014] The memory 42 stores parameters necessary for transporting the wafers W. For example, parameters such as the processing time and conditioning execution time per wafer W, which are necessary for calculating the integer value n described later, and the cumulative number of wafers N processed for the conditioning trigger are stored in the memory 42.
[0015] [Transport route of wafer W] The wafer W transport path in the substrate processing apparatus 1 is as follows: First, the wafer W is transported in the following order: transport container 14 → loader module 11 → alignment module 15 → load lock module 16 → vacuum transport module 17. Then, the wafer W is transported to one of the processing modules PM1 to PM4 for film deposition processing, and then transported back to the transport container 14 in the following order: vacuum transport module 17 → load lock module 16 → load module 11. The pressure inside the housing of the load lock module 16 is switched from atmospheric pressure to vacuum pressure when the wafer W is transported to the vacuum transport module 17, and from vacuum pressure to atmospheric pressure when the wafer W is transported to the load module 11. The wafer W is unloaded from the transport container 14 in batches for processing. That is, one batch is transported from the transport container 14 to each processing module PM for processing, and then other batches are transported from the transport container 14 to each processing module PM for processing.
[0016] [Overview of the PM Processing Module] Each processing module PM1 to PM4 performs the same processing on the wafer W. Specifically, they deposit the same type of film on the wafer W surface to the same thickness under the same processing conditions. Therefore, the processing time for each wafer W is the same for all processing modules PM1 to PM4.
[0017] Furthermore, as described above, conditioning is performed in processing modules PM1 to PM4. This conditioning is an operation performed when the wafer W is not stored in the processing container 21 in order to adjust the environment inside the processing container 21 that makes up processing modules PM1 to PM4. More specifically, the conditioning in this example includes cleaning, which is performed by supplying a cleaning gas into the processing container 21, and pre-coating, which is performed by supplying a film-forming gas into the processing container 21 to cover each part inside the processing container 21 with a thin film, and is performed in the order of cleaning, then pre-coating.
[0018] During the film deposition process on the wafer W, a film is also deposited on the inner wall of the processing container 21 and the structures inside the processing container 21. If the film formed on the inner wall and the structures inside the processing container 21 becomes too thick due to repeated film deposition, peeling may occur, potentially resulting in particles adhering to the wafer W. Cleaning suppresses the generation of such particles. Furthermore, pre-coating ensures that the processing environment for each wafer W is standardized, thereby improving the uniformity of processing between wafers W. The above conditioning is performed similarly between processing modules PM1 to PM4, just like the film deposition process. Therefore, the time required for conditioning is the same for all processing modules PM1 to PM4. Hereafter, the time required for conditioning will be referred to as the conditioning execution time.
[0019] [Configuration of the processing module PM] As described above, processing modules PM1 to PM4 are similarly configured, and the configuration of processing module PM1 will be explained using the longitudinal cross-sectional side view in Figure 2 as a representative example. In this example, processing module PM1 performs film deposition on wafer W by plasma CVD (Chemical Vapor Deposition). As described above, processing module PM1 is equipped with a processing container 21, which is made of metal and grounded. The wafer W transport port on the side wall of processing container 21 is opened and closed by the gate valve G1 described above. In addition, an exhaust port 22 is opened in processing container 21. The inside of processing container 21 is evacuated through the exhaust port 22 by an exhaust mechanism 23 including a vacuum pump, thereby maintaining a vacuum atmosphere at a desired pressure inside processing container 21.
[0020] A stage 24 for placing the wafer W is provided inside the processing container 21. The wafer W is transferred between the stage 24 and the transport mechanism 18 by a retractable lifting pin (not shown) that is configured to extend and retract freely on the stage 24. The stage 24 is configured as a grounded electrode for plasma formation. A heater 25 is embedded in the stage 24 to heat the wafer W to a desired temperature during the film deposition process.
[0021] A gas shower head 31 is provided on the ceiling of the processing container 21 via an insulating member 27. A high-frequency power supply 33 is connected to the gas shower head 31 via a matching unit 32. A gas supply mechanism 34 is also connected to the gas shower head 31. The gas supply mechanism 34 can supply film-forming gas and cleaning gas to the gas shower head 31 independently of each other, and the gas supplied to the gas shower head 31 is discharged toward the stage 24. The gas shower head 31, together with the stage 24 described above, is configured as a parallel plate electrode, and when the high-frequency power supply 33 is turned on, the gas discharged from the gas shower head 31 onto the stage 24 is plasma-generated.
[0022] A wafer W is placed on the stage 24, and a film-forming gas is discharged from the gas showerhead 31. This film-forming gas is then plasma-activated, allowing for CVD film deposition on the surface of the wafer W. Cleaning and pre-coating are performed by plasma-activating the cleaning gas and film-forming gas discharged from the gas showerhead 31, respectively. Pre-coating is also performed by CVD. As described above, conditioning is performed when the wafer W is not yet loaded into the processing container 21; therefore, the wafer W is not placed on the stage 24 during the cleaning and pre-coating processes.
[0023] [Overview of the transport control of this technology] By the way, conditioning, as mentioned above, includes cleaning, and this cleaning is performed to prevent the film thickness formed in each part of the processing container 21 from reaching a thickness that may cause particle generation, as previously described. Therefore, after conditioning is performed, the cumulative number of wafers W to be processed until the next conditioning is performed is set. Let's call this set value for the cumulative number of wafers to be processed until the next conditioning. In other words, for a processing module PM that has been conditioned, the timing of the conditioning is controlled so that the next conditioning is performed after processing N wafers W. The above N is a positive integer. When film deposition is performed on wafers W, a film is also deposited on each part of the processing container 21 with a film thickness corresponding to the film thickness formed on wafers W. Therefore, the set value N is a parameter that can be set according to the film thickness to be formed on wafers W. In the following explanation, this set value N will be referred to as the cumulative number of wafers to be processed N of the C (conditioning) trigger. Furthermore, when simply stated as "total number of wafers processed," it shall refer to the total number of wafers W processed after the most recent conditioning cycle.
[0024] Patent Document 1, mentioned above, shows that in a device with a configuration similar to that of the substrate processing device 1, a cycle is formed in which processing modules PM1 to PM4 sequentially perform conditioning by transporting wafers W according to predetermined rules (rules 1' to 3' described below). When the following equation 1 holds, within the same cycle and between consecutive cycles, after conditioning is completed in one processing module PM, conditioning will immediately begin in the next processing module PM. In this state, the three processing modules PM that are not performing conditioning will process the wafers W. By forming such a state, wafers W can be processed efficiently. Note that (number of processing modules PM - 1) in equation 1 is 3, as the device is equipped with four processing modules PM. In the following description, the transport of wafers W according to the rules described in Patent Document 1 will be referred to as the transport of the comparative example. Processing module PM conditioning execution time = Processing time for (cumulative number of wafers processed by C trigger N / (number of processing modules PM - 1)) wafers ... Equation 1
[0025] However, with the miniaturization of semiconductor devices, the films formed on wafers W are becoming thinner. Accordingly, the cumulative number of wafers processed N for the conditioning trigger tends to be set to a larger value, and the following inequality 1 may hold. If the comparative example is transported when this inequality 1 holds, a section will be formed during the cycle in which no conditioning is performed in any of the processing modules PM, and in that section, only the three processing modules PM will be used to process the wafers W. In other words, wafers W will not be transported to the processing modules PM that are capable of processing wafers W. Processing module PM conditioning execution time < (Cumulative number of wafers processed N / (Number of processing module PMs - 1)) wafer processing time ... Inequality 1
[0026] While it is conceivable to prevent the above situation from occurring by setting the cumulative number of sheets processed N for the C trigger to a value lower than the settable upper limit, thus satisfying the relationship in Equation 1, increasing the frequency of conditioning in this way is not advisable. For these reasons, there is a need for technology that can improve the processing efficiency of the device by effectively utilizing each processing module PM. The transport of the comparative example will be explained in detail later and shown in comparison with the transport of the embodiment relating to this technology.
[0027] In the substrate processing apparatus 1 according to this technology, transport control is performed so as to be able to meet the above requirements. Specifically, a cycle is formed in which conditioning is performed in sequence, and when a state is formed in which all four processing modules PM can process wafers W during this cycle, transport control is performed so that wafers W can be transported to all four processing modules PM for processing. The transport in an embodiment according to this technology will be described below. In the transport in this embodiment, the processing module PM to which wafers W will be transported is determined based on the total number of wafers W processed after conditioning for each processing module PM, the conditioning execution time in the processing module PM, and the processing time per wafer W in the processing module PM.
[0028] More specifically, the conditioning execution time is divided by the processing time per wafer W, and if the resulting value has a non-zero decimal point, it is rounded up to obtain an integer value. If this integer value is represented as "n", then transport control is performed based on this n. Since the value is calculated in this way, the unit of n is "wafers". Let's give a specific example of n. If the conditioning execution time is 720 minutes and the processing time per wafer W in the processing module PM is 3 minutes, then (720 / 3 = 240). Since the decimal point of this division value 240 is 0, no rounding up is performed, and n = 240. If this division value were 240.1, then it would be rounded up to n = 241.
[0029] Incidentally, the processing time per wafer W does not mean only the time spent supplying gas to the wafer W, but is a preset time that includes the time from when the wafer W is brought into the processing container 21 until the gas supply begins, and the time from when the gas supply ends until the wafer W is removed from the processing container 21. Therefore, the processing time per wafer W is the same as the time from when one wafer W is placed on the stage 24 for processing until the next wafer W is placed on the stage 24 for processing, when wafers W are sequentially transported to a processing module PM for processing. As a prerequisite for the transport in this embodiment, it is assumed that the processing time per wafer W is controlled to be such a preset time.
[0030] [Rules for transport in the examples] In the substrate processing apparatus 1, if conditioning is being performed in any of the processing modules PM1 to PM4, the wafer W is transported to the processing module PM that is not being conditioned. If conditioning is not being performed in any of the processing modules PM1 to PM4, transport is performed according to the following pre-set rules, Rules 1 to 4.
[0031] Rule 1 If the difference in the cumulative number of sheets processed by the first and fourth largest processing modules (PM) in descending order of cumulative number of sheets processed is less than (n × 3) sheets, then the processing will be performed using the first to third largest processing modules (PM) in descending order of cumulative number of sheets processed. Rule 2 If the difference in the cumulative number of sheets processed by the first and third largest processing modules (PM) in descending order of cumulative number of sheets processed is less than (n × 2), then the processing will be performed using the first, second, and fourth largest processing modules (PM) in descending order of cumulative number of sheets processed. Rule 3 If the difference in the cumulative number of sheets processed by the first and second largest processing modules (PM) in descending order is (n) sheets or more, then all processing modules (PM) are used for processing. Rule 4 If none of the rules in Rule 1, Rule 2, or Rule 3 apply, the processing will be performed using the 1st, 3rd, and 4th processing modules (PM) in descending order of cumulative processing count.
[0032] The first to fourth rules are applied in ascending order of their numbers, i.e., first rule, second rule, third rule, and fourth rule. Accordingly, the control unit 40 executes the determination flow shown in Figure 3. Specifically, when transporting wafers W to the processing module PM, it is first determined whether the cumulative number of wafers processed by the processing module PM falls under the conditions defined in the first rule (step S1). If it is determined that the conditions are met, the first rule is applied, and the destination processing module PM conforms to the first rule (step S1').
[0033] If it is determined that the condition does not fall under the provisions of Rule 1, it is determined whether or not it falls under the provisions of Rule 2 (Step S2). If it is determined that it does, Rule 2 is applied, and the destination processing module PM complies with Rule 2 (Step S2'). If it is determined that the condition does not fall under the provisions of Rule 2, it is determined whether or not it falls under the provisions of Rule 3 (Step S3). If it is determined that it does, Rule 3 is applied, and the destination processing module PM complies with Rule 3 (Step S3'). If it is determined that the condition does not fall under the provisions of Rule 3, Rule 4 is applied, and the destination processing module PM complies with Rule 4 (Step S4).
[0034] In this way, wafers W are repeatedly transported one by one to the processing module PM designated as the destination according to rules 1 to 4. Specifically, when rule 3 applies, wafers W are repeatedly transported in the order of their PM numbers, for example, PM1, PM2, PM3, PM4, PM1, PM2... Furthermore, as described in principle (3) below, if there is a PM that has just undergone conditioning, that PM will be transported first.
[0035] In addition, when applying the above rules, there may be cases where the total number of sheets processed is the same for multiple PMs. In such cases, the order will be assigned according to a predetermined rule. For example, among PM1 to PM4 with the same total number of sheets processed, the rules will be applied assuming that the lower the number, the smaller the descending order of total number of sheets processed. Specifically, when applying Rule 1, there may be cases where the total number of sheets processed is the same for PM1 to PM4, resulting in the 1st and 4th total numbers being the same. In this case, among PM1 to PM4 with the same total number of sheets processed, the lower the number, the smaller the descending order of total number of sheets processed. In other words, the 1st, 2nd, 3rd, and 4th in that descending order will be considered to be PM1, PM2, PM3, and PM4, respectively.
[0036] As described above, rules 1 to 4 are generally designed so that a difference of n or more wafers in the cumulative number of wafers processed is formed between PM1 to PM4. By forming this difference, as will be shown in detail in the simulation later, a cycle can be executed in which PM1 to PM4 are conditioned one by one in sequence. During this cycle, even if a section is formed in which no PM needs conditioning due to the relatively large cumulative number of wafers processed N of the C trigger, transport will be performed according to rule 3 in that section. Therefore, a state in which wafers W are not transported to processing module PMs capable of processing wafers W is prevented. Furthermore, since wafers W are transported according to rules 1 to 4 before the formation of the cycle, and only rule 3 is used during the execution of the cycle, the PMs performing conditioning will change in such a way that a difference of n or more wafers in the cumulative number of wafers processed is maintained between PMs that do not perform conditioning. Furthermore, according to rules 1 through 4, at least three PMs are used to process the wafer W before a cycle is formed in which the PMs undergo conditioning in that order. In other words, there is only one PM that is not the destination for the wafer W before the formation of that cycle, thus preventing a decrease in the processing efficiency of the equipment.
[0037] By the way, the transport of the wafer W in the substrate processing apparatus 1 is carried out, for example, according to the following principles (1) to (2). (1) The determination to apply the above rules and the commencement of conditioning in the processing module PM are performed when the lot of wafers W being transported to the processing module PM changes. (2) Immediately after conditioning is complete, use the PM that has just finished conditioning.
[0038] Regarding principle (2), if any of the processing modules PMs to be transported are processing modules PMs that have just finished conditioning, the wafer W should be transported to that PM before the other PMs.
[0039] Furthermore, according to principle (1), while wafers W included in a lot are being transported to a processing module PM, the cumulative number of wafers processed in one of the processing modules PM reaches the cumulative number of wafers processed N that triggers the C-type, but there are wafers W in that lot that have not yet been transported to the processing module PM. In this case, there is no change in the applicable rules, and conditioning is not started. Therefore, there may be cases where, after more wafers W than the cumulative number of wafers processed N that triggers the C-type have been transported to the processing module PM, conditioning is started in that processing module PM due to a lot switch. However, in the simulation described later, it is assumed that the timing when the cumulative number of wafers processed reaches the cumulative number of wafers processed N that triggers the conditioning coincides with the timing when a lot switch occurs, and therefore, conditioning is started when the cumulative number of wafers processed reaches the cumulative number of wafers processed N that triggers the C-type. The number of wafers W included in a single lot varies, but if we assume that lots consisting of X wafers W (where X is an integer) are continuously transported to the substrate processing device 1, then rules 1 to 4 will be applied when the cumulative number of wafers processed by all PMs is a multiple of X. In that case, conditioning will start when the cumulative number of wafers processed by all PMs is a multiple of X. The cumulative number of wafers processed here is the sum of the cumulative number of wafers processed by PM1 to PM4.
[0040] [Rules for the transport method of the comparative example] The simulation results for the transport method of the embodiment and the transport method of the comparative example will be explained later to demonstrate the effectiveness of the transport method of the embodiment. To that end, the transport method of the comparative example will be explained further. In this simulation, the transport method of the embodiment and the transport method of the comparative example differ only in the rules for transport control. That is, in the comparative example, transport is not performed according to the 1st to 4th rules described above, but rather according to the following 1' to 3' rules.
[0041] Rule 1′ When the cumulative number of sheets processed by the processing module PM, which is the third largest in descending order of cumulative processing capacity, is less than (N × 3 / 6) sheets, the processing will be performed using the first to third processing modules PM in descending order of cumulative processing capacity. Rule 2′ When the cumulative number of sheets processed by the processing module PM with the second largest cumulative number of sheets processed in descending order is less than (N × 5 / 6), the processing is performed using the first to third processing modules PM in descending order of cumulative number of sheets processed. Rule 3' If neither Rule '1' nor Rule '2' applies, the processing will be performed using the 1st, 3rd, and 4th processing modules (PM) in descending order of cumulative processing count.
[0042] In rules 1' and 2', N is the cumulative number of wafers processed by the C trigger described above. The rules 1' to 3' above are applied in the order of rule 1', rule 2', and rule 3'. Also, in this comparative example's transport method, as in the transport method of the embodiment, if the cumulative number of wafers processed is the same among processing modules PM1 to PM4, processing modules PM1 to PM3 are used as the destination for transporting wafer W. In short, regarding the transport in the comparative example, it is carried out in such a way that not all PMs are used at the same time.
[0043] [Simulation Assumptions] The simulations performed for the transport in the example and the comparative example are described below. In these simulations, the conditioning execution time and the processing time per wafer W in the processing module PM were set to 720 minutes and 3 minutes, respectively, as previously exemplified. Therefore, the value of n calculated from these parameters and used in the rules of the example is also 240, as previously exemplified.
[0044] The cumulative number of wafers processed N by the C trigger was changed between each embodiment. As a result, the relationship between the execution time of the conditioning that makes up the left and right sides of the above inequality 1, and the processing time of (cumulative number of wafers processed N / 3 by the C trigger) wafers W was verified to differ between embodiments. Furthermore, the cumulative number of wafers W processed at PM1 to PM4 at the start of transport (considered the initial state) was also changed between embodiments for verification. In addition, in accordance with these changes between embodiments, the cumulative number of wafers processed N by the C trigger and the initial state were also changed between comparative examples for verification.
[0045] [Example 1] As Example 1, the integrated processing count N of the C trigger was set to 1500. Therefore, the processing time of the wafer W for N / 3 sheets of the integrated processing count of the C trigger is 1500 minutes, and the relationship of Inequality 1 (execution time of conditioning < processing time of the wafer W for N / 3 sheets of the integrated processing count of the C trigger) holds. And in Example 1, the difference between the left side and the right side of this Inequality 1 is relatively large, and the value of the right side is larger than twice the value of the left side. Also, as the initial state of Example 1, the integrated processing count is 0 in all of the processing modules PM1 to PM4.
[0046] The upper table in FIG. 4 shows the simulation results of Example 1, which divides the period during which conveyance is performed into a number of sections and represents the state of each processing module PM for each section. More specifically, the vertical arrangement of the cells corresponds to the sections, and the horizontal arrangement of the cells corresponds to the processing modules PM respectively. The sections are arranged in ascending order downward, but the section numbers increase as the elapsed time since the start of conveyance becomes longer, and the section numbers change when a change in the applied rule or a change in the processing module for which conditioning is performed occurs. And for each processing module PM, the character "C" is shown in the corresponding cell of the table in the section where conditioning is being performed, and the integrated processing count is shown in the corresponding cell of the table in the section where conditioning is not being performed. Note that the integrated processing count shown in this table is the value immediately before the end of each section. And for the section where conditioning is not being performed, the rule applied in that section is displayed. Hereinafter, the table showing the state of the processing module PM in this way will be referred to as the conveyance table.
[0047] Regarding Example 1, the states of the processing modules PM1 to PM4 and the applied rules will be described in the order of the sections. Section 1 is the initial state, and as mentioned above, the cumulative number of sheets processed for PM1 to PM4 is 0. In determining which rule to apply from this initial state, the judgment flow shown in Figure 3 is executed. At this time, as previously stated, if the cumulative number of sheets processed is the same, the descending order of the cumulative number of sheets processed corresponds to the PM number, and this descending order is considered to be PM1, PM2, PM3, PM4. Then, according to the judgment flow, it is determined whether or not it falls within the scope of application of Rule 1, but the difference in the cumulative number of sheets processed between PM1, which is the largest in descending order of cumulative number of sheets processed, and PM4, which is the fourth largest, is 0 sheets, i.e., less than n × 3 = 720 sheets. Therefore, the judgment result is that it falls within the scope of application of Rule 1, and it is decided that Rule 1 will be applied, and Section 1 ends.
[0048] In section 2, wafers W are transported to PM1 to PM3, which are ranked 1st to 3rd in descending order of cumulative processing capacity according to Rule 1. The difference in cumulative processing capacity between PM1, which has the largest cumulative processing capacity in descending order, and PM4, which has the fourth largest, is n × 3 = 720 wafers, which falls outside the scope of application of Rule 1.
[0049] With the difference in the cumulative number of processed sheets formed in this way, the judgment flow is executed. At this time, since the cumulative number of processed sheets is the same between PM1 and PM3, the descending order of the cumulative number of processed sheets between PM1 and PM3 corresponds to the PM number. Therefore, the descending order is considered to be PM1, PM2, PM3, PM4. The judgment flow first determines that it does not fall within the scope of application of Rule 1, and then determines whether it falls within the scope of application of Rule 2. The difference in the cumulative number of processed sheets between PM1, which is the largest in descending order of cumulative number of processed sheets, and PM3, which is the third largest, is 0 sheets, i.e., less than (n × 2) = 480 sheets, so it is determined that it falls within the scope of application of Rule 2, the applicable rule switches to Rule 2, and section 2 ends.
[0050] In section 3, wafers W are transported to PM1, PM2, and PM4 according to the second rule described above. The total number of wafers processed at PM1, PM2, PM3, and PM4 is 1200, 1200, 720, and 480, respectively. In other words, the difference in the total number of wafers processed between PM1, which is the largest in descending order of total processed wafers, and PM3, which is the third largest, is n × 2 = 480, which falls outside the scope of application of the second rule.
[0051] The judgment flow is executed with the difference in the cumulative number of sheets processed formed in this way. At this time, since the cumulative number of sheets processed is the same between PM1 and PM2, the descending order of the cumulative number of sheets processed between PM1 and PM2 corresponds to the PM number. Therefore, the descending order is considered to be PM1, PM2, PM3, PM4. The transport flow first determines whether or not it falls within the scope of application of Rule 1. Since the difference between PM1, which is the largest in descending order with 1200 sheets, and PM4, which is the fourth largest with 480 sheets, is not less than n × 3 = 720 sheets, it is determined that it does not fall within the scope of application of Rule 1. Next, since it is determined that it does not fall within the scope of application of Rule 2, it is determined whether or not it falls within the scope of application of Rule 3. The difference between PM1, which was determined to be the largest in descending order of cumulative number of sheets processed, and PM2, which was determined to be the second largest, is 0 sheets, i.e., n = 240 sheets or more, so it is determined that it does not fall within the scope of application of Rule 3 and is also determined to fall within the scope of application of Rule 4. As a result, the applicable rule switches to Rule 4, and Section 3 ends.
[0052] In section 4, wafers W are transported to PM1, PM3, and PM4 according to the fourth rule described above. The total number of wafers processed at PM1, PM2, PM3, and PM4 is 1440, 1200, 960, and 720, respectively. In other words, the difference in the total number of wafers processed between PM1, which is considered to have the largest total number of wafers processed in descending order, and PM2, which is considered to have the second largest total number of wafers processed, is n = 240 or more, which falls within the scope of application of the third rule.
[0053] With the difference in the cumulative number of processed sheets formed in this way, the judgment flow is executed to determine whether or not it falls within the scope of the first rule. However, since the difference between the largest PM1 (1440 sheets) and the fourth largest PM4 (720 sheets) is not less than n × 3 = 720 sheets, it is determined that it does not fall within the scope of the first rule. Next, it is determined whether or not it falls within the scope of the second rule. However, since the difference between the largest PM1 (1440 sheets) and the third largest PM3 (960 sheets) is not less than n × 2 = 480 sheets, it is determined that it does not fall within the scope of the second rule. Finally, it is determined whether or not it falls within the scope of the third rule. As a result, it is determined that it falls within the scope of the third rule, the applicable rule switches to the third rule, and section 4 ends.
[0054] In section 5, wafers W are transported to PM1 to PM4 according to the third rule described above. The cumulative number of wafers processed at PM1, PM2, PM3, and PM4 is 1500, 1260, 1020, and 780, respectively. In other words, the cumulative number of wafers processed at PM1 reaches N=1500, which is the cumulative number of wafers processed for the C trigger, and conditioning begins, thus ending section 5.
[0055] In section 6, wafers W are transported to PM2-PM4, where conditioning has not yet been performed. Conditioning in PM1 is completed, while the cumulative number of wafers processed in PM2, PM3, and PM4 reaches 1500, 1260, and 1020, respectively. In other words, the cumulative number of wafers processed in PM2 reaches N=1500, which is the cumulative number of wafers that triggers the C trigger, and conditioning begins, thus ending section 6.
[0056] In section 7, wafers W are transported to PM1, PM3, and PM4, where conditioning has not yet been performed. As conditioning in PM2 is completed, the cumulative number of wafers processed in PM1, PM3, and PM4 becomes 240, 1500, and 1260, respectively. Specifically, the cumulative number of wafers processed in PM3 reaches N=1500, which is the cumulative number of wafers that triggers the C trigger, and conditioning begins, thus ending section 7.
[0057] In section 8, wafers W are transported to PM1, PM2, and PM4, where conditioning has not yet been performed. Conditioning in PM3 is completed, while the cumulative number of wafers processed in PM1, PM2, and PM4 reaches 480, 240, and 1500, respectively. In other words, section 8 ends when the cumulative number of wafers processed in PM4 reaches N=1500 and conditioning begins.
[0058] In section 9, wafers W are transported to PM1 to PM3, where conditioning has not been performed. Conditioning is completed in PM4, while the cumulative number of wafers processed in PM1, PM2, and PM3 becomes 720, 480, and 240, respectively. As no conditioning is performed in any of the PMs, the judgment flow is executed, and first, it is determined whether or not it falls within the scope of application of Rule 1. Then, regarding the cumulative number of wafers processed, the difference between the largest number in descending order, PM1 (720 wafers), and the fourth largest number, PM4 (0 wafers), is not less than n × 3 = 720 wafers, so it is determined that it does not fall within the scope of application of Rule 1.
[0059] Next, it is determined whether or not the case falls within the scope of application of Rule 2. Since the difference between the largest PM1 (720 sheets) and the third largest PM3 (240 sheets) is not less than n × 2 = 480 sheets, it is determined that the case does not fall within the scope of application of Rule 2. Then, it is determined whether or not the case falls within the scope of application of Rule 3. Since the difference between the largest PM1 (720 sheets) and the second largest PM2 (480 sheets) is n = 240 sheets or more, it is determined that the case falls within the scope of application of Rule 3, and Rule 3 is applied, thus ending section 9.
[0060] In section 10, wafers W are transported to PM1 to PM4 according to the third rule described above. The cumulative number of wafers processed in PM1, PM2, PM3, and PM4 is 1500, 1260, 1020, and 780, respectively. In other words, the cumulative number of wafers processed in PM1 reaches the conditioning trigger N=1500, and conditioning begins, ending section 10.
[0061] In section 11, conditioning is performed in PM1, similar to section 6, and, as shown in the transport table, the same difference in the cumulative number of wafers processed as in section 6 is formed between processing modules PM2 to PM4. Therefore, in sections 11 to 15, the rules are applied in the same way as in sections 6 to 10 to transport wafers W, so the same difference in the cumulative number of wafers processed as in sections 6 to 10 is formed between processing modules PM, and the conditioning of each processing module PM is performed in the same order as in sections 6 to 10.
[0062] Sections may include conveyance performed according to only Rule 3 of Rules 1 to 4. If the other sections are considered as one cycle consisting of multiple consecutive sections where each processing module PM1 to PM4 is conditioned, then from section 6 onwards, this cycle will be repeated. Sections 6 to 10 constitute the first cycle, and sections 11 to 15 constitute the second cycle. The state in which the above cycle is repeated is defined as the steady state, and the period until the end of the first cycle is defined as "until the steady state is reached." Therefore, in this embodiment 1, until the steady state is reached is up to section 10. In the conveyance table, sections forming the first cycle until the steady state is reached are marked with dots, and sections forming the second cycle are marked with diagonal lines.
[0063] As described above, by transporting wafers W according to rules 1 to 4, the transport table indicates that in a steady state, the intervals will progress in such a way that a difference of 240 wafers or more (i.e., n wafers or more) is maintained between PMs where conditioning is not performed. Specifically, as shown in the transport table, just before the end of interval 6, the cumulative number of wafers processed by each of the three PMs where conditioning is not performed is 1020, 1260, and 1500, thus forming a difference of 240 wafers. Just before the end of interval 7, the cumulative number of wafers processed by each of the three PMs where conditioning is not performed is 240, 1260, and 1500, thus forming a difference of 240 wafers or more. The same applies to intervals 8 and beyond, and just before the end of interval 10 where conditioning is not performed, a difference of 240 wafers is formed between the four processing module PMs.
[0064] However, within a single interval, the difference in the number of wafers between PMs changes, and there are times when it falls below 240. Specifically, for example, immediately after the end of interval 6 and at the start of interval 7, wafer W is transported to PM1, which has finished conditioning, resulting in a difference of less than 240 wafers. Therefore, although it was stated that in a steady state, a difference of n or more wafers in the cumulative number of wafers processed is maintained between PMs that do not perform conditioning, this does not mean that a difference of n or more wafers is always formed. Rather, it means that transport is carried out in such a way that there are times in each interval of the steady state when a difference of n or more wafers is formed.
[0065] [Summary of Example 1] Below the transport table in Figure 4, various data obtained by the transport described in Example 1 are shown as a table divided into data up to the steady state and data for one cycle in the steady state. The unprocessed time (converted to the number of wafers) in the data refers to the time during which wafers W can be transported because conditioning has not been performed, but transport does not occur due to transport being carried out according to the rules, expressed as the number of wafers W for that time.
[0066] Regarding the data until a steady state is reached, the total number of wafers W processed by PM1, PM2, PM3, and PM4 was 3000, 2760, 2520, and 2280, respectively. The unprocessed time (in terms of wafers) for PM1, PM2, PM3, and PM4 was 0, 240, 480, and 720, respectively. The number of conditioning cycles was 1 for each of PM1 to PM4. For each processing module PM, the total number of wafers + unprocessed time (in terms of wafers) is 3000, and the number of conditioning cycles is 1. Therefore, the time to reach a steady state is 3000 wafers × (processing time per wafer W = 3 minutes) + execution time of 1 conditioning cycle (720 minutes) = 9720 minutes. Furthermore, the throughput per PM was calculated as: total number of wafers W until a steady state is reached / time to reach a steady state (minutes) × 60 minutes, and the throughputs for PM1, PM2, PM3, and PM4 were 18.51852, 17.03704, 15.55556, and 14.07407, respectively.
[0067] Regarding the data for one steady-state cycle, the total number of wafers W processed by PM1, PM2, PM3, and PM4 is 1500 each. The unprocessed time (in terms of wafers) for PM1 to PM4 is 0. The time for one steady-state cycle is calculated as (total number of wafers W + unprocessed time (in terms of wafers)) × processing time per wafer W + conditioning execution time during one cycle for any one processing module PM, and is therefore calculated as 1500 wafers × 3 wafers / minute + 720 minutes = 5220 wafers. The throughput per PM is calculated as total number of wafers W in one cycle / time per cycle (minutes) × 60 minutes, and was 17.24138, 17.24238, 17.24138, and 17.24138 for PM1, PM2, PM3, and PM4, respectively.
[0068] [Comparative Example 1] As Comparative Example 1, similar to Example 1, the cumulative number of sheets processed N for the C trigger was set to 1500, and the simulation was performed assuming that transport started from a state where the cumulative number of sheets processed was 0 in all processing modules PM1 to PM4. Note that the steady state in the comparative example described below differs from the steady state in the example in that it may include transport according to the 1' rule instead of a section where transport according to the 3rd rule is performed.
[0069] Figure 5 shows the simulation results of transport in Comparative Example 1, as well as a transport table and various data tables, similar to Figure 4 of Example 1. As is clear from the transport table in Figure 5, in the steady state, there is a period of time when wafer W is not transported to PM after conditioning has been performed. Specifically, to explain sections 14 to 16 in the transport table, conditioning of PM1 is performed in section 14, and this conditioning is completed in section 15. However, following section 14, wafer W is transported only to PM2 to PM4, and in section 16, the conditioning of PM2 begins, which initiates transport to PM1.
[0070] [Summary of Comparative Example 1] Regarding the data until a steady state is reached, the total number of wafers W processed by PM1, PM2, PM3, and PM4 was 4500, 4010, 3490, and 3000, respectively. The unprocessed time (in terms of wafers) for PM1, PM2, PM3, and PM4 was 20, 510, 1030, and 1520, respectively. The number of conditioning cycles was 2 for each of PM1 to PM4. For each processing module PM, the total number of wafers + unprocessed time (in terms of wafers) is 4520, and the number of conditioning cycles is 2. Therefore, the time to reach a steady state is 4520 wafers × processing time per wafer W (3 minutes) + execution time for 2 conditioning cycles (720 minutes × 2) = 150,000 minutes. Furthermore, the throughput per 1 PM was calculated using the procedure described in Example 1, and was 18, 16.04, 13.96, and 12 for PM1, PM2, PM3, and PM4, respectively.
[0071] Regarding the data for one steady-state cycle, the total number of wafers W processed by PM1, PM2, PM3, and PM4 is 1500, 1470, 1500, and 1500, respectively. The unprocessed time (in terms of wafers) for PM1 to PM4 is 250, 280, 250, and 250, respectively. The time for one steady-state cycle is calculated as (total number of wafers W + unprocessed time (in terms of wafers)) × processing time per wafer W + conditioning execution time during one cycle for any one processing module PM, and is therefore calculated as 1750 wafers × 3 wafers / minute + 720 minutes = 5970 wafers. The throughput per PM was calculated using the procedure described in Example 1, and was 15.07538, 14.77387, 15.07538, and 15.07538 for PM1, PM2, PM3, and PM4, respectively.
[0072] [Comparison between Example 1 and Comparative Example 1] In both Example 1 and Comparative Example 1, under steady-state conditions, conditioning is performed sequentially one by one at PM1 to PM4. However, under these steady-state conditions, there is a period in which no conditioning is performed at any of the PMs. In Comparative Example 1, in this period, the wafer W is not immediately transported to the PM after conditioning is completed. On the other hand, in Example 1, the wafer W is transported to each of PM1 to PM4 for processing during this period. In other words, Example 1 reduces the time that the PMs wait without processing the wafer W.
[0073] Furthermore, the time to reach a steady state was 9720 minutes for Example 1 and 15000 minutes for Comparative Example 1, with Example 1 being shorter. As described above, in the steady state, unlike Comparative Example 1, Example 1 does not experience a situation where wafer W cannot be transported to the PM after the conditioning is complete, and processing is performed in all PMs where conditioning is not performed. Therefore, considering the need to increase the processing efficiency of the apparatus, it is desirable for Example 1 to quickly reach this steady state, and thus Example 1 achieved the favorable result of reaching a steady state faster than Comparative Example 1.
[0074] And, the minimum throughput per PM until reaching the steady state is 14.07407 in Example 1 and 12 in Comparative Example 1. Therefore, if Comparative Example 1 is taken as 100%, Example 1 is 117.3%. The maximum throughput per PM until reaching the steady state is 18.51852 in Example 1 and 18 in Comparative Example 1. Therefore, if Comparative Example 1 is taken as 100%, Example 1 is 102.9%. And, the throughput per PM in one cycle of the steady state is 17.24138 in Example 1 and 15.07538 in Comparative Example 1. Therefore, if Comparative Example 1 is taken as 100%, Example 1 is 114.4%. Thus, in each of the period until reaching the steady state and the cycle of the steady state, the throughput of each PM is higher in Example 1. Therefore, it was confirmed that the processing efficiency of the apparatus is higher in Example 1.
[0075] 〔Example 2 and Comparative Example 2〕 As Example 2, a simulation was performed under the same conditions as Example 1, except that the integrated processing count in the initial state was not 0 for PM1 to PM4. Therefore, also in this Example 2, the integrated processing count N of the C trigger is 1500, and the relationship of Inequality 1 (execution time of conditioning < processing time of wafer W for N / 3 sheets of the C trigger) holds. Specifically, regarding the integrated processing count in the initial state, it was set to 920, 1394, 140, and 723 for PM1, PM2, PM3, and PM4, respectively. Also, as Comparative Example 2, a simulation was performed under the same conditions as Example 2.
[0076] Figure 6 shows the transport table and data table for Example 2, and Figure 7 shows the transport table and data table for Comparative Example 2. Note that the rules applied in each section of Example 2 are determined using the same procedure as in Example 1, so details are omitted. As shown in the data table, the time to reach a steady state was 6960 minutes for Example 2 and 6240 minutes for Comparative Example 2, with Example 2 being slightly longer. However, the minimum throughput per 1 PM to reach a steady state was 15.86207 for Example 2 and 13.07692 for Comparative Example 2, so if Comparative Example 2 is set to 100%, Example 2 is 121.3%. The maximum throughput per 1 PM to reach a steady state was 17.93103 for Example 2 and 17.34615 for Comparative Example 2, so if Comparative Example 2 is set to 100%, Example 2 is 103.4%. Thus, Example 2 had a higher throughput to reach a steady state.
[0077] Furthermore, in a steady-state cycle, as shown in the transport table, Comparative Example 2, like Comparative Example 1, has a period where wafer W is not immediately transported to PM after conditioning has been performed, but such a period does not occur in Example 2. Therefore, even in a steady-state cycle, the throughput of each PM is higher in Example 2. From the above, Example 2 has higher processing efficiency.
[0078] [Example 3 and Comparative Example 3] As Example 3, a simulation was performed under the same conditions as Examples 1 and 2, except that the cumulative number of sheets processed in the initial state was different. In Example 3, the cumulative number of sheets processed for PM1 to PM4 in the initial state is not 0, as in Example 2, but it differs from Example 2 in that the difference between the maximum and minimum is set to be n × 2 = 480 or less. Specifically, the cumulative number of sheets processed in the initial state was set to 171, 351, 135, and 71 for PM1, PM2, PM3, and PM4, respectively. As Comparative Example 3, a simulation was also performed under the same conditions as Example 3.
[0079] Figure 8 shows the transport table and data table for Example 3, and Figure 9 shows the transport table and data table for Comparative Example 3. For Example 3, the applicable rules are determined using the same procedure as in Example 1. The procedure for determining the applicable rules in each section up to section 5, before reaching a steady state, is briefly outlined below.
[0080] In the initial state of interval 1, the cumulative number of sheets processed is PM2, PM1, PM3, and PM4 in descending order. Since the difference in cumulative number of sheets processed between PM2 (1st in descending order) and PM4 (4th in descending order) is less than n × 3 (= less than 720), it is determined that the first rule applies.
[0081] In section 2, wafers W are transported to PM1 to PM3 according to Rule 1, and the difference in the total number of wafers processed between PM2 and PM4 is 720. Then, the applicable rule is determined again. Since the difference in the total number of wafers processed between PM2 and PM4 is 720, Rule 1 does not apply. And since the difference between PM2 (1st in descending order) and PM3 (3rd in descending order) is less than n × 2 (= less than 380), it is decided that Rule 2 will apply.
[0082] In section 3, wafers W are transported to PM1, PM2, and PM4 according to Rule 2, and the difference in the total number of wafers processed between PM2 and PM3 is 480. Then, the applicable rule is determined again. Since the difference in the total number of wafers processed between PM2 and PM4 is 720, Rule 1 does not apply. Furthermore, since the difference in the total number of wafers processed between PM2 and PM3 is 480 (n × 2 or more), Rule 2 does not apply. In addition, since the difference in the total number of wafers processed between PM2 (1st in descending order) and PM1 (2nd in descending order) is not 240 or more, Rule 3 does not apply, and it is decided that Rule 4 will be applied.
[0083] In section 4, wafers W are transported to PM2~PM4 according to rule 4, and the difference in the cumulative number of wafers processed between PM2 and PM1 becomes 240. Then, the applicable rule is determined again. Since the difference in the cumulative number of wafers processed between PM2 and PM4 is 720 (n × 3 or more), rule 1 is not applied. Since the difference in the cumulative number of wafers processed between PM2 and PM3 is 480 (n × 2 or more), rule 2 is not applied. Since the difference in the cumulative number of wafers processed between PM2 (1st in descending order) and PM1 (2nd in descending order) is 240 or more, it is decided that rule 3 will be applied. In section 5, wafers W are transported to PM1~PM4 according to rule 3, and section 5 ends when PM2 reaches the cumulative number of wafers processed N (=1500) for the C trigger.
[0084] Furthermore, in each section from Example 3 onward, and in each example from Example 3 onward, the applicable rules are determined in the same way as in sections 1 to 5 of Example 3 and the sections of Example 1 described above, so the explanation regarding the determination of these rules will be omitted from here on.
[0085] For Example 3 and Comparative Example 3, the time to reach a steady state was 8667 minutes for Example 3 and 14487 minutes for Comparative Example 3, as shown in the data table. Example 3 had a shorter time, which was a more favorable result. The minimum throughput per PM until reaching a steady state was 15.29249 for Example 3 and 12.13088 for Comparative Example 3. If Comparative Example 3 is set to 100%, Example 3 is 126.1%. The maximum throughput per PM until reaching a steady state was 18.33853 for Example 3 and 17.18368 for Comparative Example 3. If Comparative Example 3 is set to 100%, Example 3 is 106.7%. Thus, Example 3 had a higher throughput until reaching a steady state. Regarding the steady state cycle, in Comparative Example 3, similar to Comparative Examples 1 and 2, there was a period where wafer W was not immediately transported after conditioning was performed on the PM, whereas in Example 3, no such period occurred. Therefore, even for one steady state cycle, the throughput of each PM was higher in Example 3. Based on the above, Example 3 has higher processing efficiency.
[0086] [Example 4 and Comparative Example 4] As Example 4, a simulation was performed under the same conditions as Examples 1-3, except that the cumulative number of sheets processed in the initial state was different. In Example 4, the cumulative number of sheets processed for PM1-PM4 in the initial state is not 0, as in Examples 2 and 3, but it differs from Examples 2 and 3 in that the difference between the maximum and minimum is set to n×3=720 or less, and the difference between the first and second in descending order is n=240 or more. Specifically, in the initial state, the cumulative number of sheets processed for PM1, PM2, PM3, and PM4 is set to 706, 461, 205, and 81, respectively. As Comparative Example 4, a simulation was also performed under the same conditions as Example 4.
[0087] Figure 10 shows the transport schedule and data table for Example 4, and Figure 11 shows the transport schedule and data table for Comparative Example 4. As shown in each data table, the time to reach a steady state was 9105 minutes for Example 4 and 7632 minutes for Comparative Example 4, with Comparative Example 4 being shorter. However, the minimum throughput per 1 PM to reach a steady state was 16.8369 for Example 4 and 11.15566 for Comparative Example 4, so if Comparative Example 4 is set to 100%, Example 4 is 150.9%. The maximum throughput per 1 PM to reach a steady state was 18.41845 for Example 4 and 18.03459 for Comparative Example 4, so if Comparative Example 4 is set to 100%, Example 4 is 102.1%. Thus, Example 4 had higher throughput to reach a steady state. Furthermore, regarding one cycle of the steady state, in Comparative Example 4, as in Comparative Examples 1-3, there is a period in which wafer W is not transported immediately after conditioning is performed on the PM, whereas in Example 4, no such period occurs. Therefore, even in steady-state cycles, the throughput of each PM is higher in Example 4. From the above, it can be concluded that Example 4 has higher processing efficiency.
[0088] [Example 5 and Comparative Example 5] In Example 5, a simulation was performed under the same conditions as in Example 1, except that the cumulative number of wafers processed N for the C trigger was set to 1440. Therefore, in Example 5, the processing time for N / 3 wafers W for the cumulative number of wafers processed N for the C trigger = 1440 minutes, and the difference between the conditioning execution time and the processing time for N / 3 wafers W for the cumulative number of wafers processed N for the C trigger is smaller than in Example 1. Because this difference is small, the previously described inequality 1 (processing time of processing module PM < processing time for (cumulative number of wafers N / 3 for the C trigger)) holds, but the value on the left side of inequality 1 × 2 = the value on the right side of the inequality. In Comparative Example 5, a simulation was also performed under the same conditions as in Example 5.
[0089] Figure 12 shows the transport table and data table for Example 5, and Figure 13 shows the transport table and data table for Comparative Example 5. As shown in the data tables, the time to reach a steady state was 9630 minutes for Example 5 and 14400 minutes for Comparative Example 5, with Example 5 having a shorter time, which is a preferable result. The minimum throughput per 1 PM to reach a steady state was 13.84615 for Example 5 and 12 for Comparative Example 5, so if Comparative Example 5 is set to 100%, Example 5 is 115.4%. The maximum throughput per 1 PM to reach a steady state was 18.46154 for Example 5 and 18 for Comparative Example 5, so if Comparative Example 5 is set to 100%, Example 5 is 102.6%. Thus, Example 5 had a higher throughput to reach a steady state.
[0090] Furthermore, the throughput per PM in one steady-state cycle was 17.14286 in Example 5 and 15 in Comparative Example 5. Therefore, if Comparative Example 5 is set to 100%, Example 5 is 114.3%. Thus, the throughput of each PM is higher in Example 5, both during the period until a steady state is reached and during one steady-state cycle. As described above, the throughput of each PM is higher in Example 5, both during the period until a steady state is reached and during one steady-state cycle. From the above, it was confirmed that the processing efficiency of the device is higher in Example 5.
[0091] [Example 6 and Comparative Example 6] As Example 6, a simulation was performed under the same conditions as Example 1, except that the cumulative number of wafers processed N by the C trigger was set to 1080 wafers. Therefore, in Example 6, the processing time for wafers W of N / 3 wafers processed by the C trigger = 1080 minutes, and the difference between the conditioning execution time and the processing time for wafers W of N / 3 wafers processed by the C trigger is smaller than the difference in Examples 1 and 5. The relationship of inequality 1 described above holds, and because the above difference is small, the relationship of inequality 1 (processing execution time of processing module PM < processing time for (cumulative number of wafers processed N / 3 by the C trigger) wafers) holds, but the value on the left side of inequality 1 × 1.5 = the value on the right side of the inequality. As Comparative Example 6, a simulation was performed under the same conditions as Example 6.
[0092] Figure 14 shows the transport table and data table for Example 6, and Figure 15 shows the transport table and data table for Comparative Example 6. As shown in each data table, the time to reach a steady state was 11,160 minutes for Example 6 and 13,140 minutes for Comparative Example 6, with Example 6 having a shorter time. The minimum throughput per 1 PM to reach a steady state was 13.54839 for Example 6 and 12.87671 for Comparative Example 6, so if Comparative Example 6 is set to 100%, Example 6 is 105.2%. The maximum throughput per 1 PM to reach a steady state was 17.41935 for Example 6 and 16.43836 for Comparative Example 6, so if Comparative Example 6 is set to 100%, Example 6 is 109.1%. Thus, Example 6 had a higher throughput to reach a steady state. Furthermore, the throughput per PM in one steady-state cycle was 16.36364 in Example 6 and 15 in Comparative Example 6. Therefore, if Comparative Example 6 is set to 100%, Example 6 is 109.1%. As described above, the throughput of each PM is higher in Example 6 both during the period until a steady state is reached and in each steady-state cycle. From the above, it was confirmed that the processing efficiency of the device is higher in Example 6.
[0093] [Example 7 and Comparative Example 7] As Example 7, a simulation was performed under the same conditions as in Example 1, except that the cumulative number of wafers processed N with the C trigger was set to 720 wafers. Therefore, in Example 7, the processing time for wafers W with the cumulative number of wafers processed N / 3 with the C trigger = 720 minutes, and the relationship in inequality 1 does not hold, while the relationship in equality 1 holds. As Comparative Example 7, a simulation was also performed under the same conditions as in Example 7.
[0094] Figure 16 shows the transport table and data table for Example 7, and Figure 17 shows the transport table and data table for Comparative Example 7. As shown in each data table, the time to reach a steady state was 9360 minutes for Example 7 and 15120 minutes for Comparative Example 7, with Example 7 having a shorter time. The time for one cycle in the steady state was 2880 minutes for both Example 7 and Comparative Example 7.
[0095] Furthermore, the minimum throughput per 1 PM until a steady state is reached was 12.30769 for Example 7 and 13.33333 for Comparative Example 7. Therefore, if Comparative Example 7 is set to 100%, Example 7 is 92.3%. The maximum throughput per 1 PM until a steady state is reached was 15.38462 for Example 7 and 15.2381 for Comparative Example 7. Therefore, if Comparative Example 7 is set to 100%, Example 7 is 101.1%. In addition, the throughput per 1 PM in one cycle in the steady state was 15 for both Example 7 and Comparative Example 7, with no difference.
[0096] As described above, there was no difference in throughput between Example 7 and Comparative Example 7 in the steady state. However, in terms of the time to reach the steady state, Comparative Example 7 had a higher minimum throughput per 1 PM. Nevertheless, since Example 7 reached the steady state more quickly, it was confirmed that Example 7 had a higher processing efficiency than Comparative Example 7.
[0097] [Example 8] As Example 8, a simulation was performed under the same conditions as in Example 1, except that the cumulative number of wafers processed N for the C trigger was set to 480 wafers. Therefore, in Example 8, the processing time for wafers W with a cumulative number of wafers processed N / 3 for the C trigger = 480 minutes, which is 2 / 3 of the conditioning execution time. Thus, the conditioning execution time of the processing module PM > the processing time for wafers with a cumulative number of wafers processed N / 3 for the C trigger, and the relationships in inequality 1 and equality 1 do not hold. As Comparative Example 8, a simulation was also performed under the same conditions as in Example 8.
[0098] Figures 18 and 19 show the transport tables for Example 8 and Comparative Example 8, respectively. As shown in each transport table... In Comparative Example 8, as in Comparative Example 1, there is a period in which wafer W is not immediately transported after conditioning of PM, but in Example 8, no such period occurs. Therefore, the processing efficiency of the apparatus is higher in Example 8 than in Comparative Example 8. However, as shown in the transport table, unlike the examples described so far, in Example 8, conditioning of PM1 and PM2 is performed in the same period in the steady state.
[0099] Although the transport table is not shown, in Example 9, the cumulative number of wafers processed N with the C trigger was set to 540, and the same simulation as in Example 8 was performed. Therefore, in Example 9, the processing time for wafers W with a cumulative number of wafers processed N / 3 with the C trigger was 540 minutes, which is 3 / 4 of the conditioning execution time, so the relationship of Inequality 1 and Equality 1 does not hold, just as in Example 8. In this Example 9 as well, the result was that conditioning was performed by two PMs in the same interval in the steady state, similar to Example 8.
[0100] [Summary of simulation results] The processing efficiency of the apparatus can be increased by creating a state where the conditioning intervals for each PM are staggered, and conditioning is performed on only one PM while all other PMs process the wafer W. Of Examples 1 to 9, such a steady state was formed in Examples 1 to 7. Therefore, it was confirmed that it is preferable to apply the transport method of the examples when the execution time of conditioning of the processing module PM is ≤ (cumulative number of wafers processed by C trigger N / (number of processing module PMs - 1)) wafers, which is the condition set in Examples 1 to 7.
[0101] Furthermore, comparing Examples 1-6, where inequality 1 holds, with Example 7, where equality 1 holds, Examples 1-6 are greater than the comparative example in both the minimum and maximum throughput per 1 PM until a steady state is reached, as well as the throughput per 1 PM in one cycle of the steady state. Therefore, it was confirmed that it is more preferable to apply the transport method of the examples when inequality 1 holds than when equality 1 holds.
[0102] [Application to other device configurations] By the way, executing the decision flow for determining the applicable rules shown in Figure 3 can be said to be equivalent to performing the following steps T1 to T3. The difference between the total number of sheets processed by the PM who is ranked first in descending order of total number of sheets processed and the total number of sheets processed by a PM selected from among the other PMs is compared with n × (the ranking of the selected PM in descending order of total number of sheets processed - 1) (Process T1). Depending on the comparison result of process T1, the PM to be transported is determined, or a PM that is one position lower in descending order of cumulative processing count than the PM selected in the immediately preceding process T1 is selected again (process T2). If PM is selected again in process T2, process T1 is repeated (process T3). The PM initially selected will be the PM with the highest cumulative number of processed sheets in descending order.
[0103] The determination of the PM to be transported in the above process T2 falls under either case 1 or 2 below. <Case 1> Based on the comparison results of process T1, if the difference between the cumulative processing count of the PM that is ranked first in descending order of cumulative processing count and the cumulative processing count of the selected PM is less than n × (the ranking of the selected PM in descending order of cumulative processing count - 1), then a PM other than the selected PM is determined to be the PM to be transported. <Case 2> Based on the comparison results of process T2, if the difference between the cumulative processing count of the PM that is ranked first in descending order of cumulative processing count and the cumulative processing count of the selected PM is n or greater, and the selected PM is the second PM in descending order of cumulative processing count, then all PMs are to be transported.
[0104] This section describes the correspondence between processes T1-T3 and rules 1-4. Unless otherwise specified, the order of the cumulative processing counts described is in descending order.
[0105] Since the substrate processing apparatus 1 is equipped with four PMs, the PM with the largest cumulative processing count in descending order is the fourth PM, and this is designated as the first selected PM. Next, the difference in the number of sheets processed in process T1 between the first PM and the fourth PM is calculated. Then, the difference between the calculated difference and n × (the order of the selected PMs, "4" - 1) is compared (process T1). As a result of the comparison, if the difference between the number of sheets processed in the first PM and the number of sheets processed by the selected PM is less than n × (the order of the selected PMs, "4" - 1), then the PMs with the 1st to 3rd highest number of sheets processed, other than the selected PM, are determined to be the PMs to be transported (process T2). Therefore, the execution of the first processes T1 and T2 described above is equivalent to executing the first rule.
[0106] As a result of the above comparison, if n × ("4" - 1) is not less than n, the PM selected in the previous process T1 is the 4th PM in the cumulative processing count. Therefore, the 3rd PM, which is one position lower, is selected again (process T2), and process T1 is performed again (process T3). Therefore, in this second step T1, the difference in the number of sheets processed between the first PM and the third PM is calculated, and this difference is compared with the difference between n × (the order of the selected PMs, "3" - 1). Thus, this second step T1 and the step T2 that follows this second step T1 correspond to the implementation of Rule 2.
[0107] Then, if processes T1 to T3 are repeated without determining which PM to transport, suppose the selected PM becomes the second-highest processing volume. A comparison is made between the difference in processing volume between the first-highest processing volume and the second-highest processing volume of the selected PM, and n × (the order of the selected PM, "2" - 1) (process T1). As a result of the comparison, if the difference in processing volume between the first-highest processing volume of the PM and the selected PM's processing volume is n or greater, all PMs are to be transported; if it is less than n, the PMs with processing volumes 1st, 3rd, and 4th, other than the selected PM (the second-highest processing volume), are to be transported. The above corresponds to the implementation of Rules 3 and 4.
[0108] The number of processing modules PM provided in the substrate processing apparatus 1 is not limited to four; it may be three or any number greater than four, and the PMs to be transported should be determined according to the above processes T1 to T3. If there are three PMs, the first PM selected should be the PM with the largest cumulative processing capacity among the three, and processes T1 to T3 should be performed. If there are five PMs, the first PM selected should be the PM with the largest cumulative processing capacity among the five, and processes T1 to T3 should be performed.
[0109] Although the film deposition, cleaning, and pre-coating processes are assumed to be plasma treatments, some or all of these may be performed without plasma generation of the gas. Furthermore, film deposition and pre-coating on the wafer W may be performed by ALD (Atomic Layer Deposition).
[0110] Furthermore, the processing module PM is not limited to those that perform film deposition, but may also perform etching or annealing. Also, the conditioning can be arbitrarily determined according to the configuration of the processing module, and may include only cleaning without pre-coating, for example. In addition, the processing module PM is not limited to those that perform processing in a vacuum atmosphere, but may also process the substrate in an atmospheric atmosphere. Accordingly, the substrate transport path between the transport container 14 and the processing module PM may also consist only of an atmospheric pressure atmosphere without including a vacuum atmosphere. Furthermore, the substrate is not limited to a wafer W, but may be, for example, a rectangular substrate for manufacturing flat panels or organic EL displays.
[0111] Furthermore, in the previously described example, the timing of the determination to decide which rules to apply was assumed to coincide with the changeover of wafer W lots, but it is not necessary to coincide with the changeover in this way. For example, the determination may be made each time any Y wafers W are dispensed from the transport container 14. Regarding conditioning, regardless of the timing of the changeover of lots, it may be started when the cumulative number of wafers processed reaches the cumulative number of wafers processed N triggered by the C trigger, as in the simulation.
[0112] By the way, we have described how the destination PM for wafer W is determined based on the cumulative number of wafers W processed in each PM. However, in the case where each PM performs film deposition, as in the substrate processing apparatus 1, the destination for wafer W may be determined based on the cumulative film thickness instead of the cumulative number of wafers processed. Let Anm be the film thickness formed on each part of the wafer W and PM in one film deposition process. That is, looking at the processing container 21 of the PM, the film thickness increases by Anm each time a film deposition process is performed. Note that A is a real number. Then, instead of the cumulative number of wafers N processed by the C trigger, the cumulative film thickness of the C trigger is set, and the PM is controlled so that conditioning is performed after the cumulative film thickness after conditioning (= Anm × number of times film deposition has been performed) reaches the C trigger cumulative film thickness. Furthermore, in the explanations regarding transport control and determination for each PM described above, the part that was written as the cumulative processing number should be read as the cumulative processing film thickness, and the part that was written as n should be read as n × A. By performing transport control and determination in this manner, the PM to which wafer W will be transported can be determined in the same way as when the destination is determined based on the cumulative processing number, as described above. Specifically, rules 1 to 4 will be read based on the cumulative processing film thickness as shown below, and the destination will be determined and transport control will be performed according to these read rules.
[0113] Rule 1 If the difference in the cumulative processing film thickness between the 1st and 4th largest processing modules PM in descending order of cumulative processing film thickness is less than (A × n × 3) nm, then processing will be performed using the 1st to 3rd largest processing modules PM in descending order of cumulative processing film thickness. Rule 2 If the difference in the cumulative processing film thickness between the 1st and 3rd largest processing modules PM in descending order of cumulative processing film thickness is less than (A × n × 2) nm, then processing will be performed using the 1st, 2nd, and 4th largest processing modules PM in descending order of cumulative processing film thickness. Rule 3 If the difference in cumulative processing film thickness between the first and second largest processing modules (PM) in descending order of cumulative processing film thickness is (A × n) nm or greater, then all processing modules (PM) are used for processing. Rule 4 If none of the rules of Rule 1, Rule 2, or Rule 3 apply, the processing shall be carried out using the 1st, 3rd, and 4th processing modules PM in descending order of cumulative processing film thickness.
[0114] When the first to fourth rules are based on the cumulative processing film thickness, transport control is performed so that a difference in cumulative processing film thickness of A × n (unit: nm) or more is formed between each PM. In the case of the first to fourth rules based on the cumulative processing number described above, a difference in the cumulative processing number of sheets of n or more (i.e., 1 × n or more) is formed between each PM. Therefore, whether the first to fourth rules are based on the cumulative processing film thickness or the cumulative processing number, transport control is performed so that a difference of n or more is formed between each PM with respect to the cumulative processing film thickness or the cumulative processing number. More specifically, transport control is performed so that a difference of n or more is formed. When based on the cumulative processing film thickness, this predetermined real number is A as described above, and when based on the cumulative processing number, this predetermined real number is 1.
[0115] As described above, the destination of the wafer W can be determined based on parameters corresponding to the cumulative number of wafer W processed, such as the cumulative number of wafers processed or the cumulative processing thickness, which are counted and accumulated each time a process is performed on the wafer W, and are reset to 0 when conditioning is performed.
[0116] Furthermore, the previously described processes T1 to T3, which are based on the first to fourth rules on the cumulative processing number but expressed in a different form, can also be implemented by substituting the cumulative processing number for the cumulative processing film thickness and n for A × n. That is, with no conditioning performed on any of the PMs, the cumulative processing film thickness of the PM that is ranked first in descending order is compared with the cumulative processing film thickness of a PM selected from among the other PMs other than the first one, and A × n × (the order of the cumulative processing film thickness of the selected PM in descending order - 1). Then, the PM to be transported is determined according to the result of this comparison, or the PM whose cumulative processing film thickness order in descending order is one less than the previously selected PM is selected again as the PM and the comparison is performed again, so that the PM with the largest cumulative processing film thickness in descending order is the PM that was initially selected.
[0117] The embodiments disclosed herein should be considered in all respects as illustrative and not restrictive. The above embodiments may be omitted, replaced, modified and / or combined in various ways without departing from the scope and spirit of the appended claims. [Explanation of Symbols]
[0118] PM1~PM4 Processing Modules W wafer W 12, 18 Conveying mechanism 40 Control Unit
Claims
1. Each processing container is provided for storing the substrate and performing similar processing, and each processing module is provided for conditioning the inside of the processing container, A transport mechanism for transporting the substrate to each of the plurality of processing modules, A control unit that determines which processing module will be the destination for the substrate from among the plurality of processing modules, based on a parameter corresponding to the cumulative number of substrates processed after conditioning for each of the processing modules, the execution time of the conditioning, and the processing time per substrate in the processing module. Equipped with, If we divide the execution time of the conditioning by the processing time per substrate, and round up any non-zero decimal values, then let n be the integer value obtained. A substrate processing apparatus in which the substrates are transported to each processing module such that a difference of n or more is formed between each processing module with respect to a parameter corresponding to the number of substrates to be processed after the conditioning.
2. Each processing container is provided for storing the substrate and performing similar processing, and each processing module is provided for conditioning the inside of the processing container, A transport mechanism for transporting the substrate to each of the plurality of processing modules, A control unit that determines which processing module will be the destination for the substrate from among the plurality of processing modules, based on a parameter corresponding to the cumulative number of substrates processed after conditioning for each of the processing modules, the execution time of the conditioning, and the processing time per substrate in the processing module. Equipped with, If we divide the execution time of the conditioning by the processing time per substrate, and round up any non-zero decimal values, then let n be the integer value obtained. The control unit is a substrate processing apparatus in which all of the plurality of processing modules are destinations for transporting substrates, in a state in which none of the processing modules have performed the conditioning, and in a state in which a difference of n or more is formed between each processing module with respect to the parameter corresponding to the cumulative number of substrates processed after the conditioning.
3. In the aforementioned multiple processing modules, the cycle in which the conditioning is performed sequentially is repeated. The substrate processing apparatus according to claim 2, in which a section is formed during the cycle in which no conditioning is performed in any of the processing modules, all of the plurality of processing modules are used as destinations for transporting the substrate in that section.
4. The parameter corresponding to the number of substrates to be processed is the number of substrates to be processed, and the value determined by n is n. The control unit, in determining the processing module to which the substrate will be transported, In a state where the conditioning is not performed in any of the aforementioned processing modules, The difference between the number of accumulated processed sheets of the processing module that is ranked first in descending order and the number of accumulated processed sheets of the processing module selected from the other processing modules, n × (order of cumulative processing count in descending order of selected processing modules - 1), We will compare the following: Based on the comparison results, the processing module to be transported is determined, or the processing module whose cumulative processing count in descending order is one less than the previously selected processing module is selected again as the processing module, and the comparison is performed again. The substrate processing apparatus according to claim 3, wherein the processing module with the largest cumulative number of processed sheets in descending order among the selected processing modules is the processing module that was initially selected.
5. The aforementioned plurality of processing modules consist of four processing modules. The substrate processing apparatus according to claim 4, wherein the control unit determines whether the following first, second, third, and fourth rules are applicable in ascending order of number, and determines the processing module to which the substrate will be transported according to the rules that have been determined to be applicable. First rule: If the difference between the number of sheets processed by the processing modules with the first and fourth largest cumulative processing numbers in descending order is less than (n × 3) sheets, the processing will be performed using the processing modules with the first to third largest cumulative processing numbers in descending order. Second rule: If the difference between the number of sheets processed by the processing modules with the first and third largest cumulative processing numbers in descending order is less than (n × 2) sheets, the processing will be performed using the processing modules with the first, second, and fourth largest cumulative processing numbers in descending order. Third rule: If the difference between the number of sheets processed by the first and second largest processing modules in descending order of cumulative processing number is (n) sheets or more, then all processing modules are used for processing. Rule 4: If none of the rules 1, 2, or 3 apply, the processing will be performed using the 1st, 3rd, and 4th processing modules in descending order of the cumulative processing count.
6. The processing module is a processing module that performs film deposition on the substrate, The parameter corresponding to the number of cumulative processing steps for the substrate is the cumulative processing thickness of the substrate. The value determined by n is the film thickness of the film formed on the substrate × n, The control unit, in determining the processing module to which the substrate will be transported, In a state where the conditioning is not performed in any of the aforementioned processing modules, The difference between the cumulative processing film thickness of the processing module that is ranked first in descending order and the cumulative processing film thickness of the processing module selected from the other processing modules, The film thickness formed on the substrate × n × (the order of the cumulative processing thickness in descending order of the selected processing modules - 1), We will compare the following: Based on the comparison results, the processing module to be transported is determined, or the processing module selected again as the processing module is one less than the processing module selected in descending order of cumulative processing film thickness, and the comparison is performed again. The substrate processing apparatus according to claim 3, wherein, among the selected processing modules, the processing module with the largest cumulative processing film thickness in descending order is the processing module that was initially selected.
7. If N (where N is a positive integer) is the set value for the number of substrates to be processed cumulatively between the completion of the previous conditioning and the start of the next conditioning, The substrate processing apparatus according to any one of claims 1 to 6, wherein the execution time of the conditioning is less than the processing time for (N / (number of processing modules - 1)) substrates.
8. A process of storing a substrate in a processing container provided by multiple processing modules and performing the same processing on the substrate, A process for conditioning the inside of each processing container, A transport mechanism transports the substrate to each of the plurality of processing modules, A step of determining which processing module will be the destination for the substrate from among the plurality of processing modules, based on a parameter corresponding to the cumulative number of substrates processed after conditioning for each of the processing modules, the execution time of the conditioning, and the processing time per substrate in the processing module. Equipped with, If we divide the execution time of the conditioning by the processing time per substrate, and round up any non-zero decimal values, then let n be the integer value obtained. A substrate processing method comprising the step of transporting the substrate to each processing module such that a difference of n or more is formed between each processing module with respect to a parameter corresponding to the number of substrates to be processed after the conditioning.
9. A process of storing a substrate in a processing container provided by multiple processing modules and performing the same processing on the substrate, A process for conditioning the inside of each processing container, A transport mechanism transports the substrate to each of the plurality of processing modules, A step of determining which processing module will be the destination for the substrate from among the plurality of processing modules, based on a parameter corresponding to the cumulative number of substrates processed after conditioning for each of the processing modules, the execution time of the conditioning, and the processing time per substrate in the processing module. Equipped with, If we divide the execution time of the conditioning by the processing time per substrate, and round up any non-zero decimal values, then let n be the integer value obtained. A substrate processing method comprising the step of using all of the plurality of processing modules as destinations for transporting substrates, where none of the processing modules have performed the conditioning, and a difference of more than or equal to a value determined by n has been formed between each processing module with respect to the parameter corresponding to the cumulative number of substrates processed after the conditioning.