Semiconductor equipment, power converters

Abstract

To provide a semiconductor device and a power conversion device, capable of having an inverter circuit constructed by a vertical arm, and improving a detection accuracy of a short-circuit by a high inductance of a time change rate (di / dt) detection circuit of a main current without increasing an inductance of the main current.SOLUTION: A semiconductor device 20 comprises: a gate; an upper arm switching element 31 that includes a first main electrode (a corrector or a drain) and a second main electrode (an emitter or a source) as a gate reference potential; a positive electrode terminal 100 that is electrically connected to the first main electrode; a first auxiliary terminal (an upper arm emittance terminal 112) that is electrically connected to the second main electrode, and that is an external electrode in which the main current does not flow while allowing a detection of a potential of the second main electrode; and a second auxiliary terminal (an upper arm overcurrent detection terminal 113) that is electrically connected to an AC terminal (an output terminal 103), and is as an external electrode in which the main current does not flow while being coupled to a magnetic flux so as to be proximately arranged to the positive electrode terminal.SELECTED DRAWING: Figure 1B

Description

Technical Field

[0001] The present invention relates to the structure of a semiconductor device, and particularly to a technology effective when applied to a power module that controls a large current used for motor drive of an electric vehicle or an electric train, etc.

Background Art

[0002] In recent years, inverter devices have been widely used in various applications such as motor drive of electric vehicles and electric trains, household air conditioners and refrigerators, industrial pumps, elevators, etc., and further higher output power density is required.

[0003] For increasing the output power density of an inverter device, miniaturization and weight reduction of the inverter device are effective, and there is a strong demand for miniaturization of the power module mounted on the inverter device.

[0004] An inverter device has a function of converting DC power supplied from a DC power source into AC power for supplying to an AC electric load such as a rotating electric machine, or a function of converting AC power generated by a rotating electric machine into DC power for supplying to a DC power source. Therefore, it is also called a "power conversion device". Hereinafter, it will be described uniformly as a "power conversion device".

[0005] A power module used in a power conversion device is generally configured by joining an insulating substrate having a wiring pattern on a heat dissipation base with solder or the like, and mounting a power semiconductor element on the wiring pattern of the insulating substrate with solder or the like. The power semiconductor element has electrodes on the front and back surfaces, the back surface electrode is connected to the wiring pattern on the insulating substrate, and the front surface electrode is connected to the wiring pattern on the insulating substrate via a wire or the like.

[0006] In a power module for high power such as for an electric train, a plurality of power semiconductor elements are mounted on an insulating substrate, and further a plurality of such insulating substrates are mounted to enable handling of a large current.

[0007] Power semiconductor elements mounted on an insulating substrate include switching elements such as MOSFETs (Metal-Oxide-Semiconductor field-effect transistors), IGBTs (Insulated Gate Bipolar Transistors), and freewheeling diodes.

[0008] In a power converter, IGBTs (Integrated Backflow Testers) and freewheel diodes (ROIs) are connected in parallel, and two of these are connected in series to a DC power supply. The IGBT and ROI connected to the positive terminal of the DC power supply are called the upper arm, and the IGBT and ROI connected to the negative terminal of the DC power supply are called the lower arm. The terminals drawn out from the connection point between the upper arm IGBT and the lower arm IGBT are called output terminals.

[0009] By having the IGBTs in the upper and lower arms alternately switch ON and OFF, it is possible to extract AC power from the output terminals. By connecting multiple inverter circuits equipped with IGBTs and diodes in the upper and lower arms in parallel, it is possible to convert power from DC power to AC power, or from AC power to DC power, with a larger output power.

[0010] A power semiconductor device has a drain electrode (in the case of a unipolar transistor), a collector electrode (in the case of a bipolar transistor), and a cathode electrode (in the case of a freewheeling diode) on its back surface, through which the main current flows; a gate electrode on its front surface through which the control current flows; and a source electrode (in the case of a unipolar transistor), an emitter electrode (in the case of a bipolar transistor), and an anode electrode (in the case of a freewheeling diode) on its front surface, through which the main current flows.

[0011] Traditionally, the back electrode was joined to the circuit board with lead solder or lead-free solder. The front electrode used aluminum-based materials, and aluminum-based wires or copper-based leads were joined to the front electrode for wiring.

[0012] For example, power modules used to drive electric vehicle motors have a voltage rating of 600V or higher and a current capacity of 300A or higher. In the case of electric railways, the voltage rating is 3.3kV or higher and the current capacity is 1200A or higher. To handle these large currents, it is necessary to pass several hundred amperes of current through each power semiconductor chip. For this reason, it is usually necessary to ultrasonically bond multiple thick wires, approximately 300μm to 550μm in diameter, onto the surface electrodes, or to join copper leads using solder or other methods.

[0013] In recent years, solder has been replaced by sintered metals, which offer superior heat resistance and long lifespan, and copper wires, which have better heat resistance than aluminum. However, the demand for increased current capacity in power modules is constantly growing, and the current flowing per chip is increasing. This leads to increased heat generation, exposing the junctions around the chips to greater temperature fluctuations and increasing the risk of failure. Therefore, detecting abnormalities in power modules and addressing them before they fail has become a crucial issue.

[0014] As background technology for this field, for example, there is technology such as that described in Patent Document 1. Patent Document 1 discloses a means for detecting the voltage generated in the wiring inductance component connected to the terminal with the lower potential of the main terminal pair mounted on a power module. In Patent Document 1, false detection of abnormal conditions such as overcurrent is prevented by using the voltage generated in the detection inductance and the gate voltage when an abnormal short circuit occurs in an IGBT element.

[0015] Furthermore, Patent Document 2 discloses a semiconductor device that includes a control unit configured to detect a potential difference between predetermined terminals in at least one emitter wiring of a plurality of arms constituting a power module, based on the values ​​of parasitic resistance and parasitic inductance components parasitic to the emitter wiring between the terminals, and to independently perform short-circuit detection and overcurrent detection of a switching element using the detected potential difference. [Prior art documents] [Patent Documents]

[0016] [Patent Document 1] Japanese Patent Publication No. 2007-259533 [Patent Document 2] Japanese Patent Publication No. 2017-92789 [Overview of the project] [Problems that the invention aims to solve]

[0017] Incidentally, due to the demand for miniaturization of power modules, 2-in-1 power modules with upper and lower arms mounted in the same package are becoming mainstream. On the other hand, the drive circuit that controls the power converter has an independent configuration for the upper and lower arms from an isolation standpoint. For example, if one of the upper or lower arms fails and a short-circuit current flows, and the gate of the other arm turns ON, a short-circuit current flows between the upper and lower arms, and the fault can be detected by the potential difference generated by the parasitic inductance of the emitter wiring provided in one of the upper or lower arms.

[0018] However, in the case of a load short circuit rather than an upper and lower arm short circuit, for example, if detection is possible only on the lower arm by the emitter wiring inductance as described in Patent Document 1 above, then protection will not be possible at the moment the upper arm is turned ON.

[0019] Furthermore, as described in Patent Document 2 above, when the upper and lower arms are each equipped with short-circuit detection circuits using emitter wiring inductance, the wiring connecting the upper and lower arms is generally very short, and the value of the emitter wiring inductance of the upper arm tends to be small. When the emitter wiring inductance of the upper arm is small, the potential difference generated during an abnormal short circuit is small, which has the disadvantage of not being able to obtain sufficient detection sensitivity.

[0020] One possible approach is to extend the upper arm emitter wiring to increase the inductance that contributes to detection. However, this method would increase the main circuit inductance of the inverter device, creating a trade-off between the two.

[0021] Therefore, an object of the present invention is to provide a semiconductor device having an inverter circuit composed of upper and lower arms, and a power conversion device using the same, which can improve the detection accuracy of short-circuit current by increasing the inductance of the main current time change rate (di / dt) detection circuit without increasing the inductance of the main circuit.

Means for Solving the Problems

[0022] In order to solve the above problems, the present invention includes an upper arm switching element having a gate, a first main electrode, and a second main electrode serving as a gate reference potential, a positive electrode terminal which is electrically connected to the first main electrode and through which a main current flows, a first auxiliary terminal which is electrically connected to the second main electrode, can detect the potential of the second main electrode, and through which no main current flows, and a second auxiliary terminal which is electrically connected to an AC terminal, is disposed close to the positive electrode terminal, and through which no main current flowing through magnetic field coupling flows. The wiring of the second auxiliary terminal is in a coil shape. It is characterized by the above. Furthermore, the present invention comprises an upper arm switching element having a gate, a first main electrode, and a second main electrode that serves as the gate reference potential; a positive electrode terminal which is an external electrode through which a main current flows, electrically connected to the first main electrode; a first auxiliary terminal which is an external electrode through which a main current flows, electrically connected to the second main electrode, and through which the potential of the second main electrode can be detected and through which no main current flows; and a second auxiliary terminal which is an external electrode through which a main current flows, electrically connected to an AC terminal, positioned in close proximity to the positive electrode terminal and magnetically coupled, wherein the wiring of the positive electrode terminal and the wiring of the second auxiliary terminal are arranged in a laminate structure in which flat plates are arranged to overlap with a gap between them.

Advantages of the Invention

[0023] According to the present invention, in a semiconductor device having an inverter circuit composed of upper and lower arms, it is possible to realize a semiconductor device and a power conversion device using the same, which can improve the detection accuracy of short-circuit current by increasing the inductance of the main current time change rate (di / dt) detection circuit without increasing the inductance of the main circuit.

[0024] Thereby, the reliability of the semiconductor device and the power conversion device using the same can be improved.

[0025] Problems, configurations, and effects other than those described above will be clarified by the description of the following embodiments.

Brief Description of the Drawings

[0026] [Figure 1A] It is an internal circuit configuration diagram of a conventional semiconductor device. [Figure 1B]This is an internal circuit diagram of a semiconductor device according to Embodiment 1 of the present invention. [Figure 2A] This is a cross-sectional diagram of a conventional semiconductor device. [Figure 2B] This is a cross-sectional structure diagram of a semiconductor device according to Embodiment 1 of the present invention. [Figure 3] This diagram conceptually illustrates the short-circuit current detection principle according to the present invention. [Figure 4] This is a top view of a semiconductor device according to Embodiment 2 of the present invention. [Figure 5] This is a cross-sectional structure diagram of a semiconductor device according to Embodiment 3 of the present invention. [Figure 6] This is a cross-sectional structure diagram of a semiconductor device according to Embodiment 4 of the present invention. [Figure 7] This is a perspective view of a power module according to Embodiment 5 of the present invention. [Figure 8] This is a perspective view of a power module according to Embodiment 6 of the present invention. [Modes for carrying out the invention]

[0027] Embodiments of the present invention will be described below with reference to the drawings. In each drawing, identical components are denoted by the same reference numerals, and detailed descriptions of overlapping parts are omitted. [Examples]

[0028] A semiconductor device according to Embodiment 1 of the present invention will be described with reference to Figures 1A to 3. Figure 1A is an internal circuit diagram of a conventional semiconductor device 10 shown as a comparative example to make the configuration of the present invention easier to understand, and Figure 1B is an internal circuit diagram of the semiconductor device 20 of this embodiment. Figure 2A is a cross-sectional structure diagram of the conventional semiconductor device 10 corresponding to Figure 1A, and Figure 2B is a cross-sectional structure diagram of the semiconductor device 20 of this embodiment corresponding to Figure 1B. Figure 3 is a diagram conceptually showing the short-circuit current detection principle according to the present invention.

[0029] First, using Figures 1A and 1B, we will explain the basic circuit configuration common to both the conventional semiconductor device 10 and the semiconductor device 20 of this embodiment.

[0030] As shown in Figures 1A and 1B, the conventional semiconductor device 10 and the semiconductor device 20 of this embodiment are both semiconductor devices with a 2-in-1 configuration of upper and lower arms, comprising, as a main component, an upper arm switching element 31, an upper arm freewheeling element diode 32, a lower arm switching element 33, and a lower arm freewheeling element diode 34. IGBTs or MOSFETs are used for the upper arm switching element 31 and the lower arm switching element 33.

[0031] The collector side (or drain side in the case of a MOSFET) of the switching element 31 and diode 32, which are connected in parallel by the upper arm, are connected to the positive terminal 100 via the first metal wiring 120, and their inductance component is indicated by the symbol L1.

[0032] The emitter side (source side in the case of a MOSFET) of the switching element 31 and diode 32 on the upper arm are connected to the collector side (drain side in the case of a MOSFET) of the switching element 33 and diode 34, which are connected in parallel on the lower arm via the second metal wiring 121, and their inductance component is indicated by the symbol L2w.

[0033] The emitter side (source side in the case of a MOSFET) of the switching element 33 and diode 34 of the lower arm are connected to the insulating substrate surface electrode 200 via a third metal wire 122, and the inductance component is denoted by the symbol L3w.

[0034] Furthermore, the insulating substrate surface electrode 200 and the negative electrode terminal 101 are connected by a fourth metal wiring 123, and its inductance component is indicated by the symbol L3.

[0035] The output terminal 103 and the upper arm overcurrent detection terminal 113 are independently connected to the connection point between the second metal wiring 121 and the lower arm switching element 33 and the collector side (drain side in the case of a MOSFET) of the diode 34.

[0036] An upper arm high-side sense terminal 110 is connected between the first metal wiring 120 and the positive terminal 100.

[0037] The gate of the upper arm switching element 31 is connected to the upper arm gate control signal terminal 111, and the emitter side of the upper arm switching element 31 is connected to the upper arm emitter sense terminal 112.

[0038] The lower arm gate control signal terminal 114 is connected to the gate of the lower arm switching element 33, and the lower arm emitter sense terminal 115 is connected to the emitter side of the lower arm switching element 33.

[0039] A lower arm overcurrent detection terminal 116 is connected between the fourth metal wiring 123 and the negative terminal 101.

[0040] As described above, the conventional semiconductor device 10 shown in Figure 1A and the semiconductor device 20 of this embodiment shown in Figure 1B have essentially the same basic configuration. However, the semiconductor device 20 of this embodiment is characterized by having a wiring inductance 130 (symbol Lts) between the upper arm overcurrent detection terminal 113 and the collector-side connection point of the lower arm of the second metal wiring 121, and furthermore, the wiring inductance 130 and the first metal wiring 120 are magnetically coupled 140 (the coupling coefficient is denoted by the symbol K).

[0041] The basic cross-sectional structure common to the conventional semiconductor device 10 and the semiconductor device 20 of this embodiment will be explained using Figures 2A and 2B.

[0042] As shown in Figures 2A and 2B, in both the conventional semiconductor device 10 and the semiconductor device 20 of this embodiment, the switching element 31 of the upper arm and the switching element 33 of the lower arm are each mounted on separate insulating substrate surface electrodes 200. Although not shown, the diode 32, which is the freewheeling element of the upper arm, and the diode 34, which is the freewheeling element of the lower arm, are similarly mounted on separate insulating substrate surface electrodes 200.

[0043] The insulating substrate surface electrodes 200 are all arranged on the surface of a common insulating substrate 300, and furthermore, the insulating substrate 300 is bonded to the heat dissipation base plate 400.

[0044] The connection relationships of the positive terminal 100, negative terminal 101, output terminal 103, upper arm gate control signal terminal 111, upper arm emitter sense terminal 112, lower arm gate control signal terminal 114, lower arm emitter sense terminal 115, second metal wiring 121, third metal wiring 122, and fourth metal wiring 123 are as described above.

[0045] As described above, the conventional semiconductor device 10 shown in Figure 2A and the semiconductor device 20 of this embodiment shown in Figure 2B have substantially the same basic cross-sectional structure. However, the semiconductor device 20 of this embodiment is characterized in that the upper arm overcurrent detection terminal 113 is positioned close to the positive terminal 100, and there is a wiring inductance 130 (symbol Lts) between the upper arm overcurrent detection terminal 113 and the connection point on the collector side of the lower arm of the second metal wiring 121. Furthermore, the wiring inductance 130 and the first metal wiring 120 are magnetically coupled 140 (the coupling coefficient is indicated by the symbol K).

[0046] In addition, "proximity" in the above-mentioned "placed in close proximity" refers to a distance such that the inductance L1 of the first metal wiring 120 and the wiring inductance 130 (inductance Lts) interact with each other.

[0047] When the upper arm of the semiconductor device 20 is in normal operation (when the switching element 31 of the upper arm is ON and the switching element 33 of the lower arm is OFF), the main current Ic flows in from the positive terminal 100 and flows out from the output terminal 103 via the first metal wiring 120, the switching element 31 of the upper arm, and the second metal wiring 121.

[0048] During normal operation of the lower arm of the semiconductor device 20 (when the switching element 31 of the upper arm is OFF and the switching element 33 of the lower arm is ON), the main current Ic flows in from the output terminal 103 and flows out from the negative terminal 101 via the switching element 33 of the lower arm, the third metal wiring 122, and the fourth metal wiring 123.

[0049] On the other hand, in the event of an abnormal short circuit in the semiconductor device 20, if the switching element on either the upper or lower arm is destroyed for any reason, the short-circuit current Ic flows from the positive terminal 100 through the first metal wiring 120, the second metal wiring 121, the third metal wiring 122, and the fourth metal wiring 123 to the negative terminal 101 at the moment the paired arms are turned ON.

[0050] This short-circuit current Ic causes the switching element mounted on the semiconductor device 20 to overheat abnormally, leading to thermal runaway and eventual destruction. Therefore, it is generally necessary to detect the short-circuit current Ic immediately after it flows and protect the switching element by turning it OFF using a control circuit (not shown).

[0051] In the conventional semiconductor device 10 shown in Figure 1A, the wiring inductance L2w of the second metal wiring 121 is used in the upper arm to detect the short-circuit current Ic, and the sum of the wiring inductances L3w + L3 of the third metal wiring 122 and the fourth metal wiring 123 is used in the lower arm.

[0052] The detection principle for the short-circuit current Ic uses the potential difference V that occurs across the wiring inductance. The potential difference V can be expressed using the time rate of change of the short-circuit current Ic di / dt and the detection inductance Ls as V = Ls * di / dt.

[0053] Therefore, for the same time rate of change di / dt, the larger the detection inductance Ls, the greater the potential difference that can be obtained, and the higher the detection accuracy.

[0054] However, on the other hand, if the main circuit inductance component present in the path from the positive terminal 100 to the negative terminal 101 via the first metal wiring 120, the second metal wiring 121, the third metal wiring 122, and the fourth metal wiring 123 becomes large, the resulting potential difference V will become too large, exceeding the breakdown voltage of the switching element and potentially causing dielectric breakdown. Therefore, it is desirable for the main circuit inductance to be as small as possible.

[0055] In other words, there is a trade-off relationship between the detection accuracy of the short-circuit current Ic and the main circuit inductance. In the configuration of the conventional semiconductor device 10 shown in Figure 1A, it is not possible to simultaneously improve the detection accuracy of the short-circuit current Ic and reduce the main circuit inductance.

[0056] Therefore, in the semiconductor device 20 of this embodiment shown in Figure 1B, as described above, a wiring inductance 130 (symbol Lts) is connected between the upper arm overcurrent detection terminal 113, which is not located on the main circuit path, and the collector-side connection point of the lower arm of the second metal wiring 121. Furthermore, the wiring inductance 130 and the first metal wiring 120 are configured to be magnetically coupled 140 (the coupling coefficient is indicated by the symbol K).

[0057] The detection voltage Vs obtained by the conventional short-circuit current Ic detection method using the semiconductor device 10 shown in Figure 1A can be expressed by the following equation (1), whereas the detection voltage Vs obtained by the short-circuit current Ic detection method using the semiconductor device 20 of this embodiment shown in Figure 1B can be expressed by the following equation (2).

[0058] Furthermore, the main circuit inductance Lm of both semiconductor device 10 and semiconductor device 20 can be expressed as shown in equation (3) below.

[0059]

number

[0060]

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[0061]

number

[0062] From equation (1), the only way to improve detection sensitivity using the conventional method is to increase L2w, but if L2w is increased, the main circuit inductance Lm will increase according to equation (3).

[0063] On the other hand, in the method of the present invention, according to equation (2), it is possible to improve the detection sensitivity by increasing the wiring inductance Lts or the coupling coefficient K, which do not contribute to the increase in the main circuit inductance Lm.

[0064] The electromotive force during a short circuit is detected by the potential difference between the upper arm emitter sense terminal 112 and the upper arm overcurrent detection terminal 113.

[0065] Therefore, according to the method of the present invention, it is possible to achieve both improved detection sensitivity of short-circuit current Ic and suppression of the increase in main circuit inductance Lm.

[0066] There are prerequisites for achieving both improved detection sensitivity of the short-circuit current Ic and suppression of the increase in the main circuit inductance Lm. These prerequisites will be explained using Figure 3. Figure 3 is a conceptual diagram showing the detection principle of the short-circuit current Ic according to the present invention, and shows the electromotive force V1 excited on the main circuit side and the electromotive force V2 excited on the inductance Lts on the detection side when a short-circuit current Ic flows through the inductance L1 on the main circuit side.

[0067] In order to increase the electromotive force V2, which contributes to the detection sensitivity of the short-circuit current Ic, without increasing the electromotive force V1 on the main circuit side, the current Is flowing to the detection side must be zero or extremely small compared to the short-circuit current Ic on the main circuit side.

[0068] As shown in Figure 3, when Is=0, the electromotive force V1 on the main circuit side can be determined solely by L1. On the other hand, the electromotive force V2 on the detection side can be increased by the coupling coefficient K and the inductance Lts on the detection side.

[0069] Generally, the output impedance of the circuit configuration for detecting the electromotive force V2 on the detection side is extremely large, and the current Is flowing to the detection side is almost zero, so the configuration of the present invention shown in Figure 3 is valid.

[0070] As described above, the semiconductor device 20 of this embodiment includes an upper arm switching element 31 having a gate, a first main electrode (collector or drain), and a second main electrode (emitter or source) that is the gate reference potential, a positive electrode terminal 100 which is an external electrode through which a main current Ic flows, which is electrically connected to the first main electrode (collector or drain), a first auxiliary terminal (upper arm emitter sense terminal 112) which is an external electrode through which the potential of the second main electrode (emitter or source) can be detected and through which no main current Ic flows, which is electrically connected to the AC terminal (output terminal 103), is positioned close to the positive electrode terminal 100 and is magnetically coupled 140, and through which no main current Ic flows, which is an external electrode

[0071] Furthermore, the lower arm switching element 33 has a third main electrode (collector or drain) and a fourth main electrode (emitter or source) that becomes the gate reference potential, and a first wiring pattern 200 is electrically connected to the second main electrode (emitter or source), the third main electrode (collector or drain), and the AC terminal (output terminal 103), and a second auxiliary terminal (upper arm overcurrent detection terminal 113) is connected to the first wiring pattern 200.

[0072] According to the semiconductor device 20 of this embodiment, it is possible to realize a semiconductor device that can improve the detection accuracy of short-circuit current by increasing the inductance of the time rate of change (di / dt) detection circuit of the main current Ic without increasing the inductance of the main circuit.

[0073] This will improve the reliability of semiconductor devices and power conversion devices that use them. [Examples]

[0074] Referring to Figure 4, a semiconductor device according to Embodiment 2 of the present invention will be described. Figure 4 is a top view of the semiconductor device 20 of this embodiment.

[0075] As shown in Figure 4, the semiconductor device 20 of this embodiment has a second metal wiring 121 that connects the emitter side electrodes of the switching element 31 and diode 32 on the upper arm with the collector side electrodes of the switching element 33 and diode 34 on the lower arm, which is realized using multiple bonding wires.

[0076] Furthermore, the first metal wiring 120 connected to the positive terminal 100 (not shown) and the wiring inductance 130 are arranged in close proximity, forming a laminated structure in which the flat plates overlap with gaps between them in the direction of the paper plane. As a result, the wiring inductance L1 of the first metal wiring 120 and the inductance Lts of the wiring inductance 130 are magnetically coupled. [Examples]

[0077] Referring to Figure 5, the semiconductor device according to Embodiment 3 of the present invention will be described. Figure 5 is a cross-sectional view of the semiconductor device 20 of this embodiment, and corresponds to a modified example of Embodiment 1 (Figure 2B).

[0078] The semiconductor device 20 of this embodiment differs from the semiconductor device 20 of Embodiment 1 (Figure 2B) in that the wiring inductance 130 is in the shape of a coil.

[0079] As shown in Figure 5, the inductance Lts of the wiring inductance 130 can be increased by making the wiring inductance 130 coil-shaped, that is, by making the wiring of the second auxiliary terminal (upper arm overcurrent detection terminal 113) coil-shaped.

[0080] Furthermore, the coil-shaped wiring inductance 130 is positioned in close proximity to the first metal wiring 120, and the planar space created by the opening of the coil is orthogonal to the magnetic flux direction MFD formed when current flows in the current direction CD through the first metal wiring 120.

[0081] In other words, the magnetic field created by the current flowing through the first main electrode (collector or drain) is perpendicularly linked to the planar space of the coil's opening.

[0082] As a result, the first metal wiring 120 and the wiring inductance 130 are more tightly coupled in the magnetic field, the coupling coefficient K increases, and the detection sensitivity improves. [Examples]

[0083] Referring to Figure 6, a semiconductor device according to Embodiment 4 of the present invention will be described. Figure 6 is a cross-sectional view of the semiconductor device 20 of this embodiment, and corresponds to a modified example of Embodiment 3 (Figure 5).

[0084] In the semiconductor device 20 of this embodiment, the position of the coil of the wiring inductance 130 is different from that of the semiconductor device 20 of Embodiment 3 (Figure 5). This is because the wiring structure of the positive terminal 100 and the first metal wiring 120 in this embodiment (Figure 6) is different from that of Embodiment 3 (Figure 5).

[0085] In Figure 5, the direction CD of the current flowing through the first metal wiring 120 flows towards the right side of the page in Figure 5. In contrast, in this embodiment shown in Figure 6, the current flowing in from the positive terminal 100 first flows towards the back of the page in Figure 6, and then flows towards the right side of the page. When the current flows towards the right side of the page, the current path of the first metal wiring 120 becomes wider, and the current flows in a dispersed manner, so the magnetic flux is also dispersed.

[0086] On the other hand, the current path flowing directly behind the positive terminal 100 in the direction towards the back of the paper is narrow, and the magnetic flux density formed by this current is high. For this reason, the planar space of the coil opening of the wiring inductance 130 is positioned perpendicular to the magnetic flux direction MFD created by this current flowing towards the back of the paper.

[0087] In other words, the wiring of the positive terminal 100 has a narrow section through which the main current Ic flows in a first direction and a wide section through which the main current flows in a second direction perpendicular to the first direction, and the magnetic field created by the current flowing through the narrow section is perpendicularly linked to the planar space of the coil opening.

[0088] As a result, the wiring inductance 130 is placed in a space with high magnetic flux density, thus achieving higher detection sensitivity. [Examples]

[0089] Referring to Figure 7, a power module according to Embodiment 5 of the present invention will be described. Figure 7 is a perspective view of the power module of this embodiment, showing a power module equipped with the semiconductor device of the present invention.

[0090] The power module 20a of this embodiment, shown in Figure 7, has a semiconductor device 20, described in any of Examples 1 to 4, mounted inside, and the terminal portion of the semiconductor device 20 is exposed to the outside of the power module 20a, allowing it to make contact with the outside.

[0091] Furthermore, the power module 20a is covered with a resin case 410, which protects the internal circuitry of the semiconductor device 20 while maintaining insulation.

[0092] In the power module 20a of this embodiment, the upper arm overcurrent detection terminal 113 and the positive terminal 100 are located in close proximity inside the resin case 410, and the first metal wiring 120 and the wiring inductance 130 are magnetically coupled. [Examples]

[0093] Referring to Figure 8, a power module according to Embodiment 6 of the present invention will be described. Figure 8 is a perspective view of the power module of this embodiment, and corresponds to a modified example of Embodiment 5 (Figure 7).

[0094] The power module 20b of this embodiment, shown in Figure 8, is similar to Embodiment 5 (Figure 7) in that it houses the semiconductor device 20 described in any of Embodiments 1 to 4, with the terminals of the semiconductor device 20 exposed to the outside of the power module 20b, allowing for external contact. Similarly, it is covered with a resin case 410, which protects the internal circuitry of the semiconductor device 20 while maintaining insulation.

[0095] In the power module 20b of this embodiment, the upper arm overcurrent detection terminal 113 and the positive terminal 100 are located in close proximity inside the resin case 410, and the first metal wiring 120 and the wiring inductance 130 are magnetically coupled.

[0096] The power module 20b of this embodiment differs from the power module 20a of Embodiment 5 (Figure 7) in that it is provided with two positive terminals 100 and two negative terminals 101.

[0097] This configuration makes it possible to pass a larger current.

[0098] It should be noted that the present invention is not limited to the embodiments described above, and various modifications are included. For example, the embodiments described above are described in detail to make the present invention easier to understand, and are not necessarily limited to those having all the configurations described. Furthermore, it is possible to replace parts of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add configurations from other embodiments to the configuration of one embodiment. In addition, it is possible to add, delete, or replace parts of the configuration of each embodiment with other configurations. [Explanation of symbols]

[0099] 10,20… Semiconductor equipment 20a, 20b… Power Modules 31…Switching element of the upper arm 32... Upper arm freewheeling element (diode) 33…Switching element of the lower arm 34... Lower arm freewheeling element (diode) 100... Positive terminal 101...Negative terminal 103…Output terminal 110... Upper arm high-side sense terminal 111... Upper arm gate control signal terminal 112... Upper arm emitter sense terminal 113... Upper arm overcurrent detection terminal 114...Lower arm gate control signal terminal 115... Lower arm emitter sense terminal 116... Lower arm overcurrent detection terminal 120...First metal wiring 121...Second metal wiring 122...Third metal wiring 123...Fourth metal wire 130...Wiring inductance 140... Magnetic field coupling between the wiring inductance 130 and the first metal wiring 120. 200...Insulating substrate surface electrode 300...Insulating substrate 400… Heat dissipation base plate 410… Resin case CD...current direction MFD… Magnetic flux direction

Claims

1. An upper arm switching element having a gate, a first main electrode, and a second main electrode that serves as the gate reference potential, A positive electrode terminal, which is an external electrode electrically connected to the first main electrode and through which the main current flows, A first auxiliary terminal is an external electrode electrically connected to the second main electrode, capable of detecting the potential of the second main electrode, and through which the main current does not flow. It comprises a second auxiliary terminal, which is an external electrode electrically connected to the AC terminal and positioned close to the positive terminal, and is magnetically coupled, and through which the main current does not flow, A semiconductor device characterized in that the wiring of the second auxiliary terminal is in the shape of a coil.

2. In the semiconductor device described in claim 1, A lower arm switching element having a third main electrode and a fourth main electrode that serves as the gate reference potential, The device comprises a first wiring pattern electrically connected to the second main electrode, the third main electrode, and the AC terminal, A semiconductor device characterized in that the second auxiliary terminal is connected to the first wiring pattern.

3. In the semiconductor device described in claim 1, A semiconductor device characterized in that the magnetic field created by the current flowing through the first main electrode is perpendicularly linked to the planar space of the opening in the coil-shaped wiring.

4. In the semiconductor device described in claim 1, The wiring of the positive terminal has a narrow section through which the main current flows in the first direction, It has a wide portion through which the main current flows in a second direction perpendicular to the first direction, A semiconductor device characterized in that the magnetic field created by the current flowing through the narrow portion intersects perpendicularly with respect to the planar space of the opening of the coil-shaped wiring.

5. In the semiconductor device described in claim 2, A semiconductor device characterized in that the second main electrode and the third main electrode are connected via a bonding wire.

6. An upper arm switching element having a gate, a first main electrode, and a second main electrode that is the gate reference potential, A positive electrode terminal, which is an external electrode electrically connected to the first main electrode and through which the main current flows, A first auxiliary terminal is an external electrode electrically connected to the second main electrode, capable of detecting the potential of the second main electrode, and through which the main current does not flow. It comprises a second auxiliary terminal, which is an external electrode electrically connected to the AC terminal and positioned close to the positive terminal, and is magnetically coupled, and through which the main current does not flow, A semiconductor device characterized in that the wiring of the positive terminal and the wiring of the second auxiliary terminal are arranged in a laminate structure in which the flat plates are arranged to overlap with a gap between them.

7. In the semiconductor device described in claim 1, The semiconductor device is covered with a resin case. A semiconductor device characterized in that the positive terminal, the first auxiliary terminal, and the second auxiliary terminal are exposed to the outside of the resin case.

8. In the semiconductor device according to claim 7, The semiconductor device includes two sets of positive terminals and negative terminals paired with the positive terminals. A semiconductor device characterized in that both of the two sets of positive and negative terminals are exposed to the outside of the resin case.

9. A power conversion device using a semiconductor device according to any one of claims 1 to 8.

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