Capacitor array and method for connecting electronic capacitors to a carrier substrate

Abstract

To provide a capacitor array, and a method for connecting an electronic capacitor to a carrier substrate.SOLUTION: A capacitor array (1) includes an electronic capacitor (10) and a carrier substrate (3). The terminal contacts (12) of the electronic capacitor (10) are electrically and mechanically connected to corresponding contact regions (5) of the carrier substrate (3) through solder connection parts (15), respectively; a spacer (14) embedded in the tin solder (16) of each solder connection part (15) previously determines the width of an air-space (18) generated between the electronic capacitor (10) and the carrier substrate (3); the electronic capacitor is a multilayer ceramic capacitor; the width of the air-space generated by directly contacting the contact surface of the spacer corresponding to the contact surface of each terminal contact (12) of the ceramic capacitor is previously determined so as to attenuate and reduce vibration caused by the piezo-electric effect of the multilayer ceramic capacitor.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a capacitor array described in the preamble of independent claim 1. A method for connecting an electronic capacitor to a carrier substrate is also a subject of the present invention.

Background Art

[0002] From the prior art, multilayer ceramic capacitors (MLCCs) arranged on a carrier substrate or a printed circuit board and usable in various forms in an electric circuit or a control device are known. These ceramic capacitors may have drawbacks of the piezoelectric effect. That is, the length of the ceramic capacitor may mechanically change depending on the material characteristics and the applied alternating voltage. The resulting vibration may be directly coupled to the ambient air, or the carrier substrate or the printed circuit board, causing acoustic and micro-mechanical disturbances.

[0003] U.S. Patent No. 8,873,247 provides an electronic capacitor array of the art and a method of the art for connecting electronic capacitors to a carrier substrate. The capacitor array comprises electronic capacitors and a carrier substrate, wherein the terminal contacts of each electronic capacitor are electrically and mechanically connected to corresponding contact areas of the carrier substrate via solder connections. Each solder connection has a spacer embedded in the tin solder, which pre-determines the width of the gap between the electronic capacitor and the carrier substrate so that liquid resin can flow into the space between the electronic capacitor and the carrier substrate and harden during the encapsulation process. In the method for connecting electronic capacitors to a carrier substrate, the spacer is first attached to the carrier substrate. The spacer is manufactured from wire as a wire bump in a wire bonding machine and connected to the contact areas of the carrier substrate by bonding connections. Solder paste is then applied to the spacer and the contact areas of the carrier substrate. After applying the solder paste, the electronic capacitor is mounted to the carrier substrate. During the soldering process, a solder connection is created between the terminal contacts of the electronic capacitor and the corresponding contact area on the carrier substrate, and the spacer is completely embedded in the tin solder of the solder connection.

[0004] A power module comprising a power semiconductor device and a ceramic capacitor is known from German Patent Application Publication No. 10 2018 201 872. The power semiconductor device is electrically connected to a first carrier substrate and a second carrier substrate. The ceramic capacitor is connected to the first carrier substrate and the second carrier substrate so as to fill the gap between the first and second carrier substrates. Here, the first terminal contact of the ceramic capacitor is electrically connected to the first terminal contact of the first carrier substrate by a first solder joint. The second terminal contact of the ceramic capacitor is electrically connected to the second terminal contact of the second carrier substrate by a second solder joint. Furthermore, spacers are provided between the lower surface of the ceramic capacitor and the first carrier substrate, and between the lower surface of the ceramic capacitor and the second carrier substrate, respectively. These spacers are arranged parallel to each other in the vicinity of the first and second terminal contacts, respectively, and are located outside the solder joints. The spacers are formed, for example, as aluminum wires.

[0005] A method for connecting an electronic element to a carrier substrate is known from German Patent Application Publication No. 197 38 399. In this method, at least one flip chip provided with solder bumps for signal conduction is soldered to the contact surface of a carrier substrate at a reflow soldering station, and further solder bumps insulated from the signal conduction portion are provided as spacer elements between the carrier substrate and the element, and these spacer elements keep the element at a predetermined distance from the carrier substrate during reflow soldering. Here, solder paste necessary for manufacturing the solder bumps forming the spacer elements is applied directly to the carrier substrate, then the flip chip provided with the solder bumps for signal conduction is placed on the carrier substrate, the surface of the flip chip facing the carrier substrate faces the solder paste applied to the carrier substrate, and in the subsequent reflow soldering step the element is soldered to the carrier substrate. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] U.S. Patent No. 8,873,247 [Patent Document 2] German Patent Application Publication No. 10 2018 201 872 [Patent Document 3] German Patent Application Publication No. 19738399 [Overview of the project]

[0007] The advantage of a capacitor array having the features of independent claim 1 is that, instead of the multi-layer ceramic capacitors (MLCCs) being directly soldered to the carrier substrate or printed circuit board, spacers are introduced at the solder joints between the multi-layer ceramic capacitors and the carrier substrate, and the spacers pre-define a predetermined air gap between the multi-layer ceramic capacitors and the carrier substrate. This air gap defined by the solder joints and spacers can dampen and reduce mechanical vibrations that are coupled from the multi-layer ceramic capacitors to the carrier substrate or printed circuit board by the piezoelectric effect.

[0008] Embodiments of the present invention provide a capacitor array comprising an electronic capacitor and a carrier substrate, wherein the terminal contacts of each electronic capacitor are electrically and mechanically connected to corresponding contact areas of the carrier substrate via solder connections. Each solder connection has a spacer embedded in the tin solder, and this spacer predetermines the width of the gap between the electronic capacitor and the carrier substrate. Here, the electronic capacitor is a multilayer ceramic capacitor having a piezoelectric effect, and the contact surfaces of each terminal contact of the ceramic capacitor directly contact the contact surfaces of the corresponding spacers 14. The width of the resulting gap is predetermined so as to dampen and reduce vibrations caused by the piezoelectric effect of the multilayer ceramic capacitor.

[0009] This spacer eliminates the need for special terminal contacts in multilayer ceramic capacitors, thus allowing the continued use of low-cost, standard components. Furthermore, existing manufacturing equipment can be used for installing the spacers. The only additional costs are installation time and the material of the spacers.

[0010] Furthermore, a method is proposed for connecting an electronic capacitor to a carrier substrate, comprising the steps of: applying solder paste to a contact area of ​​the carrier substrate provided for the electrical contact of the electronic capacitor; attaching the electronic capacitor and a spacer to the carrier substrate, wherein the spacer pre-determines the width of the gap between the electronic capacitor and the carrier substrate; and generating a solder connection between the terminal contacts of the electronic capacitor and the corresponding contact area of ​​the carrier substrate by a soldering process, wherein the spacer is embedded in the tin solder of the solder connection. Here, first, solder paste is applied to the contact area of ​​the carrier substrate. After the application of the solder paste, the spacer is attached to the carrier substrate. After the attachment of the spacer, a multilayer ceramic capacitor having a piezoelectric effect is brought into contact with the spacer, and the contact surfaces of the multilayer ceramic capacitors each directly contact the corresponding contact surfaces of the spacer, and the thickness of the spacer is predetermined so that the gap between the multilayer ceramic capacitor and the carrier substrate dampens and reduces vibrations caused by the piezoelectric effect of the multilayer ceramic capacitor.

[0011] The means and variations described in the dependent claims allow for advantageous improvements to the method for connecting the capacitor array presented in independent claim 1 and the electronic capacitor presented in independent claim 5 to a carrier substrate.

[0012] Particularly advantageous is that each spacer can be surrounded by tin solder at the corresponding solder joint, except for the contact surface that abuts against the contact surface of the corresponding terminal contact of the multilayer ceramic capacitor. In other words, no tin solder is placed between the contact surface of the terminal contact of the multilayer ceramic capacitor and the contact surface of the spacer.

[0013] In an advantageous configuration of the capacitor array, the spacers may be made of a material having a melting point higher than that of the tin solder used. This allows the shape of the spacers to be maintained during the soldering process, and the solder paste, by capillary action, to fill the gap to the contact surface of the terminal contacts of the multilayer ceramic capacitor, thereby forming a desired solder connection between the contact surface of the terminal contacts of the multilayer ceramic capacitor and the contact area of ​​the carrier substrate or printed circuit board.

[0014] In a further advantageous form of the capacitor array, the spacers are made of a solderable material such as copper and can be soldered to the contact areas of the carrier substrate. Furthermore, the spacers can be tin-plated and / or coated with flux so that preferably the entire surface of the spacer forms electrical and mechanical contacts.

[0015] In a further advantageous form of the capacitor array, the spacers can be formed, for example, as solderable metal pieces or as solderable metal frames of a predetermined thickness. This allows for particularly easy installation of the spacers using existing conventional manufacturing equipment. Designing them as metal frames allows tin solder to rise through the surrounding openings, improving the electrical and mechanical connection between the contact area of ​​the carrier substrate and the contact surface of the corresponding terminal contacts of the multilayer ceramic capacitors.

[0016] In a further advantageous embodiment of the method according to the present invention, the soldering process may be a reflow soldering process. This allows the use of existing reflow soldering equipment.

[0017] In a further advantageous embodiment of the method according to the present invention, individual spacers can be surrounded by tin solder at the solder joint, except for the contact surface. In a further advantageous configuration of the method according to the present invention, the dimensions of the contact area of ​​the carrier substrate and the amount of solder paste applied can be adjusted to a desired gap width. This makes it possible to achieve various gap widths between the multilayer ceramic capacitor and the carrier substrate or printed circuit board.

[0018] Exemplary embodiments of the present invention are shown in the drawings and described in more detail below. In the drawings, the same reference numerals indicate components or elements that perform the same or similar functions. [Brief explanation of the drawing]

[0019] [Figure 1] This is a schematic cross-sectional view of an exemplary embodiment of the capacitor array according to the present invention. [Figure 2] This is a schematic flowchart of an exemplary embodiment of the method according to the present invention for connecting an electronic capacitor to a carrier substrate. [Figure 3] Figure 1 is a schematic cross-sectional view of the capacitor array according to the present invention before the soldering process. [Modes for carrying out the invention]

[0020] As can be seen from Figures 1 and 2, the illustrated exemplary embodiment of the capacitor array 1 according to the present invention comprises an electronic capacitor 10 and a carrier substrate 3. The terminal contacts 12 of the electronic capacitor 10 are electrically and mechanically connected to the corresponding contact areas 5 of the carrier substrate 3 via solder joints 15, and spacers 14 are embedded in the tin solder 16 of each solder joint 15, with the spacers 14 predetermining the width of the gap 18 that is created between the electronic capacitor 10 and the carrier substrate 3. Here, the electronic capacitor 10 is a multilayer ceramic capacitor 10A having a piezoelectric effect, and the contact surfaces 12.1 of each terminal contact 12 of the ceramic capacitor 10A directly contact the contact surfaces 14.1 of the corresponding spacers 14. The width of the resulting gap 18 is predetermined so that vibrations caused by the piezoelectric effect of the multilayer ceramic capacitor 10A are attenuated and reduced.

[0021] As can be further seen from FIGS. 1 and 2, the multilayer ceramic capacitor 10A has terminal contacts 12 each having a contact surface 12.1, and each contact surface 12.1 faces a corresponding contact area 5 formed as a contact surface 5A of the carrier substrate 3. In the illustrated exemplary embodiment, the carrier substrate is formed as a printed circuit board (PCB: Printed Circuit Board).

[0022] As can be further seen from FIG. 1, each individual spacer 14 is surrounded by the tin solder 16 of the corresponding solder connection portion 15 except for the contact surface 14.1 that abuts against the contact surface 12.1 of the corresponding terminal contact 12 of the multilayer ceramic capacitor 10. Each spacer 14 is made of a material having a melting point higher than the melting point of the tin solder 16 used. In the illustrated exemplary embodiment, each spacer 14 is formed as a solderable metal piece 14A having a predetermined thickness, and is soldered to the contact area 5 of the carrier substrate 3, whereby the tin solder 16 is disposed between the spacer 14 and the contact area 5 of the carrier substrate 3, and this tin solder 16 electrically and mechanically connects the spacer 14 to the contact area 5. In the illustrated exemplary embodiment, the metal piece 14A has a basic shape of a rectangle with rounded corners. Alternatively, the metal piece 14A can have a circular shape. Of course, the spacer 14 can also be manufactured from another solderable material such as aluminum, silver, and gold, or can be provided with an appropriate surface coating. Further, in order to improve the soldering process, the spacer 14 can be tin-plated, and / or can be coated with a flux that improves the wettability of the tin solder. In an alternative exemplary embodiment not shown, the spacer 14 is formed as a metal frame having a predetermined thickness.

[0023] As can be further seen from FIG. 2, in the illustrated exemplary embodiment, a method 100 for connecting the electronic capacitor 10 to the carrier substrate 3 includes a step S100 of applying a solder paste 17 to a contact area 5 of the carrier substrate 3 provided for electrically contacting the electronic capacitor 10. After the application of the solder paste 17, in step S110, the spacer 14 is brought into contact with the solder paste 17 and slightly pressed in, whereby the spacer 14 is attached to the carrier substrate 3. The spacer 14 predetermines the width of a gap 18 formed between the electronic capacitor 10 and the carrier substrate 3. After the attachment of the spacer 14, in step S120, a multilayer ceramic capacitor 10A having a piezoelectric effect is brought into contact with the spacer 14, and contact surfaces 12.1 of terminal contacts 12 of the multilayer ceramic capacitor 10A directly contact corresponding contact surfaces 14.1 of the spacer 14, respectively. In step S130, in the soldering process, a solder connection 15 is generated between the terminal contacts .........

[0024] During the soldering process, the spacer 14 maintains its shape due to its high melting point, and the solder paste 17 or the liquid tin solder 16 fills the gap between the contact surface 5A of the carrier substrate 3 and the contact surface 12.1 of the terminal contact 12 of the multilayer ceramic capacitor 10A by capillary action. Thus, in the hardened state of the solder connection 15, the spacer 14 is surrounded by the tin solder 16 of the solder connection 15 except for its contact surface......... [[ID=**6]]

[0025] Note: The text seems to be incomplete at the end of step S130 in the translation of . Please check and provide the complete text if needed for a more accurate translation.If the distance or gap 18 between the multilayer ceramic capacitor 10A and the carrier substrate 3 is increased, a larger amount of solder paste 17 can be applied over a wider contact area 5 of the carrier substrate 3, thereby allowing the solder joint 15 to fill the larger gap between the multilayer ceramic capacitor 10A and the carrier substrate 3. Therefore, the dimensions of the contact area 5 of the carrier substrate 3 and the amount of solder paste 17 applied can be adjusted to match the desired width of the gap 18. [Explanation of Symbols]

[0026] 1 Capacitor Array 3 Carrier board 5 Contact area 10 Electronic Capacitors 10A Multilayer Ceramic Capacitor 12 terminal contacts 12.1 Contact surfaces 14 Spacers 14.1 Contact surfaces 15 Solder connection 16 Tin Solder 18 void

Claims

1. A method (100) for connecting an electronic capacitor (10) to a carrier substrate (3), The steps include applying solder paste (7) to the contact area (5) of the carrier substrate (3) provided for electrical contact of the electronic capacitor (10), A step of attaching the electronic capacitor (10) and spacer (14) to the carrier substrate (3), wherein the spacer (14) determines in advance the width of the gap (18) that will be created between the electronic capacitor (10) and the carrier substrate (3), The soldering process includes the step of creating a solder connection (15) between the terminal contact (12) of the electronic capacitor (10) and the corresponding contact region (5) of the carrier substrate (3), In method (100), the spacer (14) is embedded in the tin solder (16) of the solder connection portion (15), First, the solder paste (17) is applied to the contact area (5) of the carrier substrate (3). After the solder paste (17) is applied, the spacer (14) is attached to the carrier substrate (3). After the spacer (14) is installed, the piezoelectric multilayer ceramic capacitor (10A) is brought into contact with the spacer (14), and the contact surfaces (12.1) of the multilayer ceramic capacitor (10A) directly contact the corresponding contact surfaces (14.1) of the spacer (14). The thickness of the spacer (14) is predetermined such that the gap (18) between the multilayer ceramic capacitor (10A) and the carrier substrate (3) dampens and reduces vibrations caused by the piezoelectric effect of the multilayer ceramic capacitor (10A). The method (100) is characterized in that the spacer (14) is surrounded by the tin solder (16) of the solder connection portion (15), except for the contact surface (14.1).

2. The method according to claim 1 (100), characterized in that the soldering process is a reflow soldering process.

3. The method according to 1 or 2 (100), characterized in that the dimensions of the contact area (5) of the carrier substrate (3) and the amount of solder paste (17) applied are adjusted to match a desired width of the gap (18).

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