Silicon carbide substrate, silicon carbide epitaxial substrate and method for producing silicon carbide semiconductor device

Abstract

A silicon carbide substrate according to the present invention has a first main surface and a second main surface that is on the reverse side of the first main surface. First voids are present in the first main surface. The surface density of the first voids is less than 0.9 void per cm2. When viewed in a direction that is perpendicular to the first main surface, the widths of the first voids are 10 μm to 100 μm. When viewed in a direction that is parallel to the first main surface, the widths of the first voids become wider from the first main surface toward the second main surface. When viewed in a direction that is parallel to the first main surface, the depths of the first voids are smaller than the thickness of the silicon carbide substrate. The first main surface is a carbon surface or a surface that is inclined to the carbon surface at an off angle of 8° or less.

Description

Silicon carbide substrate, silicon carbide epitaxial substrate, and method for manufacturing silicon carbide semiconductor device

[0001] The present disclosure relates to a silicon carbide substrate, a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device. This application claims priority to Japanese Patent Application No. 2022-090216, filed on June 2, 2022. The entire contents of this Japanese patent application are incorporated herein by reference.

[0002] Japanese Patent Publication No. 2010-514648 (Patent Document 1) describes a method for producing silicon carbide crystal.

[0003] Special Publication No. 2010-514648

[0004] A silicon carbide substrate according to the present disclosure includes a first main surface and a second main surface opposite to the first main surface. First voids are present in the first main surface. The areal density of the first voids is 0.9 voids / cm. 2 The width of the first voids, as viewed in a direction perpendicular to the first main surface, is 10 μm or more and 100 μm or less. The width of the first voids, as viewed in a direction parallel to the first main surface, increases from the first main surface toward the second main surface. The depth of the first voids, as viewed in a direction parallel to the first main surface, is smaller than the thickness of the silicon carbide substrate. The first main surface is a carbon surface or a surface inclined at an off-angle of 8° or less with respect to the carbon surface.

[0005] FIG. 1 is a schematic plan view showing the configuration of a silicon carbide substrate according to this embodiment. FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. 1. FIG. 3 is an enlarged plan view of region III in FIG. 1. FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 3. FIG. 5A is an enlarged schematic cross-sectional view of region VA in FIG. 4. FIG. 5B is an enlarged schematic cross-sectional view of region VB in FIG. 4. FIG. 6 is a perspective plan view showing the configuration of the first rectangular parallelepiped region. FIG. 7 is a perspective plan view showing the configuration of the second rectangular parallelepiped region. FIG. 8 is an enlarged schematic cross-sectional view of the second main surface. FIG. 9 is an enlarged schematic cross-sectional view of region IX in FIG. 4. FIG. 10 is a schematic plan view showing the first main surface divided into a plurality of square regions. FIG. 11A is a partial schematic cross-sectional view showing the configuration of a silicon carbide crystal manufacturing apparatus according to this embodiment. FIG. 11B is a schematic diagram showing the relationship between temperature and time in the step of firing the crucible and the graphite member placed in the crucible. FIG. 12 is a schematic cross-sectional view showing the step of placing a silicon carbide raw material and a seed substrate inside a crucible. FIG. 13 is a schematic cross-sectional view showing the step of growing a silicon carbide crystal. FIG. 14 is an enlarged schematic view showing the configuration of region XIV in FIG. 13. FIG. 15 is a flowchart generally showing a method for manufacturing a silicon carbide semiconductor device according to this embodiment. FIG. 16 is a schematic cross-sectional view showing the configuration of a silicon carbide epitaxial substrate according to this embodiment. FIG. 17 is a schematic cross-sectional view showing the step of forming a body region. FIG. 18 is a schematic cross-sectional view showing the step of forming a source region. FIG. 19 is a schematic cross-sectional view showing the step of forming a trench in the third main surface of the silicon carbide epitaxial layer. FIG. 20 is a schematic cross-sectional view showing the step of forming a gate insulating film. FIG. 21 is a schematic cross-sectional view showing the step of forming a gate electrode and an interlayer insulating film. FIG. 22 is a cross-sectional view schematically showing the configuration of a silicon carbide semiconductor device according to this embodiment.

[0006] [Problem to be Solved by the Present Disclosure] An object of the present disclosure is to provide a silicon carbide substrate, a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device that are capable of improving the yield of silicon carbide semiconductor devices. [Effects of the Present Disclosure] According to the present disclosure, it is possible to provide a silicon carbide substrate, a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device that are capable of improving the yield of silicon carbide semiconductor devices. [Description of Embodiments of the Present Disclosure] First, embodiments of the present disclosure will be listed and described.

[0007] (1) Silicon carbide substrate 100 according to the present disclosure includes first main surface 1 and second main surface 2 opposite to first main surface 1. First voids 10 are present in first main surface 1. The surface density of first voids 10 is 0.9 voids / cm 2 When viewed in a direction perpendicular to first main surface 1, first void 10 has a width of 10 μm or more and 100 μm or less. When viewed in a direction parallel to first main surface 1, first void 10 has a width that increases from first main surface 1 toward second main surface 2. When viewed in a direction parallel to first main surface 1, first void 10 has a depth that is smaller than the thickness of silicon carbide substrate 100. First main surface 1 is a carbon surface or a surface inclined at an off angle θ of 8° or less with respect to the carbon surface.

[0008] (2) Silicon carbide substrate 100 according to the present disclosure includes first main surface 1 and second main surface 2 opposite to first main surface 1. First voids 10 are present in first main surface 1, and second voids 20 are present in second main surface 2. The surface density of second voids 20 is 0.9 voids / cm 2 When viewed in a direction perpendicular to first main surface 1, the width of each of first void 10 and second void 20 is not less than 10 μm and not more than 100 μm. When viewed in a direction parallel to first main surface 1, the width of each of first void 10 and second void 20 increases from first main surface 1 toward second main surface 2. When viewed in a direction parallel to first main surface 1, the depth of each of first void 10 and second void 20 is smaller than the thickness of silicon carbide substrate 100. Second main surface 2 is a silicon surface or a surface inclined at an off-angle θ of 8° or less with respect to the silicon surface.

[0009] (3) According to silicon carbide substrate 100 according to (1) or (2) above, when first main surface 1 is divided into a plurality of square regions 30, each having a side length of 5 mm, the plurality of square regions 30 has an areal density of threading screw dislocations 4 of 3000 / cm. 2 and the first region 31 in which the areal density of threading screw dislocations 4 is 1000 / cm 2 More than 3000 pieces / cm 2 and a second region 32 in which the surface density of threading screw dislocations 4 is less than 1000 / cm 2 The ratio of the area of ​​the first region 31 to the total area of ​​the first region 31, the second region 32, and the third region 33 may be 1% or more and 10% or less.

[0010] (4) According to silicon carbide substrate 100 according to (3) above, the ratio of the area of ​​first region 31 to the total area of ​​first region 31 , second region 32 and third region 33 may be 5% or more.

[0011] (5) According to silicon carbide substrate 100 according to any one of (1) to (4) above, the areal density of threading screw dislocations 4 on second main surface 2 is 1500 / cm 2 It may be the following:

[0012] (6) According to the silicon carbide substrate 100 according to any one of (1) to (5) above, the first rectangular parallelepiped region 61 of the silicon carbide substrate 100 may have 10 to 20 first carbon inclusions 71 present. In a direction perpendicular to the first main surface 1, the distance from the first main surface 1 to the upper end face of the first rectangular parallelepiped region 61 may be 50 μm, and the distance from the first main surface 1 to the lower end face of the first rectangular parallelepiped region 61 may be 200 μm. When viewed in a direction perpendicular to the first main surface 1, the length of the long side of the first rectangular parallelepiped region 61 may be 0.82 mm, and the length of the short side of the first rectangular parallelepiped region 61 may be 0.7 mm. When viewed in a direction perpendicular to the first main surface 1, the first void 10 may overlap the first rectangular parallelepiped region 61. The maximum length of the first carbon inclusion 71 as viewed in a direction perpendicular to the first main surface 1 may be 5 μm or more and 50 μm or less.

[0013] (7) According to the silicon carbide substrate 100 according to any one of (1) to (6) above, the second rectangular parallelepiped region 62 of the silicon carbide substrate 100 may have three or more and fewer than ten second carbon inclusions 72. In a direction perpendicular to the first main surface 1, the distance from the first main surface 1 to the upper end face of the second rectangular parallelepiped region 62 may be 50 μm, and the distance from the first main surface 1 to the lower end face of the second rectangular parallelepiped region 62 may be 200 μm. As viewed in a direction perpendicular to the first main surface 1, the length of the long side of the second rectangular parallelepiped region 62 may be 0.82 mm, and the length of the short side of the second rectangular parallelepiped region 62 may be 0.7 mm. As viewed in a direction perpendicular to the first main surface 1, the areal density of threading screw dislocations 4 in a region of the first main surface 1 overlapping with the second rectangular parallelepiped region 62 may be 3000 / cm. 2 The maximum length of the second carbon inclusions 72 as viewed in a direction perpendicular to the first main surface 1 may be 5 μm or more and 50 μm or less.

[0014] (8) According to silicon carbide substrate 100 according to any one of (1) to (7) above, first main surface 1 may have a diameter of 150 mm or more.

[0015] (9) According to silicon carbide substrate 100 according to any one of (1) to (8) above, first main surface 1 may be a surface inclined at an off angle θ of 1° or more and 4° or less with respect to the carbon surface.

[0016] (10) A silicon carbide epitaxial substrate 200 according to the present disclosure includes a silicon carbide substrate 100 according to any one of (1) to (9) above, and a silicon carbide epitaxial layer 60 provided on the silicon carbide substrate 100.

[0017] (11) A method for manufacturing silicon carbide semiconductor device 400 according to the present disclosure includes the following steps. Silicon carbide epitaxial substrate 200 described in (10) above is prepared. Silicon carbide epitaxial substrate 200 is processed. [Details of Embodiments of the Present Disclosure] Details of embodiments of the present disclosure will now be described with reference to the drawings. Note that identical or corresponding parts in the following drawings are designated by the same reference numerals, and descriptions thereof will not be repeated. In the crystallographic descriptions in this specification, individual orientations are indicated by [ ], collective orientations by < >, individual planes by ( ), and collective planes by {}. Furthermore, for negative indices, in crystallography, a "-" (bar) is placed before the number, but in this specification, a negative sign is placed before the number.

[0018] First, a description will be given of the configuration of silicon carbide substrate 100 according to this embodiment. Fig. 1 is a plan view schematically showing the configuration of silicon carbide substrate 100 according to this embodiment.

[0019] As shown in FIG. 1 , silicon carbide substrate 100 according to this embodiment has a first main surface 1 and an outer peripheral side surface 9. First main surface 1 extends along each of a first direction 101 and a second direction 102. First direction 101 is not particularly limited, but is, for example, the <11-20> direction. Second direction 102 is not particularly limited, but is, for example, the <1-100> direction. The off-direction is, for example, first direction 101. Silicon carbide substrate 100 is made of, for example, hexagonal silicon carbide. The polytype of hexagonal silicon carbide is, for example, 4H. Silicon carbide substrate 100 contains an n-type impurity such as nitrogen.

[0020] The first main surface 1 is a carbon plane or a plane tilted in the off direction with respect to the carbon plane. In other words, the first main surface 1 is a (000-1) plane or a plane tilted in the off direction with respect to the (000-1) plane. Similarly, the second main surface 2 (see FIG. 2) is a silicon plane or a plane tilted in the off direction with respect to the silicon plane. In other words, the second main surface 2 is a (0001) plane or a plane tilted in the off direction with respect to the (0001) plane.

[0021] As shown in Fig. 1, the outer peripheral side surface 9 has an orientation flat portion 7 and an arc-shaped portion 8. The arc-shaped portion 8 is continuous with the orientation flat portion 7. As shown in Fig. 1, when viewed from a direction perpendicular to the first main surface 1, the orientation flat portion 7 extends along a first direction 101.

[0022] The diameter W1 of the first main surface 1 is, for example, 150 mm. The diameter W1 may be 150 mm or more, or may be 200 mm or more. The upper limit of the diameter W1 is not particularly limited, but may be, for example, 300 mm or less. When viewed in a direction perpendicular to the first main surface 1, the diameter W1 is the longest linear distance between two different points on the outer peripheral side surface 9.

[0023] Fig. 2 is a schematic cross-sectional view taken along line II-II in Fig. 1. The cross section shown in Fig. 2 is perpendicular to first main surface 1 and parallel to first direction 101. As shown in Fig. 2, silicon carbide substrate 100 according to this embodiment has second main surface 2. Second main surface 2 is on the opposite side to first main surface 1. Silicon carbide substrate 100 has a thickness E1 of not less than 300 µm and not more than 700 µm. Third direction 103 is a direction perpendicular to each of first direction 101 and second direction 102. The thickness direction of silicon carbide substrate 100 is the same as third direction 103.

[0024] When first main surface 1 is tilted in the off direction with respect to the carbon plane, the off angle θ of the plane tilted in the off direction with respect to the carbon plane may be 8° or less. The upper limit of the off angle θ is not particularly limited, but may be, for example, 6° or less, or 4° or less. The lower limit of the off angle θ is not particularly limited, but may be, for example, 1° or more, or 2° or more. The off direction of the plane tilted in the off direction with respect to the carbon plane is not particularly limited, but may be, for example, the <11-20> direction.

[0025] Fig. 3 is an enlarged plan view of region III in Fig. 1. As shown in Fig. 3, one or more first voids 10 are present in the first main surface 1. When viewed in a direction perpendicular to the first main surface 1, the shape of the opening of the first void 10 is, for example, a hexagon. The shape of the opening of the first void 10 is not particularly limited, and may be, for example, a circle, an ellipse, or a polygon other than a hexagon.

[0026] When viewed in a direction perpendicular to the first main surface 1, the width of the first void 10 (first width A1) is 10 μm or more and 100 μm or less. The width of the first void 10 is the maximum width between any two points at the opening of the first void 10. The width of the first void 10 may be, for example, the width along the off-direction. The lower limit of the first width A1 is not particularly limited, but may be, for example, 20 μm or more, or 30 μm or more. The upper limit of the first width A1 is not particularly limited, but may be, for example, 80 μm or less, or 60 μm or less.

[0027] On the first main surface 1, the surface density of the first voids 10 is 0.9 / cm 2 The upper limit of the surface density of the first voids 10 is not particularly limited, but is, for example, 0.6 voids / cm 2 It may be 0.4 pieces / cm or less. 2 The lower limit of the surface density of the first voids 10 is not particularly limited, but may be, for example, 0.02 voids / cm 2 It may be 0.05 pieces / cm or more. 2 It may be 0.15 pieces / cm or more. 2 It may be more than that.

[0028] Fig. 4 is a schematic cross-sectional view taken along line IV-IV in Fig. 3. The cross section shown in Fig. 4 is perpendicular to the first main surface 1 and parallel to the first direction 101. As shown in Fig. 4, when viewed in a direction parallel to the first main surface 1, the width of the first void 10 increases from the first main surface 1 toward the second main surface 2.

[0029] 5A is an enlarged schematic cross-sectional view of region VA in FIG. 4. As shown in FIG. 5A, the first void 10 has a first opening 11, a first side surface 12, and a first bottom 13. The first opening 11 is located on the first main surface 1. The first bottom 13 is located between the first main surface 1 and the second main surface 2. The first side surface 12 is located between the first opening 11 and the first bottom 13. The first side surface 12 is continuous with each of the first opening 11 and the first bottom 13. When viewed in a direction parallel to the first main surface 1, the first side surface 12 may be linear.

[0030] 4 and 5A, the shape of the first void 10 is, for example, a trapezoid when viewed in a direction parallel to the first main surface 1. The upper base of the trapezoid is located at the first opening 11. The lower base of the trapezoid is located at the first bottom 13. When viewed in a direction parallel to the first main surface 1, the width of the first bottom 13 is greater than the width of the first opening 11.

[0031] When viewed in a direction parallel to first main surface 1, the depth (first depth B1) of first void 10 is smaller than the thickness of silicon carbide substrate 100. In other words, first void 10 does not penetrate silicon carbide substrate 100. First void 10 is exposed only to first main surface 1 and is not exposed to second main surface 2.

[0032] The first depth B1 may be equal to or greater than the width (first width A1) of the first void 10 on the first main surface 1. In other words, the first depth B1 may be the same as the first width A1 or may be greater than the first width A1. The upper limit of the first depth B1 is not particularly limited, but may be, for example, five times or less the width of the first bottom 13 of the first void 10, or three times or less the width of the first bottom 13 of the first void 10.

[0033] 5A , a carbon inclusion (first carbon inclusion 71) is present below first void 10. First carbon inclusion 71 may face first bottom 13 of first void 10. First carbon inclusion 71 is embedded in silicon carbide region 15 of silicon carbide substrate 100. In the thickness direction of silicon carbide substrate 100, the distance between first main surface 1 and first carbon inclusion 71 is, for example, not less than 50 μm and not more than 200 μm. From another perspective, first carbon inclusion 71 is present in first rectangular parallelepiped region 61 that is not less than 50 μm and not more than 200 μm away from first main surface 1 toward second main surface 2.

[0034] In a direction perpendicular to the first main surface 1, the distance from the first main surface 1 to the upper end surface of the first rectangular parallelepiped region 61 (first distance D11) is 50 μm. In a direction perpendicular to the first main surface 1, the distance from the first main surface 1 to the lower end surface of the first rectangular parallelepiped region 61 (second distance D12) is 200 μm. In a direction perpendicular to the first main surface 1, the distance from the lower end surface to the upper end surface of the first rectangular parallelepiped region 61 (third distance D13) is 150 μm.

[0035] 5B is an enlarged schematic cross-sectional view of region VB in FIG. 4. In a direction perpendicular to first main surface 1, the distance from first main surface 1 to the upper end surface of second rectangular parallelepiped region 62 (first distance D21) is 50 μm. In a direction perpendicular to first main surface 1, the distance from first main surface 1 to the lower end surface of second rectangular parallelepiped region 62 (second distance D22) is 200 μm. In a direction perpendicular to first main surface 1, the distance from the lower end surface to the upper end surface of second rectangular parallelepiped region 62 (third distance D23) is 150 μm.

[0036] 6 is a perspective plan view showing the configuration of the first rectangular parallelepiped region 61. As shown in FIG. 6, the shape of the first rectangular parallelepiped region 61 is rectangular when viewed in a direction perpendicular to the first main surface 1. The length of the long side of the first rectangular parallelepiped region 61 (first length L11) is 0.82 mm. The long side of the first rectangular parallelepiped region 61 is parallel to the first direction 101. The length of the short side of the first rectangular parallelepiped region 61 (second length L12) is 0.7 mm. The short side of the first rectangular parallelepiped region 61 is parallel to the second direction 102.

[0037] When viewed in a direction perpendicular to the first main surface 1, the first void 10 overlaps with the first rectangular parallelepiped region 61. When viewed in a direction perpendicular to the first main surface 1, the first rectangular parallelepiped region 61 is determined so that the center of the first void 10 coincides with the center of the first rectangular parallelepiped region 61. When viewed in a direction perpendicular to the first main surface 1, the maximum length F1 of the first carbon inclusion 71 is 5 μm or more and 50 μm or less.

[0038] 6 shows first carbon inclusions 71 present in the first rectangular parallelepiped region 61. As shown in FIG. 6, the first rectangular parallelepiped region 61 may have 10 to 20 first carbon inclusions 71 present. The lower limit of the number of first carbon inclusions 71 present in the first rectangular parallelepiped region 61 is not particularly limited, but may be, for example, 11 or more, or 12 or more. The upper limit of the number of first carbon inclusions 71 present in the first rectangular parallelepiped region 61 is not particularly limited, but may be, for example, 19 or less, or 18 or less.

[0039] 7 is a perspective plan view showing the configuration of the second rectangular parallelepiped region 62. As shown in FIG. 7, the shape of the second rectangular parallelepiped region 62 is rectangular when viewed in a direction perpendicular to the first main surface 1. The length of the long side of the second rectangular parallelepiped region 62 (first length L21) is 0.82 mm. The long side of the second rectangular parallelepiped region 62 is parallel to the first direction 101. The length of the short side of the second rectangular parallelepiped region 62 (second length L22) is 0.7 mm. The short side of the second rectangular parallelepiped region 62 is parallel to the second direction 102.

[0040] The second rectangular parallelepiped region 62 is a region that is 50 μm or more and 200 μm or less away from the first main surface 1 toward the second main surface 2. Above the second rectangular parallelepiped region 62, there is a region where threading screw dislocations 4 are concentrated. Specifically, when viewed in a direction perpendicular to the first main surface 1, the areal density of threading screw dislocations 4 in the region of the first main surface 1 that overlaps with the second rectangular parallelepiped region 62 is 3000 / cm. 2That is all. When viewed in a direction perpendicular to first main surface 1, second rectangular parallelepiped region 62 is determined so that the center of the region of first main surface 1 overlapping with second rectangular parallelepiped region 62 coincides with the center of first region 31, which will be described later. Second rectangular parallelepiped region 62 includes second carbon inclusions 72. Second carbon inclusions 72 are embedded in silicon carbide regions 15 of silicon carbide substrate 100. When viewed in a direction perpendicular to first main surface 1, second carbon inclusions 72 have a maximum length F2 of 5 μm or more and 50 μm or less.

[0041] 7 shows second carbon inclusions 72 present in the second rectangular parallelepiped region 62. As shown in FIG. 7, there are three or more and less than ten second carbon inclusions 72 present in the second rectangular parallelepiped region 62. The lower limit of the number of second carbon inclusions 72 present in the second rectangular parallelepiped region 62 is not particularly limited, but may be, for example, four or more, or five or more. The upper limit of the number of second carbon inclusions 72 present in the second rectangular parallelepiped region 62 is not particularly limited, but may be, for example, less than nine, or less than eight.

[0042] Fig. 8 is an enlarged schematic plan view of the second main surface 2. As shown in Fig. 8, one or more second voids 20 are present in the second main surface 2. When viewed in a direction perpendicular to the second main surface 2, the shape of the opening of the second void 20 is, for example, a hexagon. The shape of the opening of the second void 20 is not particularly limited, and may be, for example, a circle, an ellipse, or a polygon other than a hexagon.

[0043] When viewed in a direction perpendicular to the second main surface 2, the width of the second void 20 (second width A2) is 10 μm or more and 100 μm or less. The width of the second void 20 is the maximum width between any two points at the opening of the second void 20. The width of the second void 20 may be, for example, the width along the off-direction. The lower limit of the second width A2 is not particularly limited, but may be, for example, 20 μm or more, or 30 μm or more. The upper limit of the second width A2 is not particularly limited, but may be, for example, 80 μm or less, or 60 μm or less.

[0044] On the second main surface 2, the surface density of the second voids 20 is 0.9 / cm 2 The upper limit of the surface density of the second voids 20 is not particularly limited, but is, for example, 0.6 voids / cm 2 It may be 0.4 pieces / cm or less. 2 The lower limit of the surface density of the second voids 20 is not particularly limited, but may be, for example, 0.02 voids / cm 2 It may be 0.05 pieces / cm or more. 2 It may be 0.15 pieces / cm or more. 2 It may be more than that.

[0045] 9 is an enlarged schematic cross-sectional view of region IX in FIG. 4 . As shown in FIG. 9 , when viewed in a direction parallel to the first main surface 1, the width of the second void 20 increases from the first main surface 1 to the second main surface 2. The second void 20 has a second opening 21, a second side surface 22, and a second bottom 23. The second opening 21 is located on the second main surface 2. The second bottom 23 is located between the first main surface 1 and the second main surface 2. The second side surface 22 is located between the second opening 21 and the second bottom 23. The second side surface 22 is continuous with each of the second opening 21 and the second bottom 23. When viewed in a direction parallel to the second main surface 2, the second side surface 22 may be linear.

[0046] 4 and 9 , the shape of the second void 20 is, for example, a triangle when viewed in a direction parallel to the first main surface 1. The base of the triangle is located at the second opening 21. The apex of the triangle is located at the second bottom 23.

[0047] When viewed in a direction parallel to first main surface 1, second void 20 has a depth (second depth B2) smaller than the thickness of silicon carbide substrate 100. In other words, second void 20 does not penetrate silicon carbide substrate 100. Second void 20 is exposed only to second main surface 2, and is not exposed to first main surface 1.

[0048] The second depth B2 may be equal to or greater than the width (second width A2) of the second void 20 on the second main surface 2. In other words, the second depth B2 may be the same as the second width A2 or may be greater than the second width A2. The upper limit of the second depth B2 is not particularly limited, but may be, for example, five times or less the width of the second opening 21 of the second void 20, or three times or less the width of the second opening 21.

[0049] As shown in Fig. 4, third void 14 is formed in silicon carbide substrate 100. Third void 14 is located inside silicon carbide substrate 100. Third void 14 is closed inside silicon carbide substrate 100. From another perspective, third void 14 is not exposed to either first main surface 1 or second main surface 2. When viewed in a direction parallel to first main surface 1, the width of third void 14 increases from first main surface 1 toward second main surface 2. When viewed in a direction parallel to first main surface 1, the shape of third void 14 is, for example, triangular.

[0050] Next, a method for measuring the surface density of each of the first voids and the second voids will be described. The first voids 10 and the second voids 20 are identified using an optical microscope. A bottomed hole that opens to the first main surface 1, has a width of 10 μm or more and 100 μm or less when viewed in a direction perpendicular to the first main surface 1, and whose width increases from the first main surface 1 toward the second main surface 2 is identified as a first void 10. The surface density of the first voids 10 is determined by dividing the number of first voids 10 in a measurement region on the first main surface 1 by the area of ​​the measurement region on the first main surface 1. Note that the region on the first main surface 1 within 5 mm of the outer peripheral side surface 9 is considered outside the measurement region.

[0051] Similarly, a bottomed hole that opens to the second main surface 2, has a width of 10 μm or more and 100 μm or less when viewed in a direction perpendicular to the second main surface 2, and whose width increases from the first main surface 1 toward the second main surface 2 is identified as a second void 20. The value obtained by dividing the number of second voids 20 in the measurement region of the second main surface 2 by the area of ​​the measurement region of the second main surface 2 is defined as the areal density of the second voids 20. Note that the region of the second main surface 2 within 5 mm from the outer peripheral side surface 9 is considered to be outside the measurement region.

[0052] 10 is a schematic plan view showing the state in which the measurement area of ​​the first main surface 1, excluding the area within 5 mm from the outer peripheral side surface 9, is divided into a plurality of square areas 30. The length of one side of each of the plurality of square areas 30 is 5 mm. The first side of each of the plurality of square areas 30 is parallel to the first direction 101. The second side of each of the plurality of square areas 30 is parallel to the second direction 102. The second side is continuous with the first side.

[0053] As shown in FIG. 10 , as moving from bottom to top of the first main surface 1 along the second direction 102, the number of square regions 30 is, for example, 7, 13, 17, 19, 21, 23, 23, 25, 25, 26, 27, 27, 27, 27, 27, 27, 27, 26, 25, 25, 23, 23, 21, 19, 17, 13, and 7.

[0054] 10, the plurality of square regions 30 are composed of a first region 31, a second region 32, and a third region 33. The first region 31 has an areal density of threading screw dislocations 4 of 3000 / cm. 2 The second region 32 is a region where the areal density of threading screw dislocations 4 is 1000 / cm 2 More than 3000 pieces / cm 2 The third region 33 is a region where the areal density of threading screw dislocations 4 is less than 1000 / cm 2 It is an area where

[0055] The ratio of the area of ​​first region 31 to the total area of ​​first region 31, second region 32, and third region 33 may be, for example, 1% or more and 10% or less. The lower limit of the ratio of the area of ​​first region 31 to the total area of ​​first region 31, second region 32, and third region 33 is not particularly limited, but may be, for example, 3% or more, or 5% or more. The upper limit of the ratio of the area of ​​first region 31 to the total area of ​​first region 31, second region 32, and third region 33 is not particularly limited, but may be, for example, 9% or less, or 8% or less.

[0056] The areal density of threading screw dislocations 4 on the second main surface 2 is, for example, 1500 / cm 2The upper limit of the areal density of threading screw dislocations 4 on the second main surface 2 is not particularly limited, but is, for example, 1400 / cm 2 or less, or 1300 particles / cm 2 The lower limit of the areal density of threading screw dislocations 4 on the second main surface 2 is not particularly limited, but may be, for example, 500 / cm 2 It may be 900 or more, 2 It may be more than that.

[0057] Next, a method for measuring the areal density of threading screw dislocations will be described. The areal density of threading screw dislocations 4 is measured using, for example, molten potassium hydroxide (KOH). Specifically, the silicon carbide regions near threading screw dislocations 4 exposed on the second main surface 2 are etched by the molten KOH, thereby forming etch pits on the second main surface 2. The observation region for the etch pits is, for example, 0.82 mm × 0.70 mm. The observation regions are set at equal intervals in each of the first direction 101 and the second direction 102. The pitch of the observation regions is 5 mm. In the molten KOH, sodium peroxide (Na ２ O ２ ), barium peroxide (BaO ２ ) and sodium nitrate (NaNO ３ ) may be added.

[0058] The number of etch pits caused by threading screw dislocations 4 is measured in all observation regions. The value obtained by dividing the total number of etch pits in all observation regions by the total area of ​​the observation regions corresponds to the areal density of threading screw dislocations 4 on the second main surface 2. The temperature of the KOH melt is, for example, about 500°C or higher and 550°C or lower. The etching time is about 5 minutes or higher and 10 minutes or lower. After etching, the observation regions of the second main surface 2 are observed using a Nomarski differential interference contrast microscope.

[0059] Next, the configuration of a silicon carbide crystal manufacturing apparatus according to this embodiment will be described. Fig. 11A is a partial cross-sectional schematic diagram showing the configuration of a silicon carbide crystal manufacturing apparatus according to this embodiment. As shown in Fig. 11A, silicon carbide crystal manufacturing apparatus 300 mainly has crucible 130, first resistance heater 141, second resistance heater 142, and third resistance heater 143. Crucible 130 is made of graphite. Crucible 130 has raw material housing portion 132 and lid portion 131. Lid portion 131 is placed on raw material housing portion 132. A graphite member (not shown) is placed inside crucible 130.

[0060] First resistive heater 141 is disposed above lid portion 131. Second resistive heater 142 is disposed to surround the outer periphery of raw material containing portion 132. Third resistive heater 143 is disposed below the bottom surface of raw material containing portion 132. Crucible 130 is heated by applying power to first resistive heater 141, second resistive heater 142, and third resistive heater 143.

[0061] Next, a method for manufacturing silicon carbide substrate 100 according to this embodiment will be described. First, a step of firing the crucible and the graphite member placed therein is carried out. Specifically, the crucible and the graphite member placed therein are heated to a temperature of 3000°C in an argon gas atmosphere. The heating time of the crucible is, for example, 10 hours. The pressure of the argon gas is, for example, 10 kPa.

[0062] 11B is a schematic diagram showing the relationship between temperature and time in the process of firing the crucible and the graphite member placed in the crucible. In FIG. 11B, the vertical axis represents temperature and the horizontal axis represents time. As shown in FIG. 11B, in the first temperature-raising step, the temperature of the crucible 130 rises from a first temperature C1 to a second temperature C2 from a first time point T1 to a second time point T2. The first temperature C1 is, for example, 1100°C. The second temperature C2 is, for example, 2200°C.

[0063] Next, in the second temperature-raising step, the temperature of the crucible 130 rises from the second temperature C2 to the third temperature C3 from the second time point T2 to the third time point T3. The third temperature C3 is the highest temperature reached. The third temperature C3 is, for example, 3000°C. The temperature-raising rate in the first temperature-raising step is, for example, 100°C / hour. The temperature-raising rate in the second temperature-raising step is 20°C / hour or less. The temperature-raising rate in the second temperature-raising step is lower than the temperature-raising rate in the first temperature-raising step.

[0064] Next, a firing step is performed. From the third time T3 to the fourth time T4, the temperature of the crucible 130 is maintained at the third temperature C3. The time from the third time T3 to the fourth time T4 is the firing time. Next, a cooling step is performed. The crucible 130 is cooled from the fourth time T4. To prevent cracking of the components, the crucible 130 is slowly cooled until the temperature of the crucible 130 reaches the first temperature C1. The cooling rate of the crucible 130 is 20°C / hour or less.

[0065] In the first temperature increasing step, the second temperature increasing step, the firing step, and the cooling step, the pressure of the atmospheric gas in the crucible 130 is maintained at, for example, about 10 kPa. The atmospheric gas contains, for example, an inert gas such as argon gas or helium gas.

[0066] 12 is a cross-sectional view schematically illustrating a process of placing a silicon carbide source material and a seed substrate inside a crucible. As shown in FIG. 12 , silicon carbide source material 153 is placed in source material storage section 132. Silicon carbide source material 153 is, for example, polycrystalline silicon carbide powder. Seed substrate 150 is fixed to lid section 131 using, for example, an adhesive (not shown). Seed substrate 150 has growth surface 151 and attachment surface 152. Attachment surface 152 is located opposite growth surface 151. Growth surface 151 faces silicon carbide source material 153. Attachment surface 152 faces lid section 131. Growth surface 151 of seed substrate 150 is positioned so as to face the surface of silicon carbide source material 153.

[0067] Seed substrate 150 is, for example, a silicon carbide single crystal substrate having a polytype of 4H. Growth surface 151 has a diameter of, for example, 150 mm. Growth surface 151 may have a diameter of 150 mm or more. Growth surface 151 is, for example, a carbon surface or a surface inclined at an off-angle of approximately 8° or less relative to a carbon surface. As described above, seed substrate 150 and silicon carbide raw material 153 are prepared.

[0068] 13 is a cross-sectional schematic diagram showing the silicon carbide crystal growth process. First, the pressure inside crucible 130 is reduced while the temperature of growth surface 151 of seed substrate 150 is lower than the temperature of silicon carbide raw material 153. The pressure of the ambient gas inside crucible 130 is reduced to, for example, 1.0 kPa. As a result, silicon carbide raw material 153 begins to sublimate, and the sublimated silicon carbide gas recrystallizes on growth surface 151 of seed substrate 150. Silicon carbide crystal 110 begins to grow as a single crystal on growth surface 151 of seed substrate 150. While silicon carbide crystal 110 is growing, the pressure inside crucible 130 is maintained at, for example, approximately 0.1 kPa or more and 3 kPa or less.

[0069] As described above, silicon carbide crystal 110 is grown on seed substrate 150 by sublimating silicon carbide source material 153. In the step of growing silicon carbide crystal 110, the temperature of silicon carbide crystal 110 is, for example, 2100°C or higher and 2300°C or lower. The lower limit of the temperature of silicon carbide crystal 110 is not particularly limited, but may be, for example, 2125°C or higher, or 2150°C or higher. The upper limit of the temperature of silicon carbide crystal 110 is not particularly limited, but may be, for example, 2250°C or lower, or 2275°C or lower.

[0070] Figure 14 is an enlarged schematic diagram showing the configuration of region XIV in Figure 13. As shown in Figure 14, a plurality of third voids 14 are formed inside silicon carbide crystal 110. In a cross section parallel to the growth direction of silicon carbide crystal 110, the shape of each of the plurality of third voids 14 is, for example, triangular. The width of third void 14 in a direction perpendicular to the growth direction of silicon carbide crystal 110 narrows along the growth direction of silicon carbide crystal 110. From another perspective, the width of third void 14 in the direction perpendicular to the growth direction of silicon carbide crystal 110 narrows from seed substrate 150 toward silicon carbide raw material 153.

[0071] Next, silicon carbide crystal 110 is sliced. Specifically, for example, using a saw wire, silicon carbide crystal 110 is sliced ​​along a plane perpendicular to the central axis of silicon carbide crystal 110. This results in a plurality of silicon carbide substrates 100 (see FIG. 4 ). As shown in FIG. 4 , silicon carbide substrate 100 has a first main surface 1 and a second main surface 2. Of the plurality of third voids 14, the voids exposed on first main surface 1 are first voids 10. Of the plurality of third voids 14, the voids exposed on second main surface 2 are second voids 20.

[0072] <Method of Manufacturing Silicon Carbide Semiconductor Device> Next, a method of manufacturing silicon carbide semiconductor device 400 according to this embodiment will be described. Fig. 15 is a flowchart that schematically shows the method of manufacturing silicon carbide semiconductor device 400 according to this embodiment. As shown in Fig. 15, the method of manufacturing silicon carbide semiconductor device 400 according to this embodiment mainly includes a step (S1) of preparing silicon carbide epitaxial substrate 200 and a step (S2) of processing silicon carbide epitaxial substrate 200.

[0073] First, there is performed the step (S1) of preparing silicon carbide epitaxial substrate 200. In the step (S1) of preparing silicon carbide epitaxial substrate 200, first, silicon carbide substrate 100 according to the present embodiment is prepared (see FIG. 1 ).

[0074] Next, silicon carbide epitaxial layer 60 is formed on silicon carbide substrate 100. Specifically, silicon carbide epitaxial layer 60 is formed by epitaxial growth on first main surface 1 of silicon carbide substrate 100. In the epitaxial growth, for example, silane (SiH4) and propane (C3H8) are used as source gases, and hydrogen (H2) is used as a carrier gas. The temperature of the epitaxial growth is, for example, about 1400°C or higher and 1700°C or lower. In the epitaxial growth, an n-type impurity such as nitrogen is introduced into silicon carbide epitaxial layer 60. In this way, silicon carbide epitaxial substrate 200 according to this embodiment is prepared.

[0075] 16 is a cross-sectional view schematically illustrating the configuration of silicon carbide epitaxial substrate 200 according to this embodiment. For ease of explanation, first void 10, second void 20, third void 14, first carbon inclusion 71, and second carbon inclusion 72 are omitted from the figures following FIG.

[0076] 16 , silicon carbide epitaxial substrate 200 has silicon carbide substrate 100 and silicon carbide epitaxial layer 60. Silicon carbide epitaxial layer 60 is provided on silicon carbide substrate 100. Silicon carbide epitaxial layer 60 has a third main surface 3. Third main surface 3 constitutes the front surface of silicon carbide epitaxial substrate 200. Second main surface 2 constitutes the back surface of silicon carbide epitaxial substrate 200.

[0077] Silicon carbide epitaxial layer 60 may have a buffer layer 41 and a drift layer 42. Buffer layer 41 is in contact with silicon carbide substrate 100 at first main surface 1. Drift layer 42 is provided on buffer layer 41. Buffer layer 41 and drift layer 42 each contain an n-type impurity such as nitrogen. The concentration of the n-type impurity contained in buffer layer 41 may be higher than the concentration of the n-type impurity contained in drift layer 42.

[0078] Next, a step (S2) is performed of processing silicon carbide epitaxial substrate 200. Specifically, silicon carbide epitaxial substrate 200 is processed as follows: First, ions are implanted into silicon carbide epitaxial substrate 200.

[0079] 17 is a schematic cross-sectional view showing a step of forming a body region. In the step of forming the body region, p-type impurities such as aluminum are ion-implanted into third main surface 3 of silicon carbide epitaxial layer 60. This forms body region 113 having p-type conductivity. Portions where body region 113 is not formed become drift layer 42 and buffer layer 41. The thickness of body region 113 is, for example, 0.9 μm. Silicon carbide epitaxial layer 60 includes buffer layer 41, drift layer 42, and body region 113.

[0080] Next, a step of forming a source region is performed. FIG. 18 is a schematic cross-sectional view showing the step of forming the source region. Specifically, n-type impurities such as phosphorus are ion-implanted into the body region 113. This forms a source region 114 having n-type conductivity. The thickness of the source region 114 is, for example, 0.4 μm. The concentration of the n-type impurity contained in the source region 114 is higher than the concentration of the p-type impurity contained in the body region 113.

[0081] Next, a p-type impurity such as aluminum is ion-implanted into the source region 114 to form a contact region 118. The contact region 118 is formed to penetrate the source region 114 and the body region 113 and to be in contact with the drift layer 42. The concentration of the p-type impurity contained in the contact region 118 is higher than the concentration of the n-type impurity contained in the source region 114.

[0082] Next, activation annealing is performed to activate the implanted impurities. The temperature of the activation annealing is, for example, 1500° C. or higher and 1900° C. or lower. The activation annealing time is, for example, about 30 minutes. The atmosphere of the activation annealing is, for example, an argon atmosphere.

[0083] Next, a step of forming trenches in the third main surface 3 of the silicon carbide epitaxial layer 60 is performed. FIG. 19 is a cross-sectional schematic diagram showing the step of forming trenches in the third main surface 3 of the silicon carbide epitaxial layer 60. A mask 117 having openings is formed on the third main surface 3 including the source region 114 and the contact region 118. The source region 114, the body region 113, and a portion of the drift layer 42 are removed by etching using the mask 117. For example, inductively coupled plasma reactive ion etching can be used as the etching method. Specifically, for example, inductively coupled plasma reactive ion etching using SF or a mixed gas of SF and O as the reactive gas is used. Recesses are formed in the third main surface 3 by etching.

[0084] Next, thermal etching is performed on the recesses. Thermal etching can be performed, for example, by heating the mask 117 formed on the third main surface 3 in an atmosphere containing a reactive gas having at least one type of halogen atom. The at least one type of halogen atom includes at least one of chlorine (Cl) atoms and fluorine (F) atoms. The atmosphere can include, for example, Cl2, BCl3, SF6, or CF4. For example, thermal etching is performed using a mixed gas of chlorine gas and oxygen gas as the reactive gas, and setting the heat treatment temperature to, for example, 700°C or higher and 1000°C or lower. The reactive gas may contain a carrier gas in addition to the above-mentioned chlorine gas and oxygen gas. Examples of the carrier gas that can be used include nitrogen gas, argon gas, and helium gas.

[0085] 19 , a trench 56 is formed in the third main surface 3 by thermal etching. The trench 56 is defined by a sidewall surface 53 and a bottom wall surface 54. The sidewall surface 53 is formed by the source region 114, the body region 113, and the drift layer 42. The bottom wall surface 54 is formed by the drift layer 42. Next, the mask 117 is removed from the third main surface 3.

[0086] Next, a step of forming a gate insulating film is performed. Figure 20 is a schematic cross-sectional view showing the step of forming a gate insulating film. Specifically, silicon carbide epitaxial substrate 200 having trench 56 formed in third main surface 3 is heated in an oxygen-containing atmosphere at a temperature of, for example, 1300°C or higher and 1400°C or lower. This forms gate insulating film 115 that is in contact with drift layer 42 at bottom wall surface 54, in contact with drift layer 42, body region 113, and source region 114 at sidewall surface 53, and in contact with source region 114 and contact region 118 at third main surface 3.

[0087] Next, a step of forming a gate electrode is performed. FIG. 21 is a cross-sectional view showing a step of forming a gate electrode and an interlayer insulating film. The gate electrode 127 is formed inside the trench 56 so as to be in contact with the gate insulating film 115. The gate electrode 127 is disposed inside the trench 56 and is formed on the gate insulating film 115 so as to face each of the sidewall surface 53 and the bottom wall surface 54 of the trench 56. The gate electrode 127 is formed by, for example, a low pressure chemical vapor deposition (LPCVD) method.

[0088] Next, an interlayer insulating film 126 is formed. The interlayer insulating film 126 is formed so as to cover the gate electrode 127 and to be in contact with the gate insulating film 115. The interlayer insulating film 126 is formed by, for example, chemical vapor deposition. The interlayer insulating film 126 is made of, for example, a material containing silicon dioxide. Next, the interlayer insulating film 126 and part of the gate insulating film 115 are etched so as to form openings over the source region 114 and the contact region 118. As a result, the contact region 118 and the source region 114 are exposed from the gate insulating film 115.

[0089] Next, a step of forming a source electrode is performed. The source electrode 116 is formed so as to be in contact with each of the source region 114 and the contact region 118. The source electrode 116 is formed by, for example, a sputtering method. The source electrode 116 is made of, for example, a material containing Ti (titanium), Al (aluminum), and Si (silicon).

[0090] Next, alloying annealing is performed. Specifically, the source electrode 116 in contact with each of the source region 114 and the contact region 118 is maintained at a temperature of, for example, 900° C. or higher and 1100° C. or lower for about 5 minutes. As a result, at least a portion of the source electrode 116 is silicided. This forms the source electrode 116 in ohmic contact with the source region 114. The source electrode 116 may also form an ohmic contact with the contact region 118.

[0091] Next, the source wiring 119 is formed. The source wiring 119 is electrically connected to the source electrode 116. The source wiring 119 is formed so as to cover the source electrode 116 and the interlayer insulating film 126.

[0092] Next, a step of forming a drain electrode is carried out. First, silicon carbide substrate 100 is polished at second main surface 2. This reduces the thickness of silicon carbide substrate 100. Next, drain electrode 123 is formed. Drain electrode 123 is formed so as to be in contact with second main surface 2. In this manner, silicon carbide semiconductor device 400 according to this embodiment is manufactured.

[0093] 22 is a cross-sectional schematic diagram showing the configuration of a silicon carbide semiconductor device 400 according to this embodiment. The silicon carbide semiconductor device 400 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The silicon carbide semiconductor device 400 mainly includes a silicon carbide epitaxial substrate 200, a gate electrode 127, a gate insulating film 115, a source electrode 116, a drain electrode 123, a source wiring 119, and an interlayer insulating film 126. The silicon carbide epitaxial substrate 200 includes a buffer layer 41, a drift layer 42, a body region 113, a source region 114, and a contact region 118. Silicon carbide semiconductor device 400 may be, for example, an IGBT (Insulated Gate Bipolar Transistor).

[0094] Next, the effects of the methods for manufacturing silicon carbide substrate 100, silicon carbide epitaxial substrate 200, and silicon carbide semiconductor device 400 according to this embodiment will be described.

[0095] In recent years, new defects (hereinafter referred to as voids) have been discovered in silicon carbide crystals. Unlike micropipes, voids do not penetrate the silicon carbide crystal. Furthermore, the width of a void is usually larger than the width of a micropipe. Furthermore, the width of a void is characterized by decreasing in the growth direction. When a silicon carbide semiconductor device 400 is manufactured using a silicon carbide substrate 100 having voids exposed on the main surface, the reliability of the silicon carbide semiconductor device 400 may decrease. As a result, the yield of the silicon carbide semiconductor device 400 may decrease.

[0096] As a result of extensive research, the inventors have come up with the following findings and have devised the embodiments of the present disclosure. First, carbon lumps were discovered in a region approximately 50 μm to 200 μm away from the position where the voids existed in the growth direction. Further research revealed that the occurrence of voids is caused by a region where carbon inclusions of a certain size are densely concentrated.

[0097] As a result of further intensive research into the cause of the incorporation of dense carbon inclusions of a certain size into silicon carbide substrate 100, it was found that when growing silicon carbide crystal using a graphite crucible, carbon lumps generated from the crucible and the graphite members placed therein are incorporated into the silicon carbide crystal. The inventors then discovered that by firing the graphite crucible and the graphite members placed therein under specific conditions before growing the silicon carbide crystal, it is possible to prevent carbon lumps from being mixed into the silicon carbide crystal. This makes it possible to obtain silicon carbide substrate 100 with a reduced areal density of voids.

[0098] In silicon carbide substrate 100 according to this embodiment, first voids 10 are present in first main surface 1. The surface density of first voids 10 is 0.9 voids / cm 2When viewed in a direction perpendicular to first main surface 1, first void 10 has a width of 10 μm or more and 100 μm or less. When viewed in a direction parallel to first main surface 1, first void 10 has a width that increases from first main surface 1 toward second main surface 2. When viewed in a direction parallel to first main surface 1, first void 10 has a depth that is smaller than the thickness of silicon carbide substrate 100. First main surface 1 is a carbon surface or a surface inclined at an off angle θ of 8° or less with respect to the carbon surface.

[0099] Silicon carbide substrate 100 according to this embodiment includes first main surface 1 and second main surface 2 opposite to first main surface 1. First voids 10 are present in first main surface 1, and second voids 20 are present in second main surface 2. The surface density of second voids 20 is 0.9 voids / cm 2 When viewed in a direction perpendicular to first main surface 1, the width of each of first void 10 and second void 20 is not less than 10 μm and not more than 100 μm. When viewed in a direction parallel to first main surface 1, the width of each of first void 10 and second void 20 increases from first main surface 1 toward second main surface 2. When viewed in a direction parallel to first main surface 1, the depth of each of first void 10 and second void 20 is smaller than the thickness of silicon carbide substrate 100. Second main surface 2 is a silicon surface or a surface inclined at an off-angle θ of 8° or less with respect to the silicon surface.

[0100] When silicon carbide substrate 100 described above is used to manufacture silicon carbide semiconductor device 400, the yield of silicon carbide semiconductor device 400 can be improved.

[0101] According to silicon carbide substrate 100 according to this embodiment, when first main surface 1 is divided into a plurality of square regions 30 with a side length of 5 mm, the plurality of square regions 30 have an areal density of threading screw dislocations 4 of 3000 / cm 2 and the first region 31 in which the areal density of threading screw dislocations 4 is 1000 / cm 2 More than 3000 pieces / cm 2 and a second region 32 in which the surface density of threading screw dislocations 4 is less than 1000 / cm 2The ratio of the area of ​​first region 31 to the total area of ​​first region 31, second region 32 and third region 33 may be equal to or greater than 1% and equal to or less than 10%. This enables the yield of silicon carbide semiconductor device 400 to be further improved.

[0102] According to silicon carbide substrate 100 according to the present embodiment, the ratio of the area of ​​first region 31 to the total area of ​​first region 31, second region 32, and third region 33 may be 5% or more. This enables the yield of silicon carbide semiconductor device 400 to be further improved.

[0103] In the silicon carbide substrate 100 according to this embodiment, the areal density of threading screw dislocations 4 on the second main surface 2 is 1500 / cm 2 This enables further improvement in the yield of silicon carbide semiconductor device 400 .

[0104] According to silicon carbide substrate 100 according to the present embodiment, first rectangular parallelepiped region 61 that is 50 μm or more and 200 μm or less away from first main surface 1 toward second main surface 2 may have 10 to 20 first carbon inclusions 71. When viewed in a direction perpendicular to first main surface 1, first rectangular parallelepiped region 61 may have a long side length of 0.82 mm and a short side length of 0.7 mm. When viewed in a direction perpendicular to first main surface 1, first void 10 may overlap first rectangular parallelepiped region 61. When viewed in a direction perpendicular to first main surface 1, first carbon inclusion 71 may have a maximum length of 5 μm or more and 50 μm or less. This can further improve the yield of silicon carbide semiconductor device 400.

[0105] According to the silicon carbide substrate 100 according to the present embodiment, the second rectangular parallelepiped region 62 that is 50 μm or more and 200 μm or less away from the first main surface 1 toward the second main surface 2 may have three or more and less than ten second carbon inclusions 72. When viewed in a direction perpendicular to the first main surface 1, the second rectangular parallelepiped region 62 may have a long side length of 0.82 mm and a short side length of 0.7 mm. When viewed in a direction perpendicular to the first main surface 1, the areal density of threading screw dislocations 4 in the region of the first main surface 1 that overlaps with the second rectangular parallelepiped region 62 is 3000 / cm. 2 As viewed in a direction perpendicular to first main surface 1, second carbon inclusion 72 may have a maximum length of 5 μm or more and 50 μm or less. This enables the yield of silicon carbide semiconductor device 400 to be further improved.

[0106] According to silicon carbide substrate 100 in accordance with the present embodiment, first main surface 1 may have a diameter of 150 mm or more. This enables the yield of silicon carbide semiconductor devices 400 to be further improved when silicon carbide substrate 100 with a large diameter is used.

[0107] Example 1 Sample Preparation First, silicon carbide substrate 100 was fabricated using the manufacturing conditions for Samples 1 to 7. A firing step was performed under the manufacturing conditions for Samples 1 to 6. Specifically, crucible 130 and the graphite member inside crucible 130 were fired using the temperature profile shown in FIG. 11B. Third temperature C3 in FIG. 11B is the firing temperature. The time from third time T3 to fourth time T4 is the firing time. Under the manufacturing conditions for Sample 7, the firing step was not performed.

[0108] The firing temperature under the manufacturing conditions for Samples 1 and 2 was 2800°C. The firing temperature under the manufacturing conditions for Samples 3 to 6 was 3000°C. The firing time under the manufacturing conditions for Samples 1 and 4 was 10 hours. The firing time under the manufacturing conditions for Samples 2 and 5 was 30 hours. The firing time under the manufacturing conditions for Sample 6 was 60 hours. The firing time under the manufacturing conditions for Sample 3 was 0 minutes.

[0109] Next, silicon carbide crystal 110 was produced using crucible 130. As shown in FIG. 12 , silicon carbide source material 153 and seed substrate 150 were placed inside crucible 130. Silicon carbide crystal 110 was grown on seed substrate 150 using sublimation deposition. After growth of silicon carbide crystal 110 was completed, silicon carbide crystal 110 was sliced ​​using a saw wire. In this way, silicon carbide substrate 100 was cut out. Silicon carbide substrate 100 has first main surface 1 and second main surface 2. First main surface 1 was a surface inclined in the off-direction with respect to the carbon plane. The off-direction was <11-20>. The off-angle θ was 2°. In this manner, silicon carbide substrate 100 for each of samples 1 to 7 was prepared.

[0110] (Measurement method) In silicon carbide substrate 100 according to each of samples 1 to 7, the areal density of first voids 10 was measured. Specifically, the number of first voids 10 exposed on first main surface 1 of silicon carbide substrate 100 was measured. The first voids 10 were identified using an optical microscope. Bottomed holes having a width of 10 μm or more and 100 μm or less when viewed in a direction perpendicular to first main surface 1 and increasing in width from first main surface 1 toward second main surface 2 were identified as first voids 10. The value obtained by dividing the number of first voids 10 in a measurement region on first main surface 1 by the area of ​​the measurement region on first main surface 1 was defined as the areal density of first voids 10.

[0111] In the silicon carbide substrate 100 of each of Samples 1, 3, 5, and 7, the number of first carbon inclusions 71 located below a certain first void 10 was counted. Specifically, in a region where the first void 10 was in the first main surface 1, the number of first carbon inclusions 71 was counted visually while shifting the focus of the microscope by the measurement depth from the first main surface 1 toward the second main surface 2 of the silicon carbide substrate 100. The measurement depth was 100 μm. The length of the long side of the measurement region was 0.21 mm. The length of the short side of the measurement region was 0.18 mm.

[0112] (Measurement results)

[0113]

[0114] Table 1 shows the areal density of the first voids 10 in the silicon carbide substrate 100 according to each of Samples 1 to 7. As shown in Table 1, the areal density of the first voids 10 in the silicon carbide substrate 100 according to each of Samples 1 to 6 was lower than the areal density of the first voids 10 in the silicon carbide substrate 100 according to Sample 7. This confirmed that the areal density of the first voids 10 can be reduced by performing the firing process. When compared at the same firing temperature, the longer the firing time, the lower the areal density of the first voids 10. When compared at the same firing time, the higher the firing temperature, the lower the areal density of the first voids 10. In the silicon carbide substrates 100 according to Samples 1, 3, 5, and 7, the numbers of first carbon inclusions 71 were 6, 3, 2, and 9, respectively.

[0115] Example 2 Measurement Method In silicon carbide substrate 100 according to each of samples 4 and 7, first region 31, second region 32, and third region 33 were identified. First region 31 had an areal density of threading screw dislocations 4 of 3000 / cm 2 The second region 32 is a region where the areal density of threading screw dislocations 4 is 1000 / cm 2 More than 3000 pieces / cm 2 The third region 33 is a region where the areal density of threading screw dislocations 4 is less than 1000 / cm 2 It is an area where

[0116] The ratio of the area of ​​the first region 31 to the total area of ​​the first region 31, the second region 32, and the third region 33 (first region ratio), the ratio of the area of ​​the second region 32 to the total area of ​​the first region 31, the second region 32, and the third region 33 (second region ratio), and the ratio of the area of ​​the third region 33 to the total area of ​​the first region 31, the second region 32, and the third region 33 (third region ratio) were measured. The areal density of threading screw dislocations 4 on the second main surface 2 was measured.

[0117] The areal density of threading screw dislocations 4 was measured using molten potassium hydroxide (KOH). The etch pit observation area was 0.82 mm × 0.70 mm. The observation area pitch was 5 mm. The number of etch pits caused by threading screw dislocations 4 was measured in all observation areas. The total number of etch pits in all observation areas divided by the total area of ​​the observation areas was taken as the areal density of threading screw dislocations 4 on the second main surface 2. The temperature of the KOH melt was approximately 500°C or higher and 550°C or lower. The etching time was approximately 5 minutes or higher and 10 minutes or lower.

[0118] (Measurement results)

[0119]

[0120] Table 2 shows the first region ratio, the second region ratio, the third region ratio, and the areal density of threading screw dislocations 4 on the second main surface 2. As shown in Table 2, the first region ratio of the silicon carbide substrate 100 of Sample 4 was lower than the first region ratio of the silicon carbide substrate 100 of Sample 7. This confirmed that the first region ratio can be reduced by performing the firing step. The areal density of threading screw dislocations 4 on the second main surface 2 of the silicon carbide substrate 100 of Sample 4 was lower than the areal density of threading screw dislocations 4 on the second main surface 2 of the silicon carbide substrate 100 of Sample 7. This confirmed that the areal density of threading screw dislocations 4 on the second main surface 2 can be reduced by performing the firing step.

[0121] The present disclosure includes the following embodiments: (Supplementary Note 1) A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, wherein first voids are present in the first main surface, and an areal density of the first voids is 0.9 voids / cm 2a thickness of the first voids when viewed in a direction perpendicular to the first main surface is less than 10 μm, a width of the first voids when viewed in a direction parallel to the first main surface is greater from the first main surface to the second main surface, a depth of the first voids when viewed in a direction parallel to the first main surface is less than a thickness of the silicon carbide substrate, and the first main surface is a carbon surface or a surface inclined at an off-angle of 8° or less with respect to the carbon surface. (Supplementary Note 2) A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, wherein first voids are present in the first main surface and second voids are present in the second main surface, and an areal density of the second voids is 0.9 voids / cm 2 a thickness of the silicon carbide substrate, the thickness of the first voids and the second voids being less than 10 μm when viewed in a direction perpendicular to the first main surface, the width of each of the first voids and the second voids being 10 μm or more and 100 μm or less when viewed in a direction parallel to the first main surface, the width of each of the first voids and the second voids increasing from the first main surface to the second main surface, the depth of each of the first voids and the second voids being less than a thickness of the silicon carbide substrate when viewed in a direction parallel to the first main surface, and the second main surface being a silicon surface or a surface inclined at an off-angle of 8° or less with respect to the silicon surface. 2 a first region in which the areal density of threading screw dislocations is 1000 / cm 2 More than 3000 pieces / cm 2 and a second region in which the areal density of threading screw dislocations is less than 1000 / cm. 2and a third region having an area less than 1000 / cm2, wherein a ratio of an area of ​​the first region to a total area of ​​the first region, the second region, and the third region is 1% or more and 10% or less. (Supplementary Note 4) The silicon carbide substrate according to Supplementary Note 3, wherein a ratio of an area of ​​the first region to a total area of ​​the first region, the second region, and the third region is 5% or more. (Supplementary Note 5) An areal density of threading screw dislocations in the second main surface is 1500 / cm2 2 the silicon carbide substrate according to Supplementary Note 1 or 2, wherein: (Supplementary Note 6) The silicon carbide substrate according to Supplementary Note 1 or 2, wherein: 10 to 20 first carbon inclusions are present in the first rectangular parallelepiped region of the silicon carbide substrate; the distance from the first main surface to an upper end face of the first rectangular parallelepiped region is 50 μm and the distance from the first main surface to a lower end face of the first rectangular parallelepiped region is 200 μm, as viewed in the direction perpendicular to the first main surface, the length of a long side of the first rectangular parallelepiped region is 0.82 mm and the length of a short side of the first rectangular parallelepiped region is 0.7 mm, as viewed in the direction perpendicular to the first main surface, the first void overlaps the first rectangular parallelepiped region, and the maximum length of the first carbon inclusions is 5 μm to 50 μm, as viewed in the direction perpendicular to the first main surface. (Supplementary Note 7) The second rectangular parallelepiped region of the silicon carbide substrate has at least 3 but less than 10 second carbon inclusions; the distance from the first main surface to an upper end face of the second rectangular parallelepiped region is 50 μm and the distance from the first main surface to a lower end face of the second rectangular parallelepiped region is 200 μm, as viewed in the direction perpendicular to the first main surface, the length of a long side of the second rectangular parallelepiped region is 0.82 mm and the length of a short side of the second rectangular parallelepiped region is 0.7 mm, and the areal density of threading screw dislocations in a region of the first main surface overlapping with the second rectangular parallelepiped region is 3000 / cm, as viewed in the direction perpendicular to the first main surface. 2The silicon carbide substrate according to Appendix 1 or Appendix 2, wherein a maximum length of the second carbon inclusions is 5 μm or more and 50 μm or less when viewed in a direction perpendicular to the first main surface. (Appendix 8) The silicon carbide substrate according to Appendix 1 or Appendix 2, wherein a diameter of the first main surface is 150 mm or more. (Appendix 9) The silicon carbide substrate according to Appendix 1 or Appendix 2, wherein the first main surface is a surface inclined at an off-angle of 1° or more and 4° or less with respect to a carbon plane. (Appendix 10) A silicon carbide epitaxial substrate comprising: the silicon carbide substrate according to Appendix 1 or Appendix 2; and a silicon carbide epitaxial layer provided on the silicon carbide substrate. (Appendix 11) A method for manufacturing a silicon carbide semiconductor device, comprising: preparing the silicon carbide epitaxial substrate according to Appendix 10; and processing the silicon carbide epitaxial substrate.

[0122] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims, not the above description, and is intended to include meanings equivalent to the claims and all modifications within the scope thereof.

[0123] 1 First main surface, 2 Second main surface, 3 Third main surface, 4 Threading screw dislocation, 7 Orientation flat portion, 8 Arc-shaped portion, 9 Outer peripheral side surface, 10 First void, 11 First opening, 12 First side portion, 13 First bottom portion, 14 Third void, 15 Silicon carbide region, 20 Second void, 21 Second opening, 22 Second side portion, 23 Second bottom portion, 30 Square region, 31 First region, 32 Second region, 33 Third region, 41 Buffer layer, 42 Drift layer, 53 Side wall surface, 54 Bottom wall surface, 56 Trench, 60 Silicon carbide epitaxial layer, 61 First rectangular parallelepiped region, 62 Second rectangular parallelepiped region, 71 First carbon inclusion, 72 Second carbon inclusion, 100 Silicon carbide substrate, 101 First direction, 102 Second direction, 103 Third direction, 110 Silicon carbide crystal, 113 Body region, 114 Source region, 115 Gate insulating film, 116 Source electrode, 117 Mask, 118 Contact region, 119 Source wiring, 123 Drain electrode, 126 Interlayer insulating film, 127 Gate electrode, 130 Crucible, 131 Lid, 132 Source material container, 141 First resistance heater, 142 Second resistance heater, 143 Third resistance heater, 150 Seed substrate, 151 Growth surface, 152 Mounting surface, 153 Silicon carbide raw material, 200 Silicon carbide epitaxial substrate, 300 Manufacturing apparatus, 400 Silicon carbide semiconductor device, A1 First width, A2 Second width, B1 First depth, B2 Second depth, C1 First temperature, C2 Second temperature, C3 Third temperature, D11, D21 First distance, D12, D22 Second distance, D13, D23 Third distance, E1 Thickness, F1, F2 Maximum length, L11, L21 First length, L12, L22 Second length, T1 First point in time, T2 Second point in time, T3 Third point in time, T4 Fourth point in time, W1 Diameter, θ Off angle.

Claims

1. A silicon carbide substrate having a first main surface and a second main surface opposite the first main surface, a first void is present in the first major surface; The surface density of the first voids is 0.9 voids / cm 2 is less than When viewed in a direction perpendicular to the first main surface, the width of the first void is 10 μm or more and 100 μm or less; When viewed in a direction parallel to the first main surface, a width of the first void increases from the first main surface toward the second main surface, When viewed in a direction parallel to the first main surface, a depth of the first void is smaller than a thickness of the silicon carbide substrate; The silicon carbide substrate, wherein the first main surface is a carbon surface or a surface inclined at an off angle of 8° or less with respect to the carbon surface.

2. A silicon carbide substrate having a first main surface and a second main surface opposite the first main surface, a first void is present in the first major surface and a second void is present in the second major surface; The surface density of the second voids is 0.9 voids / cm 2 is less than When viewed in a direction perpendicular to the first main surface, each of the first voids and the second voids has a width of 10 μm or more and 100 μm or less; When viewed in a direction parallel to the first main surface, a width of each of the first voids and the second voids increases from the first main surface toward the second main surface, When viewed in a direction parallel to the first main surface, a depth of each of the first voids and the second voids is smaller than a thickness of the silicon carbide substrate; The second main surface is a silicon surface or a surface inclined at an off angle of 8° or less with respect to the silicon surface.

3. When the first main surface is divided into a plurality of square regions each having a side length of 5 mm, the plurality of square regions have an areal density of threading screw dislocations of 3000 / cm 2 and a first region having an areal density of threading screw dislocations of 1000 / cm 2 More than 3000 pieces / cm 2 and a second region having an areal density of threading screw dislocations of less than 1000 / cm 2 and a third region, the third region being less than 3 . The silicon carbide substrate according to claim 1 , wherein a ratio of an area of ​​said first region to a total area of ​​said first region, said second region and said third region is not less than 1% and not more than 10%. 4 .

4. 4 . The silicon carbide substrate according to claim 3 , wherein a ratio of an area of ​​said first region to a total area of ​​said first region, said second region and said third region is equal to or greater than 5%.

5. The areal density of threading screw dislocations on the second main surface is 1500 / cm 2 3. The silicon carbide substrate according to claim 1, wherein:

6. the first rectangular parallelepiped region of the silicon carbide substrate has 10 to 20 first carbon inclusions; In a direction perpendicular to the first main surface, a distance from the first main surface to an upper end surface of the first rectangular parallelepiped region is 50 μm, and a distance from the first main surface to a lower end surface of the first rectangular parallelepiped region is 200 μm; When viewed in a direction perpendicular to the first main surface, the length of a long side of the first rectangular parallelepiped region is 0.82 mm, and the length of a short side of the first rectangular parallelepiped region is 0.7 mm; When viewed in a direction perpendicular to the first main surface, the first void overlaps with the first rectangular parallelepiped region, 3 . The silicon carbide substrate according to claim 1 , wherein a maximum length of said first carbon inclusion when viewed in a direction perpendicular to said first main surface is not less than 5 μm and not more than 50 μm.

7. the second rectangular parallelepiped region of the silicon carbide substrate has 3 or more and less than 10 second carbon inclusions; In a direction perpendicular to the first main surface, a distance from the first main surface to an upper end surface of the second rectangular parallelepiped region is 50 μm, and a distance from the first main surface to a lower end surface of the second rectangular parallelepiped region is 200 μm; When viewed in a direction perpendicular to the first main surface, the length of a long side of the second rectangular parallelepiped region is 0.82 mm, and the length of a short side of the second rectangular parallelepiped region is 0.7 mm; When viewed in a direction perpendicular to the first main surface, the area density of threading screw dislocations in a region of the first main surface overlapping with the second rectangular parallelepiped region is 3000 / cm 2 That's all. 3 . The silicon carbide substrate according to claim 1 , wherein a maximum length of said second carbon inclusion when viewed in a direction perpendicular to said first main surface is not less than 5 μm and not more than 50 μm.

8. 3 . The silicon carbide substrate according to claim 1 , wherein the first main surface has a diameter of 150 mm or greater.

9. 2 . The silicon carbide substrate according to claim 1 , wherein said first main surface is a surface inclined at an off angle of greater than or equal to 1° and less than or equal to 4° with respect to said carbon surface.

10. A silicon carbide substrate according to claim 1 or 2; a silicon carbide epitaxial layer provided on the silicon carbide substrate.

11. A step of preparing a silicon carbide epitaxial substrate according to claim 10; and processing the silicon carbide epitaxial substrate.