Semiconductor device

Abstract

The present invention provides a semiconductor device which is provided with: a semiconductor element; a first lead which comprises a first terminal part and a die pad part that has a first lead main surface which faces one side in the thickness direction and on which the semiconductor element is mounted, and a first lead back surface which faces the other side in the thickness direction; and a sealing resin which has a first resin surface that faces the one side in the thickness direction and a second resin surface that faces the other side in the thickness direction, while covering the semiconductor element and a part of the die pad part. With respect to this semiconductor device, the first lead back surface is exposed from the second resin surface; the first terminal part comprises a portion which is used for mounting, while being positioned on the one side in the thickness direction with respect to the first lead main surface; and at least one of the first lead back surface and the second resin surface has a higher surface roughness than the first resin surface.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Patent Document 1 discloses an example of a semiconductor device including first, second, and third leads each including a die pad portion having a main surface and a back surface, a semiconductor element mounted on the main surface, and a sealing resin in contact with the main surface and covering the semiconductor element, with the back surface of the die pad portion exposed from the sealing resin.

[0003] Japanese Patent Application Laid-Open No. 2017-174951

[0004] The back surface of the die pad is used to dissipate heat from the semiconductor element to the outside, and therefore it is preferable that the back surface of the die pad is kept in an appropriate state.

[0005] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above-mentioned circumstances, an object of the present disclosure is to provide a semiconductor device that can maintain the back surface of the die pad in a more appropriate state.

[0006] A semiconductor device provided by one aspect of the present disclosure includes a semiconductor element, a first lead including a die pad portion having a first lead main surface facing one side in a thickness direction and on which the semiconductor element is mounted and a first lead back surface facing the other side in the thickness direction, and a first terminal portion, and an encapsulating resin having a first resin surface facing the one side in the thickness direction and a second resin surface facing the other side in the thickness direction, and covering the semiconductor element and a portion of the die pad portion. The first lead back surface is exposed from the second resin surface. The first terminal portion is located on the one side in the thickness direction relative to the first lead main surface and includes a portion used for mounting. At least one of the first lead back surface and the second resin surface has a surface roughness greater than that of the first resin surface.

[0007] According to the above configuration, it is possible to provide a semiconductor device that can put the back surface of the die pad portion into a more appropriate state.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0009] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 3 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 4 is a perspective view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 5 is a perspective view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 6 is a plan view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 7 is a bottom view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 8 is a front view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 9 is a side view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 10 is a plan view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 11 is a bottom view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 11. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 11. FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 11. FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. 11. FIG. 16 is an enlarged cross-sectional view of a main portion showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 17 is an enlarged cross-sectional view of a main portion showing the semiconductor device according to the first embodiment of the present disclosure. FIG. 18 is a cross-sectional view showing a use state of the semiconductor device according to the first embodiment of the present disclosure. FIG. 19 is a plan view showing a state in a manufacturing process of the semiconductor device according to the first embodiment of the present disclosure. FIG. 20 is an enlarged cross-sectional view of a main portion showing a state in a manufacturing process of the semiconductor device according to the first embodiment of the present disclosure. FIG. 21 is an enlarged cross-sectional view of a main portion showing a manufacturing process of the semiconductor device according to the first embodiment of the present disclosure. FIG. 22 is a plan view showing a first modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 23 is an enlarged cross-sectional view of a main portion showing the first modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 24 is a plan view showing a second modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 25 is a plan view showing a third modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 26 is a plan view showing a fourth modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 27 is an enlarged cross-sectional view of a main portion showing a manufacturing process of the fourth modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 28 is an enlarged cross-sectional view of a main portion showing a semiconductor device according to the second embodiment of the present disclosure.FIG. 29 is an enlarged cross-sectional view of a main part showing a first modified example of the semiconductor device according to the second embodiment of the present disclosure.

[0010] Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0011] The terms "first," "second," "third," etc. in this disclosure are used for identification purposes only and are not intended to impose any ranking on their objects.

[0012] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B with a certain object A in contact with the certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "an object A overlaps an object B when viewed in a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B." Furthermore, in the present disclosure, "a surface A faces in (one side or the other side of) direction B" is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is tilted with respect to direction B.

[0013] First Embodiment: FIGS. 1 to 21 show a semiconductor device according to a first embodiment of the present disclosure. A semiconductor device A10 of this embodiment includes a conductive member 10, a semiconductor element 20, connection members 31, 32, and 33, and a sealing resin 40. In these figures, the thickness direction of this disclosure is defined as the thickness direction z. One side of the thickness direction z is referred to as the z1 side, and the other side opposite the one side of the thickness direction z is referred to as the z2 side. Furthermore, a direction perpendicular to the thickness direction z is defined as the first direction x. One side of the first direction x is referred to as the x1 side, and the other side opposite the x1 side is referred to as the x2 side. Furthermore, a direction perpendicular to the thickness direction z and the first direction x is defined as the second direction y. One side of the second direction y is referred to as the y1 side, and the other side opposite the y1 side is referred to as the y2 side.

[0014] Conductive member 10: The conductive member 10 is a member that constitutes a conductive path to the semiconductor element 20. The conductive member 10 of this embodiment includes a first lead 11, a second lead 12, a third lead 13, and a fourth lead 14. The materials of the first lead 11, the second lead 12, the third lead 13, and the fourth lead 14 are not limited in any way and include, for example, copper (Cu) or a copper alloy. Furthermore, the first lead 11, the second lead 12, the third lead 13, and the fourth lead 14 may be plated in appropriate locations with silver (Ag), nickel (Ni), tin (Sn), or the like.

[0015] First lead 11: As shown in FIGS. 1 to 15 , the first lead 11 has a die pad portion 111 and a first terminal portion 112. The die pad portion 111 has a first lead main surface 1111 and a first lead back surface 1112. The first lead main surface 1111 is a surface facing the z1 side in the thickness direction z. The first lead back surface 1112 is a surface facing the z2 side in the thickness direction z. A semiconductor element 20 is mounted on the first lead main surface 1111.

[0016] The die pad portion 111 of this embodiment further has a first lead side surface 1113, a first intermediate surface 1114, and a second intermediate surface 1115. The first lead side surface 1113 is located between the first lead main surface 1111 and the first lead back surface 1112 in the thickness direction z and faces the x1 side in the first direction x. The first intermediate surface 1114 is located between the first lead main surface 1111 and the first lead back surface 1112 in the thickness direction z and faces the z2 side in the thickness direction z (the same side as the first lead back surface 1112). The first intermediate surface 1114 is located on the x2 side in the first direction x with respect to the first lead back surface 1112. The second intermediate surface 1115 is located between the first lead main surface 1111 and the first lead back surface 1112 in the thickness direction z and faces the z2 side in the thickness direction z (the same side as the first lead back surface 1112). The second intermediate surface 1115 is located on the x1 side in the first direction x with respect to the first lead back surface 1112 .

[0017] The shape of the die pad portion 111 is not limited in any way. In the illustrated example, the die pad portion 111 is rectangular when viewed in the thickness direction z. The shapes of the first lead main surface 1111 and the first lead back surface 1112 are not limited in any way and are rectangular when viewed in the thickness direction z in the illustrated example.

[0018] The first terminal portion 112 has a first portion 1121, two second portions 1122, and two third portions 1123. The first portion 1121 is connected to the die pad portion 111 and extends from the die pad portion 111 toward the x1 side in the first direction x. In the illustrated example, the first portion 1121 is parallel to the xy plane. In this embodiment, the die pad portion 111 is larger in the thickness direction z than the first portion 1121. The first terminal portion 112 of this embodiment has only one first portion 1121. The shape of the first portion 1121 is not limited in any way, and in the illustrated example, it is rectangular when viewed in the thickness direction z. The first portion 1121 is separated from the first lead back surface 1112 in the thickness direction z and, in the illustrated example, is in contact with the first lead main surface 1111. One side of the first portion 1121 is flush with the first lead main surface 1111.

[0019] The two second portions 1122 are located on the z1 side in the thickness direction z with respect to the first portion 1121. The two second portions 1122 are used when the semiconductor device A10 is surface-mounted on a circuit board or the like.

[0020] The two third portions 1123 are interposed between the first portion 1121 and the two second portions 1122. The third portions 1123 extend from the first portions 1121 toward the z1 side in the thickness direction z. In the example shown, the third portions 1123 are inclined with respect to the thickness direction z so as to extend outward from the first portions 1121 in the second direction y. The shape of the third portions 1123 is not limited in any way, and in the example shown, they are rectangular when viewed in the first direction x.

[0021] In this embodiment, the two second portions 1122 extend outward in the first direction x from the two third portions 1123. The two second portions 1122 are parallel to the second direction y. The two second portions 1122 do not extend beyond the two third portions 1123 on the x1 side in the first direction x. In the illustrated example, the two second portions 1122 and the two third portions 1123 are at the same (or approximately the same) position in the first direction x.

[0022] Second lead 12: The second lead 12 is located away from the first lead 11 (die pad portion 111) on the x2 side in the first direction x. The second lead 12 has a pad portion 121 and a plurality of second terminal portions 122.

[0023] The pad portion 121 has a second lead main surface 1211 and a second lead back surface 1212. The second lead main surface 1211 faces the z1 side in the thickness direction z. The second lead back surface 1212 faces the z2 side in the thickness direction z. A connecting member 31 is connected to the second lead main surface 1211. The shape of the pad portion 121 is not limited in any way, and in the illustrated example, it is an elongated rectangle with the second direction y as its longitudinal direction. Furthermore, as viewed in the thickness direction z, the pad portion 121 is smaller than the die pad portion 111. Furthermore, the size of the pad portion 121 in the thickness direction z is smaller than that of the die pad portion 111 and is the same (or approximately the same) as that of the first terminal portion 112. In the illustrated example, the position of the second lead main surface 1211 in the thickness direction z is the same (or approximately the same) as that of the first lead main surface 1111 of the die pad portion 111.

[0024] The second terminals 122 are arranged side by side in the second direction y. Each second terminal 122 has a fourth portion 1221, a fifth portion 1222, and a sixth portion 1223.

[0025] The fourth portion 1221 is connected to the pad portion 121, extends from the pad portion 121 to the x2 side in the first direction x, and is parallel to the xy plane in the illustrated example. The shape of the fourth portion 1221 is not limited in any way, and in the illustrated example, it is rectangular when viewed in the thickness direction z.

[0026] The fifth portion 1222 is located on the z1 side in the thickness direction z with respect to the fourth portion 1221. The fifth portion 1222 is used when surface-mounting the semiconductor device A10 on a circuit board or the like. The fifth portion 1222 has a shape that extends along the first direction x.

[0027] The sixth portion 1223 is interposed between the fourth portion 1221 and the fifth portion 1222. The sixth portion 1223 extends from the fourth portion 1221 toward the z1 side in the thickness direction z. In the example shown, the sixth portion 1223 is inclined with respect to the thickness direction z (yz plane). The shape of the sixth portion 1223 is not limited in any way, and in the example shown, it is rectangular when viewed in the first direction x.

[0028] Third lead 13: The third lead 13 is located away from the first lead 11 (die pad portion 111) on the x2 side in the first direction x. The third lead 13 is also aligned with the second lead 12 in the second direction y, and is located on the y2 side in the second direction y with respect to the second lead 12. The third lead 13 has a pad portion 131 and a third terminal portion 132.

[0029] The pad portion 131 has a third lead main surface 1311 and a third lead back surface 1312. The third lead main surface 1311 faces the z1 side in the thickness direction z. The third lead back surface 1312 faces the z2 side in the thickness direction z. A connecting member 32 is connected to the third lead main surface 1311. The shape of the pad portion 131 is not limited in any way, and in the illustrated example, it is rectangular when viewed in the thickness direction z. Furthermore, when viewed in the thickness direction z, the pad portion 131 is smaller than the pad portion 121. Furthermore, the size of the pad portion 131 in the thickness direction z is smaller than that of the die pad portion 111 and is the same (or approximately the same) as that of the pad portion 121. In the illustrated example, the position of the third lead main surface 1311 in the thickness direction z is the same (or approximately the same) as that of the first lead main surface 1111 of the die pad portion 111.

[0030] The third terminal portion 132 has a seventh portion 1321 , an eighth portion 1322 and a ninth portion 1323 .

[0031] The seventh portion 1321 is connected to the pad portion 131, extends from the pad portion 131 to the x2 side in the first direction x, and is parallel to the xy plane in the illustrated example. The shape of the seventh portion 1321 is not limited in any way, and in the illustrated example, it is rectangular when viewed in the thickness direction z.

[0032] The eighth portion 1322 is located on the z1 side in the thickness direction z with respect to the seventh portion 1321. The eighth portion 1322 is used when surface-mounting the semiconductor device A10 on a circuit board or the like. The eighth portion 1322 has a shape that extends along the first direction x.

[0033] The ninth portion 1323 is interposed between the seventh portion 1321 and the eighth portion 1322. The ninth portion 1323 extends from the seventh portion 1321 toward the z1 side in the thickness direction z. In the example shown, the ninth portion 1323 is inclined with respect to the thickness direction z (yz plane). The shape of the ninth portion 1323 is not limited in any way, and in the example shown, it is rectangular when viewed in the first direction x.

[0034] Fourth lead 14: The fourth lead 14 is located away from the first lead 11 (die pad portion 111) on the x2 side in the first direction x. The fourth lead 14 is also located between the second lead 12 and the third lead 13 in the second direction y. The fourth lead 14 has a pad portion 141 and a fourth terminal portion 142.

[0035] The pad portion 141 has a fourth lead main surface 1411 and a fourth lead back surface 1412. The fourth lead main surface 1411 faces the z1 side in the thickness direction z. The fourth lead back surface 1412 faces the z2 side in the thickness direction z. A connecting member 33 is connected to the fourth lead main surface 1411. The shape of the pad portion 141 is not limited in any way, and in the illustrated example, it is rectangular when viewed in the thickness direction z. When viewed in the thickness direction z, the pad portion 141 is smaller than the pad portion 121 and is approximately the same size as the pad portion 131. The pad portion 141 is smaller in size in the thickness direction z than the die pad portion 111 and is the same (or approximately the same) as the pad portions 121 and 131. In the illustrated example, the position of the fourth lead main surface 1411 in the thickness direction z is the same (or approximately the same) as the first lead main surface 1111 of the die pad portion 111.

[0036] The fourth terminal portion 142 has a tenth portion 1421 , an eleventh portion 1422 , and a twelfth portion 1423 .

[0037] The tenth portion 1421 is connected to the pad portion 141, extends from the pad portion 141 to the x2 side in the first direction x, and is parallel to the xy plane in the illustrated example. The shape of the tenth portion 1421 is not limited in any way, and in the illustrated example, it is rectangular when viewed in the thickness direction z.

[0038] The eleventh portion 1422 is located on the z1 side in the thickness direction z with respect to the tenth portion 1421. The eleventh portion 1422 is used when surface-mounting the semiconductor device A10 on a circuit board or the like. The eleventh portion 1422 has a shape that extends along the first direction x.

[0039] The twelfth portion 1423 is interposed between the tenth portion 1421 and the eleventh portion 1422. The twelfth portion 1423 extends from the tenth portion 1421 toward the z1 side in the thickness direction z. In the example shown, the twelfth portion 1423 is inclined with respect to the thickness direction z (yz plane). The shape of the twelfth portion 1423 is not limited in any way, and in the example shown, it is rectangular when viewed in the first direction x.

[0040] Semiconductor element 20: As shown in FIGS. 5 and 11 to 15, the semiconductor element 20 is mounted on the first lead main surface 1111 of the die pad portion 111. In the semiconductor device A10, the semiconductor element 20 is an n-channel, vertically structured metal-oxide-semiconductor field-effect transistor (MOSFET). The semiconductor element 20 is not limited to a MOSFET. The semiconductor element 20 may be another transistor such as an insulated gate bipolar transistor (IGBT). Furthermore, the semiconductor element 20 may be a diode. The semiconductor element 20 has a semiconductor layer 205, a first electrode 201, a second electrode 202, and a third electrode 203.

[0041] The semiconductor layer 205 includes a compound semiconductor substrate. The main material of the compound semiconductor substrate is silicon carbide (SiC). Alternatively, silicon (Si) may be used as the main material of the compound semiconductor substrate.

[0042] The first electrode 201 is provided on a portion of the semiconductor layer 205 in the thickness direction z, on a side (z1 side) toward which the first lead main surface 1111 of the die pad portion 111 of the first lead 11 faces. The first electrode 201 corresponds to a source electrode of the semiconductor element 20.

[0043] The second electrode 202 is provided on a portion of the semiconductor layer 205 opposite to the first electrode 201 in the thickness direction z. The second electrode 202 faces the first lead main surface 1111 of the die pad portion 111 of the first lead 11. The second electrode 202 corresponds to the drain electrode of the semiconductor element 20. In this embodiment, the second electrode 202 is bonded to the first lead main surface 1111 via a bonding layer 29. The bonding layer 29 is, for example, solder, silver (Ag) paste, baked silver, or the like.

[0044] The third electrode 203 is provided on the same side of the semiconductor layer 205 as the first electrode 201 in the thickness direction z, and is located away from the first electrode 201. The third electrode 203 corresponds to the gate electrode of the semiconductor element 20. When viewed in the thickness direction z, the area of ​​the third electrode 203 is smaller than the area of ​​the first electrode 201.

[0045] Connection members 31, 32, 33: The connection member 31 is bonded to the first electrode 201 of the semiconductor element 20 and the second lead main surface 1211 of the pad portion 121 of the second lead 12. The material of the connection member 31 is not limited in any way and includes metals such as aluminum (Al), copper (Cu), and gold (Au). Furthermore, the number of connection members 31 is not limited in any way and multiple connection members 31 may be provided. In the illustrated example, the connection member 31 is a flat, strip-shaped member that contains aluminum (Al).

[0046] The connection member 32 is connected to the third electrode 203 of the semiconductor element 20 and the third lead main surface 1311 of the pad portion 131 of the third lead 13. In the illustrated example, the connection member 32 contains gold (Au) and is a linear member that is thinner than the connection member 31.

[0047] The connection member 33 is connected to the first electrode 201 of the semiconductor element 20 and the fourth lead main surface 1411 of the pad portion 141 of the fourth lead 14. In the illustrated example, the connection member 33 contains gold (Au) and is a linear member that is thinner than the connection member 31.

[0048] In this embodiment, the first terminal portion 112 of the first lead 11 is a drain terminal, the second terminal portion 122 of the second lead 12 is a source terminal, the third terminal portion 132 of the third lead 13 is a gate terminal, and the fourth terminal portion 142 of the fourth lead 14 is a source sense terminal.

[0049] Sealing resin 40: As shown in FIGS. 1 to 15 , the sealing resin 40 covers the semiconductor element 20, the connecting members 31, 32, and 33, and portions of the first lead 11, the second lead 12, the third lead 13, and the fourth lead 14. The sealing resin 40 has electrical insulation properties. The sealing resin 40 is made of a material containing, for example, black epoxy resin. The sealing resin 40 has a first resin surface 41, a second resin surface 42, a third resin surface 43, a fourth resin surface 44, a fifth resin surface 45, and a sixth resin surface 46.

[0050] The first resin surface 41 faces the same side (z1 side) as the first lead main surface 1111 of the die pad portion 111 of the first lead 11 in the thickness direction z. The second resin surface 42 faces the opposite side (z2 side) from the first resin surface 41 in the thickness direction z. A first lead back surface 1112 of the die pad portion 111 of the first lead 11 is exposed from the second resin surface 42. The second resin surface 42 and the first lead back surface 1112 are flush with each other. The first lead back surface 1112 is separated from the third resin surface 43 in the first direction x.

[0051] The third resin surface 43 faces the x1 side in the first direction x. The first portion 1121 of the first terminal portion 112 of the first lead 11 penetrates the third resin surface 43. In this embodiment, only one first portion 1121 penetrates the third resin surface 43. In addition, the first portion 1121 is separated from the second resin surface 42 in the thickness direction z.

[0052] The fourth resin surface 44 faces the opposite side (x2 side) in the first direction x to the third resin surface 43. In the present embodiment, the second terminal portions 122 of the plurality of second terminal portions 122 of the second lead 12, the seventh portion 1321 of the third terminal portion 132 of the third lead 13, and the tenth portion 1421 of the fourth terminal portion 142 of the fourth lead 14 penetrate the fourth resin surface 44.

[0053] The fifth resin surface 45 faces the y1 side in the second direction y, and the sixth resin surface 46 faces the y2 side in the second direction y.

[0054] 7 , the ends in the second direction y of the two second portions 1122 of the second terminal portion 122 of the first lead 11 are located at approximately the same positions in the second direction y as the fifth resin surface 45 and the sixth resin surface 46 of the sealing resin 40. The two second portions 1122 do not protrude from the fifth resin surface 45 and the sixth resin surface 46 in the second direction y.

[0055] In the illustrated example, the sealing resin 40 has a groove 49. The groove 49 is recessed from the second resin surface 42 toward the z1 side in the thickness direction z and extends along the second direction y. The groove 49 reaches the fifth resin surface 45 and the sixth resin surface 46. The groove 49 is located between the first lead back surface 1112 and the fourth resin surface 44.

[0056] In the illustrated example, the sealing resin 40 has two recesses 47. The two recesses 47 are recessed from the first resin surface 41 toward the z2 side in the thickness direction z. The illustrated recesses 47 are formed by through holes that extend from the first resin surface 41 to the first lead main surface 1111. Therefore, a portion of the first lead main surface 1111 is exposed from the recesses 47.

[0057] As shown in FIGS. 16 and 17 , in this embodiment, at least one of the first lead back surface 1112 and the second resin surface 42 has a surface roughness greater than that of the first resin surface 41. The specific index of surface roughness referred to here is not particularly limited, and any index such as Ra (arithmetic mean roughness) or Rz (maximum height roughness) may be used as long as it allows for relative comparison. As shown in FIGS. 6 and 16 , in the illustrated example, both the first lead back surface 1112 and the second resin surface 42 have a surface roughness greater than that of the first resin surface 41. Specifically, the semiconductor device A10 has grinding marks CM formed across the first lead back surface 1112 and the second resin surface 42. The appearance (specific shape) of the grinding marks CM is not limited in any way. In the illustrated example, the grinding marks CM consist of multiple circular lines. Note that the grinding marks CM are omitted from FIG. 10 .

[0058] 19 and 20 show a state in the manufacturing process of the semiconductor device A10. These figures show a state in which the encapsulating resin 40 has been formed, for example, through a resin molding process using a mold. The illustrated encapsulating resin 40 has an extension 409. The extension 409 covers a portion of the first lead back surface 1112 of the die pad portion 111 and constitutes a portion of the second resin surface 42 in the illustrated state. This extension 409 can occur, for example, when the first lead back surface 1112 of the die pad portion 111 is not pressed sufficiently against the mold toward the z2 side in the thickness direction z during the resin molding process using a mold, or when the flatness of the first lead back surface 1112 is insufficient. In this state, the first resin surface 41 and the second resin surface 42 are both formed by a mold, and their surface roughnesses are almost the same, with no significant difference between them.

[0059] 21 shows a process for removing the extending portion 409. For example, a grinding tool CT such as a rotating grinding tool is used to grind the first lead back surface 1112 and the second resin surface 42 of the die pad portion 111. As a result, the extending portion 409 is removed, and grinding marks CM shown in FIGS. 6 and 16 are formed on the first lead back surface 1112 and the second resin surface 42. The grinding marks CM shown in FIG. 6 are an example of a case where the grinding tool CT is a rotating grinding tool, and the specific pattern shape of the grinding marks CM is not limited in any way. As shown in FIG. 6, grinding marks CM are formed across the first lead back surface 1112 and the second resin surface 42 when the hardness of the grinding tool CT or the hardness of the abrasive grains contained in the polishing slurry is harder than both the first lead back surface 1112 and the second resin surface 42. Grinding marks CM are formed on at least one of the first lead back surface 1112 and the second resin surface 42 that have been treated using the grinding tool CT. The area where the grinding marks CM are formed has a larger surface roughness than the first resin surface 41 that has not been treated using the grinding tool CT.

[0060] 18 shows the semiconductor device A10 in use. In this example, the semiconductor device A10 is surface-mounted on a circuit board 92. That is, the second portion 1122 of the first terminal 112, the fifth portion 1222 of the second terminal 122, the eighth portion 1322 of the third terminal 132, and the eleventh portion 1422 of the fourth terminal 142 are conductively joined to a wiring pattern (not shown) of the circuit board 92, for example, by solder 921. In addition, a heat sink 91 is disposed opposite the first lead back surface 1112 of the die pad 111. In the illustrated example, a sheet material 919 is disposed between the first lead back surface 1112 and the heat sink 91. The sheet material 919 is, for example, an insulating sheet.

[0061] Next, the operation of the semiconductor device A10 will be described.

[0062] As shown in FIG. 18 , the first lead back surface 1112 is exposed from the second resin surface 42. This allows, for example, a heat sink 91 to be disposed opposite the first lead back surface 1112. Furthermore, at least one of the first lead back surface 1112 and the second resin surface 42 has a greater surface roughness than the first resin surface 41. This configuration is obtained by removing the extension portion 409 shown in FIG. 19 using the method illustrated in FIG. 21 or the like. This prevents the first lead back surface 1112 from being covered by a portion of the sealing resin 40, and allows the entire first lead back surface 1112 to be disposed opposite, for example, a heat sink 91. This allows the first lead back surface 1112 to be in a more appropriate state.

[0063] In this embodiment, both the first lead back surface 1112 and the second resin surface 42 have a surface roughness greater than that of the first resin surface 41. This configuration is obtained by sufficiently grinding both the die pad portion 111 and the sealing resin 40 with the grinding tool CT in the method illustrated in Fig. 21, etc. Therefore, this is preferable for making the first lead back surface 1112 into a more appropriate state.

[0064] Furthermore, the second portion 1122 is located to one side in the z-direction relative to the first portion 1121. This allows the semiconductor device A10 to be surface-mounted on a circuit board 92 or the like using the second portion 1122. Furthermore, the first lead back surface 1112 is spaced apart from the third resin surface 43 in the x-direction. Furthermore, the first portion 1121 is spaced apart from the second resin surface 42 in the z-direction. Therefore, a portion of the sealing resin 40 exists between the first lead back surface 1112 and the first portion 1121. This allows the sealing resin 40 to hold the first lead 11 more firmly.

[0065] The first terminal portion 112 has a third portion 1123. This makes it possible to more reliably support the second portion 1122.

[0066] The third portion 1123 is parallel to the thickness direction z. Therefore, the dimension of the semiconductor device A10 in the first direction x can be reduced.

[0067] The first terminal portion 112 has two second portions 1122. This can increase the mounting strength of the semiconductor device A10.

[0068] The two second portions 1122 extend outward in the first direction x from the third portion 1123. This can further increase the mounting strength of the semiconductor device A10.

[0069] The size of the first portion 1121 in the second direction y is smaller than the size of the die pad portion 111 in the second direction y. This allows the holding force of the sealing resin 40 to hold the first lead 11 further increased.

[0070] The second portion 1122 does not protrude from the third portion 1123 in the first direction x, thereby enabling the dimension of the semiconductor device A10 in the first direction x to be reduced.

[0071] Grooves 49 are formed in the sealing resin 40. This allows the distance along the surface of the sealing resin 40 (hereinafter referred to as the creepage distance) from the first lead back surface 1112 to the second lead 12 (fourth portion 1221), the third lead 13 (seventh portion 1321), and the fourth lead 14 (tenth portion 1421) to be extended.

[0072] 22 to 29 show modified examples and other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals. Furthermore, the configurations of the various parts in each modified example and each embodiment can be combined with each other as appropriate within the scope of not causing technical contradictions.

[0073] First Modification of First Embodiment: Figures 22 and 23 show a first modification of the semiconductor device A10. In the semiconductor device A11 of this modification, grinding marks CM are formed on the second resin surface 42, but no clear grinding marks CM are formed on the first lead back surface 1112. As shown in Figure 23, the surface roughness of the second resin surface 42 is greater than that of the first resin surface 41, and the surface roughness of the first lead back surface 1112 is approximately the same as that of the first resin surface 41. In addition, the second resin surface 42 is located on the z1 side in the thickness direction z relative to the first lead back surface 1112.

[0074] Conditions for forming the first lead back surface 1112 and the second resin surface 42 in this modified example include, for example, when the hardness of the grinding tool CT as the grinding tool, or the hardness of the abrasive grains contained in the polishing slurry, is softer than the hardness of the first lead back surface 1112 and harder than both the second resin surface 42.

[0075] This modification also allows the first lead back surface 1112 to be in a more appropriate state. Furthermore, as can be seen from this modification, the grinding marks CM are clearly formed only on the second resin surface 42, so that the second resin surface 42 has a greater surface roughness than the first resin surface 41, and the surface roughness of the first lead back surface 1112 may be equivalent to the surface roughness of the first resin surface 41. Furthermore, the second resin surface 42 is located closer to the z1 side of the first lead back surface 1112 in the thickness direction z, and the first lead back surface 1112 is located closer to the z2 side of the second resin surface 42 in the thickness direction z. This allows the first lead back surface 1112 and the heat sink 91 to be pressed together with a higher pressing force in the usage state described with reference to FIG. 18 . This further promotes heat dissipation from the first lead 11.

[0076] 24 shows a second modification of the semiconductor device A10. In the semiconductor device A12 of this modification, clear grinding marks CM are formed on the first lead back surface 1112, but no clear grinding marks CM are formed on the second resin surface 42. This modification can occur depending on the configuration of the specific method selected as the method for removing the extension portion 409.

[0077] This modification also makes it possible to achieve a more appropriate state for the first lead back surface 1112. Furthermore, as can be understood from this modification, in the present disclosure, the surface roughness of at least one of the first lead back surface 1112 and the second resin surface 42 is greater than the surface roughness of the first resin surface 41.

[0078] 25 shows a third modification of the semiconductor device A10. In the semiconductor device A13 of this modification, the grinding marks CM are made up of multiple straight lines. Such grinding marks CM can be generated, for example, when the grinding tool CT described above is reciprocated in a linear manner.

[0079] This modification also makes it possible to put the first lead rear surface 1112 into a more appropriate state. Furthermore, as can be understood from this modification, the specific shape (pattern) of the grinding marks CM is not limited in any way.

[0080] 26 shows a fourth modification of the semiconductor device A10. In this modification A14, the sealing resin 40 includes a resin base material 401 and a plurality of fillers 402.

[0081] The resin matrix 401 is a continuous body made of a resin material, and includes, for example, a black epoxy resin. The plurality of fillers 402 are mixed into the resin matrix 401 to adjust the properties of the sealing resin 40 to desired states. The plurality of fillers 402 are made of, for example, silica (silicon dioxide). The plurality of fillers 402 include spherical fillers 402 that are entirely embedded in the resin matrix 401 and fillers 402 that are exposed from the second resin surface 42 and form part of the second resin surface 42. The fillers 402 exposed from the second resin surface 42 have a shape in which part of the spherical shape has been removed, and form part of the second resin surface 42 (grinding marks CM).

[0082] 27 shows the manufacturing process of the semiconductor device A14. As described in the manufacturing process of the semiconductor device A10, immediately after the sealing resin 40 is molded, the sealing resin 40 has an extension 409. In this state, almost all of the fillers 402 are embedded in the resin base material 401 and maintain their spherical shape. When the grinding tool CT is used to remove the extension 409, the sealing resin 40 is ground by the grinding tool CT. At this time, the fillers 402 present near the second resin surface 42 are partially ground by the grinding tool CT, resulting in the state shown in FIG. 26.

[0083] This modification also makes it possible to put the first lead rear surface 1112 into a more appropriate state. Furthermore, as can be understood from this modification, the specific configuration of the sealing resin 40 is not limited in any way.

[0084] 28 shows a semiconductor device according to a second embodiment of the present disclosure. In the semiconductor device A20 of this embodiment, the die pad portion 111 includes a metal base material 1110 and a plating layer 1119.

[0085] The metal base material 1110 constitutes the majority of the die pad portion 111. The metal base material 1110 includes, for example, copper (Cu) or a copper alloy. The plating layer 1119 covers the surface of the metal base material 1110. The plating layer 1119 includes, for example, silver (Ag), nickel (Ni), tin (Sn), or the like.

[0086] When the above-described molding of the sealing resin 40 is completed, the die pad portion 111 has the metal base material 1110 and does not yet have the plating layer 1119. When the above-described grinding tool CT is used in this state, grinding marks CM of the same size are formed on the metal base material 1110 and the second resin surface 42.

[0087] Next, as a pretreatment for forming the plating layer 1119, the metal base material 1110 is subjected to an etching treatment. This treatment positions the surface of the metal base material 1110 on the z1 side in the thickness direction z relative to the second resin surface 42. Furthermore, the grinding marks CM that were present on the surface of the metal base material 1110 are slightly flattened by the etching, and become grinding marks CM2 that have a smaller surface roughness than the grinding marks CM.

[0088] Next, the etched metal base material 1110 is plated to form a plating layer 1119. As a result, grinding marks CM2 may remain at the interface 1118 between the metal base material 1110 and the plating layer 1119. The first lead back surface 1112 formed by the plating layer 1119 has a shape in which the grinding marks CM2 remain, or has a substantially flat shape. In the illustrated example, the first lead back surface 1112 formed by the plating layer 1119 is located on the z1 side in the thickness direction z relative to the second resin surface 42.

[0089] This embodiment also makes it possible to put the first lead back surface 1112 in a more appropriate state. Furthermore, in this embodiment, a configuration can be realized in which the first lead back surface 1112 is located on the z1 side of the second resin surface 42 in the thickness direction z.

[0090] 29 shows a first modified example of the semiconductor device A20. In the semiconductor device A21 of this modified example, the first lead back surface 1112 formed by the plating layer 1119 is located on the z2 side in the thickness direction z of the second resin surface 42. This configuration can be realized, for example, when the plating thickness is large in the plating process described for the semiconductor device A20.

[0091] This modification also makes it possible to put the first lead back surface 1112 into a more appropriate state. Furthermore, this modification makes it possible to press the first lead back surface 1112 and the heat sink 91 with a higher pressing force while appropriately removing oxide films and the like that may remain on the metal base material 1110.

[0092] The semiconductor device according to the present disclosure is not limited to the above-described embodiment. The specific configuration of each part of the semiconductor device according to the present disclosure can be freely designed in various ways. The present disclosure includes the embodiments described in the following appendices.

[0093] Supplementary Note 1. A semiconductor device comprising: a semiconductor element; a first lead including a die pad portion having a first lead main surface facing one side in a thickness direction and on which the semiconductor element is mounted and a first lead back surface facing the other side in the thickness direction; and a first terminal portion; and a sealing resin having a first resin surface facing the one side in the thickness direction and a second resin surface facing the other side in the thickness direction, the sealing resin covering the semiconductor element and a part of the die pad portion, wherein the first lead back surface is exposed from the second resin surface, and the first terminal portion is located on the one side in the thickness direction with respect to the first lead main surface and includes a portion used for mounting, and at least one of the first lead back surface and the second resin surface has a surface roughness greater than that of the first resin surface. Supplementary Note 2. The semiconductor device according to Supplementary Note 1, wherein both the first lead back surface and the second resin surface have a surface roughness greater than that of the first resin surface. Supplementary Note 3. The semiconductor device according to Supplementary Note 2, wherein grinding marks are formed across the first lead back surface and the second resin surface. Supplementary Note 4. The semiconductor device according to Appendix 3, wherein the sealing resin includes a resin base material and a plurality of fillers, and the plurality of fillers include spherical fillers that are entirely embedded in the resin base material and fillers that are exposed from the second resin surface and form part of the second resin surface. Appendix 5. The semiconductor device according to any one of Appendixes 1 to 4, wherein the die pad portion includes a metal base material and a plating layer, and the back surface of the first lead is formed by the plating layer. Appendix 6. The semiconductor device according to Appendix 5, wherein an interface between the metal base material and the plating layer is located on the one side in the thickness direction relative to the second resin surface. Appendix 7. The semiconductor device according to Appendix 6, wherein the interface has grinding marks with a surface roughness that is smaller than the grinding marks on the second resin surface. Appendix 8. The semiconductor device according to any one of Appendixes 1 to 7, wherein the second resin surface is located on the one side in the thickness direction relative to the back surface of the first lead. Appendix 9. The semiconductor device according to any one of Appendixes 1 to 7, wherein the second resin surface is located on the other side in the thickness direction relative to the back surface of the first lead.Appendix 10. The semiconductor device according to any one of Appendixes 1 to 9, wherein the sealing resin has a third resin surface facing one side in a first direction orthogonal to the thickness direction, and the back surface of the first lead is spaced from the third resin surface to the other side in the first direction. Appendix 11. The semiconductor device according to Appendix 10, wherein the first terminal portion has a first portion and a second portion, the first portion penetrating the third resin surface, and the second portion is located on the one side in the thickness direction with respect to the first portion and is used for mounting. Appendix 12. The semiconductor device according to Appendix 11, wherein the first portion is spaced from the second resin surface in the thickness direction. Appendix 13. The semiconductor device according to Appendix 12, wherein the first terminal portion has a third portion interposed between the first portion and the second portion. Appendix 14. The semiconductor device according to Appendix 13, wherein the third portion extends from the first portion to the one side in the thickness direction. Appendix 15. The semiconductor device according to claim 14, wherein the third portion is parallel to the thickness direction. Appendix 16. The semiconductor device according to claim 14 or 15, wherein the first terminal portion has two of the second portions. Appendix 17. The semiconductor device according to any of claims 1 to 16, wherein the sealing resin has a groove recessed from the second resin surface to the one side in the thickness direction.

[0094] A10, A11, A12, A13, A14, A20, A21: semiconductor device 10: conductive member 11: first lead 12: second lead 13: third lead 14: fourth lead 20: semiconductor element 29: bonding layer 31, 32, 33: connecting member 40: sealing resin 41: first resin surface 42: second resin surface 43: third resin surface 44: fourth resin surface 45: fifth resin surface 46: sixth resin surface 47: recess 49: groove 91: heat sink 92: circuit board 111: die pad portion 112: first terminal portion 121: pad portion 122: second terminal portion 131: pad portion 132: third terminal portion 141: pad portion 142: fourth terminal portion 201: first electrode 202: second electrode 203: Third electrode 205: Semiconductor layer 401: Resin base material 402: Filler 409: Extension portion 919: Sheet material 921: Solder 1110: Metal base material 1111: First lead main surface 1112: First lead back surface 1113: First lead side surface 1114: First intermediate surface 1115: Second intermediate surface 1118: Boundary surface 1119: Plating layer 1121: First part 1122: Second part 1123: Third part 1211: Second lead main surface 1212: Second lead back surface 1221: Fourth part 1222: Fifth part 1223: Sixth part 1311: Third lead main surface 1312: Third lead back surface 1321: Seventh part 1322: Eighth part 1323: Part 9 1411: Fourth lead main surface 1412: Fourth lead back surface 1421: Part 10 1422: Part 11 1423: Part 12 CM, CM2: Grinding marks CT: Grinding tool x: First direction y: Second direction z: Thickness direction

Claims

1. A semiconductor element; a first lead including a die pad portion having a first lead main surface facing one side in a thickness direction and on which the semiconductor element is mounted and a first lead back surface facing the other side in the thickness direction, and a first terminal portion; a sealing resin having a first resin surface facing the one side in the thickness direction and a second resin surface facing the other side in the thickness direction, the sealing resin covering the semiconductor element and a part of the die pad portion, the first lead rear surface is exposed from the second resin surface, the first terminal portion is located on the one side in the thickness direction with respect to the first lead main surface and includes a portion used for mounting; At least one of the first lead rear surface and the second resin surface has a surface roughness greater than that of the first resin surface.

2. The semiconductor device according to claim 1 , wherein both the first lead rear surface and the second resin surface have a surface roughness greater than that of the first resin surface.

3. The semiconductor device according to claim 2 , further comprising a grinding mark formed across the rear surface of the first lead and the second resin surface.

4. the sealing resin includes a resin base material and a plurality of fillers; 4. The semiconductor device according to claim 3, wherein the plurality of fillers include spherical fillers entirely embedded in the resin base material, and fillers exposed from the second resin surface and constituting a part of the second resin surface.

5. the die pad portion includes a metal base material and a plating layer, 5. The semiconductor device according to claim 1, wherein a rear surface of said first lead is formed by said plating layer.

6. The semiconductor device according to claim 5 , wherein an interface between the metal base material and the plating layer is located on the one side in the thickness direction relative to the second resin surface.

7. The semiconductor device according to claim 6 , wherein the boundary surface has grinding marks having a surface roughness smaller than the grinding marks on the second resin surface.

8. The semiconductor device according to claim 1 , wherein the second resin surface is located on the one side in the thickness direction relative to a rear surface of the first lead.

9. The semiconductor device according to claim 1 , wherein the second resin surface is located on the other side in the thickness direction relative to a rear surface of the first lead.

10. the sealing resin has a third resin surface facing one side in a first direction perpendicular to the thickness direction, 5. The semiconductor device according to claim 1, wherein the first lead rear surface is spaced from the third resin surface to the other side in the first direction.

11. the first terminal portion has a first portion and a second portion, the first portion penetrates the third resin surface, The semiconductor device according to claim 10 , wherein the second portion is located on the one side in the thickness direction with respect to the first portion and is used for mounting.

12. The semiconductor device according to claim 11 , wherein the first portion is spaced apart from the second resin surface in the thickness direction.

13. The semiconductor device according to claim 12 , wherein the first terminal portion has a third portion interposed between the first portion and the second portion.

14. The semiconductor device according to claim 13 , wherein the third portion extends from the first portion to the one side in the thickness direction.

15. The semiconductor device according to claim 14 , wherein the third portion is parallel to the thickness direction.

16. The semiconductor device according to claim 14 , wherein the first terminal portion has two of the second portions.

17. The semiconductor device according to claim 1 , wherein the sealing resin has a groove recessed from the second resin surface to the one side in the thickness direction.