Semiconductor device and method for manufacturing semiconductor device

Abstract

In the present invention, a semiconductor device comprises: a semiconductor element that has an element main surface and an element rear surface that are oriented toward opposite sides in the thickness direction, and a first electrode that is located on the element main surface; a buffer portion that is bonded to the first electrode in a conductive manner; and a wire that is bonded to the buffer portion in a conductive manner, and includes a first metal.

Description

Semiconductor device and method for manufacturing the same

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.

[0002] Patent Document 1 discloses a semiconductor device that is a power module. The semiconductor device includes a substrate on which a mounting layer and a conductive layer are arranged, a plurality of switching elements, and a plurality of wires. The plurality of switching elements are electrically connected to the mounting layer. The plurality of wires respectively connect the main surface electrodes of the switching elements to the conductive layer. The plurality of wires are made of aluminum.

[0003] Because multiple wires carry a large current, copper, which has a lower resistivity than aluminum, is more suitable. Forming a copper plating layer on the principal surface electrode improves the bondability between the copper wire and the principal surface electrode. However, when joining copper wires to the principal surface electrode, the impact on the switching element is greater than when joining aluminum wires. This may result in damage to the switching element due to the bonding impact. Furthermore, when joining wires made of a metal harder than copper, the likelihood of damage to the switching element increases. Potential solutions to prevent damage to the switching element include forming a thicker plating layer or bonding copper foil to the principal surface electrode, but both of these methods complicate the manufacturing process and increase manufacturing costs.

[0004] JP 2018-182330 A

[0005] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above-mentioned circumstances, an object of the present disclosure is to provide a semiconductor device that can reduce the impact applied to a semiconductor element when bonding wires and can suppress an increase in manufacturing costs.

[0006] A semiconductor device provided by a first aspect of the present disclosure includes a semiconductor element having a main surface and a back surface of the element facing opposite each other in a thickness direction, and a first electrode arranged on the main surface of the element, a buffer portion conductively joined to the first electrode, and a first wire conductively joined to the buffer portion and including a first metal.

[0007] A manufacturing method of a semiconductor device provided by a second aspect of the present disclosure includes a buffer portion forming process for forming a buffer portion by joining a wire material to a first electrode of a semiconductor element and cutting the wire material, and a first wire joining process for joining a first wire to the buffer portion.

[0008] According to the above configuration, it is possible to reduce the impact applied to the semiconductor element when the first wire is bonded, and also to suppress an increase in manufacturing costs.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1 , seen through a resin member. FIG. 3 is a partially enlarged view of a portion of FIG. 2 . FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2 . FIG. 5 is a cross-sectional view taken along line V-V in FIG. 2 . FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 3 . FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 6 . FIG. 8 is a perspective view showing a state in which a driving device is attached to the semiconductor device shown in FIG. 1 . FIG. 9 is a circuit diagram showing an example of a circuit configuration of the semiconductor device shown in FIG. 1 . FIG. 10 is a flowchart showing an example of a manufacturing method of the semiconductor device shown in FIG. 1 . FIG. 11 is a cross-sectional view showing a process according to an example of a manufacturing method of the semiconductor device shown in FIG. 1 . FIG. 12 is a cross-sectional view showing a process according to an example of a manufacturing method of the semiconductor device shown in FIG. 1 . FIG. 13 is a cross-sectional view showing a process according to an example of a manufacturing method of the semiconductor device shown in FIG. 1 . FIG. 14 is a cross-sectional view showing a process according to an example of a manufacturing method of the semiconductor device shown in FIG. 1 . FIG. 15 is a front view showing an entire wedge tool. 16 is a cross-sectional view taken along line XVI-XVI of the wedge tool shown in FIG. 15 . FIG. 17 is a partially enlarged plan view showing a step in an example of a method for manufacturing the semiconductor device shown in FIG. 1 . FIG. 18 is a cross-sectional view showing a step in an example of a method for manufacturing the semiconductor device shown in FIG. 1 . FIG. 19 is a cross-sectional view showing a step in an example of a method for manufacturing the semiconductor device shown in FIG. 1 . FIG. 20 is a cross-sectional view showing a step in an example of a method for manufacturing the semiconductor device shown in FIG. 1 . FIG. 21 is a front view showing a step in an example of a method for manufacturing the semiconductor device shown in FIG. 1 . FIG. 22 is a partially enlarged cross-sectional view showing a semiconductor device according to a first modified example of the first embodiment. FIG. 23 is a partially enlarged plan view showing a semiconductor device according to a second modified example of the first embodiment. FIG. 24 is a partially enlarged plan view showing a semiconductor device according to a third modified example of the first embodiment. FIG. 25 is a partially enlarged plan view showing a semiconductor device according to a fourth modified example of the first embodiment. FIG. 26 is a partially enlarged plan view showing a semiconductor device according to a second embodiment of the present disclosure. FIG. 27 is a cross-sectional view taken along line XXVII-XXVII of FIG. 26 . FIG. 28 is a partially enlarged cross-sectional view showing a semiconductor device according to a third embodiment of the present disclosure.FIG. 29 is a plan view showing a semiconductor device according to a fourth embodiment of the present disclosure, and is a view seen through a resin member.

[0011] Preferred embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

[0012] 1 to 9, a semiconductor device A10 according to a first embodiment of the present disclosure will be described. The semiconductor device A10 includes a plurality of semiconductor elements 11, a plurality of semiconductor elements 12, a support member 2, a plurality of terminals 3, a plurality of wires 41 to 47, a buffer portion 48, and a resin member 5. The plurality of terminals 3 include power terminals 31 and 32, a signal terminal 33, detection terminals 34 and 35, and temperature detection terminals 36 and 37. The semiconductor device A10 is used with a drive device 7 attached.

[0013] FIG. 1 is a perspective view showing the semiconductor device A10. FIG. 2 is a plan view of the semiconductor device A10. In FIG. 2, for ease of understanding, the outline of the resin member 5 is shown by an imaginary line (two-dot chain line) through the resin member 5. FIG. 3 is a partially enlarged view of FIG. 2. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2. FIG. 5 is a cross-sectional view taken along line V-V in FIG. 2. Note that multiple wires 41 to 47 are omitted in FIGS. 4 and 5. FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 3. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 6. FIG. 8 is a perspective view showing the semiconductor device A10 with a driving device 7 attached. FIG. 9 is a circuit diagram showing an example of the circuit configuration of the semiconductor device A10.

[0014] The shape of the portion of the semiconductor device A10 covered with the resin member 5 as viewed in the thickness direction is rectangular. For ease of explanation, the thickness direction (direction in a plan view) of the semiconductor device A10 is referred to as the z direction, the direction in which the power terminals 31 and 32 of the semiconductor device A10 protrude, which is perpendicular to the z direction (the left-right direction in FIG. 2 ), is referred to as the x direction, and the direction perpendicular to the z direction and the x direction (the up-down direction in FIG. 2 ) is referred to as the y direction. Furthermore, one side of the z direction (the lower side in FIGS. 4 and 5 ) is referred to as the z1 side, and the other side (the upper side in FIGS. 4 and 5 ) is referred to as the z2 side. One side of the x direction (the left side in FIG. 2 ) is referred to as the x1 side, and the other side (the right side in FIG. 2 ) is referred to as the x2 side. One side of the y direction (the lower side in FIG. 2 ) is referred to as the y1 side, and the other side (the upper side in FIG. 2 ) is referred to as the y2 side. The z direction corresponds to the "thickness direction" in this disclosure. The dimensions of the semiconductor device A10 are not particularly limited.

[0015] The multiple semiconductor elements 11 are components that perform the electrical functions of the semiconductor device A10. Each semiconductor element 11 is constructed using a semiconductor material primarily composed of, for example, SiC (silicon carbide). Note that the semiconductor material is not limited to SiC and may be Si (silicon), GaAs (gallium arsenide), GaN (gallium nitride), or the like. Each semiconductor element 11 is, for example, a switching element such as a metal-oxide-semiconductor field-effect transistor (MOSFET). Note that each semiconductor element 11 is not limited to a MOSFET and may be a field-effect transistor including a metal-insulator-semiconductor field-effect transistor (MISFET) or a bipolar transistor such as an insulated gate bipolar transistor (IGBT). For example, each of the multiple semiconductor elements 11 is an n-channel MOSFET, and all of the multiple semiconductor elements 11 are the same element. Note that each semiconductor element 11 may be a p-channel MOSFET.

[0016] As shown in Figures 2 and 5, the multiple semiconductor elements 11 are arranged at equal intervals in the x direction and connected in parallel to one another. In this embodiment, as shown in Figure 2, the semiconductor device A10 includes five semiconductor elements 11. The number of semiconductor elements 11 is not limited to this and can be freely set depending on the performance required of the semiconductor device A10. Each semiconductor element 11 is bonded onto the support member 2 by a conductive bonding material 110. The conductive bonding material 110 is, for example, solder, silver paste, or sintered metal.

[0017] Each semiconductor element 11 has an element principal surface 11a and an element rear surface 11b. The element principal surface 11a and the element rear surface 11b face opposite each other in the z direction. The element principal surface 11a faces the z2 side in the z direction. The element rear surface 11b faces the z1 side in the z direction. The element rear surface 11b faces the support member 2.

[0018] Each semiconductor element 11 also has a first electrode 111, a second electrode 112, and a third electrode 113. The first electrode 111 and the second electrode 112 are disposed on the element principal surface 11a. The first electrode 111 is larger than the second electrode 112 in a plan view. The third electrode 113 is disposed on the element rear surface 12b. The third electrode 113 covers substantially the entire surface of the element rear surface 11b. As shown in FIG. 6 , the first electrode 111 includes a first metal layer 111a and a second metal layer 111b. The first metal layer 111a is made of, but is not limited to, Al in this embodiment. The second metal layer 111b is formed on the first metal layer 111a by, for example, a plating process. Note that the second metal layer 111b may also be formed by other processes. The second metal layer 111b is made of, but is not limited to, Cu in this embodiment. The thickness dimension (dimension in the z-direction) of the second metal layer 111b is 50 μm or less. Note that another conductive layer may be interposed between the first metal layer 111a and the second metal layer 111b. The constituent materials of the second electrode 112 and the third electrode 113 are not limited, but are Al in this embodiment. In each semiconductor element 11, which is a MOSFET, the first electrode 111 is a source electrode, the second electrode 112 is a gate electrode, and the third electrode 113 is a drain electrode. The third electrode 113 is conductively bonded to a portion of the support member 2 (the conductor layer 223 of the main surface metal layer 22, described below) via a conductive bonding material 110. The third electrode 113 is in contact with the conductive bonding material 110. The wires 41, 44 to 46 and the buffer portion 48 are bonded to the first electrode 111. The wire 43 is bonded to the second electrode 112.

[0019] The semiconductor elements 12 are diodes such as Schottky barrier diodes, etc. Each semiconductor element 12 is connected in anti-parallel to each semiconductor element 11, as shown in FIG.

[0020] Each semiconductor element 12 is bonded onto the support member 2 by a conductive bonding material 120. The conductive bonding material 120 is, for example, solder, silver paste, or sintered metal. The number of semiconductor elements 12 corresponds to the number of semiconductor elements 11. Note that the semiconductor device A10 does not necessarily have to include each semiconductor element 12.

[0021] Each semiconductor element 12 has an element main surface 12a and an element back surface 12b. The element main surface 12a and the element back surface 12b face opposite each other in the z direction. The element main surface 12a faces the z2 side in the z direction. The element back surface 12b faces the z1 side in the z direction. The element back surface 12b faces the support member 2.

[0022] Each semiconductor element 12 has an anode electrode 121 and a cathode electrode 122. The anode electrode 121 is disposed on the element's main surface 12a. The cathode electrode 122 is disposed on the element's back surface 12b. The cathode electrode 122 is electrically connected to a part of the support member 2 (a conductor layer 223 of the main surface metal layer 22 described below) via the conductive bonding material 120. The cathode electrode 122 is in contact with the conductive bonding material 120.

[0023] The support members 2 are members that support the plurality of semiconductor elements 11, 12, and also form conductive paths between each semiconductor element 11 and the plurality of terminals 3. The support members 2 include an insulating substrate 21, a main surface metal layer 22, and a back surface metal layer 23.

[0024] The insulating substrate 21 is, for example, flat and electrically insulating. The constituent material of the insulating substrate 21 is, for example, ceramics with excellent thermal conductivity, and in this embodiment, is Al2O3 (aluminum oxide). The constituent material of the insulating substrate 21 is not limited and may be other ceramics such as AlN (aluminum nitride) or SiN (silicon nitride). The constituent material of the insulating substrate 21 is also not limited to ceramics and may be Si or synthetic resin. The constituent material of the insulating substrate 21 may be any material as long as it is insulating and can withstand the heat generated by the semiconductor element 11.

[0025] The insulating substrate 21 has a main surface 211 and a back surface 212. The main surface 211 and the back surface 212 face opposite each other in the z direction. The main surface 211 faces the z2 side in the z direction. The back surface 212 faces the z1 side in the z direction.

[0026] The main surface metal layer 22 is formed on the main surface 211 of the insulating substrate 21. The constituent material of the main surface metal layer 22 is, for example, a metal containing Cu. The constituent material of the main surface metal layer 22 is not limited. The main surface metal layer 22 is formed, for example, by plating. The method of forming the main surface metal layer 22 is not limited. The main surface metal layer 22 is covered with a resin member 5. The main surface metal layer 22 includes conductor layers 221 to 225 and a plurality of conductor layers 226 and 227. The conductor layers 221 to 227 are arranged spaced apart from each other.

[0027] The conductor layer 221 includes a strip portion 221a and a terminal joint portion 221b. The strip portion 221a extends in the x direction and is joined to a plurality of wires 41 and 42. The terminal joint portion 221b is connected to the end of the strip portion 221a on the x2 side in the x direction and is joined to a part of the power terminal 32 (a pad portion 321 described below).

[0028] The conductive layer 222 includes a strip portion 222a and a terminal bonding portion 222b. The strip portion 222a extends in the x direction and is bonded to a plurality of wires 43. The terminal bonding portion 222b is connected to the end of the strip portion 222a on the x1 side in the x direction, and is bonded to a part of the signal terminal 33 (a pad portion 331 described below).

[0029] The conductive layer 223 includes a strip portion 223a and a terminal bonding portion 223b. The strip portion 223a extends along the x-direction, and multiple semiconductor elements 11, 12 are bonded to the strip portion 223a. Heat from each semiconductor element 11 is appropriately transferred to the strip portion 223a (conductive layer 223) via the conductive bonding material 110. The multiple semiconductor elements 11 bonded to the strip portion 223a are aligned in the direction in which the strip portion 223a extends (x-direction). The terminal bonding portion 223b is connected to the end of the strip portion 223a on the x-direction x1 side, and is bonded to a portion of the power terminal 31 (a pad portion 311 described below). 4 and 5 , the conductor layer 223 is electrically connected to the third electrode 113 (drain electrode) of each semiconductor element 11 via each conductive bonding material 110, and is also electrically connected to the cathode electrode 122 of each semiconductor element 12 via each conductive bonding material 120. In other words, the third electrode 113 of each semiconductor element 11 and the cathode electrode 122 of each semiconductor element 12 are electrically connected to each other via the conductor layer 223.

[0030] The conductive layer 224 includes a strip portion 224a and a terminal bonding portion 224b. The strip portion 224a extends in the x direction and is bonded to a plurality of wires 44. The terminal bonding portion 224b is connected to the end of the strip portion 224a on the x1 side in the x direction, and is bonded to a part of the detection terminal 35 (a pad portion 351 described below).

[0031] The conductive layer 225 is joined to a wire 42. The conductive layer 225 is also joined to a part of the detection terminal 34 (a pad portion 341 described later).

[0032] In the main surface metal layer 22, the multiple strip-shaped portions 221a, 222a, 223a, and 224a are aligned in the y direction and overlap one another when viewed in the y direction. The alignment of the multiple strip-shaped portions 221a, 222a, 223a, and 224a in the y direction is not particularly limited. In this embodiment, as shown in FIGS. 2 and 3 , the strip-shaped portions 224a, 222a, 221a, and 223a are aligned in this order from the y1 side in the y direction toward the y2 side in the y direction. Thus, the strip-shaped portion 221a is positioned between the strip-shaped portions 222a and 223a in the y direction, and the strip-shaped portion 222a is positioned between the strip-shaped portions 221a and 224a in the y direction. The strip-shaped portion 223a is positioned on the opposite side of the strip-shaped portion 222a in the y direction, with the strip-shaped portion 221a sandwiched between them. The conductive layer 225 is disposed on the x1 side of the terminal joint portion 222b of the conductive layer 222 in the x-direction.

[0033] Each of the plurality of conductor layers 226, 227 is disposed on the y2 side of the strip portion 223a of the conductor layer 223 in the y direction. The main surface metal layer 22 includes the same number of conductor layers 226 and 227 as the number of semiconductor elements 11 (five in this embodiment). The conductor layers 226 and 227 are disposed alternately along the x direction. A wire 46 is bonded to each conductor layer 226. A portion of the temperature detection terminal 36 (a pad portion 361 described below) is also bonded to each conductor layer 226. A wire 47 is bonded to each conductor layer 227. A portion of the temperature detection terminal 37 (a pad portion 371 described below) is also bonded to each conductor layer 227.

[0034] The arrangement and shape of the conductive layers 221 to 227 are not limited to those described above, but may be appropriately designed depending on the arrangement position of the terminals 3 and the like.

[0035] The back surface metal layer 23 is formed on the back surface 212 of the insulating substrate 21. The constituent material of the back surface metal layer 23 is, for example, a metal containing Cu. Note that the constituent material is not limited. The back surface metal layer 23 is formed, for example, by electroless plating. Note that the method for forming the back surface metal layer 23 is not limited. As shown in FIGS. 4 and 5 , the surface of the back surface metal layer 23 facing the z-direction z1 side is exposed from the resin member 5. Note that the surface facing the z-direction z1 side may be covered by the resin member 5. Furthermore, the support member 2 may not include the back surface metal layer 23. In this case, the back surface 212 of the insulating substrate 21 may be covered by the resin member 5 or may be exposed from the resin member 5.

[0036] Each terminal 3 is bonded to the main surface metal layer 22 inside the resin member 5. Each terminal 3 protrudes from the insulating substrate 21 when viewed in the z direction. A portion of each terminal 3 is exposed from the resin member 5. Each terminal 3 is formed, for example, from the same lead frame. Each terminal 3 is made of a metal, preferably either Cu or Ni, or an alloy thereof, or a 42 alloy, etc.

[0037] The power terminal 31 is a drain terminal of the semiconductor device A10. The power terminal 31 is a plate-shaped member. The power terminal 31 is electrically connected to the third electrode 113 (drain electrode) of each semiconductor element 11 via the conductive layer 223 and the conductive bonding material 110.

[0038] The power terminal 31 includes a pad portion 311 and a terminal portion 312. The pad portion 311 is covered with a resin member 5. The pad portion 311 is bonded to the conductive layer 223. This bonding may be performed by any method, such as bonding using a conductive bonding material (such as solder, silver paste, or sintered metal), laser bonding, or ultrasonic bonding. The terminal portion 312 is exposed from the resin member 5. As shown in FIG. 2 , the terminal portion 312 extends from the resin member 5 toward the x1 side in the x direction when viewed in the z direction. The surface of the terminal portion 312 may be silver-plated, for example.

[0039] The power terminal 32 is a source terminal of the semiconductor device A10. The power terminal 32 is a plate-shaped member. The power terminal 32 is electrically connected to the first electrode 111 (source electrode) of each semiconductor element 11 via the conductive layer 221 and multiple wires 41.

[0040] The power terminal 32 includes a pad portion 321 and a terminal portion 322. The pad portion 321 is covered with a resin member 5. The pad portion 321 is bonded to the conductive layer 221. This bonding may be performed by any method, such as bonding using a conductive bonding material, laser bonding, or ultrasonic bonding. The terminal portion 322 is exposed from the resin member 5. As shown in FIG. 2 , the terminal portion 322 extends from the resin member 5 toward the x2 side in the x direction when viewed in the z direction. The surface of the terminal portion 322 may be silver-plated, for example.

[0041] The signal terminal 33 is a gate terminal of the semiconductor device A10. The signal terminal 33 is electrically connected to the second electrode 112 (gate electrode) of each semiconductor element 11 via the conductive layer 222 and a plurality of wires 43. A drive signal for controlling the on / off of each semiconductor element 11 is input to the signal terminal 33. As shown in FIG. 9 , for example, a drive circuit DR is connected to the signal terminal 33. The drive circuit DR generates a drive signal for controlling the switching operation of each semiconductor element 11. The drive signal is input to the signal terminal 33 from the drive circuit DR. Note that the drive circuit DR shown in FIG. 9 is merely an example and is not limited to the circuit configuration shown.

[0042] The signal terminal 33 includes a pad portion 331 and a terminal portion 332. The pad portion 331 is covered with a resin member 5. The pad portion 331 is bonded to the conductive layer 222. This bonding may be performed by any method, such as bonding using a conductive bonding material, laser bonding, or ultrasonic bonding. The terminal portion 332 is exposed from the resin member 5. The terminal portion 332 is L-shaped when viewed in the x direction.

[0043] The detection terminal 34 is a source sense terminal of the semiconductor device A10. The detection terminal 34 is electrically connected to the first electrode 111 (source electrode) of the semiconductor element 11 via the conductor layer 225, the wire 42, the conductor layer 221, and a plurality of wires 41. As shown in FIG. 9 , the detection terminal 34 is connected to, for example, a drive circuit DR. The voltage applied to the detection terminal 34 is input to the drive circuit DR as a feedback signal.

[0044] The detection terminal 34 includes a pad portion 341 and a terminal portion 342. The pad portion 341 is covered with a resin member 5. The pad portion 341 is bonded to the conductive layer 225. This bonding may be performed by any method, such as bonding using a conductive bonding material, laser bonding, or ultrasonic bonding. The terminal portion 342 is exposed from the resin member 5. The terminal portion 342 is L-shaped when viewed in the x direction.

[0045] The detection terminal 35 is a source sense terminal of the semiconductor device A10. The detection terminal 35 is electrically connected to the first electrode 111 (source electrode) of each semiconductor element 11 via the conductor layer 224 and multiple wires 44. As shown in FIG. 9 , for example, a Miller clamp circuit MC external to the semiconductor device A10 is connected between the detection terminal 35 and the signal terminal 33. The Miller clamp circuit MC is a circuit for preventing malfunction (false gate on) of each semiconductor element 11, and as shown in FIG. 9 , includes, for example, a MOSFET. The source terminal of the MOSFET is connected to the detection terminal 35, and the drain terminal of the MOSFET is connected to the signal terminal 33. When the semiconductor element 11 is off, turning on the MOSFET of the Miller clamp circuit MC forces the gate-source voltage of the semiconductor element 11 to approximately 0 (zero) V or a negative bias voltage, thereby preventing the gate potential of the semiconductor element 11 from rising.

[0046] The detection terminal 35 includes a pad portion 351 and a terminal portion 352. The pad portion 351 is covered with a resin member 5. The pad portion 351 is bonded to the conductive layer 224. This bonding may be performed by any method, such as bonding using a conductive bonding material, laser bonding, or ultrasonic bonding. The terminal portion 352 is exposed from the resin member 5. As shown in FIG. 4 , the terminal portion 352 is L-shaped when viewed in the x direction.

[0047] 2 and 3, the detection terminal 34, the signal terminal 33, and the detection terminal 35 are lined up in this order along the x direction from the x1 side to the x2 side in the x direction, and overlap when viewed in the x direction as shown in Fig. 4. The detection terminal 34, the signal terminal 33, and the detection terminal 35 protrude from the resin side surface 533 on the y1 side in the y direction.

[0048] Each of the plurality of temperature detection terminals 36, 37 is a terminal for detecting the temperature of the semiconductor element 11. One temperature detection terminal 36 and one temperature detection terminal 37 are provided for each semiconductor element 11. In this embodiment, the semiconductor device A10 includes five semiconductor elements 11, and therefore includes five temperature detection terminals 36 and five temperature detection terminals 37. Each temperature detection terminal 36 is bonded to a conductor layer 226. Each temperature detection terminal 36 is electrically connected to a wire 46 via the conductor layer 226. Each temperature detection terminal 37 is bonded to a conductor layer 227. Each temperature detection terminal 37 is electrically connected to a wire 47 via the conductor layer 227.

[0049] The temperature detection terminal 36 includes a pad portion 361 and a terminal portion 362. The pad portion 361 is covered with the resin member 5. The pad portion 361 is bonded to the conductive layer 226. This bonding may be performed by any method, such as bonding using a conductive bonding material, laser bonding, or ultrasonic bonding. The terminal portion 362 is exposed from the resin member 5. As shown in FIG. 4 , the terminal portion 362 is L-shaped when viewed in the x direction. The temperature detection terminal 37 includes a pad portion 371 and a terminal portion 372. The pad portion 371 is covered with the resin member 5. The pad portion 371 is bonded to the conductive layer 227. This bonding may be performed by any method, such as bonding using a conductive bonding material, laser bonding, or ultrasonic bonding. The terminal portion 372 is exposed from the resin member 5. The terminal portion 372 is L-shaped when viewed in the x direction.

[0050] 2 and 3, the temperature detection terminals 36 and the temperature detection terminals 37 are arranged alternately along the x direction and overlap each other when viewed in the x direction as shown in Fig. 4. Each of the temperature detection terminals 36 and 37 protrudes from the resin side surface 534 on the y2 side in the y direction.

[0051] Each of the multiple wires 41 to 45 provides electrical conduction between two spaced apart locations. Each of the wires 41 to 45 is a so-called bonding wire. In this embodiment, each of the wires 41 to 45 is formed by wedge bonding. Alternatively, each of the wires 41 to 45 may be formed by ball bonding. The material of each of the wires 41 to 45 is, for example, Al, Au, Cu, or an alloy containing any of these, but is not limited thereto. In this embodiment, a case where the material of each of the wires 41 to 45 is Cu will be described. Furthermore, in this embodiment, as shown in FIG. 3 , the diameter of each of the wires 41, 42, and 45, through which a relatively large current flows, is larger than the diameter of each of the wires 43 and 44, through which only a relatively small current flows. The diameter of each of the wires 41, 42, and 45 is, for example, approximately 400 μm, and the diameter of each of the wires 43 and 44 is, for example, approximately 150 μm. The diameter of each of the wires 41 to 45 is not limited thereto.

[0052] One end of each of the plurality of wires 41 is joined to the first electrode 111 (source electrode), and the other end is joined to the conductive layer 221. Each wire 41 electrically connects the first electrode 111 of each semiconductor element 11 to the conductive layer 221.

[0053] One end of the wire 42 is joined to the conductive layer 221, and the other end is joined to the conductive layer 225. The wire 42 electrically connects the conductive layer 221 and the conductive layer 225. The other end of the wire 42 may be joined to the pad portion 341 of the detection terminal 34 instead of being joined to the conductive layer 225.

[0054] One end of each of the plurality of wires 43 is joined to the second electrode 112 (gate electrode) of each semiconductor element 11, and the other end is joined to the conductive layer 222. Each wire 43 electrically connects the corresponding second electrode 112 and the conductive layer 222.

[0055] One end of each of the multiple wires 44 is joined to the first electrode 111 (source electrode), and the other end is joined to the conductive layer 224. Each wire 44 electrically connects the first electrode 111 of each semiconductor element 11 to the conductive layer 224. Each wire 44 is a sense line Kelvin-connected to the first electrode 111 (source electrode) of each semiconductor element 11.

[0056] One end of each of the plurality of wires 45 is joined to the first electrode 111 (source electrode), and the other end is joined to the anode electrode 121 of each semiconductor element 12. Each wire 45 electrically connects the first electrode 111 of each semiconductor element 11 and the anode electrode 121 of each semiconductor element 12.

[0057] The multiple wires 46, 47 are components for detecting the temperature of the semiconductor element 11. Like the wires 41 to 45, the wires 46, 47 are formed by the same bonding wire forming method. In this embodiment, the wires 46, 47 are formed by wedge bonding. Alternatively, the wires 46, 47 may be formed by ball bonding. One end of each wire 46 is bonded to the first electrode 111 (second metal layer 111b) and the other end is bonded to the conductive layer 226. Each wire 46 provides electrical continuity between the first electrode 111 of each semiconductor element 11 and the corresponding conductive layer 226. One end of each wire 47 is bonded to a buffer portion 48 disposed on the first electrode 111 (second metal layer 111b) and the other end is bonded to the conductive layer 227. Each wire 47 provides electrical continuity between the buffer portion 48 and the corresponding conductive layer 227. In this embodiment, since only a relatively small current flows through each of the wires 46 and 47, the diameter of each of the wires 46 and 47 is approximately the same (for example, about 150 μm) as that of each of the wires 43 and 44. The diameter of each of the wires 46 and 47 is not limited.

[0058] The wire 46 is made of a second metal. In this embodiment, the second metal is Cu, the same as the second metal layer 111b of the first electrode 111. The wire 47 is made of a first metal with a different thermoelectric power from the second metal. Thermoelectric power refers to the thermoelectric power per 1 K when a temperature difference is applied between both ends of a conductive material. In this embodiment, the first metal is constantan (an alloy of Cu and Ni: 55Cu-45Ni). The wire 46 (Cu), the second metal layer 111b (Cu) of the first electrode 111, the buffer portion 48 (Cu, as described below), and the wire 47 (Constantan) function as a thermocouple. A thermocouple made of Cu and Constantan is widely known as a T-type thermocouple. The junction 47a between the wire 47 and the buffer portion 48 corresponds to the temperature measurement junction (hot junction) of the thermocouple. The junction between wire 46 and conductive layer 226 and the junction between wire 47 and conductive layer 227 correspond to the reference junction (cold junction) of the thermocouple. A voltage is generated between the reference junction depending on the temperature difference between the reference junction and the temperature measurement junction. Temperature detection terminals 36 and 37 output the voltage between the reference junctions to drive device 7 as a signal for detecting the temperature of semiconductor element 11.

[0059] The buffer portion 48 is bonded to the first electrode 111 (second metal layer 111b) and serves to absorb impact on the semiconductor element 11 when the wire 47 is bonded. The wire 47 is made of the first metal (constantan). Therefore, the wire 47 has a higher Vickers hardness than the second metal layer 111b, which is made of Cu. Furthermore, the second metal layer 111b is formed by plating and therefore has a relatively small thickness (50 μm or less). Therefore, if the wire 47 is bonded to the first electrode 111 by wedge bonding, the semiconductor element 11 may be damaged by the impact. The buffer portion 48 is electrically connected to the second metal layer 111b of the first electrode 111, and the wire 47 is electrically connected to the buffer portion 48, thereby absorbing impact on the semiconductor element 11 and suppressing damage to the semiconductor element 11. In this embodiment, the buffer section 48 is made of the same material as the second metal layer 111 b of the first electrode 111 and the wire 46 , that is, Cu.

[0060] The buffer portion 48 is a wire piece formed by wedge bonding a wire material. Unlike conventional wire bonding, the buffer portion 48 is formed by first bonding the wire material, slightly extending it, and then immediately cutting it, as described below. In this embodiment, the buffer portion 48 is formed using the same wire material as the wires 41, 42, and 45. Therefore, the buffer portion 48 is made of Cu, the same material as the wires 41, 42, and 45. The dimension of the buffer portion 48 in a direction perpendicular to the extension direction (hereinafter sometimes referred to as "diameter") is approximately the same as the diameter of the wires 41, 42, and 45 (e.g., approximately 400 μm) and larger than the diameter of the wire 47. The buffer portion 48 may be formed using a wire material different from that of the wires 41, 42, and 45, and the diameter of the buffer portion 48 is not limited.

[0061] The buffer section 48 has a shape in which a substantially cylindrical wire material is pressed against the first electrode 111 by wedge bonding and crushed. As shown in FIGS. 6 and 7 , the buffer section 48 has a top surface 481, a bottom surface 482, a pair of pressed surfaces 483, and a cut surface 484. The top surface 481 and the bottom surface 482 face opposite each other in the z direction. The top surface 481 faces the z2 side in the z direction, and the bottom surface 482 faces the z1 side in the z direction. The bottom surface 482 is a flat surface that contacts the first electrode 111. A wire 47 is bonded to the top surface 481. The pair of pressed surfaces 483 are located on both sides of the top surface 481 as viewed in the z direction (on both sides in the x direction in the example of FIG. 7 ). As will be described later, the pair of pressed surfaces 483 are surfaces formed by the wedge guide grooves being pressed against them, and the shape of the wedge guide grooves is apparent. The pair of pressed surfaces 483 are flat and are spaced apart from each other as they move toward the z-direction z1. The cut surface 484 is a surface cut by wedge bonding and faces the extension direction of the buffer section 48 (the y-direction y1 side in the example of FIG. 6). As shown in FIG. 6, the cut surface 484 is inclined with respect to a plane perpendicular to the extension direction of the buffer section 48. The shape of the buffer section 48 is not limited.

[0062] In this embodiment, as shown in FIG. 6 , the extension direction of the buffer portion 48 (the y direction in the example of FIG. 6 ) is the same as the extension direction of the wire 47. The dimension D1 in the direction in which the pair of pressurized surfaces 483 of the buffer portion 48 are aligned (the x direction in the example of FIG. 7 ) is derived from the diameter of the wire material and is therefore approximately equal to the diameter of the wire material. Furthermore, the dimension D2 in the same direction of the wire 47 (the x direction in the example of FIG. 7 ) is derived from the diameter of the wire material of the wire 47 and is therefore approximately equal to the diameter of the wire 47. The dimension D1 is larger than the dimension D2 and is larger than the diameter of the wire 47. In this embodiment, the dimension D1 is at least twice the dimension D2. Furthermore, in this embodiment, the wire 47 is contained within the top surface 481 in the direction in which the pair of pressurized surfaces 483 are aligned (the x direction in the example of FIG. 7 ). The wire 47 may extend beyond the top surface 481.

[0063] The resin member 5 is an electrically insulating semiconductor encapsulant. The resin member 5 entirely covers the plurality of semiconductor elements 11, the plurality of semiconductor elements 12, the insulating substrate 21, the main surface metal layer 22, the plurality of wires 41 to 47, and the plurality of buffer sections 48, as well as a portion of each of the terminals 3. The constituent material of the resin member 5 is, for example, epoxy resin. However, the constituent material of the resin member 5 is not limited. The resin member 5 is formed, for example, by transfer molding using a mold. However, the method of forming the resin member 5 is not limited. As shown in FIGS. 2, 4, and 5, the resin member 5 has a resin main surface 51, a resin back surface 52, and a plurality of resin side surfaces 531 to 534.

[0064] The resin main surface 51 and the resin back surface 52 face opposite each other in the z direction. The resin main surface 51 faces the z2 side in the z direction, and the resin back surface 52 faces the z1 side in the z direction. The back surface metal layer 23 is exposed from the resin back surface 52, and the resin back surface 52 and the surface of the back surface metal layer 23 facing the z1 side in the z direction are flush with each other. Each of the multiple resin side surfaces 531 to 534 is connected to both the resin main surface 51 and the resin back surface 52 and is sandwiched between them. As shown in FIG. 2 , the two resin side surfaces 531, 532 face opposite each other in the x direction. The resin side surface 531 is located on the x1 side in the x direction and faces the x1 side in the x direction. The resin side surface 532 is located on the x2 side in the x direction and faces the x2 side in the x direction. The two resin side surfaces 533, 534 face opposite each other in the y direction. The resin side surface 533 is a surface that is disposed on the y1 side in the y direction and faces the y1 side in the y direction. The resin side surface 534 is a surface that is disposed on the y2 side in the y direction and faces the y2 side in the y direction.

[0065] The resin side surfaces 531 to 534 are each connected to the resin main surface 51 and have surfaces that are inclined so as to approach each other as they approach the resin main surface 51. In other words, the portions of the resin member 5 that are surrounded by the inclined surfaces that are connected to these resin main surfaces 51 have a tapered shape in which the cross-sectional area in the xy plane decreases toward the resin main surface 51. The resin side surfaces 531 to 534 are each connected to the resin back surface 52 and have surfaces that are inclined so as to approach each other as they approach the resin back surface 52. In other words, the portions of the resin member 5 that are surrounded by the inclined surfaces that are connected to these resin main surfaces 51 have a tapered shape in which the cross-sectional area in the xy plane decreases toward the resin back surface 52. The shapes of the resin member 5 shown in FIGS. 1 to 5 are merely examples. The shape of the resin member 5 is not limited to the illustrated shapes.

[0066] Next, the driving device 7 will be described.

[0067] The driving device 7 is a device that drives the semiconductor device A10 and is attached to the z2 side of the semiconductor device A10 in the z direction, as shown in FIG. 8 . As shown in FIG. 8 , the driving device 7 includes a substrate 71, terminals 723, 724, and 725, and a plurality of terminals 721 and 722. The substrate 71 is, for example, flat and electrically insulating. The material of the substrate 71 is not limited. The substrate 71 has a main surface 711 and a back surface 712. The main surface 711 and the back surface 712 face opposite each other in the z direction. The main surface 711 faces the z2 side in the z direction. The back surface 712 faces the z1 side in the z direction. Wiring is formed on the main surface 711, and an external connector and numerous electronic components are mounted on it; however, the wiring, external connector, electronic components, and the like on the main surface 711 are not shown in FIG. 8 .

[0068] Each of the terminals 721 to 725 is a cylindrical metal member and is disposed by being inserted into a through-hole that penetrates the substrate 71 in the z-direction from the main surface 711 to the back surface 712. Each of the terminals 721 to 725 is electrically connected to a wiring formed on the main surface 711. Terminal portions 332, 342, 352, 362, and 372 of the terminals 33 to 37 of the semiconductor device A10 are inserted into each of the terminals 721 to 725 and joined, for example, by solder. As shown in FIGS. 8 and 9 , the signal terminal 33 is joined to the terminal 723. The detection terminal 34 is joined to the terminal 724. The detection terminal 35 is joined to the terminal 725. There are five terminals 721, the same as the temperature detection terminal 36, and each of the terminals 721 is joined to the temperature detection terminal 36. The temperature detection terminal 36 is conductively connected to the wire 46 via the conductive layer 226, and therefore the terminal 721 is conductively connected to the wire 46. There are five terminals 722, the same as the temperature detection terminals 37, and each terminal 722 is joined to a temperature detection terminal 37. The temperature detection terminal 37 is conductively connected to the wire 47 via the conductive layer 227, and therefore the terminal 722 is conductively connected to the wire 47.

[0069] As shown in FIG. 9 , the driving device 7 includes, as its functional components, a plurality of relative temperature detectors 73, a plurality of reference junction compensation units 74, an overheat protection unit 75, and a driving control unit 76. The driving control unit 76 controls the switching operation of each semiconductor element 11 and is implemented, for example, by a gate driving IC. The driving control unit 76 includes a drive circuit DR and a Miller clamp circuit MC. The driving control unit 76 generates a driving signal based on a control signal input from an external device and outputs the driving signal to the semiconductor device A10 via a terminal 723. The semiconductor device A10 receives a driving signal from a signal terminal 33 connected to the terminal 723, thereby controlling the switching operation of each semiconductor element 11. The driving control unit 76 also receives a signal from the detection terminal 34 of the semiconductor device A10 via a terminal 724 and a signal from the detection terminal 35 via a terminal 725. The specific circuit configuration and configuration of the driving control unit 76 are not limited.

[0070] The relative temperature detector 73 and the reference junction compensator 74 are functional components for detecting the temperature of the semiconductor element 11. Five of each of the relative temperature detectors 73 and the reference junction compensator 74 are provided, corresponding to the number of semiconductor elements 11 in the semiconductor device A10. Each relative temperature detector 73 receives a voltage via a pair of terminals 721 and 722 from a pair of temperature detection terminals 36 and 37 of the semiconductor device A10. This voltage is the voltage between the reference junction of a thermocouple including the wire 46, the second metal layer 111b of the first electrode 111, the buffer portion 48, and the wire 47, and corresponds to the temperature difference between the reference junction and the temperature-measuring junction. In other words, this voltage corresponds to the relative temperature of the semiconductor element 11 with respect to the temperature of the reference junction. Each relative temperature detector 73 detects the relative temperature of the corresponding semiconductor element 11 based on the input voltage.

[0071] Each reference junction compensation unit 74 converts the relative temperature detected by the corresponding relative temperature detection unit 73 into an absolute temperature. Each reference junction compensation unit 74 includes a temperature detection unit, such as a diode, arranged adjacent to the corresponding terminal 721, 722. The temperature detection unit may also include a temperature sensor such as a thermistor. The temperature detection terminals 36, 37, which are joined to the terminals 721, 722, are joined to the conductive layers 226, 227. The temperature detection unit indirectly detects the temperature of the reference junction of the thermocouple by detecting the temperature of the terminals 721, 722. The reference junction compensation unit 74 converts the relative temperature detected by the corresponding relative temperature detection unit 73 into an absolute temperature by adding the temperature of the reference junction detected by the temperature detection unit. The reference junction compensation unit 74 outputs the absolute temperature of the corresponding semiconductor element 11 to the overheat protection unit 75.

[0072] The specific circuit configurations of the relative temperature detection unit 73 and the reference junction compensation unit 74 are not limited. For example, they may have the following configuration. That is, the relative temperature detection unit 73 transmits the voltage between the pair of terminals 721, 722 to the reference junction compensation unit 74 as a voltage corresponding to the relative temperature of the corresponding semiconductor element 11. The reference junction compensation unit 74 then converts the voltage corresponding to the temperature of the reference junction detected by the temperature detection unit into a voltage corresponding to the thermoelectromotive force of the thermocouple, adds it to the voltage transmitted from the relative temperature detection unit 73, and outputs the result to the overheat protection unit 75. As a result, a voltage corresponding to the absolute temperature of the semiconductor element 11 is input to the overheat protection unit 75.

[0073] The overheat protection unit 75 detects an overheat abnormality of the corresponding semiconductor element 11 based on the absolute temperature input from each reference junction compensation unit 74. The overheat protection unit 75 outputs an abnormality detection signal to the drive control unit 76 when the absolute temperature input from each reference junction compensation unit 74 becomes equal to or higher than a threshold temperature. When the abnormality detection signal is input, the drive control unit 76 stops outputting the drive signal, thereby stopping the drive of the semiconductor device A10. Note that the specific circuit configuration of the overheat protection unit 75 is not limited. For example, the overheat protection unit 75 may include a comparator that generates an abnormality detection signal when a voltage corresponding to the absolute temperature input from the reference junction compensation unit 74 becomes equal to or higher than a voltage corresponding to the threshold temperature.

[0074] Next, an example of a method for manufacturing the semiconductor device A10 will be described below with reference to FIGS. 10 to 21. Note that the manufacturing method described below is one means for realizing the semiconductor device A10, and is not limited to this. FIG. 10 is a flowchart showing an example of a method for manufacturing the semiconductor device A10. FIGS. 11 to 14 and 17 to 21 are diagrams showing steps in an example of a method for manufacturing the semiconductor device A10. FIGS. 11 to 14 and 19 to 20 are cross-sectional views corresponding to FIG. 4. FIG. 17 is a partially enlarged plan view corresponding to FIG. 3. FIG. 18 is a cross-sectional view corresponding to FIG. 7. FIG. 21 is a front view. FIGS. 15 to 16 are diagrams for explaining wedge bonding. Note that the x-, y-, and z-directions shown in FIGS. 11 to 21 indicate the same directions as those in FIGS. 1 to 8.

[0075] As shown in Figure 10, the manufacturing method of semiconductor device A10 includes a support member forming process (S1), a lead frame joining process (S2), a semiconductor element mounting process (S3), a wire forming process (S4), a resin forming process (S5), and a frame cutting process (S6).

[0076] The support member forming step (S1) is a step of forming the support member 2. In the support member forming step, first, an insulating substrate 91 is prepared (S11). The insulating substrate 91 is made of, for example, ceramics and has a main surface 911 and a back surface 912 facing opposite each other in the z direction. Next, as shown in FIG. 11 , a main surface metal layer 22 is formed on the main surface 911 of the insulating substrate 91 (S12). The main surface metal layer 22 is formed by, for example, forming an underlayer covering the entire main surface 911 by electroless plating or sputtering, forming a mask and forming a plating layer by electrolytic plating, and then removing unnecessary portions of the underlayer by etching. Next, as shown in FIG. 12 , a back surface metal layer 23 is formed on the back surface 912 of the insulating substrate 91 (S13). The back surface metal layer 23 is formed by, for example, electroless plating. Alternatively, a DBC (Direct Bonding Copper) substrate having Cu foil bonded to the main surface 911 and the back surface 912 of the insulating substrate 91 may be used, and the Cu foil on the main surface 911 side may be patterned to form the main surface metal layer 22 and the back surface metal layer 23 on the insulating substrate 91. Next, the insulating substrate 91 is cut (S14). By cutting the insulating substrate 91, the insulating substrate 21 is formed. In this manner, the support member 2 is formed.

[0077] In the lead frame bonding step (S2), first, a lead frame 92 that will become each terminal 3 is prepared. The lead frame 92 includes a portion that will become each terminal 3, and further has a frame to which the multiple terminals 3 are connected. Note that the shape of the lead frame 92 is not limited in any way. Next, a conductive bonding paste is placed at the position on the main surface metal layer 22 where each terminal 3 will be bonded, and the portions of the lead frame 92 that will become each terminal 3 are bonded to the main surface metal layer 22, as shown in FIG. 13 . For example, the portions of the lead frame 92 that will become the detection terminals 35 are bonded to the conductor layer 224. Furthermore, the portions of the lead frame 92 that will become the detection terminals 36 are bonded to the conductor layer 226. Note that the method for bonding the lead frame 92 is not limited in any way.

[0078] In the semiconductor element mounting step (S3), first, a conductive bonding paste 93 is placed in the area of ​​the conductor layer 223 where the semiconductor elements 11 and 12 are to be placed. The conductive bonding paste 93 may be, for example, solder, silver paste, or sintered metal. Next, as shown in FIG. 14 , a plurality of semiconductor elements 11 and a plurality of semiconductor elements 12 are attached to the conductive bonding paste 93, heated, and then cooled. As a result, the conductive bonding paste 93 interposed between the conductor layer 223 and the semiconductor elements 11 becomes a conductive bonding material 110, and the semiconductor element 11 is bonded to the conductor layer 223 via the conductive bonding material 110. Furthermore, the conductive bonding paste 93 interposed between the conductor layer 223 and the semiconductor element 12 becomes a conductive bonding material 120, and the semiconductor element 12 is bonded to the conductor layer 223 via the conductive bonding material 120.

[0079] In the wire forming step (S4), the wires 41 to 47 and the buffer section 48 are formed by wedge bonding. Wedge bonding is performed using a wedge tool. FIGS. 15 and 16 show an example of the wedge tool. FIG. 15 is a front view showing the entire wedge tool 6. FIG. 16 is a cross-sectional view of the wedge tool 6 shown in FIG. 15 taken along line XVI-XVI. The wedge tool 6 includes a wedge 61, a wire guide 62, and a cutter 63.

[0080] The wedge 61 presses the wire material 69 against the joining target 68 and joins it by ultrasonic vibration. As shown in FIG. 15 , a guide groove 611 is formed in the wedge 61. The guide groove 611 is provided at the lower end (the z-direction z1 side) of the wedge 61. In this embodiment, as shown in FIG. 16 , the guide groove 611 has a V-shaped cross section and a pair of inner surfaces 611 a. When joining the wire material 69, ultrasonic vibration is applied to the wedge 61 in the direction indicated by the white arrow in FIG. 15 . The wire guide 62 is fixed to the wedge 61 and guides the wire material 69 wound around a wire reel (not shown) to the wedge 61. The cutter 63 cuts the wire material 69. The cutter 63 is disposed adjacent to the wedge 61. The wire guide 62 and the cutter 63 are disposed on opposite sides of the wedge 61.

[0081] With the wire material 69 placed in the guide groove 611, the wedge 61 is pressed against the bonding object 68 while vibration is applied. As a result, the tip of the wire material 69 and the bonding object 68 are joined by ultrasonic welding (first bonding). In the case of normal wire bonding, the wedge tool 6 then moves while pulling out the wire material 69, bonds the wire material 69 to another bonding object 68 by ultrasonic welding (second bonding), and cuts the wire material 69 with the cutter 63. This forms a bonding wire whose both ends are respectively joined to two bonding objects 68. On the other hand, when forming the buffer portion 48, the wedge tool 6 moves slightly in the direction of the black arrow shown in FIG. 15 and then cuts the wire material 69 with the cutter 63. As a result, the wire piece, which is the end of the wire material 69, is joined as the buffer portion 48.

[0082] In the wire forming step (S4), first, as shown in FIG. 17 , buffer portions 48 are formed on the first electrodes 111 of the semiconductor element 11 (S41). Each buffer portion 48 is formed near the center of each first electrode 111 in the y direction, toward the x1 side in the x direction, and extends in the y direction. Since the wire 47 is bonded to the buffer portion 48 as described below, the buffer portion 48 is positioned to match the bonding position of the wire 47 and is formed to extend in the same direction as the wire 47. The buffer portion 48 is formed by ultrasonically welding the tip of a wire material 691 (e.g., a Cu wire) to the first electrode 111, slightly moving the wedge tool 6, and then cutting the wire material 691 with a cutter 63. During ultrasonic welding, the wedge 61 presses the wire material 691 against the first electrode 111, thereby forming a bottom surface 482 of the buffer portion 48 that contacts the first electrode 111, as shown in FIG. 18 . The bottom surface 482 has a cross section that is recessed from the arc-shaped outer peripheral surface 489 toward the central axis Ox of the wire material 691. Because the surface of the first electrode 111 is flat, the bottom surface 482 is flat. During ultrasonic welding, a pair of inner surfaces 611a of the guide groove 611 of the wedge 61 is pressed against the wire material 691, thereby forming a pair of pressed surfaces 483 in the buffer portion 48, as shown in FIG. 18 . Each pressed surface 483 has a cross section that is recessed from the arc-shaped outer peripheral surface 489 toward the central axis Ox of the wire material 691. Because each inner surface 611a is flat, each pressed surface 483 is flat. When the wire material 691 is cut by the cutter 63, a cut surface 484 is formed in the buffer portion 48, as shown in FIG. 6 . The cut surface 484 is inclined with respect to a plane perpendicular to the extension direction of the buffer portion 48, depending on the shape of the cutter 63.

[0083] Next, wires 41, 42, and 45 are formed by wedge bonding (S42). The same wedge tool 6 and wire material 691 are used to form the buffer section 48, but unlike the buffer section 48, normal wire bonding is used. As shown in FIG. 19 , wire 41 is formed to connect the first electrode 111 of the semiconductor element 11 to the conductor layer 221. Although not shown in FIG. 19 , wire 42 is formed to connect the conductor layer 221 to the conductor layer 225. Wire 45 is formed to connect the first electrode 111 to the anode electrode 121 of the semiconductor element 12. The order of forming wires 41, 42, and 45 is not limited. Furthermore, the order of steps S41 and S42 may be reversed.

[0084] Next, wires 43, 44, and 46 are formed by wedge bonding (S43). Wire material 692 is used to form wire 43, 44, and 46. The wire material 692 is made of the same material as wire material 691 used in S42 but has a different diameter. The diameter of wire material 692 is smaller than the diameter of wire material 691. As shown in FIG. 20 , wire 43 is formed to connect second electrode 112 of semiconductor element 11 to conductive layer 222. Wire 44 is formed to connect first electrode 111 to conductive layer 224. Wire 46 is formed to connect first electrode 111 to conductive layer 226. The order in which wires 43, 44, and 46 are formed is not limited.

[0085] Next, wire 47 is formed by wedge bonding (S44). Wire material 693, which is different in composition from wire material 692 used in S43, is used in forming wire 47. In this embodiment, wire materials 691 and 692 made of Cu are used in S41 to S43, but wire material 693 made of constantan is used in S44. The diameter of wire material 693 used in S44 is approximately the same as that of wire material 692 used in S43, but is smaller than that of wire material 691 used in S42. Wire 47 is formed using the same equipment and by the same method as wires 43, 44, and 46, except that wire material 693 is used.

[0086] As shown in FIG. 21 , the wire 47 is first bonded to the top surface 481 of the buffer section 48, which is bonded to the first electrode 111. FIG. 21 shows a state in which, after bonding to the buffer section 48 (first bonding), the wedge tool 6 moves while drawing out the wire material 693 (wire 47). The wire 47 is bonded to the top surface 481 along the extension direction of the buffer section 48 and is formed to extend in that direction. The wire 47 is made of constantan and is harder than the wire 46, which is made of Cu. However, the wire 47 is bonded to the buffer section 48 rather than directly to the first electrode 111. Therefore, impact on the semiconductor element 11 during bonding is suppressed. The wedge tool 6 then moves, ultrasonically welding the wire material 693 to the conductive layer 227 (second bonding), and the wire material 693 is cut with the cutter 63. As a result, the wire 47 is formed to connect the buffer portion 48 joined to the first electrode 111 and the conductive layer 227 (see FIGS. 3 and 6). Note that the step S44 may be performed before the step S43. In the wire forming step (S4), the wire 46 is joined to the first electrode 111, and the wire 47 is joined to the buffer portion 48 joined to the first electrode 111, thereby forming a thermocouple.

[0087] In the resin forming step (S5), for example, a part of the lead frame 92, a part of the support member 2, the plurality of semiconductor elements 11 and 12, the plurality of wires 41 to 47, and the buffer portion 48 are enclosed in a mold. Next, a liquid resin material is injected into the space defined by the mold. Next, the resin material is hardened to obtain the resin member 5.

[0088] In the frame cutting step (S6), the lead frame 92 is cut at appropriate locations of the portions exposed from the resin member 5. This separates the terminals 3. Thereafter, the terminals 3 are subjected to processes such as bending as necessary, thereby obtaining the semiconductor device A10 described above.

[0089] Next, the effects of the semiconductor device A10 will be described.

[0090] According to this embodiment, the buffer portion 48 is bonded to the first electrode 111. The wire 47 is bonded to the buffer portion 48, rather than directly to the first electrode 111. Because the buffer portion 48 absorbs the impact when the wire 47 is bonded, the semiconductor device A10 can mitigate the impact applied to the semiconductor element 11. Furthermore, the buffer portion 48 is formed by wedge bonding using the same wire material 691. The buffer portion 48 can be formed using the same wedge tool 6 and the same wire material 691 as used to form the wires 41, 42, and 45 (S42). Therefore, forming the buffer portion 48 consecutively with the step S42 simplifies the manufacturing process. Therefore, the semiconductor device A10 can suppress increases in manufacturing costs.

[0091] Furthermore, according to the present embodiment, the dimension D1 in the direction in which the pair of pressable surfaces 483 of the buffering unit 48 are aligned (approximately the same as the diameter of the wire material 691 used to form the buffering unit 48) is larger than the dimension D2 in the same direction of the wire 47 (approximately the same as the diameter of the wire material 693 used to form the wire 47). Therefore, when joining the wire 47 to the buffering unit 48, it is possible to prevent the wire 47 from slipping off the top surface 481. Furthermore, according to the present embodiment, the wire 47 is contained within the top surface 481 in the direction in which the pair of pressable surfaces 483 are aligned. Therefore, when joining the wire 47 to the buffering unit 48, it is possible to further prevent the wire 47 from slipping off the top surface 481.

[0092] Furthermore, in this embodiment, the extending direction of the buffer portion 48 coincides with the extending direction of the wire 47. Therefore, it is easier to join the wire 47 to the buffer portion 48 than when the extending directions do not coincide.

[0093] Furthermore, according to this embodiment, each semiconductor element 11 has one end of a wire 46 bonded to the second metal layer 111b of the first electrode 111, and one end of a wire 47 bonded to a buffer portion 48 bonded to the second metal layer 111b. The wire 46 is made of a second metal (Cu), which is the same metal (Cu) as the second metal layer 111b and the buffer portion 48. The wire 47 is made of a first metal (Constantan) having a different thermoelectric power from the second metal. The wire 46, the second metal layer 111b, the buffer portion 48, and the wire 47 function as a thermocouple, and a junction 47a between the wire 47 and the buffer portion 48 serves as a thermocouple temperature measuring junction, allowing temperature to be detected. The junction 47a is in contact with the buffer portion 48, through which heat from the semiconductor element 11 is appropriately transferred. This allows the semiconductor device A10 to detect the temperature of each semiconductor element 11 with greater accuracy than when a temperature sensor is disposed near the semiconductor element 11. Furthermore, since the first metal is constantan and the second metal is Cu, the thermocouple functions as a T-type thermocouple.

[0094] Furthermore, according to this embodiment, the wires 46 and 47 are formed by the same bonding wire forming method as the wires 41 to 45. Therefore, the wires 46 and 47 can be formed by the same method using the same equipment as the wires 41 to 45. In particular, the wire 46 can be formed by the same process as the wires 43 and 44 using the same wire material 692 as the wires 43 and 44. Therefore, the manufacturing process is not complicated in order to form a temperature detection configuration.

[0095] Furthermore, according to this embodiment, the drive device 7 includes a relative temperature detection unit 73 and a reference junction compensation unit 74. Therefore, the drive device 7 converts the relative temperatures of the semiconductor elements 11 detected by the thermocouples formed in the semiconductor device A10 into absolute temperatures, which can be used for overheat protection.

[0096] In this embodiment, the second metal constituting the wire 46 is Cu, and the first metal constituting the wire 47 is constantan. However, this is not limited to this. The first and second metals may be metals with different electrolytic capacities. For example, the second metal may be Cu, and the first metal may be Al. Cu and Al have the same polarity of electrolytic capacities but different electrolytic capacities. Therefore, the wire 46, the second metal layer 111b, the buffer portion 48 (Cu), and the wire 47 (Al) function as a thermocouple. Furthermore, Al is commonly used as a bonding wire and is more readily available and inexpensive than constantan wire. Furthermore, the combination of the first and second metals may be Chromel (registered trademark) (90Ni-10Cr) and Alumel (registered trademark) (94Ni-3Al-1Si-2Mg), as in a K-type thermocouple, Fe and constantan, as in a J-type thermocouple, or chromel and constantan, as in an E-type thermocouple. The combination of the first metal and the second metal is not limited to those described above.

[0097] In addition, in the present embodiment, the case where all of the plurality of terminals 3 are bonded to the main surface metal layer 22 has been described, but this is not limiting. Any of the plurality of terminals 3 may be bonded to the insulating substrate 21 at a distance from the main surface metal layer 22. In this case, the terminal 3 is electrically connected to the main surface metal layer 22 by a bonding wire or the like.

[0098] 22 to 25 show modified examples of the semiconductor device A10 according to the first embodiment. In these figures, elements that are the same as or similar to those in the above embodiment are given the same reference numerals as those in the above embodiment, and redundant explanations will be omitted.

[0099] First Modification: Fig. 22 is a diagram for explaining a semiconductor device A11 according to a first modification of the first embodiment. Fig. 22 is a partially enlarged cross-sectional view of the semiconductor device A11, and corresponds to Fig. 7. The semiconductor device A11 differs from the semiconductor device A10 in that the dimension D1 of the buffer portion 48 and the dimension D2 of the wire 47 are approximately the same.

[0100] In the semiconductor device A11 according to this modification, the wire material 691 and the wire material 693 have the same (or approximately the same) diameter. Therefore, the dimension D1 of the buffer section 48 formed using the wire material 691 is approximately the same as the dimension D2 of the wire 47 formed using the wire material 693. Although not shown, the wire material 692 also has the same diameter as the wire material 691, and the diameters of the wires 41 to 47 are all approximately the same. According to this modification, the diameters of the wire materials 691 to 693 are the same (or approximately the same), and the wires 41 to 47 and the buffer section 48 can be formed using the same wedge tool 6. This simplifies the manufacturing process of the semiconductor device A11. Furthermore, even if the dimension D1 of the buffer section 48 and the dimension D2 of the wire 47 are approximately the same, the wire 47 can be bonded to the top surface 481 of the buffer section 48. However, in order to further prevent the wire 47 from slipping off the top surface 481 , it is desirable that the dimension D 1 be larger than the dimension D 2 , and the diameter of the wire material 691 be larger than the diameter of the wire material 693 .

[0101] Second Modification: Fig. 23 is a diagram illustrating a semiconductor device A12 according to a second modification of the first embodiment. Fig. 23 is a partially enlarged plan view of the semiconductor device A12, and corresponds to Fig. 3. Note that Fig. 23 shows the resin member 5 transparently for ease of understanding. The semiconductor device A12 differs from the semiconductor device A10 in that the wires 41, 43 to 46 are also joined to the buffer portion.

[0102] In this modification, not only the wire 47 but also the wires 44 and 46 are bonded to a buffer portion 48 bonded to the first electrode 111. The wire 43 is bonded to the buffer portion 48 bonded to the second electrode 112. The wires 41 and 45 are bonded to a buffer portion 48' bonded to the first electrode 111. The buffer portion 48' is formed in the same manner as the buffer portion 48, using a wire material with a larger diameter than the wire material 691 used to form the buffer portion 48. The wires 41 to 46 are made of Cu, which is not as hard as the wire 47 (constantan), but is still sufficiently hard compared to the Al used in conventional wires. Therefore, if the wires 41 to 46 were directly bonded to the first electrode 111, the semiconductor element 11 may be damaged by the impact of the bonding. According to this modification, the semiconductor device A12 can absorb the impact applied to the semiconductor element 11 when the wires 41 to 46 are bonded, thereby suppressing damage to the semiconductor element 11.

[0103] Third Modification: Fig. 24 is a diagram for explaining a semiconductor device A13 according to a third modification of the first embodiment. Fig. 24 is a partially enlarged plan view of the semiconductor device A13, and corresponds to Fig. 3. Note that Fig. 24 shows the resin member 5 transparently for ease of understanding. The semiconductor device A13 differs from the semiconductor device A10 in that the wire 47 is bonded to the wire 41.

[0104] In this modification, the semiconductor device A13 does not include a buffer section 48. Instead of the buffer section 48, each wire 47 is joined to a joint section 41a, which is the portion of the wire 41 joined to the first electrode 111. According to this modification, the joint section 41a of the wire 41 absorbs the impact when the wire 47 is joined, so the semiconductor device A13 can mitigate the impact applied to the semiconductor element 11. Furthermore, because the wire 41, which is originally required, is used and no separate buffer section 48 is provided, the manufacturing process of the semiconductor device A13 can be further simplified.

[0105] Fourth Modification: Fig. 25 is a diagram for explaining a semiconductor device A14 according to a fourth modification of the first embodiment. Fig. 25 is a partially enlarged plan view of the semiconductor device A14, and corresponds to Fig. 3. Note that Fig. 25 shows the resin member 5 transparently for ease of understanding. The semiconductor device A14 differs from the semiconductor device A10 in that the wire 47 is joined to the wire 49.

[0106] In this modification, in order to suppress the occurrence of resonance during switching among multiple semiconductor elements 11 connected in parallel, the first electrode 111 of one semiconductor element 11 is electrically connected to the first electrode 111 of an adjacent semiconductor element 11 via a wire 49. While the material of the wire 49 is not limited, in this modification, it is Cu, similar to the wires 41 to 46. The wire 49 extends in the x-direction, which is the direction in which the semiconductor elements 11 are arranged. The semiconductor device A14 does not include a buffer portion 48. Instead of the buffer portion 48, each wire 47 is bonded to a bonding portion 49a, which is the portion of the wire 47 bonded to the first electrode 111. According to this modification, the bonding portion 49a of the wire 49 absorbs the impact when the wire 47 is bonded, so the semiconductor device A14 can mitigate the impact applied to the semiconductor element 11. Furthermore, since the wire 49, which is originally required, is used and a separate buffer portion 48 is not provided, the semiconductor device A14 can further simplify its manufacturing process. In this modification, the extending direction of the joint 49a does not coincide with the extending direction of the wire 47, but it is possible to join the wire 47 to the joint 49a.

[0107] As can be seen from the third and fourth modifications, each wire 47 can be joined to the joining portion of any wire joined to the first electrode 111, instead of the buffer portion 48. Furthermore, it is desirable that the extending direction of the joining portion coincides with the extending direction of the wire 47, but even if they do not coincide, it is possible to join the wire 47.

[0108] In the first embodiment, the components of the first to fourth modified examples may be combined in any desired manner.

[0109] 26 to 28 show other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above embodiment are given the same reference numerals as in the above embodiment, and redundant explanations will be omitted.

[0110] Second Embodiment: FIGS. 26 and 27 are diagrams illustrating a semiconductor device A20 according to a second embodiment of the present disclosure. FIG. 26 is a partially enlarged plan view showing the semiconductor device A20, and corresponds to FIG. 3. Note that FIG. 26 shows the resin member 5 through perspective for ease of understanding. FIG. 27 is a cross-sectional view taken along line XXVII-XXVII in FIG. 26. The semiconductor device A20 according to this embodiment differs from the semiconductor device A10 according to the first embodiment in that the wires 41 to 45 are made of Al. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first embodiment and the modifications described above may be combined in any desired manner.

[0111] The wires 41 to 45 according to this embodiment are made of Al. Accordingly, as shown in FIG. 27 , the first electrode 111 of the semiconductor element 11 according to this embodiment does not include a second metal layer 111b, and a first metal layer 111a made of Al is located on the surface. Furthermore, the wire 44 is joined to a buffer portion 48 joined to the first electrode 111, and the wires 41 and 45 are joined to a buffer portion 48' joined to the first electrode 111. The buffer portion 48' is formed in the same manner as the buffer portion 48, using a wire material with a larger diameter than the wires 41 and 45. In this embodiment, the buffer portions 48 and 48' are made of Al.

[0112] According to this embodiment, the buffering portions 48, 48' absorb the impact that occurs when the wires 41, 44, 45 are bonded, so the semiconductor device A20 can reduce the impact that is applied to the semiconductor element 11. Furthermore, because the buffering portions 48, 48' are formed by wedge bonding, the manufacturing process can be simplified. Therefore, the semiconductor device A20 can suppress an increase in manufacturing costs. Furthermore, the semiconductor device A20 has a configuration in common with the semiconductor device A10, and thus achieves the same effects as the semiconductor device A10. As can be understood from this embodiment, the semiconductor element 11 is not limited to a case in which the first electrode 111 includes the second metal layer 111b.

[0113] Third Embodiment: FIG. 28 is a diagram illustrating a semiconductor device A30 according to a third embodiment of the present disclosure. FIG. 28 is a partially enlarged cross-sectional view showing the semiconductor device A30. The semiconductor device A30 according to this embodiment differs from the semiconductor device A10 according to the first embodiment in that it further includes terminals 39 that extend close to the semiconductor element 11, and wires 41 are formed so as to straddle the terminals 39. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first and second embodiments and their modified examples described above may be combined in any desired manner.

[0114] The semiconductor device A30 according to this embodiment further includes a terminal 39 extending close to the semiconductor element 11. The wire 41 is formed so as to straddle the terminal 39 on the z2 side in the z-direction. The wire 41 is also joined to a buffer section 48' joined to the second metal layer 111b of the first electrode 111. The buffer section 48' is formed in the same manner as the buffer section 48, using a wire material with a larger diameter than the wire 41. On the other hand, the wire 45 is directly joined to the second metal layer 111b of the first electrode 111.

[0115] According to this embodiment, the buffer portion 48' absorbs the impact generated when the wire 41 is bonded, thereby enabling the semiconductor device A30 to reduce the impact applied to the semiconductor element 11. Furthermore, since the buffer portion 48' is formed by wedge bonding, the manufacturing process can be simplified. Therefore, the semiconductor device A30 can suppress increases in manufacturing costs. Furthermore, the semiconductor device A30 achieves the same effects as the semiconductor device A10 by sharing a common configuration with the semiconductor device A10. In this embodiment, the wire 41 is formed to straddle the terminal 39 on the z-direction z2 side. At this time, the wedge tool is pulled significantly in the z-direction z2 side, pulling the initially bonded portion of the wire 41 in the z-direction z2 side. If the wire 41 were directly bonded to the second metal layer 111b, the second metal layer 111b may peel off from the first metal layer 111a. In this embodiment, the wire 41 is bonded to the buffer portion 48', which is bonded to the second metal layer 111b, so that the tension is alleviated by the buffer portion 48', thereby preventing the second metal layer 111b from peeling off. In this way, the buffer portions 48, 48' not only absorb the impact during wire bonding, but also have the function of alleviating the tension applied after wire bonding.

[0116] Fourth Embodiment: FIG. 29 is a diagram illustrating a semiconductor device A40 according to a fourth embodiment of the present disclosure. FIG. 29 is a plan view of the semiconductor device A40, and corresponds to FIG. 2. In FIG. 29, for ease of understanding, the outline of the resin member 5 is shown by an imaginary line (two-dot chain line) through the resin member 5. The semiconductor device A40 according to this embodiment differs from the semiconductor device A10 according to the first embodiment in terms of the package format. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first to third embodiments and their modified examples may be combined in any desired manner.

[0117] The package format of the semiconductor device A40 is DFN (Dual Flatpack No-leaded). The semiconductor device A40 includes leads 201 to 205, a semiconductor element 11, wires 41, 43, 46, and 47, a buffer portion 48, and a resin member 5. The semiconductor element 11, wires 41, 43, 46, and 47, the buffer portion 48, and the resin member 5 are the same as those in the first embodiment.

[0118] The leads 201 to 205 are electrically connected to the semiconductor element 11. The leads 201 to 205 are made of a metal, preferably either Cu or Ni, or an alloy thereof, or 42 alloy. The constituent material of the leads 201 to 205 is not limited, but in this embodiment, Cu is used. The leads 201 to 205 are made of a lead frame formed, for example, by stamping a metal plate.

[0119] The semiconductor element 11 has a back surface 11b (not shown) bonded to a lead 201 via a conductive bonding material 110 (not shown). A third electrode 113 (drain electrode) (not shown) is electrically connected to the lead 201 via the conductive bonding material 110. One end of the wire 41 is bonded to the first electrode 111 (source electrode) and the other end is bonded to the lead 204. The wire 41 provides electrical continuity between the first electrode 111 and the lead 204. One end of the wire 43 is bonded to the second electrode 112 (gate electrode) and the other end is bonded to the lead 205. The wire 43 provides electrical continuity between the second electrode 112 and the lead 205. The wire 46 has one end bonded to the first electrode 111 and the other end bonded to the lead 202. One end of the wire 47 is joined to the buffer portion 48 joined to the first electrode 111, and the other end is joined to the lead 203. The leads 202 and 203 serve as terminals for detecting the temperature of the semiconductor element 11.

[0120] In this embodiment, too, the wire 47 is not directly bonded to the first electrode 111, but is instead bonded to the buffer portion 48. The buffer portion 48 absorbs the impact caused when the wire 47 is bonded, allowing the semiconductor device A40 to reduce the impact on the semiconductor element 11. The buffer portion 48 is formed by wedge bonding using the same wire material 691. The buffer portion 48 can be formed using the same wedge tool 6 and the same wire material 691 as used to form the wire 41 (S42). Therefore, forming the buffer portion 48 consecutively with the step S42 simplifies the manufacturing process. Therefore, the semiconductor device A40 can suppress increases in manufacturing costs.

[0121] The semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure are not limited to the above-described embodiments. The specific configuration of each part of the semiconductor device according to the present disclosure and the specific processing of each step of the method for manufacturing the semiconductor device according to the present disclosure can be freely designed in various ways. The present disclosure includes the embodiments described in the following appendices.

[0122] Supplementary Note 1. A semiconductor device comprising: a semiconductor element (11) having an element main surface (11a) and an element back surface (11b) facing opposite each other in the thickness direction (z direction), and a first electrode (111) arranged on the element main surface; a buffer section (48) conductively joined to the first electrode; and a first wire (47) conductively joined to the buffer section and including a first metal. Supplementary Note 2, Figure 7. The buffer section comprises: a bottom surface (482) in contact with the first electrode; a top surface (481) facing the opposite side from the bottom surface in the thickness direction; and a pair of flat pressed surfaces (483) arranged on both sides of the top surface as viewed in the thickness direction, the pair of pressed surfaces being further apart from each other in the thickness direction as they approach the bottom surface. Supplementary Note 3. The semiconductor device according to Supplementary Note 2, wherein the first wire is joined to the top surface. Supplementary Note 4, Figure 7. The semiconductor device according to Appendix 2 or 3, wherein a dimension (D1) of the buffer portion in a direction in which the pair of pressed surfaces are aligned is larger than a diameter (D2) of the first wire. Appendix 5, third modification (FIG. 24), fourth modification (FIG. 25). The semiconductor device according to any of Appendixes 1 to 4, wherein the buffer portion is a second wire (41, 49) conductively joined to the first electrode. Appendix 6. The semiconductor device according to any of Appendixes 1 to 5, wherein the buffer portion contains Cu. Appendix 7. The semiconductor device according to any of Appendixes 1 to 6, wherein the first electrode includes a metal layer (111b) in contact with the buffer portion. Appendix 8. The semiconductor device according to Appendix 7, wherein the metal layer is a plating layer containing Cu. Appendix 9. The semiconductor device according to Appendix 7 or 8, wherein the dimension of the metal layer in the thickness direction is 50 μm or less. Appendix 10. The semiconductor device according to any of Appendixes 7 to 9, wherein the metal layer is made of the same material as the buffer portion. Appendix 11. The semiconductor device according to any one of Appendixes 7 to 10, wherein the first wire has a Vickers hardness greater than that of the metal layer. Appendix 12. The semiconductor device according to any one of Appendixes 1 to 11, further comprising a third wire (46) including a second metal having a thermoelectric power different from that of the first metal, the third wire being joined to the first electrode.Appendix 13. The semiconductor device according to Appendix 12, wherein the first metal is constantan, and the second metal is Cu. Appendix 14, Figure 10. A method for manufacturing a semiconductor device, comprising: a buffer portion forming step (S41) of forming a buffer portion by joining a wire material (691) to a first electrode of a semiconductor element and cutting the wire material; and a first wire joining step (S44) of joining a first wire to the buffer portion. Appendix 15. The method for manufacturing a semiconductor device according to Appendix 14, wherein the diameter of the wire material is larger than the diameter of the first wire. Appendix 16. The method for manufacturing a semiconductor device according to Appendix 14 or 15, wherein the extension direction of the buffer portion is the same as the extension direction of the first wire.

[0123] A10, A11, A12, A13, A14, A20, A30, A40: semiconductor device 11, 12: semiconductor element 11a, 12a: element main surface 11b, 12b: element back surface 110, 120: conductive bonding material 111: first electrode 111a: first metal layer 111b: second metal layer 112: second electrode 113: third electrode 121: anode electrode 122: cathode electrode 2: support member 21: insulating substrate 211: main surface 212: back surface 22: main surface metal layer 221, 222, 223, 224, 225, 226, 227: conductive layer 221a, 222a, 223a, 224a: strip-shaped portion 221b, 222b, 223b, 224b: terminal joint portion 23: rear surface metal layer 201 to 205: leads 3, 39: terminals 31, 32: power terminals 33: signal terminals 34, 35: detection terminals 36, 37: temperature detection terminals 311, 321, 331, 341, 351, 361, 371: pad portions 312, 322, 332, 342, 352, 362, 372: terminal portions 41 to 47, 49: wires 48, 48': buffer portions 481: top surface 482: bottom surface 483: pressed surface 484: cut surface 489: outer peripheral surface 47a: contacts 41a, 49a: joint portion 5: resin member 51: resin main surface 52: resin rear surface 531, 532, 533, 534: Resin side surface 6: Wedge tool 61: Wedge 611: Guide groove 611a: Inner surface 62: Wire guide 63: Cutter 68: Joining object 69, 691 to 693: Wire material 7: Drive unit 71: Substrate 711: Main surface 712: Back surface 721 to 725: Terminals 73: Relative temperature detection unit 74: Reference junction compensation unit 75: Overheat protection unit 76: Drive control unit 91: Insulating substrate 911: Main surface 912: Back surface 92: Lead frame 93: Conductive bonding paste DR: Drive circuit MC: Miller clamp circuit

Claims

1. a semiconductor element having a main surface and a back surface facing in opposite directions in a thickness direction, and a first electrode disposed on the main surface; A buffer portion conductively connected to the first electrode; A first wire that is conductively connected to the buffer portion and includes a first metal; A semiconductor device comprising:

2. The buffer section is A bottom surface in contact with the first electrode; a top surface facing the opposite side to the bottom surface in the thickness direction; A pair of flat pressed surfaces disposed on both sides of the top surface when viewed in the thickness direction; Equipped with The pair of pressed surfaces are spaced apart from each other in the thickness direction toward the bottom surface side. The semiconductor device according to claim 1 .

3. The first wire is bonded to the top surface. The semiconductor device according to claim 2 .

4. A dimension of the buffer portion in a direction in which the pair of pressed surfaces are arranged is larger than a diameter of the first wire. The semiconductor device according to claim 2 .

5. The buffer portion is a second wire conductively connected to the first electrode. The semiconductor device according to claim 1 .

6. The buffer portion contains Cu. The semiconductor device according to claim 1 .

7. The first electrode includes a metal layer in contact with the buffer portion.

7. The semiconductor device according to claim 1.

8. The metal layer is a plating layer containing Cu. The semiconductor device according to claim 7.

9. The dimension of the metal layer in the thickness direction is 50 μm or less. The semiconductor device according to claim 7.

10. The constituent material of the metal layer is the same as that of the buffer portion. The semiconductor device according to claim 7.

11. The first wire has a Vickers hardness greater than that of the metal layer. The semiconductor device according to claim 7.

12. Further comprising a third wire including a second metal having a thermoelectric power different from that of the first metal; The third wire is bonded to the first electrode.

7. The semiconductor device according to claim 1.

13. the first metal is constantan; The second metal is Cu. The semiconductor device according to claim 12.

14. a buffer portion forming step of joining a wire material to a first electrode of the semiconductor element and cutting the wire material to form a buffer portion; a first wire joining step of joining a first wire to the buffer portion; Equipped with A method for manufacturing a semiconductor device.

15. a diameter of the wire material is greater than a diameter of the first wire; The method for manufacturing a semiconductor device according to claim 14.

16. The extension direction of the buffer portion is the same as the extension direction of the first wire. The method for manufacturing a semiconductor device according to claim 14 or 15.