Wiring board, electronic component mounting package using wiring board, and electronic module
Patent Information
- Application Number
- JP2024555858
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-04-02
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2043-10-05
AI Technical Summary
Current wiring boards in wireless and optical communication equipment face challenges in transmitting high-frequency signals with low loss due to impedance issues, particularly in efficiently connecting and grounding signal conductors.
The proposed wiring board design incorporates a metal base, a dielectric substrate, and a signal conductor with specific geometrical features such as openings and recesses, along with ground conductors, to minimize impedance and enhance signal transmission by optimizing the connection and grounding configurations.
This design effectively reduces signal loss and improves high-frequency signal transmission characteristics by adjusting impedance and reducing the volume of conductive materials, thereby enhancing the performance of electronic component mounting packages and modules.
Abstract
Description
[Rule 26 Supplement 07.11.2023] Wiring boards, packages for mounting electronic components using wiring boards, and electronic modules
[0001] The present disclosure relates to a wiring board, an electronic component mounting package using the wiring board, and an electronic module.
[0002] In recent years, electronic modules used in wireless communication devices and optical communication devices have been required to transmit higher signal frequencies in order to transmit larger volumes of information at higher speeds. Therefore, wiring boards that transmit signals are required to transmit high-frequency signals with low loss. A known structure for transmitting such signals includes a base made of a metal member and a terminal portion bonded to the base. The terminal portion includes a ceramic member and a conductive portion provided on the ceramic member (see Patent Document 1). In the structure described in Patent Document 1, a lead can be bonded to the conductive portion.
[0003] Japanese Patent Application Laid-Open No. 2018-37564
[0004] In one embodiment of the present disclosure, (1) a wiring board includes a base portion made of a metal material, a dielectric substrate, and a first signal conductor. The base portion has a first upper surface, a first lower surface, a first side surface, and a first opening having an opening in the first upper surface. The first lower surface is located opposite the first upper surface. The first side surface is connected to the first upper surface and the first lower surface. The dielectric substrate has a second upper surface, a second lower surface, and a second side surface. The dielectric substrate is also located on the first upper surface. The second lower surface is located opposite the second upper surface. The second side surface is connected to the second upper surface and the second lower surface. The second side surface is located along the first side surface. The first signal conductor is located on the second upper surface. The first signal conductor has a first line portion extending in a first direction away from the second side surface and a first connection portion located between the first line portion and the second side surface. The first opening is positioned so as to overlap at least a portion of the first connection portion in a plan view, and the first connection portion has a maximum dimension in a second direction along the first side surface that is greater than a maximum dimension of the first line portion in the second direction.
[0005] (2) The wiring board of (1) further includes a bottom ground conductor located on the second bottom surface. The bottom ground conductor has a first opening region. In plan view, the first opening region is located within the first opening and overlaps the first connection portion.
[0006] (3) In the wiring board of (1) or (2) above, the first opening is positioned so as to intersect with the first side surface.
[0007] (4) In the wiring board of any one of (1) to (3) above, the maximum dimension of the first opening in the second direction along the first side surface is equal to or greater than the maximum dimension of the first connection portion in the second direction.
[0008] (5) In the wiring board of any one of (1) to (4) above, the dielectric substrate further has a first recess. In this case, the first recess is located so as to intersect with the second upper surface and the second side surface. The first recess is located so as to overlap with the first opening in a plan view. The first recess may also include a first inner wall surface. The first inner wall surface is continuous with the second upper surface and the second side surface. The first signal conductor is located so as to extend to the first inner wall surface. In this case, in a plan view, the maximum dimension of the first recess in the second direction along the second side surface is smaller than the maximum dimension of the first connection portion in the second direction along the second side surface.
[0009] (6) In the wiring board of (5) above, the maximum dimension of the first opening in the first direction is larger than the maximum dimension of the first recess in the first direction in a plan view.
[0010] (7) The wiring boards of (1) to (6) above further include an upper surface ground conductor and an inner-layer ground conductor. The upper surface ground conductor is located on the second upper surface, spaced apart from the first signal conductor. The inner-layer ground conductor is located within the dielectric substrate. The first connection portion has a first end located on the second side surface. The upper surface ground conductor has a second end located on the second side surface. The inner-layer ground conductor has a third end located on the second side surface. In a side view, the minimum distance between the first end and the second end in the second direction is greater than the minimum distance between the first end and the third end in the second direction.
[0011] (8) In the wiring board according to any one of (1) to (7), the first connection portion has a protrusion that extends from the second upper surface along the second side surface and protrudes in the second direction.
[0012] (9) The wiring substrate according to any one of (1) to (8) above further includes a first connection member electrically connected to the first connection portion. The first connection member has a first tip portion that overlaps the first connection portion in a plan view. In a plan view, the first tip portion is located within the first opening.
[0013] (10) In the wiring board of (9) above, the maximum dimension of the first connection member in the second direction is smaller than the maximum dimension of the first opening in the second direction.
[0014] (11) In the wiring board of (9) or (10) above, the maximum distance in the first direction from the first side surface to the inner edge of the first opening is greater than the maximum dimension in the first direction from the first side surface to the first tip portion.
[0015] (12) The wiring board according to (5) or (6) further includes a first connection member electrically connected to the first connection portion, wherein at least a portion of the first connection member overlaps with the first recess in plan view.
[0016] (13) In the wiring board according to any one of (1) to (12), the dielectric substrate further has a second recess having an opening on the second lower surface, and the second recess is positioned so as to overlap at least a portion of the first signal conductor in plan view.
[0017] (14) In the wiring substrate of (13), the second recess is positioned to overlap at least a portion of the first opening in a plan view, and the maximum dimension of the second recess in the first direction in a plan view is equal to or smaller than the maximum dimension of the first opening in the first direction.
[0018] (15) In the wiring board of any one of (5) to (12), the dielectric substrate further includes a second recess having an opening on the second lower surface. In plan view, the second recess is positioned so as to overlap at least a portion of the first signal conductor. In plan view, the maximum dimension of the second recess in the first direction is greater than the maximum dimension of the first recess in the first direction.
[0019] (16) An electronic component mounting package according to an embodiment of the present disclosure includes a frame body and the wiring substrate according to any one of (1) to (15) fixed to the frame body. The frame body is bonded to a base and / or a dielectric substrate.
[0020] (17) An electronic module according to an embodiment of the present disclosure includes the electronic component mounting package of (16), an electronic component, and a lid. The electronic component is located on the base or the dielectric substrate and is electrically connected to the wiring board. The lid is located on the frame and covers the interior of the electronic component mounting package.
[0021] 1A is a perspective view of a wiring board and an electronic component mounting package according to a first embodiment of the present disclosure; FIG. 1B is an enlarged view of a main part A shown in FIG. 1; FIG. 1C is a perspective view of the main part A shown in FIG. 1, with the base omitted, as viewed from the negative direction of the z-axis; FIG. 1D is an enlarged plan view of the main part A shown in FIG. 1; FIG. 2 is a view with the connecting member omitted; FIG. 4 is a view with the connecting member omitted; FIG. 5 is a side view of the wiring board shown in FIG. 5, as viewed from the x-axis direction; FIG. 1E is an enlarged perspective view of a base according to a first embodiment of the present disclosure; FIG. 1F is a plan view of the base shown in FIG. 8; FIG. 1G is a perspective view of a first modified example of the base; FIG. 1H is a perspective view of a first modified example of the dielectric substrate, as viewed from the negative direction of the z-axis; FIG. 1H is a plan view of a first modified example of the dielectric substrate, as viewed from the negative direction of the z-axis; FIG. 1J is a perspective view of a second ... plan view of a second modified example of the dielectric substrate, as viewed from the negative direction of the z-axis; 15A is a diagram showing a modified example 3 of the dielectric substrate, and is a plan view of FIG. 15A viewed from the negative direction of the z-axis. FIG. 22 is an exploded perspective view showing a connection portion between a wiring substrate and an external substrate, with the connection member omitted. FIG. 23 is a plan view showing a connection portion between a wiring substrate and an external substrate and modified example 1 of the first connection member. FIG. 24 is a perspective view showing modified example 2 of the first connection member. FIG. 25 is a plan view showing modified example 2 of the first connection member. FIG. 26 is a perspective view showing modified example 3 of the first connection member. FIG. 27 is a side view showing modified example 3 of the first connection member. FIG. 28 is a side view showing modified example 4 of the first connection member. FIG. 29 is a plan view showing modified example 4 of the first connection member. FIG. 29 is a perspective view of a wiring board according to a second embodiment of the present disclosure. FIG. 21 is a perspective view of a wiring board according to a second embodiment of the present disclosure, including modified example 3 of the base. FIG. 22 is a perspective view of the wiring board shown in FIG. 22 viewed from the negative direction of the z-axis. FIG. 23 is an exploded perspective view of a wiring board, an electronic component mounting package, and an electronic module according to an embodiment of the present disclosure.
[0022] <Configuration of Wiring Board> Several exemplary embodiments of the present disclosure will be described below with reference to the drawings. Note that while any direction of the wiring board may be considered to be up or down, for convenience, a Cartesian coordinate system xyz is defined, with the positive side of the z direction being considered to be up. Hereinafter, the first direction refers, for example, to the x direction in the drawings. The second direction refers, for example, to the y direction in the drawings. In addition, in this disclosure, the concept of planar view includes a planar perspective view. In addition, in this disclosure, the concept of side view includes a side perspective view. Note that, in modified examples of the base 1 and the dielectric substrate 2, only those configurations that differ from the embodiment will be described, and the other configurations will be denoted by the same reference numerals as in the embodiment, and description thereof will be omitted.
[0023] First Embodiment A wiring board 101 according to a first embodiment of the present disclosure will be described with reference to Figures 1 to 9. As shown in Figures 2 to 6, the wiring board 101 includes a base 1 made of a metal material, a dielectric substrate 2, and a first signal conductor S1.
[0024] As shown in FIGS. 8 and 9 , the base 1 has a first upper surface 1a, a first lower surface 1c, a first side surface 1b, and a first opening 11 formed in the first upper surface 1a. The first lower surface 1c is located on the opposite side of the first upper surface 1a. The first side surface 1b is connected to the first upper surface 1a and the first lower surface 1c. The first upper surface 1a may include a mounting area on which an electronic component 103 (described later) is mounted. The base 1 is, for example, rectangular in plan view, measuring 10 mm × 10 mm to 50 mm × 50 mm and having a thickness of 0.5 mm to 20 mm. Examples of metal materials constituting the base 1 include metal materials such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or alloys containing these metal materials. In this case, the base 1 may be a single metal plate or a laminate of multiple metal plates. Furthermore, when the metal material constituting the base 1 is one of the above metal materials, in order to reduce oxidation corrosion, a plating layer of nickel, gold, or the like may be formed by electroplating or electroless plating on the surface of the base 1. Note that the base 1 being made of a metal material here means that it is essentially made of a metal material, and for example, the base 1 may contain a non-metallic material that is unavoidable in manufacturing.
[0025] As shown in FIGS. 2 to 6 , the dielectric substrate 2 is located on a first upper surface 1a. The dielectric substrate 2 also has a second upper surface 2a, a second lower surface 2c, and a second side surface 2b. The second lower surface 2c is located opposite the second upper surface 2a. The second side surface 2b is connected to the second upper surface 2a and the second lower surface 2c. The second side surface 2b is located along the first side surface 1b. Examples of materials that can be used for the dielectric substrate 2 include ceramic materials such as aluminum oxide sintered body, mullite sintered body, silicon carbide sintered body, aluminum nitride sintered body, and silicon nitride sintered body, as well as dielectric materials such as glass ceramic material and glass epoxy material. Furthermore, as shown in a second embodiment described later, the dielectric substrate 2 may be a printed circuit board (PCB).
[0026] The dielectric substrate 2 can be bonded to the base 1 via, for example, solder, brazing material, or an adhesive such as a glass or resin adhesive. The brazing material may be, for example, silver, copper, gold, aluminum, or magnesium, and may contain additives such as nickel, cadmium, or phosphorus.
[0027] In one embodiment, the dielectric substrate 2 is located on a portion of the first upper surface 1 a of the base 1, but the dielectric substrate 2 may be located so as to cover the entire first upper surface 1 a. In this case, the second upper surface 2 a of the dielectric substrate 2 may include an area on which an electronic component 103 (described later) is mounted.
[0028] The dielectric substrate 2 may be a single layer or may be a laminate of multiple dielectric layers. The dielectric substrate 2 has, for example, a rectangular shape in plan view, with dimensions of 4 mm x 4 mm to 50 mm x 50 mm and a thickness of 0.5 mm to 10 mm.
[0029] The dielectric substrate 2 may have a configuration in which a dielectric layer is further located on the second upper surface 2a. In this case, the dielectric layer located on the second upper surface 2a may be located so as to cover a portion of the second upper surface 2a, or may be located so as to cover the entire second upper surface 2a. For example, in one embodiment, the dielectric substrate 2 has a wall portion 25. The wall portion 25 is located so as to overlap a portion of the first signal conductor S1 in a plan view. In addition, a grounding conductor may be located on the upper surface and side surfaces of the wall portion 25.
[0030] The dielectric substrate 2 can be manufactured, for example, as follows: A plurality of green sheets are processed using a mold or the like to prepare a plurality of green sheets formed to the outer shape of the dielectric substrate 2. Next, the plurality of green sheets are stacked so that their outer edges coincide with each other to form a green sheet laminate. The green sheet laminate is fired to sinter the plurality of green sheets, thereby obtaining the dielectric substrate 2.
[0031] As shown in FIGS. 2 to 6 , the first signal conductor S1 is located on the second upper surface 2a. The first signal conductor S1 includes a first line portion S1L extending in a first direction (x-direction) away from the second side surface 2b, and a first connection portion S1P located between the first line portion S1L and the second side surface 2b. Examples of materials for the first signal conductor S1 include metal materials such as gold, silver, copper, nickel, tungsten, molybdenum, and manganese. The first signal conductor S1 may be formed by sintering a metal paste on the second upper surface 2a, or by using a thin-film formation technique such as vapor deposition or sputtering. The first signal conductor S1 has a width of 0.05 mm to 2 mm and a length of 1.5 mm to 25 mm. The thickness of the first signal conductor S1 is, for example, 0.01 to 0.1 mm. The width, length, and thickness of the first signal conductor S1 referred to here may refer to the dimensions of the first signal conductor S1 in the x-direction, y-direction, and z-direction, respectively. Furthermore, the width, length, and thickness of the first signal conductor S1 do not have to be constant, and may vary along the way.
[0032] The surface of the first signal conductor S1 may be formed with metal plating such as nickel plating or gold plating. An insulating film made of ceramic (e.g., alumina coating) or resin may be located on a portion of the first signal conductor S1. The insulating film may be provided on the first signal conductor S1 by screen printing. Alternatively, the insulating film may be located only on a portion of the first signal conductor S1. This configuration can reduce the possibility of the first signal conductor S1 shorting out with other wiring.
[0033] 6 , in one embodiment, the first signal conductor S1 is located in contact with the second side surface 2 b in a plan view. In other words, the first signal conductor S1 is located so as to reach the second side surface 2 b. Note that the first signal conductor S1 does not necessarily have to be in contact with the second side surface 2 b, and may be located away from the second side surface 2 b in a plan view.
[0034] 6, the maximum dimension Ls1a of the first connection portion S1P in the y direction is greater than the maximum dimension Ls1c of the first line portion S1L in the y direction. This configuration allows for stable connection of the first connection member 31, which will be described later.
[0035] 6, in one embodiment, the first connection portion S1P has a protrusion S1a (described later). Therefore, in one embodiment, the maximum dimension Ls1a of the first connection portion S1P in the y direction may include the dimension of the protrusion S1a. Furthermore, in one embodiment, the dimension Ls1p of the first connection portion S1P in the y direction other than the protrusion S1a is also larger than the maximum dimension Ls1c of the first line portion S1L in the y direction.
[0036] 6, in one embodiment, the first signal conductor S1 has a second connection portion S1b on the opposite side (positive direction of the x-axis) from the first connection portion S1P. A dimension Ls1b of the second connection portion S1b in the y-direction is greater than a maximum dimension Ls1c of the first line portion S1L in the y-direction. A conductive connection member such as a lead terminal or a wire may be joined to the second connection portion S1b, similar to the first connection portion S1P.
[0037] 4 and 5 , the wiring board 101 may include an upper ground conductor G2 located on the second upper surface 2 a. In one embodiment, the upper ground conductor G2 includes a first upper ground conductor G21 and a second upper ground conductor G22. In this case, the first signal conductor S1 is located between the first upper ground conductor G21 and the second upper ground conductor G22. This configuration strengthens the ground potential and the electric field coupling, thereby reducing the possibility of crosstalk and resonance occurring when the electric field distribution during high-frequency signal transmission is wider than desired.
[0038] 3 and 4 , a bottom ground conductor G1 may be located on the second lower surface 2c. The bottom ground conductor G1 has a first opening region G11. More specifically, in a plan view from the negative z-axis direction, the second lower surface 2c is exposed at a position overlapping the first opening region G11. In plan view, the first opening region G11 is located within the first opening 11 and overlaps the first connection portion S1P. This configuration can distance metal parts (the base 1 and the bottom ground conductor G1) close to the first connection portion S1P in the z direction. Therefore, when the first signal conductor S1 is provided with the first connection portion S1P for stable connection of the first connection member 31 described later, it is possible to reduce the possibility of a decrease in the impedance value around the connection portion of the first connection member 31. Furthermore, in plan view, the first opening region G11 is located within the first opening 11, which can further reduce the effective relative dielectric constant around the first connecting member 31. This can further reduce the possibility that the impedance value around the connection portion of the first connecting member 31 will decrease.
[0039] 3, in one embodiment, the first opening region G11 is positioned so as to intersect with the second side surface 2b, but the first opening region G11 does not necessarily have to be positioned so as to intersect with the second side surface 2b. In other words, in a plan view, the first opening region G11 may be positioned with a gap between it and the second side surface 2b.
[0040] The bottom ground conductor G1 may be electrically connected to the first top ground conductor G21, the second top ground conductor G22, and the inner-layer ground conductor G3 (described later) by vias provided in the dielectric substrate 2 or conductors formed on the side surfaces of the dielectric substrate 2, including the second side surface 2b. Furthermore, the bottom ground conductor G1 may be electrically connected to the base 1.
[0041] 4 and 6 , the first opening 11 is positioned so as to overlap at least a portion of the first signal conductor S1 in plan view. This configuration allows the volume of the base portion 1 that overlaps with the first signal conductor S1 to be reduced in plan view. The first opening 11 is filled with air or a dielectric material such as a resin material or a glass material, and has a lower dielectric constant than the base portion 1. Therefore, when a first connection portion S1P is provided in the first signal conductor S1 to stably connect a first connection member 31 (described later), the possibility of a decrease in impedance can be reduced.
[0042] In one embodiment, the first opening 11 has a notched shape extending from the first upper surface 1a to the first side surface 1b. However, as in Modification 1 of the base 1 described below, the first opening 11 may have a notched shape extending from the first upper surface 1a to the first side surface 1b and the first lower surface 1c. Furthermore, as in Modification 2 of the base 1 described below, the first opening 11 may have a concave shape with an opening provided in the first upper surface 1a. Furthermore, in one embodiment, the shape of the first opening 11 in a plan view is rectangular with some rounded corners. However, the shape of the first opening 11 may be rectangular or circular. Furthermore, the base 1 may have a plurality of first openings 11.
[0043] Furthermore, in plan view, the first signal conductor S1 may be located at the center of the first opening 11 in the y direction. That is, in plan view, the first opening 11 may be located line-symmetrically with respect to the first signal conductor S1. With this configuration, the base portions 1 located on the left and right of the first signal conductor S1 can be reduced evenly, making it easy to adjust the impedance value of the first signal conductor S1.
[0044] As shown in Figures 4 and 6, the second side surface 2b may be located along the first side surface 1b in plan view. In this case, as shown in Figures 8 and 9, the first opening 11 may be located so as to intersect with the first side surface 1b. More specifically, the first opening 11 may have a notched shape extending from the first upper surface 1a to the first side surface 1b. With this configuration, the decrease in impedance in the first signal conductor S1 can be more efficiently reduced.
[0045] 8 and 9 can be manufactured by stacking a metal plate formed to the outer shape of the base 1 having the first opening 11 and another metal plate formed to the outer shape of the base 1. With this configuration, when the base 1 is a laminate, the number of manufacturing steps for the base 1 can be reduced compared to the case of Modification 1 of the base 1 described later.
[0046] Fig. 10 shows Modification 1 of the base 1. As shown in Fig. 10, the first opening 11 of the base 1 is located so as to intersect with the first upper surface 1a, the first side surface 1b, and the first lower surface 1c. In other words, the first opening 11 penetrates the base 1 from the first upper surface 1a to the first lower surface 1c, and is located so as to intersect with the first side surface 1b.
[0047] Fig. 11 shows a second modified example of the base 1. As shown in Fig. 11, the first opening 11 of the base 1 does not have to be positioned so as to intersect with the first side surface 1b. In other words, the first opening 11 may be positioned with a gap between it and the first side surface 1b. In this case, the first opening 11 may penetrate from the first upper surface 1a to the first lower surface 1c.
[0048] As shown in Figures 4 and 6, in one embodiment, the second side surface 2b is flush with the first side surface 1b in a plan view, but the second side surface 2b may be located away from the first side surface 1b.
[0049] 6, when the first signal conductor S1 is positioned in contact with the second side surface 2b, the first opening 11 is positioned to intersect with the first side surface 1b, so that the base 1 overlapping with the first signal conductor S1 can be reduced, thereby more efficiently reducing the decrease in impedance in the first signal conductor S1.
[0050] 4, when a first connection member 31 (described later) is connected to the first signal conductor S1, the impedance value may decrease near the second side surface 2b. Therefore, by positioning the first opening 11 so as to intersect with the first side surface 1b, it is possible to reduce the decrease in the impedance value of the first signal conductor S1 near the second side surface 2b.
[0051] 6 , the maximum dimension Ly11 of the first opening 11 in the second direction (y direction) along the first side surface 1b may be equal to or greater than the maximum dimension Ls1a of the first connection portion S1P in the second direction. That is, in a plan view, the first connection portion S1P may be located within the first opening 11 in the y direction. This reduces the possibility of a decrease in impedance value when the first connection portion S1P is provided in the first signal conductor S1 to stably connect a first connection member 31 (described later).
[0052] As shown in FIGS. 5 and 6 , the dielectric substrate 2 may further include a first recess 21. In this case, the first recess 21 is positioned so as to intersect with the second upper surface 2a and the second side surface 2b. The first recess 21 is positioned so as to overlap the first opening 11 in a plan view. The first recess 21 may also include a first inner wall surface 211. The first inner wall surface 211 is continuous with the second upper surface 2a and the second side surface 2b. The first signal conductor S1 (first connecting portion S1P) is positioned so as to extend to the first inner wall surface 211. In this case, in a plan view, the maximum dimension Ly21 of the first recess 21 in the y direction may be smaller than the maximum dimension Ls1a of the first connecting portion S1P in the y direction. By arranging the first signal conductor S1 in the y direction of the first recess 21, it is possible to reduce a decrease in the impedance value of the first signal conductor S1 and simultaneously facilitate adjustment of the impedance value. The fact that the first signal conductor S1 is located so as to extend to the first inner wall surface 211 can be rephrased as the first signal conductor S1 forming a so-called castellation on the first inner wall surface 211. In other words, the first signal conductor S1 is also located on the first inner wall surface 211. In one embodiment, the first recess 21 is located so as to intersect with the second upper surface 2 a, the second side surface 2 b, and the second lower surface 2 c. In other words, the first recess 21 penetrates from the second upper surface 2 a to the second lower surface 2 c and is located so as to be in contact with the second side surface 2 b in a plan view.
[0053] 3 to 6, when the wiring substrate 101 further includes the first upper ground conductor G21 and the second upper ground conductor G22, the dielectric substrate 2 may further include a third recess 23 and a fourth recess 24 located on the second upper surface 2a. The third recess 23 is located in contact with the second side surface 2b and the first upper ground conductor G21. The fourth recess 24 is located in contact with the second side surface 2b and the second upper ground conductor G22.
[0054] The third recess 23 may include a third inner wall surface 233 that is continuous with the second upper surface 2 a and the second side surface 2 b. In this case, the first upper surface ground conductor G21 may be located so as to extend to the third inner wall surface 233.
[0055] The fourth recess 24 may include a fourth inner wall surface 244 that is continuous with the second upper surface 2 a and the second side surface 2 b. In this case, the second upper surface ground conductor G22 may be located so as to extend to the fourth inner wall surface 244.
[0056] 5 , in one embodiment, the maximum dimension Lz23 of the third recess 23 in the z direction and the maximum dimension Lz24 of the fourth recess 24 in the z direction may be the same as or different from the maximum dimension Lz21 of the first recess 21 in the z direction. When the maximum dimension Lz23 of the third recess 23 in the z direction and the maximum dimension Lz24 of the fourth recess 24 in the z direction are the same as the dimension Lz2b of the second side surface 2b of the dielectric substrate 2 in the z direction, the grounding state of the dielectric substrate 2 can be improved, thereby improving the high-frequency characteristics of the first signal conductor S1.
[0057] Fig. 12 shows a first modified example of the dielectric substrate 2. In the first modified example of the dielectric substrate 2, as shown in Fig. 12, the first recess 21 does not extend all the way to the second lower surface 2c. In other words, the first recess 21 has a notched shape extending from the second upper surface 2a to the second side surface 2b.
[0058] 12 , 13A, and 13B , in a plan view, the maximum distance Lx11 in the x direction from the first side surface 1b to the inner edge of the first opening 11 may be greater than the maximum dimension Lx21 in the x direction of the first recess 21. With this configuration, it is possible to reduce a decrease in the impedance value of the first signal conductor S1 while ensuring a connection area between the first connection member 31 (described later) and the first signal conductor S1.
[0059] As shown in FIGS. 3 to 7 , the wiring substrate 101 may further include an upper surface ground conductor G2 and an inner-layer ground conductor G3. The upper surface ground conductor G2 is located on the second upper surface 2a, spaced apart from the first signal conductor S1. The inner-layer ground conductor G3 is located within the dielectric substrate 2. The first connection portion S1P has a first end portion S1e located on the second side surface 2b. The upper surface ground conductor G2 has a second end portion G21e (G22e) located on the second side surface 2b. The inner-layer ground conductor G3 has a third end portion G3e located on the second side surface 2b. In one embodiment, the first connection portion S1P has a protrusion S1a, which will be described later, and in this case, the protrusion S1a and the first end portion S1e are the same. When the first connection portion S1P does not have the protrusion S1a, the first end S1e can be rephrased as the outer edge of the first connection portion S1P that is close to the second side surface 2b. In one embodiment, the first end S1e are located symmetrically across the first recess 21, but they may be located on only one side. The second end G21e (G22e) of the upper surface ground conductor G2 can be rephrased as the second end G21e of the first upper surface ground conductor G21 and the second end G22e of the second upper surface ground conductor G22. In one embodiment, the first end S1e, the second end G21e (G22e), and the third end G3e are exposed on the second side surface 2b, but they do not necessarily have to be exposed on the second side surface 2b.
[0060] As shown in FIG. 7 , in a side view or a plan view, the minimum distance L1 between the first end S1e and the second end G21e (G22e) in the y direction is greater than the minimum distance L2 between the first end S1e and the third end G3e in the y direction. This configuration reduces the possibility of the bonding material sagging and contacting the top ground conductor G2 (the first top ground conductor G21 and the second top ground conductor G22) and causing a short circuit when connecting the first connection member 31 to the first connection portion S1P. Furthermore, by positioning the inner-layer ground conductor G3 closer to the first signal conductor S1, the high-frequency characteristics of the first signal conductor S1 can be improved. The materials of the bottom ground conductor G1, top ground conductor G2, and inner-layer ground conductor G3 described above may be the same as or different from those of the first signal conductor S1. The bottom ground conductor G1, top ground conductor G2, and inner-layer ground conductor G3 can be formed, for example, by a method similar to that of the first signal conductor S1.
[0061] As shown in FIGS. 4 to 7 , the first connection portion S1P may have a protrusion S1a. The protrusion S1a extends from the second upper surface 2a along the second side surface 2b and protrudes in the y direction. This configuration allows a capacitive component to be added to the first signal conductor S1 even if an inductive component increases at the point where the first connection member 31 is connected to the external substrate, making it easier to adjust the impedance value. In one embodiment, the protrusion S1a contacts the second side surface 2b in a plan view. In one embodiment, the protrusions S1a are located symmetrically across the first recess 21, but may be located on only one side.
[0062] 2 to 4, the wiring board 101 may further include a first connection member 31 electrically connected to at least a portion of the first connection portion S1P. In this case, the first connection member 31 may have a first tip portion 31e that overlaps with the first signal conductor S1 in a plan view. In a plan view, the first tip portion 31e may be located within the first opening 11. In a plan view, there is a possibility that the impedance value will decrease in the portion where the first connection member 31 and the first connection portion S1P overlap. However, the above-described configuration can reduce the possibility that the impedance value at the first connection portion S1P will decrease.
[0063] In one embodiment, the first connection member 31 is a lead terminal, but is not limited to this. The first connection member 31 may be, for example, a conductive member such as a wire, or a flexible printed circuit (FPC). A flexible circuit or a printed circuit board on which an electronic circuit is formed may be connected to the tip of the first connection member 31. The second connection member 32 and the third connection member 33, which will be described later, may also be members similar to the first connection member 31.
[0064] 4, the maximum dimension Ly31 of the first connection member 31 in the y direction may be smaller than the maximum dimension Ly11 of the first opening 11 in the y direction. In other words, the portion where the first connection member 31 and the first signal conductor S1 overlap, where the impedance value may decrease, is located within the first opening 11 in the y direction in plan view. This configuration makes it easy to adjust the impedance value of the first signal conductor S1.
[0065] 4, the maximum distance Lx11 in the x direction from the first side surface 1b to the inner edge of the first opening 11 may be greater than the maximum dimension L31e in the x direction from the first side surface 1b to the first tip portion 31e. In other words, the portion where the first connecting member 31 and the first connecting portion S1P overlap, where the impedance value may decrease, is located within the first opening 11 in the x direction in a plan view. This configuration makes it easy to adjust the impedance value of the first signal conductor S1.
[0066] 4 , in a plan view, at least a portion of the first connection member 31 may be positioned so as to overlap the first recess 21. Increasing the area of the first signal conductor S1 (providing the first connection portion S1P) to join the first connection member 31 to the first signal conductor S1 may result in a decrease in the impedance value, but providing the first recess 21 can reduce the decrease in the impedance value.
[0067] As shown in Modification 1 of the dielectric substrate 2 in FIGS. 12 , 13A, and 13B, the dielectric substrate 2 may further include a second lower surface 2c opposite the second upper surface 2a and a second recess 22 having an opening in the second lower surface 2c. In this case, as shown in FIG. 13B, the second recess 22 may be positioned so as to overlap at least a portion of the first signal conductor S1 in a planar view. This configuration reduces the volume of the dielectric substrate 2 that overlaps the first signal conductor S1 in a planar view. The second recess 22 is filled with air or a dielectric material such as a resin material or a glass material, and has a lower dielectric constant than the dielectric substrate 2. This reduces the impedance reduction in the first signal conductor S1 caused by the dielectric substrate 2.
[0068] In the first modified example of the dielectric substrate 2 shown in Figures 13A and 13B, the dielectric substrate 2 has a first recess 21 and a second recess 22, but it does not necessarily have to have the first recess 21, and may have only the second recess 22.
[0069] 14A and 14B show a second modified example of the dielectric substrate 2, and FIGS. 15A and 15B show a third modified example of the dielectric substrate 2. As shown in FIGS. 14A, 14B and 15A and 15B, the second recess 22 may be positioned so as to intersect with the second side surface 2b. In other words, the second recess 22 may be positioned so as to be notched from the second lower surface 2c to the second side surface 2b.
[0070] When the dielectric substrate 2 has the first recess 21 and the second recess 22, the first recess 21 and the second recess 22 may be connected to each other, as in Modification 2 of the dielectric substrate 2 shown in FIG. 14A . In Modification 2 of the dielectric substrate 2 shown in FIG. 14A , the first recess 21 and the second recess 22 are connected to each other at the second side surface 2b. With this configuration, the amount of the dielectric substrate 2 overlapping with the first signal conductor S1 in a plan view can be further reduced compared to when the first recess 21 and the second recess 22 are located separately, thereby reducing the decrease in impedance value. Furthermore, with the above-described configuration, there is no need to provide a dielectric layer between the first recess 21 and the second recess 22, and therefore the dielectric substrate 2 can be made thinner compared to when the first recess 21 and the second recess 22 are located separately.
[0071] Furthermore, when the dielectric substrate 2 has the first recess 21 and the second recess 22, the first recess 21 and the second recess 22 may be located separately, as in Modification 3 of the dielectric substrate 2 shown in Fig. 15A. In this configuration, the strength of the dielectric substrate 2 can be improved compared to when the first recess 21 and the second recess 22 are connected.
[0072] 13B , 14B , and 15B , in a plan view, the second recess 22 may be positioned so as to overlap the first recess 21, or may be positioned so as to be spaced apart from the first recess 21. When the second recess 22 is positioned so as to overlap the first recess 21 in a plan view, the overlapping portion between the first signal conductor S1 and the first connecting member 31 can be covered without interruption by the first recess 21 and the second recess 22, compared to when the second recess 22 is positioned so as to be spaced apart from the first recess 21 in a plan view, and therefore, a further decrease in the impedance value in the first signal conductor S1 can be reduced.
[0073] In a plan view, the second recess 22 may be positioned so as to overlap at least a portion of the first opening 11. In this case, in a plan view, the maximum dimension Lx22 of the second recess 22 in the x-direction may be equal to or less than the maximum distance Lx11 of the first opening 11 in the x-direction. With this configuration, it is possible to reduce the possibility of a decrease in the impedance value of the signal conductor S1 while also reducing the possibility of a decrease in the strength of the dielectric substrate 2. Furthermore, the maximum dimension Lx22 of the second recess 22 in the x-direction may be equal to the maximum distance Lx11 of the first opening 11 in the x-direction. With this configuration, it is possible to more efficiently reduce the decrease in the impedance value of the first signal conductor S1.
[0074] 13B, 14B, and 15B, in a plan view, the maximum dimension Lx22 of the second recess 22 in the x-direction may be larger than the maximum dimension Lx21 of the first recess 21 in the x-direction. With this configuration, the overlapping volume of the first connection member 31 and the dielectric substrate 2 can be reduced, thereby making it possible to miniaturize the wiring substrate 101.
[0075] 16 , the wiring board 101 may be electrically connected to an external board 4. The external board 4 includes a board 41 and a second signal conductor S2 located on the upper surface of the board 41. Although not shown, the first signal conductor S1 and the second signal conductor S2 are electrically connected by the first connecting member 31 described above.
[0076] The external substrate 4 may include a first external upper surface ground conductor G4 and a second external upper surface ground conductor G5 located on the upper surface of the substrate 41. In this case, the second signal conductor S2 may be located between the first external upper surface ground conductor G4 and the second external upper surface ground conductor G5. The first external upper surface ground conductor G4 and the first upper surface ground conductor G21 may be electrically connected by the second connecting member 32 described above. Furthermore, the second external upper surface ground conductor G5 and the second upper surface ground conductor G22 may be electrically connected by the third connecting member 33 described above.
[0077] The external substrate 4 may include an external bottom surface ground conductor G6 located on the underside of the substrate 41. The external bottom surface ground conductor G6 may be electrically connected to the first external top surface ground conductor G4 and / or the second external top surface ground conductor G5 by vias or castellations.
[0078] The external substrate 4 also has a substrate side surface 41b, which is positioned opposite the first side surface 1b of the base 1. The substrate side surface 41b may be joined to the first side surface 1b with a conductive bonding material F. In this case, the external bottom surface ground conductor G6 and the bottom surface ground conductor G1 may be electrically connected by the bonding material F.
[0079] The bonding material F may extend to a part of the first upper surface 1 a. Furthermore, in order to prevent a decrease in the impedance value of the first signal conductor S1, the bonding material F does not have to extend to the first opening 11.
[0080] The bonding material F may be spaced apart from the first signal conductor S1 and the second signal conductor S2 in a side view. This configuration reduces the possibility of the bonding material F coming into contact with the first signal conductor S1, the second signal conductor S2, and the first connecting member 31, causing a short circuit.
[0081] In one embodiment, the bonding material F may contain silver epoxy resin. When the bonding material F contains silver epoxy resin, the silver epoxy resin has a higher viscosity than solder or brazing material and is therefore less likely to flow off. This makes it easier to position the bonding material F at a desired position. The bonding material F may also be solder, brazing material, or the like.
[0082] As described above, the external bottom surface ground conductor G6 and the bottom surface ground conductor G1 are electrically connected via the bonding material F, which reduces the deviation in ground potential between the external substrate 4 and the wiring substrate 101 and strengthens the grounding state. This makes it possible to improve high-frequency characteristics such as crosstalk characteristics during signal transmission in the first signal conductor S1 and the second signal conductor S2.
[0083] 16 , the external substrate 4 may include a pedestal 42 located below the substrate 41. In this case, the substrate 41 may be directly bonded to the pedestal 42, or, if the external substrate 4 includes an external bottom ground conductor G6, the substrate 41 may be bonded via the external bottom ground conductor G6. In addition, in a side view, the bonding material F may extend to between the substrate 41 and the pedestal 42. In other words, the substrate 41 and / or the external bottom ground conductor G6 may be bonded to the pedestal 42 by the bonding material F.
[0084] FIG. 17 is a plan view showing a first modification of the connection portion between the wiring substrate 101 and the external substrate 4 and the first connecting member 31. The first modification of the first connecting member 31 has a first narrow portion 31n and a first wide portion 31w. In a plan view, the dimension L31w of the first wide portion 31w in the y direction is larger than the dimension L31n of the first narrow portion 31n in the y direction. Here, the dimension L31w of the first wide portion 31w in the y direction may be rephrased as the maximum dimension of the first connecting member 31 in the y direction. In this modification, the first wide portion 31w has an arc shape in a plan view and is continuous with the first narrow portion L31n. In this modification, the external connecting member 31 can be rephrased as having a bulging shape at the first wide portion 31w in a plan view. Furthermore, although the first wide portion 31w has a shape that is symmetrical in the longitudinal direction of the first connecting member 31, it does not necessarily have to be a shape that is symmetrical in the longitudinal direction. For example, the first wide portion 31w may be shaped so that it is located on only one side of the first connecting member 31 (for example, the positive side in the y direction).
[0085] 17 , the first wide portion 31w is located between the first side surface 1b and the substrate side surface 41b in a plan view. This configuration reduces the possibility of abrupt impedance fluctuations when signals are transmitted between the first signal conductor S1 and the second signal conductor S2, and reduces the possibility of unwanted electrical signals being reflected by the first signal conductor S1 and the second signal conductor S2. In FIG. 17 , the first side surface 1b is flush with the second side surface 2b, so in other words, the first wide portion 31n is located between the second side surface 2b and the substrate side surface 41b in a plan view.
[0086] 17, the dimension L31w of the first wide portion 31w in the y direction is larger than the dimension Ls2 of the second signal conductor S2 in the y direction. The dimension L31w of the first wide portion 31w in the y direction may be smaller than or the same as the dimension Ls2 of the second signal conductor S2 in the y direction. When the dimension L31w is larger than the dimension Ls2, the possibility of localized high impedance in the first connecting member 31 can be reduced.
[0087] 17, the dimension L31w of the first wide portion 31w in the y direction is smaller than the maximum dimension Ls1a of the first connection portion S1P in the y direction. Note that the dimension L31w of the first wide portion 31w in the y direction may be larger than or the same as the maximum dimension Ls1a of the first connection portion S1P in the y direction.
[0088] 17 also shows modified examples of the second connecting member 32 and the third connecting member 33. In these modified examples, the second connecting member 32 has a second narrow portion 32n and a second wide portion 32w. The second narrow portion 32n and the second wide portion 32w can be defined in the same way as the first narrow portion 31n and the first wide portion 31w, respectively. The third connecting member 33 has a third narrow portion 33n and a third wide portion 33w. The third narrow portion 33n and the third wide portion 33w can also be defined in the same way as the first narrow portion 31n and the first wide portion 31w, respectively.
[0089] 18A and 18B are diagrams illustrating a second modified example of the first connecting member 31. In this modified example, the first connecting member 31 also has a first narrow portion 31n and a first wide portion 31w. The second modified example of the first connecting member 31 differs from the first modified example of the first connecting member 31 in that the first wide portion 31w has a linear shape extending along the y direction.
[0090] 19A and 19B are diagrams illustrating a third modification of the first connecting member 31. In this modification, the first signal conductor S1 also has a first narrow portion 31n and a first wide portion 31w, but in a plan view from the y direction, the dimension H31w of the first wide portion 31w in the z direction is larger than the dimension H31n of the first narrow portion 31n in the z direction.
[0091] 20A, 20B, and 20C show a fourth modification of the first connecting member 31. In this modification, in a plan view from the y direction, the dimension H31w of the first wide portion 31w in the z direction is larger than the dimension H31n of the first narrow portion 31n in the z direction (FIG. 20B). Also, in a plan view, the dimension L31w of the first wide portion 31w in the y direction is larger than the dimension L31n of the first narrow portion 31n in the y direction (FIG. 20C). While FIGS. 17 to 20A, 20B, and 20C show the respective modifications of the first connecting member 31, the second connecting member 32 and the third connecting member 33 may have the same shapes as the respective modifications of the first connecting member 31.
[0092] 21 to 23, a wiring substrate 101 according to a second embodiment of the present disclosure will be described. Note that, in the following, only the configuration of the second embodiment that differs from the configuration of the first embodiment will be described, and the other configurations will be assigned the same reference numerals as in the first embodiment and will not be described.
[0093] As shown in FIG. 21, a wiring board 101 according to the second embodiment differs from the first embodiment in that the dielectric substrate 2 is a printed circuit board.
[0094] 22 and 23 are diagrams illustrating a wiring substrate 101 including a third modified base 1. This modification differs from the above-described embodiment in that the base 1 includes a second opening 12. The second opening 12 has a notched shape extending from the first lower surface 1c to the first side surface 1b. As illustrated in FIGS. 22 and 23 , in this modification, the maximum dimension Ly12 of the second opening 12 in the y direction may be greater than the maximum dimension Ly11 of the first opening 11 in the y direction. Furthermore, the maximum distance Lx12 from the first side surface 1b to the inner edge of the second opening 12 in the x direction may be greater than the maximum distance Lx11 from the first side surface 1b to the inner edge of the first opening 11 in the x direction. In other words, the first opening 11 may be located within the second opening 12 in a plan view.
[0095] 1 and 24 , an electronic component mounting package 100 according to an embodiment of the present disclosure includes a frame 102 and a wiring substrate 101 fixed to the frame 102. The frame 102 is bonded to the base 1 and the dielectric substrate 2. Alternatively, the frame 102 may be bonded only to either the base 1 or the dielectric substrate 2.
[0096] The frame 102 is located on the base 1 and / or the dielectric substrate 2 and protects the electronic components 103 located therein in a planar view. That is, in a planar view, the frame 102 is located so as to surround the electronic components 103. As shown in FIG. 1 , in one embodiment, the frame 102 and the dielectric substrate 2 surround the first upper surface 1a of the base 1. As such, the frame 102 does not have to surround the entire first upper surface 1a of the base 1. The frame 102 may be rectangular in a planar view. In this case, the dielectric substrate 2 may be sandwiched between the frame 102 and the base 1. Furthermore, as shown in FIG. 24 , the frame 102 may have a notch 102K for joining the dielectric substrate 2.
[0097] The material of the frame 102 may be, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials. When the material of the frame 102 is a metal material such as those described above, the wiring substrate 101 can be fitted into the cutout portion 102K and joined.
[0098] The material of the frame 102 may be an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a ceramic material such as glass ceramics. The material of the frame 102 may be the same as that of the dielectric substrate 2. In this case, the frame 102 and the dielectric substrate 2 can be molded as a single unit.
[0099] The frame 102 can be joined to the base 1 via a brazing material or the like. The brazing material may be, for example, silver, copper, gold, aluminum, or magnesium, and may contain additives such as nickel, cadmium, or phosphorus.
[0100] Electronic component mounting package 100 according to one embodiment can be used as a package for mounting semiconductor components for wireless communication or optical communication, for example. In this case, wiring substrate 101 in electronic component mounting package 100 can be used as an input / output terminal for electrically connecting electronic component 103, such as a semiconductor element, to the outside and transmitting and inputting / outputting electrical signals.
[0101] 24 , an electronic module 10 according to an embodiment of the present disclosure includes an electronic component mounting package 100, an electronic component 103, and a lid 104. The electronic component 103 is located on the base 1 or the dielectric substrate 2, and is electrically connected to the wiring board 101. The lid 104 is located on the frame 102, and is positioned to cover the interior of the electronic component mounting package 100.
[0102] The electronic component 103 may be a component that performs signal processing, such as converting a radio signal or an optical signal into an electrical signal, or converting an electrical signal into an optical signal or a radio signal. In one embodiment, the electronic component 103 is located on the base 1 and housed in the electronic component mounting package 100.
[0103] Examples of the electronic component 103 include optical semiconductor elements such as semiconductor lasers (LDs) or photodiodes (PDs), semiconductor integrated circuit elements, and sensor elements such as optical sensors. The electronic component 103 can be formed from a semiconductor material such as gallium arsenide or gallium nitride. When the electronic component 103 is an optical semiconductor element, the electronic module 10 can be used as an optical communication module.
[0104] The lid 104 is positioned on the frame 102, covering the interior of the electronic component mounting package 100, and protects the electronic component 103 together with the frame 102. The lid 104 is, for example, rectangular in plan view, measuring 10 mm x 10 mm to 50 mm x 50 mm and having a thickness of 0.5 mm to 2 mm. Examples of materials for the lid 104 include metal materials such as iron, copper, nickel, chromium, cobalt, molybdenum, and tungsten, as well as alloys combining a plurality of these metal materials. The metal member that constitutes the lid 104 can be produced by subjecting an ingot of such a metal material to a metal processing method such as rolling or punching.
[0105] The electronic module 10 may further include a seal ring located between the lid 104 and the frame 102. The seal ring functions to bond the lid 104 and the frame 102. The seal ring is located on the frame 102 and surrounds the electronic component 103 in a plan view. Examples of materials for the seal ring include metal materials such as iron, copper, silver, nickel, chromium, cobalt, molybdenum, and tungsten, as well as alloys combining a plurality of these metal materials. Note that if a seal ring is not provided on the frame 102, the lid 104 may be bonded to the frame 102 via an adhesive such as solder, brazing material, glass, or resin adhesive.
[0106] It should be noted that various combinations of the characteristic parts in one embodiment are not limited to the examples of the embodiment described above, and combinations of the respective modified examples are also possible.
[0107] The wiring board according to one embodiment has the above-described configuration, which allows the impedance of the first signal conductor to be adjusted when the wiring board is miniaturized. This improves the signal transmission characteristics of the first signal conductor. This makes it possible to provide an electronic component mounting package and an electronic module that can reduce loss in signal transmission, particularly high-frequency signal transmission.
[0108] The present disclosure can be used as a wiring board, an electronic component mounting package using the wiring board, and an electronic module.
[0109] REFERENCE SIGNS LIST 1 base 1a first upper surface 1b first side surface 1c first lower surface 11 first opening 12 second opening 2 dielectric substrate 2a second upper surface 2b second side surface 2c second lower surface 21 first recess 211 first inner wall surface 22 second recess 222 second inner wall surface 23 third recess 233 third inner wall surface 24 fourth recess 244 fourth inner wall surface 25 wall portion 31 first connecting member 31e first tip portion 31w first wide portion 31n first narrow portion 32 second connecting member 32w second wide portion 32n second narrow portion 33 third connecting member 33w third wide portion 33n third narrow portion 4 external substrate 41 substrate 41b substrate side surface 42 pedestal portion S1 first signal conductor S1P First connection portion S1e First end portion S1a Protrusion portion S1b Second connection portion S1L First line portion S2 Second signal conductor G1 Bottom ground conductor G11 First opening region G2 Top ground conductor G21 First top ground conductor G21e Second end portion G22 Second top ground conductor G22e Second end portion G3 Inner-layer ground conductor G3e Third end portion G4 First outer top ground conductor G5 Second outer top ground conductor G6 Outer bottom ground conductor Lx11 Maximum distance from the first side surface to the inner edge of the first opening in the x direction Ly11 Maximum dimension of the first opening in the y direction Lx12 Maximum distance from the first side surface to the inner edge of the second opening in the x direction Ly12 Maximum dimension of the second opening in the y direction Lx21 Maximum dimension of the first recess in the x direction Ly21 Lz21: Maximum dimension of the first recess in the y direction Lz22: Maximum dimension of the first recess in the z direction Lx22: Maximum dimension of the second recess in the x direction Ly22: Maximum dimension of the second recess in the y direction Lz22: Maximum dimension of the second recess in the z direction Lz23: Maximum dimension of the third recess in the z direction Lz24: Maximum dimension of the fourth recess in the z direction Ls1a: Maximum dimension of the first connection portion in the y direction Ls1p: Dimension of the first connection portion excluding the protrusion in the y direction Ls1c: Maximum dimension of the first line portion in the y direction Ls1b: Dimension of the second connection portion in the y direction Ls2: Dimension of the second signal conductor in the y direction L1: Minimum distance between the first connection portion and the upper surface ground conductor L2: Minimum distance between the first connection portion and the inner-layer ground conductor L31w: Dimension of the first wide portion in the y direction H31w: Dimension of the first wide portion in the z directionL31n: Dimension of the first narrow portion in the y direction H31n: Dimension of the first narrow portion in the z direction F: Bonding material 10: Electronic module 100: Package for mounting electronic components 101: Wiring board 102: Frame 102K: Notch 103: Electronic component 104: Lid
Claims
1. a base portion having a first upper surface, a first lower surface opposite to the first upper surface, a first side surface connecting the first upper surface and the first lower surface, and a first opening portion having an opening in the first upper surface, the base portion being made of a metal material; a dielectric substrate having a second upper surface, a second lower surface opposite to the second upper surface, and a second side surface connected to the second upper surface and the second lower surface and located along the first side surface, the dielectric substrate being located on the first upper surface; a first signal conductor having a first line portion extending in a first direction away from the second side surface and a first connection portion located between the first line portion and the second side surface, and located on the second top surface; a maximum dimension of the first connection portion in a second direction along the first side surface is larger than a maximum dimension of the first line portion in the second direction; In a plan view, the first opening is positioned so as to overlap at least a portion of the first connection portion.
2. a bottom ground conductor located on the second bottom surface and having a first open area; The wiring board according to claim 1 , wherein the first opening region is located within the first opening and overlaps with the first connection portion in a plan view.
3. The wiring board according to claim 1 , wherein the first opening is positioned so as to intersect with the first side surface.
4. The wiring board according to claim 1 , wherein a maximum dimension of the first opening in a second direction along the first side surface is equal to or greater than a maximum dimension of the first connection portion in the second direction.
5. the dielectric substrate further has a first recess including a first inner wall surface; the first recess intersects with the second upper surface and the second side surface and is positioned so as to overlap with the first opening in a plan view; the first inner wall surface is continuous with the second upper surface and the second side surface, the first signal conductor is located so as to extend to the first inner wall surface, The wiring board according to claim 1 , wherein in a plan view, a maximum dimension of the first recess in a second direction along the second side surface is smaller than a maximum dimension of the first connection portion in the second direction.
6. The wiring board according to claim 5 , wherein in a plan view, a maximum distance from the first side surface to an inner edge of the first opening in the first direction is greater than a maximum dimension of the first recess in the first direction.
7. a top ground conductor located on the second top surface and spaced apart from the first signal conductor; an inner-layer ground conductor located within the dielectric substrate; the first connection portion has a first end portion located on the second side surface side, the upper surface ground conductor has a second end located on the second side surface side, the inner-layer ground conductor has a third end located on the second side surface side, The wiring board according to claim 1 , wherein, in a side view, a minimum distance between the first end and the second end in the second direction is greater than a minimum distance between the first end and the third end in the second direction.
8. The wiring board according to claim 5 , wherein the first connection portion has a protruding portion on the second upper surface that extends along the second side surface and protrudes in the second direction.
9. a first connection member having a first tip portion overlapping the first signal conductor in a plan view and electrically connected to the first connection portion; The wiring board according to claim 1 , wherein the first tip portion is located within the first opening portion in a plan view.
10. The wiring board according to claim 9 , wherein a maximum dimension of the first connection member in the second direction is smaller than a maximum dimension of the first opening in the second direction.
11. The wiring board according to claim 9 , wherein a maximum distance from the first side surface to an inner edge of the first opening in the first direction is greater than a maximum dimension from the first side surface to the first tip portion in the first direction.
12. a first connection member electrically connected to the first connection portion in a plan view; The wiring board according to claim 5 , wherein at least a portion of the first connection member is positioned so as to overlap with the first recess in a plan view.
13. the dielectric substrate further includes a second recess having an opening in the second lower surface, 13. The wiring board according to claim 1, wherein the second recess is positioned so as to overlap at least a portion of the first signal conductor in a plan view.
14. In a plan view, the second recess is positioned so as to overlap at least a portion of the first opening, The wiring board according to claim 13 , wherein in a plan view, a maximum dimension of the second recess in the first direction is equal to or smaller than a maximum distance of the first opening in the first direction.
15. the dielectric substrate further includes a second recess having an opening in the second lower surface, the second recess is positioned so as to overlap at least a portion of the first signal conductor in a plan view; The wiring board according to claim 5 , wherein in a plan view, a maximum dimension of the second recess in the first direction is larger than a maximum dimension of the first recess in the first direction.
16. a frame joined to the base and / or the dielectric substrate; 13. A package for mounting electronic components, comprising: the wiring board according to claim 1, fixed to the frame.
17. The electronic component mounting package according to claim 16 ; an electronic component located on the base or the dielectric substrate and electrically connected to the wiring board; a lid body positioned on the frame body and covering the inside of the electronic component mounting package.