Silicon carbide crystal substrate, epitaxial substrate, and method for manufacturing semiconductor device

Abstract

This silicon carbide crystal substrate has a stripe defect and a main surface. The stripe defect has a first end and a second end on the opposite side of the first end. The first end is exposed to the main surface. The stripe defect comprises a plurality of linear defects. When viewed along a straight line perpendicular to the main surface, the stripe defect is curved, and the straight-line distance between the first end and the second end is 10-200 μm.

Description

Silicon carbide crystal substrate, epitaxial substrate, and method for manufacturing semiconductor device

[0001] The present disclosure relates to a silicon carbide crystal substrate, an epitaxial substrate, and a method for manufacturing a semiconductor device. This application claims priority to Japanese Patent Application No. 2022-163339, filed on October 11, 2022. The entire contents of this Japanese patent application are incorporated herein by reference.

[0002] Japanese Patent Laid-Open Publication No. 2011-151317 (Patent Document 1) describes a method for detecting defects in a silicon carbide single crystal by alkaline etching.

[0003] Japanese Patent Application Laid-Open No. 2011-151317

[0004] A silicon carbide crystal substrate according to the present disclosure comprises a line defect and a main surface. The line defect has a first end and a second end opposite the first end. The first end is exposed on the main surface. The line defect is composed of a plurality of linear defects. When viewed along a line perpendicular to the main surface, the line defect is curved, and the linear distance between the first end and the second end is 10 μm or more and 200 μm or less.

[0005] FIG. 1 is a plan view schematic diagram showing the configuration of a silicon carbide crystal substrate according to this embodiment. FIG. 2 is a cross-sectional view schematic diagram taken along line II-II in FIG. 1. FIG. 3 is an enlarged plan view of region III in FIG. 1. FIG. 4 is a schematic diagram of a scanning transmission electron microscope image of a cross section taken along line IV-IV in FIG. 3. FIG. 5 is a plan view schematic diagram showing etch pits due to threading screw dislocations formed in the first main surface using a melt etching method. FIG. 6 is a cross-sectional view schematic diagram showing the configuration of a crucible. FIG. 7 is a cross-sectional view schematic diagram showing a step of growing a silicon carbide single crystal. FIG. 8 is a cross-sectional view schematic diagram showing a heat treatment step. FIG. 9 is a flowchart generally showing a method for manufacturing a semiconductor device according to this embodiment. FIG. 10 is a cross-sectional view schematic diagram showing a step of forming a buffer layer on a silicon carbide crystal substrate. FIG. 11 is a cross-sectional view schematic diagram showing a step of forming an electron transit layer and an electron supply layer. FIG. 12 is a cross-sectional view schematic diagram showing the configuration of a semiconductor device according to this embodiment.

[0006] [Problem to be Solved by the Present Disclosure] An object of the present disclosure is to provide a silicon carbide crystal substrate that allows the areal density of threading screw dislocations to be estimated. [Advantages of the Present Disclosure] According to the present disclosure, it is possible to provide a silicon carbide crystal substrate that allows the areal density of threading screw dislocations to be estimated. [Description of Embodiments of the Present Disclosure] First, embodiments of the present disclosure will be listed and described.

[0007] (1) A silicon carbide crystal substrate 100 according to the present disclosure comprises a line defect 10 and a main surface 1. The line defect 10 has a first end 21 and a second end 22 opposite the first end 21. The first end 21 is exposed on the main surface 1. The line defect 10 is composed of a plurality of linear defects. When viewed along a line perpendicular to the main surface 1, the line defect 10 is curved, and the linear distance between the first end 21 and the second end 22 is 10 μm or more and 200 μm or less.

[0008] (2) According to silicon carbide crystal substrate 100 in accordance with (1) above, each of the plurality of linear defects may extend within the basal plane.

[0009] (3) According to silicon carbide crystal substrate 100 according to (1) or (2) above, the length of each of the plurality of linear defects in a cross section perpendicular to main surface 1 may be not less than 1 μm and not more than 10 μm.

[0010] (4) In silicon carbide crystal substrate 100 according to any one of (1) to (3) above, each of the plurality of linear defects may contain carbon.

[0011] (5) Silicon carbide crystal substrate 100 according to any one of (1) to (4) above may further include threading screw dislocations 4. In a cross section perpendicular to main surface 1, threading screw dislocations 4 may extend so as to intersect with at least one of the plurality of linear defects.

[0012] (6) According to the silicon carbide crystal substrate 100 according to (5) above, the areal density of threading screw dislocations 4 on the main surface 1 is 1 / cm 2 More than 3000 / cm 2 It may be less than.

[0013] (7) According to the silicon carbide crystal substrate 100 in accordance with (6) above, the surface density of the line defects 10 on the main surface 1 is 1 / cm 2 More than 3000 / cm 2 It may be less than.

[0014] (8) In silicon carbide crystal substrate 100 according to any one of (1) to (7) above, line defects 10 may have regions 14 containing carbon. In a cross section perpendicular to main surface 1, regions 14 containing carbon may extend so as to intersect with at least any of the plurality of line defects.

[0015] (9) According to silicon carbide crystal substrate 100 according to any one of (1) to (8) above, the surface density of line defects 10 on main surface 1 is 10 / cm 2 More than 1000 / cm 2 It may be less than.

[0016] (10) According to the silicon carbide crystal substrate 100 according to any one of (1) to (9) above, the electrical resistivity of the silicon carbide crystal substrate 100 is 1×10 5 It may be Ωcm or more.

[0017] (11) An epitaxial substrate 200 according to the present disclosure comprises the silicon carbide crystal substrate 100 according to any one of (1) to (10) above, and a nitride epitaxial layer 30 provided on the silicon carbide crystal substrate 100.

[0018] (12) A method for manufacturing a semiconductor device according to the present disclosure includes the steps of preparing the epitaxial substrate 200 described in (11) above, and forming an electrode 41 on the epitaxial substrate 200. [Details of the Embodiments of the Present Disclosure] Details of the embodiments of the present disclosure will be described below with reference to the drawings. Note that identical or corresponding parts in the following drawings are designated by the same reference numerals, and descriptions thereof will not be repeated. In the crystallographic descriptions in this specification, individual orientations are indicated by [ ], collective orientations by < >, individual planes by ( ), and collective planes by {}. Furthermore, for negative indices, a "-" (bar) is placed before the number in crystallography, but in this specification, a negative sign is placed before the number.

[0019] FIG. 1 is a schematic plan view showing the configuration of silicon carbide crystal substrate 100 according to this embodiment. FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. 1. As shown in FIGS. 1 and 2, silicon carbide crystal substrate 100 according to this embodiment has a first main surface 1, a second main surface 2, and an outer circumferential edge 8. Second main surface 2 is located on the opposite side to first main surface 1. Outer circumferential edge 8 is continuous with each of first main surface 1 and second main surface 2. Outer circumferential edge 8 is, for example, a cylindrical surface. Each of first main surface 1 and second main surface 2 is, for example, planar.

[0020] The outer peripheral edge 8 has, for example, an orientation flat 6 and an arc-shaped portion 7. The orientation flat 6 extends along a first direction 101. As shown in FIG. 1 , the orientation flat 6 is linear when viewed along a straight line perpendicular to the first main surface 1. The arc-shaped portion 7 is continuous with the orientation flat 6. When viewed along a straight line perpendicular to the first main surface 1, the arc-shaped portion 7 is arc-shaped.

[0021] 1 , when viewed along a line perpendicular to the first main surface 1, the first main surface 1 extends along a first direction 101 and a second direction 102. When viewed along a line perpendicular to the first main surface 1, the first direction 101 is perpendicular to the second direction 102.

[0022] The first direction 101 is, for example, the <11-20> direction. The first direction 101 may be, for example, the [11-20] direction. The first direction 101 may be a direction obtained by projecting the <11-20> direction onto the first main surface 1. From another perspective, the first direction 101 may be, for example, a direction including a <11-20> direction component.

[0023] The second direction 102 is, for example, the <1-100> direction. The second direction 102 may be, for example, the [1-100] direction. The second direction 102 may be, for example, a direction obtained by projecting the <1-100> direction onto the first main surface 1. From another perspective, the second direction 102 may be, for example, a direction including a <1-100> direction component.

[0024] First main surface 1 is a plane inclined with respect to the {0001} plane. The inclination angle (off angle) with respect to the {0001} plane is, for example, greater than 0° and equal to or less than 8°. The off angle is not particularly limited, but may be, for example, equal to or greater than 1°, or equal to or greater than 2°. The off angle is not particularly limited, but may be, for example, equal to or less than 7°, or equal to or less than 6°.

[0025] The first main surface 1 may be a surface inclined by an off angle with respect to the (000-1) plane, or may be a surface inclined by an off angle with respect to the (0001) plane. The inclination direction (off direction) of the first main surface 1 is, for example, the <11-20> direction. From another perspective, the first direction 101 may be the off direction of the first main surface 1.

[0026] As shown in FIG. 1 , the maximum diameter A1 of the first main surface 1 is not particularly limited, but is, for example, 100 mm (4 inches). The maximum diameter A1 may be 125 mm (5 inches) or more, or 150 mm (6 inches) or more. The maximum diameter A1 is not particularly limited, and may be, for example, 200 mm (8 inches) or less. When viewed along a line perpendicular to the first main surface 1, the maximum diameter A1 is the maximum linear distance between two different points on the outer circumferential edge 8.

[0027] In this specification, 4 inches refers to 100 mm or 101.6 mm (4 inches x 25.4 mm / inch). 6 inches refers to 150 mm or 152.4 mm (6 inches x 25.4 mm / inch). 8 inches refers to 200 mm or 203.2 mm (8 inches x 25.4 mm / inch).

[0028] 2, silicon carbide crystal substrate 100 according to this embodiment may include threading screw dislocations 4. On first main surface 1, the areal density of threading screw dislocations 4 may be, for example, 1 / cm 2 More than 3000 / cm 2 The areal density of threading screw dislocations 4 may be less than 10 / cm 2 It may be 100 / cm or more. 2 The areal density of threading screw dislocations 4 may be 2500 / cm 2It may be 2000 / cm or less. 2 It may be the following:

[0029] 2 , third direction 103 is a direction from second main surface 2 toward first main surface 1. Third direction 103 is perpendicular to first direction 101. Third direction 103 is, for example, the <0001> direction. In third direction 103, silicon carbide crystal substrate 100 has a thickness of, for example, 200 μm or more and 600 μm or less.

[0030] 3 is an enlarged plan view of region III in FIG. 1 . As shown in FIG. 3 , silicon carbide crystal substrate 100 according to this embodiment has line defect 10. Line defect 10 has first end 21 and second end 22. Second end 22 is located on the opposite side of first end 21. First end 21 is exposed at first main surface 1. Note that, in reality, first end 21 is exposed at first main surface 1; however, because first end 21 is difficult to see when it overlaps first main surface 1, first end 21 is shown slightly shifted downward from first main surface 1 in FIG. 3 . Second end 22 is located inside silicon carbide crystal substrate 100. In other words, second end 22 is not exposed at first main surface 1.

[0031] As shown in Fig. 3, the line defect 10 is curved when viewed along a line perpendicular to the first main surface 1. The line defect 10 may be bent when viewed along a line perpendicular to the first main surface 1. From another perspective, the line defect 10 may intersect with an imaginary line 24 connecting the first end 21 and the second end 22 when viewed along a line perpendicular to the first main surface 1. The line defect 10 only needs to have a curved portion, and does not have to be entirely curved. When viewed along a line perpendicular to the first main surface 1, the line defect 10 may have a curved portion and a straight portion connected to the curved portion.

[0032] When viewed along a line perpendicular to the first main surface 1, the linear distance A2 between the first end 21 and the second end 22 is 10 μm or more and 200 μm or less. The linear distance A2 may be 20 μm or more, or 30 μm or more. The linear distance A2 may be 180 μm or less, or 160 μm or less.

[0033] Fig. 4 is a schematic diagram of a scanning transmission electron microscope image of a cross section taken along line IV-IV in Fig. 3. In the cross section shown in Fig. 4, the interior of the cross section taken along line IV-IV in Fig. 3 is observed through the microscope. As shown in Fig. 4, the line defect 10 is composed of a plurality of linear defects. The line defect 10 may be composed of, for example, a plurality of first linear defects 11, a plurality of second linear defects 12, and a plurality of third linear defects 13.

[0034] 4 , each of the plurality of first linear defects 11, each of the plurality of second linear defects 12, and each of the plurality of third linear defects 13 is linear when viewed along a straight line parallel to first main surface 1. On the other hand, each of the plurality of first linear defects 11, each of the plurality of second linear defects 12, and each of the plurality of third linear defects 13 may be curved when viewed along a straight line perpendicular to first main surface 1.

[0035] 4 , in a cross section perpendicular to first main surface 1, the length of each of the plurality of linear defects (third length A3) is, for example, 1 μm or more and 10 μm or less. The third length A3 may be 2 μm or more, or 3 μm or more. The third length A3 may be 9 μm or less, or 8 μm or less.

[0036] Each of the plurality of first linear defects 11 may extend within the basal plane. Similarly, each of the plurality of second linear defects 12 may extend within the basal plane. Similarly, each of the plurality of third linear defects 13 may extend within the basal plane.

[0037] 4 , in a cross section perpendicular to first main surface 1, the positions of two adjacent linear defects among a plurality of linear defects may be shifted in first direction 101. From another perspective, when viewed along a line perpendicular to first main surface 1, the two adjacent linear defects may be positioned such that a portion of each adjacent linear defect overlaps with another portion of each adjacent linear defect, and the remaining portion of each adjacent linear defect does not overlap.

[0038] 4, two adjacent linear defects may be spaced apart from each other in third direction 103. The distance between two adjacent linear defects in third direction 103 is not particularly limited, and may be, for example, 0.1 μm or more and 1 μm or less.

[0039] Each of the plurality of first linear defects 11 may contain carbon. Similarly, each of the plurality of second linear defects 12 may contain carbon. Similarly, each of the plurality of third linear defects 13 may contain carbon.

[0040] 4 , in a cross section perpendicular to the first main surface 1, the threading screw dislocation 4 may extend so as to intersect with at least one of the plurality of linear defects. Specifically, the threading screw dislocation 4 may extend so as to intersect with at least one of the plurality of first linear defects 11. The threading screw dislocation 4 may extend so as to intersect with at least one of the plurality of second linear defects 12. The threading screw dislocation 4 may extend so as to intersect with at least one of the plurality of third linear defects 13.

[0041] The line defect 10 may have a region 14 containing carbon. The region 14 containing carbon may be, for example, an inner wall surface forming a cavity. As shown in FIG. 4 , in a cross section perpendicular to the first main surface 1, the region 14 containing carbon may extend so as to intersect with at least one of the plurality of line defects. Specifically, the region 14 containing carbon may extend so as to intersect with at least one of the plurality of second line defects 12. In a cross section perpendicular to the first main surface 1, the region 14 containing carbon may not intersect with each of the plurality of first line defects 11. Similarly, in a cross section perpendicular to the first main surface 1, the region 14 containing carbon may not intersect with each of the plurality of third line defects 13.

[0042] In the above description, the line defect 10 is described as being composed of, for example, a plurality of first linear defects 11, a plurality of second linear defects 12, and a plurality of third linear defects 13. However, the line defect 10 is not limited to the above configuration. The line defect 10 may be composed of, for example, one first linear defect 11, one second linear defect 12, and one third linear defect 13. The line defect 10 may be composed of only a plurality of first linear defects 11. In other words, the line defect 10 may not include a plurality of second linear defects 12 or a plurality of third linear defects 13.

[0043] (Area Density of Line Defects) On the first main surface 1, the area density of the line defects 10 is, for example, 1 / cm 2 More than 3000 / cm 2 The surface density of the line defects 10 is, for example, 10 / cm 2 It may be 100 / cm or more. 2 The surface density of the line defects 10 may be, for example, 2500 / cm 2 It may be less than 2000 / cm 2 It may be less than.

[0044] On the first main surface 1, the surface density of the line defects 10 is 10 / cm 2 More than 1000 / cm 2 The surface density of the line defects 10 may be less than 20 / cm 2 More than 900 / cm 2 The surface density of the line defects 10 may be less than 50 / cm 2 More than 800 / cm 2 It may be less than.

[0045] The surface density of the line defects 10 can be measured using, for example, a digital microscope (model number: VHX-6000) manufactured by Keyence Corporation. The measurement locations are the center 9 of the first main surface 1, a first position 50 mm away from the center 9 in the first direction, a second position 50 mm away from the center 9 in the direction opposite to the first direction, a third position 50 mm away from the center 9 in the second direction, and a fourth position 50 mm away from the center 9 in the direction opposite to the second direction.

[0046] As shown in Figure 3, when observing the line defect 10 using a digital microscope, the line defect 10 appears darker (in other words, black) than the surrounding area. The measurement area of ​​the line defect 10 is a square area centered on each of the above measurement positions. The length of one side of the square area is 100 µm. The average value of the surface density of the line defects 10 in the above five measurement areas is defined as the surface density of the line defects 10 on the first main surface 1.

[0047] (Electrical Resistivity) The electrical resistivity of silicon carbide crystal substrate 100 is, for example, 1×10 5 The electrical resistivity of silicon carbide crystal substrate 100 is, for example, 1×10 8 It may be Ωcm or more, or 1×10 10 It may be Ωcm or more, or 1×10 12 The electrical resistivity of silicon carbide crystal substrate 100 may be, for example, 1×10 14 It may be Ωcm or less, or 1×10 13 It may be Ωcm or less.

[0048] The electrical resistivity of silicon carbide crystal substrate 100 is measured, for example, using a COREMA-WT electrical resistivity measuring device manufactured by SemiMap. The voltage applied to the object to be measured is, for example, 5.0 V. The electrical resistivity of silicon carbide crystal substrate 100 is measured, for example, at room temperature (25°C). The measurement position is center 9 of first main surface 1.

[0049] (Impurity Concentration) Silicon carbide crystal substrate 100 according to this embodiment may be doped with vanadium. The vanadium concentration in first main surface 1 is, for example, 1×10 17 cm -3 The concentration of vanadium is not particularly limited, but for example, 1.2 × 10 17 cm -3 It may be 1.5×10 or more. 17 cm -3 It may be 2×10 or more. 17 cm -3 In the first main surface 1, the concentration of vanadium may be, for example, 3×10 17 cm -3The concentration of vanadium is not particularly limited, but is, for example, 2.8×10 17 cm -3 or less, or 2.6×10 17 cm -3 It may be the following:

[0050] Silicon carbide crystal substrate 100 according to this embodiment may contain nitrogen (N). In first main surface 1, the nitrogen concentration is, for example, 4×10 16 cm -3 The nitrogen concentration in first main surface 1 is not particularly limited, but may be, for example, 4.2×10 16 cm -3 or more, or 4.4 × 10 16 cm -3 The nitrogen concentration in first main surface 1 is not particularly limited, but may be, for example, 1×10 17 cm -3 It may be 5×10 or less. 16 cm -3 It may be the following:

[0051] Silicon carbide crystal substrate 100 according to this embodiment may contain boron (B). The boron concentration at center 9 of first main surface 1 is, for example, 1×10 15 cm -3 The boron concentration at the center 9 of the first main surface 1 is not particularly limited, but may be, for example, 1.3×10 15 cm -3 or more, or 1.6×10 15 cm -3 The boron concentration at the center 9 of the first main surface 1 is not particularly limited, but may be, for example, 5×10 15 cm -3 It may be 3×10 or less. 15 cm -3 It may be the following:

[0052] Next, a method for measuring the impurity concentration will be described. The concentrations of vanadium, nitrogen, and boron are measured by secondary ion mass spectrometry (SIMS). For SIMS, for example, an IMS7f secondary ion mass spectrometer manufactured by Cameca Corporation can be used. The measurement conditions for SIMS are, for example, that the primary ions are O ２ ＋ The measurement conditions can be such that the primary ion energy is 8 keV.

[0053] FIG. 5 is a schematic plan view showing a state in which etch pits due to threading screw dislocations 4 are formed on the first main surface 1 using melt etching. The threading screw dislocations 4 can be identified by melt etching. In the melt etching, for example, a potassium hydroxide (KOH) melt is used. The temperature of the KOH melt is approximately 500° C. to 550° C. The etching time is approximately 5 minutes to 10 minutes.

[0054] By immersing silicon carbide crystal substrate 100 having threading screw dislocations 4 in a KOH melt, etch pits caused by threading screw dislocations 4 are formed in first main surface 1 of silicon carbide crystal substrate 100. As shown in Fig. 5 , threading screw dislocations 4 form etch pits 23 having a substantially hexagonal shape. The maximum length of etch pits 23 caused by threading screw dislocations 4 is typically about 30 µm or more and 50 µm or less.

[0055] Next, the etch pits 23 formed on the first main surface 1 are observed using, for example, a Nomarski differential interference microscope. The number of threading screw dislocations 4 is identified based on the shape and size of the etch pits 23. The areal density of threading screw dislocations 4 is the value obtained by dividing the number of threading screw dislocations 4 by the measured area.

[0056] On the first main surface 1, the areal density of the threading screw dislocations 4 is, for example, 1 / cm 2 More than 3000 / cm 2 The areal density of the threading screw dislocations 4 is, for example, 10 / cm 2 It may be 100 / cm or more. 2The areal density of the threading screw dislocations 4 may be, for example, 2500 / cm 2 It may be less than 2000 / cm 2 It may be less than.

[0057] On the first principal surface 1, the areal density of threading screw dislocations 4 is 10 / cm 2 More than 1000 / cm 2 The areal density of threading screw dislocations 4 may be less than 20 / cm 2 More than 900 / cm 2 The areal density of threading screw dislocations 4 may be less than 50 / cm 2 More than 800 / cm 2 It may be less than.

[0058] As shown in Fig. 5, an etch pit 23 caused by a threading screw dislocation 4 is formed on the first main surface 1. When viewed along a line perpendicular to the first main surface 1, a first end 21 of the line defect 10 is located in a region surrounded by the outline of the etch pit 23. From another perspective, the position of the first end 21 of the line defect 10 roughly coincides with the position where the threading screw dislocation 4 is exposed on the first main surface 1. The first end 21 may be located at the center of the etch pit 23, or may be located slightly away from the center of the etch pit 23.

[0059] <Method of Manufacturing Silicon Carbide Crystal Substrate> Next, a method of manufacturing silicon carbide crystal substrate 100 according to this embodiment will be described. FIG. 6 is a cross-sectional schematic diagram showing the configuration of a crucible. As shown in FIG. 6, crucible 130 has a source material storage section 132 and a first lid section 131. Silicon carbide source material 81 is placed inside source material storage section 132. Seed crystal 80 is attached to first lid section 131. Seed crystal 80 is made of, for example, hexagonal silicon carbide. The polytype of the hexagonal silicon carbide is, for example, 4H. The diameter of seed crystal 80 is, for example, 100 mm or more.

[0060] 7 is a cross-sectional schematic diagram showing the steps of growing a silicon carbide single crystal. First, crucible 130 is heated. Specifically, crucible 130 is heated so that the temperature of silicon carbide raw material 81 is higher than the temperature of seed crystal 80. The pressure inside crucible 130 is set to, for example, 0.1 kPa or more and 3 kPa or less. The temperature of crucible 130 is set to, for example, 2100°C or more and 2300°C or less. As a result, silicon carbide raw material 81 sublimes, and silicon carbide gas is generated. The silicon carbide gas recrystallizes on the surface of seed crystal 80. As a result, silicon carbide single crystal 50 grows on the surface of seed crystal 80. After the growth of silicon carbide single crystal 50 is completed, silicon carbide single crystal 50 is cooled to room temperature.

[0061] Next, a heat treatment step is carried out. FIG. 8 is a cross-sectional schematic diagram showing the heat treatment step. First, a heat treatment container 140 is prepared. The heat treatment container 140 is made of, for example, graphite. The heat treatment container 140 has a crystal accommodation portion 142 and a second lid portion 141. The crystal accommodation portion 142 has a base portion 143 and an inner bottom surface 144. In the crystal accommodation portion 142, a recess 145 is provided around the periphery of the base portion 143. Graphite powder 150 is placed in the recess 145. The silicon carbide single crystal 50 is placed on the base portion 143. The second lid portion 141 is placed on the crystal accommodation portion 142 so as to cover the opening of the crystal accommodation portion 142.

[0062] Next, heat treatment is performed on silicon carbide single crystal 50. In the heat treatment step, silicon carbide single crystal 50 is heated. In the heat treatment step, graphite powder 150 arranged in recess 145 sublimes. Distortion is large near threading screw dislocation 4. When the heat treatment temperature reaches around 2400°C, the silicon carbide crystal lattice becomes more mobile. Distortion is large near threading screw dislocation 4. It is thought that the heat treatment causes sublimated graphite to enter the vicinity of threading screw dislocation 4, forming line defect 10.

[0063] If the heat treatment temperature is too low, the line defect 10 will not be formed. If the heat treatment temperature is too high, the surface of the silicon carbide single crystal 50 will be carbonized. If the heat treatment temperature is too high, the silicon carbide single crystal 50 may sublimate. Therefore, the heat treatment temperature is set to 2400°C. The heat treatment time is set to 50 hours.

[0064] Next, for example, using a saw wire, silicon carbide single crystal 50 is sliced ​​along a plane perpendicular to the central axis of silicon carbide single crystal 50. This results in a plurality of silicon carbide crystal substrates 100 according to this embodiment (see FIG. 1).

[0065] <Method of Manufacturing Semiconductor Device> Next, a method of manufacturing the semiconductor device 400 according to this embodiment will be described. Fig. 9 is a flowchart that outlines the method of manufacturing the semiconductor device 400 according to this embodiment. As shown in Fig. 9, the method of manufacturing the semiconductor device 400 according to this embodiment mainly includes a step (S1) of preparing the epitaxial substrate 200 and a step (S2) of forming an electrode on the epitaxial substrate 200.

[0066] First, there is performed the step (S1) of preparing epitaxial substrate 200. In the step (S1) of preparing epitaxial substrate 200, first, silicon carbide crystal substrate 100 according to the present embodiment is prepared (see FIG. 1).

[0067] Next, buffer layer 31 is formed on silicon carbide crystal substrate 100. Fig. 10 is a cross-sectional schematic view showing the step of forming buffer layer 31 on silicon carbide crystal substrate 100. Buffer layer 31 is formed by epitaxial growth on first main surface 1 of silicon carbide crystal substrate 100. Buffer layer 31 is formed by MOCVD (Metal Organic Chemical Vapor Deposition), for example.

[0068] The buffer layer 31 is made of, for example, aluminum gallium nitride (AlGaN). The buffer layer 31 has a thickness of, for example, 150 nm. As a source gas for aluminum (Al), for example, TMA (trimethylaluminum) is used. As a source gas for gallium (Ga), for example, TMG (trimethylgallium) is used. As a source gas for nitrogen (N), for example, ammonia is used.

[0069] Next, the electron transit layer 32 and the electron supply layer 33 are formed. Fig. 11 is a cross-sectional view showing the process of forming the electron transit layer 32 and the electron supply layer 33. First, the electron transit layer 32 is formed on the buffer layer 31 by MOCVD. The electron transit layer 32 is made of, for example, gallium nitride (GaN). The thickness of the electron transit layer 32 is, for example, 1 µm.

[0070] Next, the electron supply layer 33 is formed on the electron transit layer 32. The electron supply layer 33 is formed by, for example, MOCVD. The electron supply layer 33 is made of, for example, AlGaN. The thickness of the electron supply layer 33 is, for example, 20 μm. Two-dimensional electron gas is generated in a portion of the electron transit layer 32 near the interface between the electron transit layer 32 and the electron supply layer 33.

[0071] As described above, the epitaxial substrate 200 is prepared. As shown in Fig. 11 , the epitaxial substrate 200 has a silicon carbide crystal substrate 100 and a nitride epitaxial layer 30. The nitride epitaxial layer 30 has a buffer layer 31, an electron transit layer 32, and an electron supply layer 33. The buffer layer 31 is provided on the silicon carbide crystal substrate 100. The electron transit layer 32 is provided on the buffer layer 31. The electron supply layer 33 is provided on the electron transit layer 32.

[0072] Next, the step of forming electrodes is performed. First, the source electrode 41 and the drain electrode 42 are formed. Specifically, a first resist pattern (not shown) is formed on the electron supply layer 33. In the first resist pattern, openings are formed in the regions where the source electrode 41 and the drain electrode 42 are to be formed.

[0073] Next, a first metal stack film is formed on the first resist pattern using, for example, a vacuum deposition method. The first metal stack film includes, for example, a titanium (Ti) film and an aluminum (Al) film. Next, the first metal stack film formed on the first resist pattern is removed by lift-off. As a result, the source electrode 41 and the drain electrode 42 made of the first metal stack film are formed on the electron supply layer 33.

[0074] Next, alloying annealing may be performed. Specifically, the source electrode 41 and the drain electrode 42 are annealed. The annealing temperature is, for example, 600° C. This may allow each of the source electrode 41 and the drain electrode 42 to make ohmic contact with the electron supply layer 33.

[0075] Next, the gate electrode 43 is formed. Specifically, a second resist pattern (not shown) is formed on the electron supply layer 33. In the second resist pattern, an opening is formed in the region where the gate electrode 43 is to be formed.

[0076] Next, a second metal stack film is formed on the second resist pattern using, for example, a vacuum deposition method. The second metal stack film includes, for example, a nickel (Ni) film and a gold (Au) film. Next, the second metal stack film formed on the second resist pattern is removed by lift-off. As a result, a gate electrode 43 made of the second metal stack film is formed on the electron supply layer 33.

[0077] 12 is a cross-sectional view showing a configuration of a semiconductor device 400 according to this embodiment. The semiconductor device 400 is, for example, a field-effect transistor, and more specifically, a high electron mobility transistor (HEMT). The semiconductor device 400 mainly includes an epitaxial substrate 200, a gate electrode 43, a source electrode 41, and a drain electrode 42.

[0078] 12 , each of the gate electrode 43, the source electrode 41, and the drain electrode 42 is provided on the epitaxial substrate 200. Specifically, each of the gate electrode 43, the source electrode 41, and the drain electrode 42 is in contact with the electron supply layer 33. The gate electrode 43 may be located between the source electrode 41 and the drain electrode 42.

[0079] Next, the effects of the methods for manufacturing silicon carbide crystal substrate 100, epitaxial substrate 200, and semiconductor device 400 according to this embodiment will be described.

[0080] The presence of threading screw dislocations 4 in semiconductor device 400 reduces the reliability of semiconductor device 400. In order to improve the reliability of semiconductor device 400, it is desirable to evaluate the areal density of threading screw dislocations 4 in the state of silicon carbide crystal substrate 100.

[0081] One method for evaluating the areal density of threading screw dislocations 4 in a silicon carbide crystal substrate 100 is to etch the surface of the silicon carbide crystal substrate 100 using an alkaline solution, chlorine gas, or the like. According to this method, etch pits 23 caused by threading screw dislocations 4 are formed on the surface of the silicon carbide crystal substrate 100. Therefore, when an epitaxial layer 30 is formed on the silicon carbide crystal substrate 100, the flatness of the surface of the epitaxial layer 30 deteriorates.

[0082] The inventors conducted extensive research into a method for estimating the areal density of threading screw dislocations 4 without etching the silicon carbide crystal substrate 100. As a result, the inventors obtained the following findings and discovered the silicon carbide crystal substrate 100 according to the present disclosure. Specifically, line defects 10 can be formed by subjecting a silicon carbide single crystal having threading screw dislocations 4 to a heat treatment under specific conditions. The line defects 10 are formed near the threading screw dislocations 4. The areal density of the line defects 10 has a strong correlation with the areal density of the threading screw dislocations 4. Therefore, the areal density of the threading screw dislocations 4 can be estimated by measuring the areal density of the line defects 10. In other words, the areal density of the threading screw dislocations 4 in the silicon carbide crystal substrate 100 can be estimated without etching the silicon carbide crystal substrate 100.

[0083] The silicon carbide crystal substrate 100 according to this embodiment has a line defect 10 and a main surface 1. The line defect 10 has a first end 21 and a second end 22 opposite to the first end 21. The first end 21 is exposed on the main surface 1. The line defect 10 is composed of a plurality of linear defects. When viewed along a line perpendicular to the main surface 1, the line defect 10 is curved, and the linear distance between the first end 21 and the second end 22 is 10 μm or more and 200 μm or less. This makes it possible to estimate the areal density of threading screw dislocations 4 without etching the surface of the silicon carbide crystal substrate 100.

[0084] The epitaxial substrate 200 according to this embodiment includes the silicon carbide crystal substrate 100 described above and a nitride epitaxial layer 30 provided on the silicon carbide crystal substrate 100. This makes it possible to improve the flatness of the surface of the nitride epitaxial layer 30 compared to when the surface of the silicon carbide crystal substrate 100 is etched.

[0085] The method for manufacturing the semiconductor device 400 according to this embodiment includes the steps of preparing the epitaxial substrate 200 described above and forming electrodes on the epitaxial substrate 200. This can improve the reliability of the semiconductor device 400.

[0086] (Sample Preparation) First, silicon carbide single crystals having a polytype of 4H were produced using the production conditions for Samples 1 to 12. Under the production conditions for Samples 1 to 12, a seed crystal 80 and a silicon carbide raw material 81 were placed in a crucible 130. The diameter of the surface of the seed crystal 80 was 150 mm. Next, a silicon carbide single crystal 50 was grown on the surface of the seed crystal 80 using a sublimation method (see FIG. 7 ). After being removed from the crucible 130, the silicon carbide single crystal 50 was placed inside a heat treatment vessel 140 (see FIG. 8 ). In the heat treatment vessel 140, the silicon carbide single crystal 50 was subjected to heat treatment.

[0087] Under the manufacturing conditions for Samples 4 to 6, silicon carbide single crystals 50 (Group A) with a low areal density of threading screw dislocations 4 were used. The areal density of threading screw dislocations 4 in the silicon carbide single crystals 50 of Group A was 10 / cm 2 More than 1000 / cm 2 It was set at less than.

[0088] Under the manufacturing conditions for Samples 7 to 9, silicon carbide single crystals 50 (Group B) with a medium areal density of threading screw dislocations 4 were used. The areal density of threading screw dislocations 4 in the silicon carbide single crystals 50 of Group B was 1000 / cm 2 More than 2000 / cm 2 It was set at less than.

[0089] Under the manufacturing conditions for Samples 10 to 12, silicon carbide single crystals 50 (Group C) with a high areal density of threading screw dislocations 4 were used. The areal density of threading screw dislocations 4 in the silicon carbide single crystals 50 of Group C was 2000 / cm 2 More than 3000 / cm 2 It was set at less than.

[0090] Under the production conditions for Samples 1 to 3, graphite powder 150 was not arranged around silicon carbide single crystal 50 during heat treatment. On the other hand, under the production conditions for Samples 4 to 12, graphite powder 150 was arranged around silicon carbide single crystal 50 during heat treatment.

[0091] The heat treatment temperature was set to 2200° C. under the manufacturing conditions for Samples 1, 4, 7, and 12. The heat treatment temperature was set to 2400° C. under the manufacturing conditions for Samples 2, 5, 8, and 11. The heat treatment temperature was set to 2600° C. under the manufacturing conditions for Samples 3, 6, 9, and 12.

[0092] (Measurement Method) After the heat treatment, the silicon carbide single crystal 50 was removed from the heat treatment vessel 140. It was confirmed whether the surface of the silicon carbide single crystal 50 was carbonized. The silicon carbide single crystal 50 was sliced ​​using a saw wire. In this way, the silicon carbide crystal substrates 100 according to Samples 1 to 12 were obtained. The areal density of line defects 10 and the areal density of threading screw dislocations 4 (TSDs) were measured on the first main surfaces 1 of the silicon carbide crystal substrates 100 according to Samples 1 to 12.

[0093] (Measurement results)

[0094]

[0095] Table 1 shows the areal density of line defects 10 on the first main surface 1 of silicon carbide crystal substrate 100 for samples 1 to 12, the areal density of threading screw dislocations 4 on the first main surface 1, and the presence or absence of surface carbonization of silicon carbide single crystal 50. The areal density in Table 1 is expressed as follows. The areal density of Group A is 10 / cm 2 More than 1000 / cm 2 The surface density of Group B is less than 1000 / cm 2 More than 2000 / cm 2 The areal density of Group C is less than 2000 / cm 2 More than 3000 / cm 2 In Table 1, "-" means that the evaluation has not been carried out.

[0096] As shown in Table 1, when the heat treatment temperature was 2600°C, the surface of silicon carbide single crystal 50 was carbonized. When graphite powder 150 was not placed in heat treatment vessel 140, line defects 10 were not formed in silicon carbide crystal substrate 100. Even when graphite powder 150 was placed in heat treatment vessel 140, line defects 10 were not formed in silicon carbide crystal substrate 100 when the heat treatment temperature was 2200°C. When graphite powder 150 was placed in heat treatment vessel 140 and the heat treatment temperatures were 2400°C and 2600°C, line defects 10 were formed in silicon carbide crystal substrate 100.

[0097] The areal density of line defects 10 on first main surface 1 of silicon carbide crystal substrate 100 for each of Sample 5, Sample 8, and Sample 11 was approximately the same as the areal density of threading screw dislocations 4 on first main surface 1 of silicon carbide crystal substrate 100 for each of Sample 5, Sample 8, and Sample 11. From the above results, it was confirmed that the areal density of threading screw dislocations 4 can be estimated with high accuracy based on the areal density of line defects 10.

[0098] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims, not the above description, and is intended to include meanings equivalent to the claims and all modifications within the scope thereof.

[0099] 1 First main surface (main surface), 2 Second main surface, 4 Threading screw dislocation, 6 Orientation flat, 7 Arc-shaped portion, 8 Outer periphery, 9 Center, 10 Linear defect, 11 First linear defect, 12 Second linear defect, 13 Third linear defect, 14 Region, 21 First end, 22 Second end, 23 Etch pit, 24 Virtual straight line, 30 Epitaxial layer (nitride epitaxial layer), 31 Buffer layer, 32 Electron transit layer, 33 Electron supply layer, 41 Source electrode (electrode), 42 Drain electrode, 43 Gate electrode, 50 Silicon carbide single crystal, 80 Seed crystal, 81 Silicon carbide raw material, 100 Silicon carbide crystal substrate, 101 First direction, 102 Second direction, 103 Third direction, 130 Crucible, 131 First lid, 132 Raw material storage section, 140 heat treatment vessel, 141 second lid section, 142 crystal storage section, 143 base section, 144 inner bottom surface, 145 recess, 150 graphite powder, 200 epitaxial substrate, 400 semiconductor device, A1 maximum diameter, A2 linear distance, A3 third length.

Claims

1. a line defect having a first end and a second end opposite the first end; a main surface from which the first end is exposed; The line defect is composed of a plurality of line defects, a linear defect formed on the first end surface of the silicon carbide crystal substrate, the linear defect being curved when viewed along a straight line perpendicular to the main surface, and a linear distance between the first end surface and the second end surface is not less than 10 μm and not more than 200 μm.

2. The silicon carbide crystal substrate of claim 1 , wherein each of the plurality of linear defects extends in the basal plane.

3. 3 . The silicon carbide crystal substrate according to claim 1 , wherein a length of each of said plurality of line defects in a cross section perpendicular to said main surface is not less than 1 μm and not more than 10 μm.

4. 3. The silicon carbide crystal substrate according to claim 1, wherein each of said plurality of line defects contains carbon.

5. Further comprising threading screw dislocations; 3 . The silicon carbide crystal substrate according to claim 1 , wherein, in a cross section perpendicular to said main surface, said threading screw dislocations extend so as to intersect with at least any one of said plurality of linear defects.

6. The areal density of the threading screw dislocations on the main surface is 1 / cm 2 More than 3000 / cm 2 The silicon carbide crystal substrate according to claim 5 , wherein the thickness of the silicon carbide crystal substrate is less than 100 nm.

7. The surface density of the stripe defects on the main surface is 1 / cm 2 More than 3000 / cm 2 The silicon carbide crystal substrate of claim 6 , wherein the thickness of the silicon carbide crystal substrate is less than 100 nm.

8. The line defect has a region containing carbon, 3 . The silicon carbide crystal substrate according to claim 1 , wherein, in a cross section perpendicular to said main surface, said region containing carbon extends so as to intersect with at least any of said plurality of linear defects.

9. On the main surface, the surface density of the line defects is 10 / cm 2 More than 1000 / cm 2 The silicon carbide crystal substrate according to claim 1 or 2, wherein the thickness of the silicon carbide crystal substrate is less than 100 nm.

10. The electrical resistivity of the silicon carbide crystal substrate is 1×10 5 The silicon carbide crystal substrate according to claim 1 or 2, having a resistivity of Ωcm or more.

11. A silicon carbide crystal substrate according to claim 1 or 2; a nitride epitaxial layer provided on the silicon carbide crystal substrate.

12. Providing an epitaxial substrate according to claim 11; and forming an electrode on the epitaxial substrate.