Semiconductor light-emitting element and semiconductor light-emitting device

Abstract

A semiconductor light-emitting element (1) emits light from a front end surface (1F) and comprises a semiconductor laminate (1S) having a waveguide, a first P-side electrode (71), and a pad electrode (73). The semiconductor light-emitting element (1) has: a front bottom part (L1) that is the upper surface of the semiconductor light-emitting element (1), that extends rearward from the front end surface (1F) above the waveguide of the semiconductor light-emitting element (1), and that does not have the pad electrode (73) disposed thereon; a rear bottom part (L2) disposed rearward of the front bottom part (L1); a front projection part (H1) that is disposed between the front bottom part (L1) and the rear bottom part (L2) and that projects upward relative to the front bottom part (L1) and the rear bottom part (L2); and a rear projection part (H2) that is disposed rearward of the rear bottom part (L2) and that projects upward relative to the front bottom part (L1) and the rear bottom part (L2). The rear projection part (H2) includes at least a portion of the pad electrode (73).

Description

Semiconductor light emitting element, semiconductor light emitting device, method for manufacturing semiconductor light emitting element, and method for manufacturing semiconductor light emitting device

[0001] The present disclosure relates to a semiconductor light emitting element, a semiconductor light emitting device, a method for manufacturing a semiconductor light emitting element, and a method for manufacturing a semiconductor light emitting device.

[0002] Conventionally, semiconductor light-emitting elements such as edge-emitting semiconductor laser elements have been known, each of which includes an N-type substrate, an N-side electrode disposed on the lower surface of the substrate, a semiconductor laminate disposed on the upper surface of the substrate, and a P-side electrode disposed above the semiconductor laminate (see, for example, Patent Document 1).

[0003] When joining such a semiconductor light-emitting element to a heat sink, the heat dissipation characteristics of the semiconductor light-emitting element can be improved by joining the P-side electrode, which is closer to the active layer, which becomes the hottest in the semiconductor light-emitting element, to the heat sink than the N-side electrode (i.e., by junction-down mounting).

[0004] International Publication No. 2013 / 150715

[0005] Junction-down semiconductor light-emitting devices are bonded to a heat sink using a bonding material such as solder. The P-side electrode typically has a pad electrode (electrode for bonding to the bonding material) made of Au on the surface that bonds to the heat sink. If such a P-side pad electrode is formed close to the front end face, which is the end face that emits light, there is a problem in that the molten bonding material may spread along the side of the P-side pad, beyond the front end face of the semiconductor light-emitting device, and cover part of the light-emitting surface. In this case, the bonding material may block light emitted from the front end face. If light is blocked, the blocked light is converted into heat, causing the temperature of the front end face to rise, leading to catastrophic optical damage (COD).

[0006] To prevent the bonding material from leaking to the front end face, it is possible to adopt a configuration in which the Au pad electrode included in the p-side electrode is not formed near the front end face. However, the height from the bottom surface of the semiconductor light-emitting device (the position of the top surface of the semiconductor light-emitting device) of the region where the pad electrode is not formed near the front end face is lower than the height of the region where the pad electrode is formed. In this configuration, when a coating film is formed on the front end face, which is the end face from which the semiconductor light-emitting device emits light, the coating film is likely to wrap around and form around the portion of the top surface of the semiconductor light-emitting device near the front end face where the pad electrode is not formed. Such coating films are generally dielectric multilayer films and therefore have low wettability with bonding materials such as solder. This makes it difficult to place a bonding material on the region of the top surface of the semiconductor light-emitting device near the front end face. Because the light intensity and heat generation near the front end face of the semiconductor light-emitting device are high, not placing a bonding material to bond to a heat sink in this region reduces the heat dissipation characteristics of the semiconductor light-emitting device. Furthermore, the reduced heat dissipation characteristics increase the temperature during operation, causing a decrease in the band gap in the active layer, a phenomenon known as band gap shrinkage. This shortens the life of the semiconductor light emitting element.

[0007] The present disclosure is intended to solve such problems, and aims to prevent light from being blocked at the front end facet while suppressing a deterioration in heat dissipation characteristics in a semiconductor light-emitting element that emits light from the front end facet.

[0008] In order to solve the above problems, one aspect of the semiconductor light-emitting device according to the present disclosure is an edge-emitting semiconductor light-emitting device that includes a waveguide between a front end face and a rear end face and emits light from the front end face, the edge-emitting semiconductor light-emitting device including: a substrate; a semiconductor laminate disposed above the substrate and having the waveguide; a first P-side electrode disposed above the semiconductor laminate; and a pad electrode disposed above the first P-side electrode. The semiconductor light-emitting device has a top surface that includes a front bottom portion extending rearward from the front end face above the waveguide of the semiconductor light-emitting device, the front bottom portion having no pad electrode; a rear bottom portion disposed rearward of the front bottom; a front protrusion portion disposed between the front bottom and the rear bottom portion and protruding upward relative to the front bottom and the rear bottom; and a rear protrusion portion disposed rearward of the rear bottom portion and protruding upward relative to the front bottom and the rear bottom. The pad electrode is not disposed on the front bottom, and the rear protrusion portion includes at least a portion of the pad electrode.

[0009] In order to solve the above-described problems, another aspect of the semiconductor light emitting device according to the present disclosure is an edge-emitting semiconductor light emitting device that includes a waveguide between a front end face and a rear end face and emits light from the front end face, the edge-emitting semiconductor light emitting device including: a substrate; a semiconductor laminate disposed above the substrate and having the waveguide; a first P-side electrode disposed above the semiconductor laminate; and a pad electrode disposed above the first P-side electrode, the semiconductor light emitting device having a front end face extending rearward from the front end face on an upper surface of the semiconductor light emitting device, above the waveguide of the semiconductor light emitting device. The semiconductor device has a front bottom and a rear protrusion arranged behind the front bottom and protruding upward relative to the front bottom, wherein the pad electrode is not arranged on the front bottom and the rear protrusion includes at least a portion of the pad electrode, and the rear protrusion has a first region located above the optical axis of the light and a second region adjacent to the first region in a lateral direction perpendicular to the propagation direction of the light and the stacking direction of the semiconductor stack, and the distance from the front end face to the front end of the first region is greater than the distance from the front end face to the front end of the second region.

[0010] In order to solve the above problem, one aspect of the semiconductor light-emitting device according to the present disclosure is a semiconductor light-emitting device comprising the above-mentioned semiconductor light-emitting element, a heat sink, and a bonding member that bonds the upper surface of the semiconductor light-emitting element to the heat sink, wherein the semiconductor light-emitting element comprises the first P-side electrode and a second P-side electrode that is arranged above the pad electrode, each of the forward protrusion and the rear protrusion includes a portion of the second P-side electrode, and the bonding member is arranged from the second P-side electrode included in the forward protrusion to the second P-side electrode included in the rear protrusion.

[0011] In order to solve the above problem, one aspect of the semiconductor light-emitting device according to the present disclosure is a semiconductor light-emitting device comprising the semiconductor light-emitting element, a heat sink, and a joining member that joins the upper surface of the semiconductor light-emitting element to the heat sink, wherein the forward protrusion has a plurality of continuous regions and one or more gap regions, each of the plurality of continuous regions being a region that protrudes upward relative to the front bottom and the rear bottom, each of the one or more gap regions being located between two adjacent continuous regions among the plurality of continuous regions and not protruding upward relative to the front bottom and the rear bottom, and the joining member being arranged in the one or more gap regions.

[0012] In order to solve the above problem, one aspect of the semiconductor light-emitting device according to the present disclosure is a semiconductor light-emitting device comprising the semiconductor light-emitting element, a heat sink, and a joining member that joins the upper surface of the semiconductor light-emitting element to the heat sink, wherein the forward protrusion has a plurality of continuous regions and one or more gap regions, each of the plurality of continuous regions being a region that protrudes upward relative to the front bottom L1 and the rear bottom L2, and each of the one or more gap regions being a region that is located between two adjacent continuous regions among the plurality of continuous regions and does not protrude upward relative to the front bottom L1 and the rear bottom L2, and the joining member extends from the one or more gap regions to a position forward of the forward protrusion.

[0013] In order to solve the above problem, one aspect of the semiconductor light-emitting device according to the present disclosure is a semiconductor light-emitting device comprising the above-mentioned semiconductor light-emitting element, a heat sink, and a joining member that joins the upper surface of the semiconductor light-emitting element to the heat sink, wherein the joining member located in front of the first region is not positioned forward of the front end face, and the joining member located in front of the second region extends from the front bottom to a position forward of the front end face.

[0014] In order to solve the above problem, one aspect of the semiconductor light-emitting device according to the present disclosure is a semiconductor light-emitting device comprising the above-mentioned semiconductor light-emitting element, a heat sink, and a bonding member that bonds the upper surface of the semiconductor light-emitting element to the heat sink, wherein the semiconductor light-emitting element comprises the first P-side electrode and a second P-side electrode that is arranged above the pad electrode, the rear bottom and the rear protrusion each include a portion of the second P-side electrode, the rear protrusion includes a portion of the pad electrode, and the pad electrode included in the rear protrusion and the bonding member are spaced apart.

[0015] In order to solve the above problem, one aspect of the semiconductor light emitting device according to the present disclosure is a semiconductor light emitting device comprising the above semiconductor light emitting element, a heat sink, and a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, wherein the semiconductor light emitting element comprises the first P-side electrode and a second P-side electrode arranged above the pad electrode, each of the rear bottom and the rear protrusion includes a portion of the second P-side electrode, the rear protrusion includes a portion of the pad electrode, and at least one of the pad electrode included in the first region and the pad electrode included in the second region is separated from the bonding member.

[0016] In order to solve the above problem, one aspect of the semiconductor light-emitting device according to the present disclosure is a semiconductor light-emitting device comprising the semiconductor light-emitting element, a heat sink, and a joining member that joins the upper surface of the semiconductor light-emitting element to the heat sink, wherein the forward protrusion includes a portion of the pad electrode, and the pad electrode included in the forward protrusion and the joining member are spaced apart.

[0017] In order to solve the above-described problems, one aspect of a method for manufacturing a semiconductor light-emitting element according to the present disclosure is a method for manufacturing an edge-emitting semiconductor light-emitting element that has a waveguide between a front end face and a rear end face and emits light from the front end face, the method including the steps of: forming a semiconductor laminate having the waveguide; forming a first P-side electrode above the semiconductor laminate; forming a pad electrode above the first P-side electrode; and forming the front end face and the rear end face, wherein an upper surface of the semiconductor light-emitting element is formed above the waveguide of the semiconductor light-emitting element, and the following are formed: a front bottom extending rearward from the front end face; a rear bottom located rearward of the front bottom; a front protrusion located between the front bottom and the rear bottom and protruding upward relative to the front bottom and the rear bottom; and a rear protrusion located rearward of the rear bottom and protruding upward relative to the front bottom and the rear bottom, the pad electrode is not located on the front bottom, and the rear protrusion includes at least a portion of the pad electrode.

[0018] In order to solve the above problem, one aspect of the method for manufacturing a semiconductor light-emitting device according to the present disclosure is a method for manufacturing a semiconductor light-emitting device comprising the semiconductor light-emitting element, a heat sink, and a bonding member, and includes the method for manufacturing the semiconductor light-emitting element and a step of bonding the upper surface of the semiconductor light-emitting element to the heat sink using the bonding member.

[0019] According to the present disclosure, in a semiconductor light emitting element that emits light from its front end facet, it is possible to suppress a decrease in heat dissipation characteristics and to suppress light from being blocked by the front end facet.

[0020] 1 is a schematic top view showing the overall configuration of a semiconductor light emitting device according to a first embodiment. FIG. 2 is a schematic first cross-sectional view showing the overall configuration of a semiconductor light emitting device according to the first embodiment. FIG. 3 is a schematic third cross-sectional view showing the overall configuration of a semiconductor light emitting device according to the first embodiment. FIG. 4 is a schematic fourth cross-sectional view showing the overall configuration of a semiconductor light emitting device according to the first embodiment. FIG. 5 is a schematic cross-sectional view showing the configuration of an N-type semiconductor layer according to the first embodiment. FIG. 6 is a schematic cross-sectional view showing the configuration of an active layer according to the first embodiment. FIG. 7 is a schematic cross-sectional view showing the configuration of a second etching stop layer according to the first embodiment. FIG. 8 is a schematic plan view showing the overall configuration of a semiconductor light emitting device according to the first embodiment. FIG. 9 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device according to the first embodiment. FIG. 10 is a schematic cross-sectional view showing the configuration of a semiconductor light emitting device including a semiconductor light emitting element of a comparative example. FIG. 11 is a schematic cross-sectional view showing a first step of a method for manufacturing a semiconductor light emitting device according to the first embodiment. FIG. 12 is a schematic first cross-sectional view showing a second step of a method for manufacturing a semiconductor light emitting device according to the first embodiment. 1. A second schematic cross-sectional view showing a third step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. B. A first schematic cross-sectional view showing a fourth step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. C. A second schematic cross-sectional view showing the fourth step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. D. A first schematic cross-sectional view showing a fifth step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. E. A second schematic cross-sectional view showing the fifth step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. F. A first schematic cross-sectional view showing a sixth step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. G. A second schematic cross-sectional view showing the sixth step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. H. A first schematic cross-sectional view showing a seventh step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. I. A first schematic cross-sectional view showing an eighth step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1. I. A second schematic cross-sectional view showing the eighth step of the method for manufacturing a semiconductor light-emitting device according to embodiment 1.1. A first schematic cross-sectional view showing a ninth step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 2. A schematic second cross-sectional view showing the ninth step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 3. A schematic third cross-sectional view showing the ninth step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 4. A schematic first cross-sectional view showing a tenth step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 5. A schematic second cross-sectional view showing the tenth step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 6. A schematic third cross-sectional view showing the tenth step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 7. A schematic perspective view showing a configuration of a substrate base material according to the first embodiment. 8. A schematic perspective view showing a cleavage step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 9. A schematic perspective view showing a coating film formation step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 10. A schematic cross-sectional view showing a coating film formation step of the method for manufacturing a semiconductor light-emitting element according to the first embodiment. 1 is a diagram showing an example of the configuration of each layer of a contact layer, a P-type cladding layer, and an active layer in Example 2. FIG. 2 is a diagram showing an example of the configuration of each layer of an N-type semiconductor layer and a substrate in Example 2. FIG. 3 is a schematic top view showing the configuration of a forward protrusion of a semiconductor light emitting element according to embodiment 2. FIG. 4 is a schematic first cross-sectional view showing the overall configuration of a semiconductor light emitting device according to embodiment 2. FIG. 5 is a schematic second cross-sectional view showing the overall configuration of a semiconductor light emitting device according to embodiment 2. FIG. 6 is a schematic top view showing a first configuration example of a forward protrusion according to embodiment 2. FIG. 7 is a schematic top view showing a second configuration example of a forward protrusion according to embodiment 2. FIG. 8 is a schematic top view showing a third configuration example of a forward protrusion according to embodiment 2. FIG. 9 is a schematic top view showing a fourth configuration example of a forward protrusion according to embodiment 2. FIG. 10 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting element according to embodiment 3. FIG. 11 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting element according to a modification of embodiment 3. FIG. 12 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device according to embodiment 3.10 is a schematic top view showing the overall configuration of a semiconductor light emitting element according to embodiment 4. FIG. 11 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device according to embodiment 4. FIG. 12 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting element according to embodiment 5. FIG. 13 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting element according to embodiment 6. FIG. 14 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting element according to embodiment 7. FIG. 15 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device according to embodiment 7. FIG. 16 is a diagram showing a first step in a method for forming a pad electrode of a semiconductor light emitting element according to embodiment 7. FIG. 17 is a diagram showing a second step in a method for forming a pad electrode of a semiconductor light emitting element according to embodiment 7. FIG. 18 is a diagram showing a third step in a method for forming a pad electrode of a semiconductor light emitting element according to embodiment 7. FIG. 19 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting element according to a modification of embodiment 7.

[0021] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that each of the embodiments described below represents a specific example of the present disclosure. Therefore, the numerical values, shapes, materials, components, and the arrangement and connection of the components shown in the following embodiments are merely examples and are not intended to limit the present disclosure.

[0022] Furthermore, each figure is a schematic diagram and is not necessarily an exact representation. Therefore, the scales and the like do not necessarily match in each figure. In each figure, the same reference numerals are used to denote substantially the same components, and redundant explanations will be omitted or simplified.

[0023] Furthermore, in this specification, terms indicating the relationship between elements, such as "equal," terms indicating the shape of elements, such as "flat," "parallel," "vertical," "plate-shaped," and "curved," as well as numerical ranges, are not expressions that only express a strict meaning, but are expressions that also include a substantially equivalent range, for example, a difference of about a few percent.

[0024] In this specification, the terms "above" and "below" do not refer to vertically above and below in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. The terms "above" and "below" are used not only when two components are arranged with a gap between them and another component is present between them, but also when two components are arranged in contact with each other.

[0025] Furthermore, in this specification, the terms "front" and "rear" used in relation to position do not refer to "front" and "rear" in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the direction of propagation of light emitted from the semiconductor light-emitting element. In other words, the direction of propagation of light emitted from the semiconductor light-emitting element is defined as forward, and the direction opposite to the direction of light propagation is defined as backward, and the terms "front" and "rear" are used in describing the relative positions of each component such as the semiconductor light-emitting element.

[0026] First Embodiment A semiconductor light emitting element, a semiconductor light emitting device, and a method for manufacturing the same according to a first embodiment will be described.

[0027] [1-1. Overall Configuration of Semiconductor Light-Emitting Device] First, the overall configuration of the semiconductor light-emitting device according to this embodiment will be described with reference to FIGS. 1 to 5. FIG. 1 is a schematic top view showing the overall configuration of the semiconductor light-emitting device 1 according to this embodiment. FIGS. 2 to 5 are schematic cross-sectional views showing the overall configuration of the semiconductor light-emitting device 1 according to this embodiment. FIGS. 2, 3, and 4 show cross sections of the semiconductor light-emitting device 1 taken along lines II-II, III-III, and IV-IV in FIG. 1, respectively. FIG. 5 shows only a portion of the cross section (a cross section parallel to the YZ plane in FIG. 1) of the semiconductor light-emitting device 1 passing through the optical axis Ax (which coincides with the central axis of the waveguide of the semiconductor light-emitting device) shown in FIG. 1, including the front end face 1F. Note that each figure shows an X-axis, a Y-axis, and a Z-axis, which are orthogonal to each other. The X-axis, the Y-axis, and the Z-axis are in a right-handed Cartesian coordinate system. The stacking direction of the semiconductor light emitting element 1 (i.e., the thickness direction of each layer of the semiconductor light emitting element 1) is parallel to the Z-axis direction, and the main propagation direction of light (laser light) is parallel to the Y-axis direction.

[0028] The semiconductor light-emitting element 1 is an edge-emitting semiconductor light-emitting element that includes a waveguide between a front end facet 1F and a rear end facet 1R and emits light from the front end facet 1F. In this embodiment, the semiconductor light-emitting element 1 is a semiconductor laser element that emits laser light with a wavelength in the near-infrared region (approximately 900 nm to 980 nm). More specifically, the semiconductor light-emitting element 1 emits laser light with a wavelength of approximately 976 nm, but may also emit laser light with a wavelength in the blue region or ultraviolet region. As shown in FIG. 1 , the front end facet 1F and the rear end facet 1R of the semiconductor light-emitting element 1 form a resonator. The front end facet 1F is an end face that emits light, and the rear end facet 1R is an end face that has a higher reflectivity than the front end facet 1F. The resonator length of the semiconductor light-emitting element 1, i.e., the distance between the front end facet 1F and the rear end facet 1R in the light propagation direction (the Y-axis direction in each figure, i.e., the resonance direction), is not particularly limited, but is 0.5 mm or more in this embodiment. The semiconductor light emitting element 1 includes coating films 2F and 2R disposed at the ends in the light propagation direction. The coating films 2F and 2R are films for adjusting the reflectance of the front end facet 1F and the rear end facet 1R, respectively. In this embodiment, the coating films 2F and 2R are each a dielectric multilayer film. The coating film 2F has a lower reflectance than the coating film 2R.

[0029] 2 , the semiconductor light emitting element 1 includes a substrate 10, a semiconductor stacked body 1S, and an insulating film 60. In this embodiment, the semiconductor light emitting element 1 further includes a first P-side electrode 71, a pad electrode 73, a second P-side electrode 72, and an N-side electrode 80.

[0030] The substrate 10 is a plate-like member that serves as a base for the semiconductor light-emitting device 1. In this embodiment, the substrate 10 is an N-type GaAs substrate. The substrate 10 has a pair of cleavage facets 10C. The cleavage facets 10C are cleavage surfaces formed when the substrate 10 is cleaved. Coating films 2F and 2R are respectively disposed on the pair of cleavage facets 10C.

[0031] The semiconductor laminate 1S is a laminate having a waveguide disposed above a substrate 10. In this embodiment, the semiconductor laminate 1S has an N-type semiconductor layer 20, an active layer 30, a P-type cladding layer 40, and a contact layer 50.

[0032] The N-type semiconductor layer 20 is an N-type semiconductor layer disposed above the substrate 10. The configuration of the N-type semiconductor layer 20 according to this embodiment will be described with reference to FIG. 6. FIG. 6 is a schematic cross-sectional view showing the configuration of the N-type semiconductor layer 20 according to this embodiment. FIG. 6 shows a cross section of the N-type semiconductor layer 20 taken along line II-II in FIG. 1. As shown in FIG. 6, the N-type semiconductor layer 20 has an N-type cladding layer 23. In this embodiment, the N-type semiconductor layer 20 further has an N-type buffer layer 21 and an N-type buffer boundary layer 22.

[0033] The N-type buffer layer 21 is an N-type semiconductor layer disposed above the substrate 10. In this embodiment, the N-type buffer layer 21 has a concentration of 3.0×10 １７ cm －３ The layer is an N-type GaAs layer doped with N-type impurities (Si) and having a thickness of 0.50 μm.

[0034] The N-type buffer boundary layer 22 is an N-type semiconductor layer disposed between the N-type buffer layer 21 and the N-type cladding layer 23. In this embodiment, the N-type buffer boundary layer 22 has a concentration of 2.0×10 １８ cm －３N-type Al film of 0.05 μm thickness doped with N-type impurities (Si) Ｘ２２ Ga １－Ｘ２２ The Al composition ratio X22 of the N-type buffer boundary layer 22 increases toward the N-type cladding layer 23. The Al composition ratio X22 of the N-type buffer boundary layer 22 is 0.15 at the interface with the N-type buffer layer 21 and is 0.25 at the interface with the N-type cladding layer 23.

[0035] The N-type cladding layer 23 is an N-type semiconductor layer disposed above the substrate 10. The average refractive index of the N-type cladding layer 23 is lower than the average refractive index of the active layer 30. In this embodiment, the N-type cladding layer 23 is disposed on the N-type buffer boundary layer 22. The N-type cladding layer 23 is an N-type Al 2 O 3 layer having a thickness of 3.1 μm. ０．２５ Ga ０．７５ The impurity concentration of the N-type cladding layer 23 is 2.0×10 in the region at a distance of 2.60 μm or less from the boundary surface with the N-type buffer boundary layer 22. １８ cm －３ In the region where the distance from the boundary surface with the N-type buffer boundary layer 22 is greater than 2.60 μm and less than or equal to 3.00 μm, １７ cm －３ In the region where the distance from the boundary surface with the N-type buffer boundary layer 22 is greater than 3.00 μm and equal to or less than 3.10 μm, １６ cm －３ is.

[0036] The active layer 30 is a light-emitting layer disposed above the N-type semiconductor layer 20 (or the N-type cladding layer 23). In this embodiment, the active layer 30 has a quantum well structure. The configuration of the active layer 30 will be described with reference to FIG. 7. FIG. 7 is a schematic cross-sectional view showing the configuration of the active layer 30 according to this embodiment. FIG. 7 shows a cross section of the active layer 30 taken along line II-II in FIG. 1. As shown in FIG. 7, the active layer 30 includes an N-side cladding boundary layer 31, an N-side guide layer 32, an N-side barrier layer 33, a well layer 34, a P-side barrier layer 35, a P-side guide layer 36, and a P-side cladding boundary layer 37.

[0037] As shown in FIGS. 3 to 5 , the active layer 30 has a window region 30w (i.e., a non-light-emitting region) near the front end facet 1F of the semiconductor light-emitting device 1. In the window region 30w, a quantum well structure including the N-side barrier layer 33, the well layer 34, and the P-side barrier layer 35 is disordered. The window region 30w has a larger bandgap energy than the region of the active layer 30 other than the window region 30w. This suppresses light emission and light absorption near the front end facet 1F, thereby suppressing heat generation near the front end facet 1F. This also suppresses COD near the front end facet 1F of the semiconductor light-emitting device 1. In this embodiment, the active layer 30 also has a window region 30w near the rear end facet 1R. The window region 30w is formed over a predetermined length in the light propagation direction from the end of the active layer 30 on the front end facet 1F side. The length of the window region 30w in the light propagation direction may be equal to the length from the lower end position of the end of the ridge R (see FIG. 5 ) described later on the front end face 1F side (in this embodiment, the boundary position between the lower end of the trench Te and the ridge R shown in FIG. 5 ) to the end of the P-type cladding layer 40 on the front end face 1F side.

[0038] 7 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5). In this embodiment, the N-side cladding boundary layer 31 is an N-type Al 0.83 μm thick semiconductor layer disposed between the N-type cladding layer 23 and the N-side guide layer 32. Ｘ３１ Ga １－Ｘ３１ The Al composition ratio X31 of the N-side cladding boundary layer 31 decreases toward the N-side guide layer 32. The Al composition ratio X31 of the N-side cladding boundary layer 31 is 0.25 at the interface with the N-type cladding layer 23, and is 0.20 at the interface with the N-side guide layer 32. The concentration of the N-type impurity (Si) doped in the N-side cladding boundary layer 31 decreases toward the N-side guide layer 32. The N-type impurity concentration of the N-side cladding boundary layer 31 is 7.0×10 at the interface with the N-type cladding layer 23. １６ cm －３ and 5.0×10 at the interface with the N-side guide layer 32. １６ cm －３ is.

[0039] The N-side guide layer 32 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5). The average refractive index of the N-side guide layer 32 is higher than the average refractive index of the N-type cladding layer 23. In this embodiment, the N-side guide layer 32 is disposed above the N-side cladding boundary layer 31. The N-side guide layer 32 has a concentration of 5.0×10 １６ cm －３ N-type Al film with a thickness of 0.27 μm doped with N-type impurities (Si) ０．２０ Ga ０．８０ This is an As layer.

[0040] The N-side barrier layer 33 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5) and functions as a barrier for the quantum well structure. In this embodiment, the N-side barrier layer 33 is disposed above the N-side guide layer 32. The N-side barrier layer 33 is an undoped Al layer having a thickness of 0.010 μm. ０．１６ Ga ０．８４ This is an As layer.

[0041] The well layer 34 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5) and functions as a well of the quantum well structure. In this embodiment, the well layer 34 is disposed above the N-side barrier layer 33. The well layer 34 is an undoped In layer having a thickness of 0.009 μm. ０．１３５ Ga ０．８６５ This is an As layer.

[0042] The P-side barrier layer 35 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5) and functions as a barrier of the quantum well structure. In this embodiment, the P-side barrier layer 35 is disposed above the well layer 34. The P-side barrier layer 35 has a concentration of 4.0×10 １６ cm －３ P-type Al with a thickness of 0.010 μm doped with P-type impurities (C (carbon)) ０．１６ Ga ０．８４ This is an As layer.

[0043] The P-side guide layer 36 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5). The average refractive index of the P-side guide layer 36 is higher than the average refractive index of the P-type cladding layer 40 (see FIGS. 2 to 5). In this embodiment, the P-side guide layer 36 is disposed above the P-side barrier layer 35. The P-side guide layer 36 is a P-type Al 0.29 μm thick semiconductor layer. Ｘ３６ Ga １－Ｘ３６ The Al composition ratio X36 of the P-side guide layer 36 is 0.20 in a region where the distance from the interface of the P-side guide layer 36 with the P-side barrier layer 35 is 0.01 μm or less. The Al composition ratio X36 of the P-side guide layer 36 increases toward the P-side cladding boundary layer 37 in a region where the distance from the interface of the P-side guide layer 36 with the P-side barrier layer 35 is greater than 0.01 μm. The Al composition ratio X36 of the P-side guide layer 36 is 0.21 at the interface with the P-side cladding boundary layer 37. The P-type impurity concentration of the P-side guide layer 36 increases toward the P-side cladding boundary layer 37. The P-type impurity concentration of the P-side guide layer 36 is 4.0×10 at the interface with the P-side barrier layer 35. １６ cm －３ and 1.5×10 at the boundary surface with the P-side cladding boundary layer 37. １７ cm －３ is.

[0044] The P-side cladding boundary layer 37 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5). In this embodiment, the P-side cladding boundary layer 37 is a P-type Al 0.10 μm thick semiconductor layer disposed between the P-side guide layer 36 and the P-type cladding layer 40 (see FIGS. 2 to 5). Ｘ３７ Ga １－Ｘ３７ The Al composition ratio X37 of the P-side cladding boundary layer 37 increases toward the P-type cladding layer 40. The Al composition ratio X37 of the P-side cladding boundary layer 37 is 0.21 at the interface with the P-side guide layer 36, and is 0.75 at the interface with the P-type cladding layer 40. The P-type impurity concentration of the P-side guide layer 36 increases toward the P-side cladding boundary layer 37. The P-type impurity concentration of the P-side cladding boundary layer 37 is 1.5×10 at the interface with the P-side guide layer 36.１７ cm －３ and 5.0×10 at the interface with the P-type cladding layer 40. １７ cm －３ is.

[0045] The P-type cladding layer 40 shown in FIGS. 2 to 5 is a P-type semiconductor layer disposed above the active layer 30. The average refractive index of the P-type cladding layer 40 is lower than the average refractive index of the active layer 30. In this embodiment, the P-type cladding layer 40 is made of Al Ｘ Ga １－Ｘ The semiconductor device is made of As (0<x<1) and has a lower cladding layer 41 , a first cladding layer 42 , a first etching stop layer 43 , a second cladding layer 44 and a second etching stop layer 45 .

[0046] The lower cladding layer 41 is a P-type semiconductor layer disposed above the active layer 30. In this embodiment, the lower cladding layer 41 has a concentration of 1.0×10 １８ cm －３ P-type Al doped with P-type impurities (C) having a thickness of 0.050 μm ０．７５ Ga ０．２５ This is an As layer.

[0047] The first cladding layer 42 is a P-type semiconductor layer disposed above the active layer 30. In this embodiment, the first cladding layer 42 is a P-type AlN layer having a thickness of 0.10 μm disposed above the lower cladding layer 41. ０．８５ Ga ０．１５ This is an As layer.

[0048] The first etching stop layer 43 is a P-type semiconductor layer disposed above the active layer 30. In this embodiment, the first etching stop layer 43 is disposed above the first cladding layer 42. The Al composition ratio of the first etching stop layer 43 is 0.7 or less. The first etching stop layer 43 has an Al concentration of 5.0×10 １８ cm －３ P-type Al doped with P-type impurities (C) having a thickness of 0.05 μm ０．７０ Ga ０．３０ This is an As layer.

[0049] The second cladding layer 44 is a P-type semiconductor layer disposed above the active layer 30. In this embodiment, the second cladding layer 44 is a P-type Al 2 O 3 layer having a thickness of 0.20 μm disposed above the first etching stop layer 43. ０．８５ Ga ０．１５ This is an As layer.

[0050] In this embodiment, the Al composition ratio X0 of the lower cladding layer 41, the Al composition ratio X1 of the first cladding layer 42, and the Al composition ratio X2 of the second cladding layer 44 satisfy the relationships: X1=X2>0.8 and X1=X2>X0.

[0051] The second etching stop layer 45 is a P-type semiconductor layer disposed above the active layer 30. In this embodiment, the second etching stop layer 45 is a P-type Al 2 O 3 layer having a thickness of 0.050 μm disposed above the second cladding layer 44. Ｘ４５ Ga １－Ｘ４５ The second etching stop layer 45 is an As layer (0.70≧X45≧0.15). The second etching stop layer 45 has two or more gradient regions in which the Al composition ratio decreases toward the contact layer, and one or more constant regions in which the Al composition ratio is constant with respect to the position in the stacking direction. The two or more gradient regions and the one or more constant regions are alternately arranged in the stacking direction. The configuration of the second etching stop layer 45 according to this embodiment will be described below with reference to FIG. 8. FIG. 8 is a schematic cross-sectional view showing the configuration of the second etching stop layer 45 according to this embodiment. FIG. 8 shows a cross section of the second etching stop layer 45 at the ridge R along line II-II in FIG. 1. As shown in FIG. 8, the second etching stop layer 45 has two gradient regions 45b and 45d and two constant regions 45a and 45c.

[0052] The fixed region 45a is a P-type AlN layer having a thickness of 0.050 μm and disposed above the second cladding layer 44. ０．７０ Ga ０．３０ The inclined region 45b is a P-type Al layer having a thickness of 0.01 μm and disposed above the constant region 45a. Ｘ４５ Ga １－Ｘ４５The Al composition ratio X45 of the inclined region 45b decreases toward the contact layer 50. The Al composition ratio X45 of the inclined region 45b is 0.70 at the interface with the constant region 45a and 0.60 at the interface with the constant region 45c. The constant region 45c is a P-type Al layer with a thickness of 0.030 μm, which is disposed above the inclined region 45b. ０．６０ Ga ０．４０ The inclined region 45d is a P-type Al layer having a thickness of 0.010 μm and disposed above the constant region 45c. Ｘ４５ Ga １－Ｘ４５ The Al composition ratio X45 of the inclined region 45d decreases toward the contact layer 50. The Al composition ratio X45 of the inclined region 45d is 0.60 at the interface with the constant region 45c, and is 0.15 at the interface with the contact layer 50. In this embodiment, the second etching stop layer 45 has an Al composition ratio X45 of 5.0×10 １８ cm －３ The semiconductor layer is doped with a P-type impurity (C).

[0053] The contact layer 50 is a P-type semiconductor layer disposed above the P-type cladding layer 40 and in ohmic contact with the first P-side electrode 71. In this embodiment, the contact layer 50 is a P-type GaAs layer with a film thickness of 0.25 μm. The P-type impurity concentration of the contact layer 50 decreases with increasing distance from the P-type cladding layer 40. The P-type impurity concentration of the contact layer 50 is 3.0×10 at the interface with the P-type cladding layer 40. １９ cm －３ and 1.0 × 10 １８ cm －３ is.

[0054] 1 and 2, a ridge R extending in the direction of light propagation is formed in a region including the P-type cladding layer 40 and the contact layer 50. A waveguide is formed along the ridge R. In FIG. 1, the outline of the top surface of the ridge R is indicated by a dashed line.

[0055] As shown in FIGS. 3 and 5 , the upper surface of the semiconductor laminate 1S in the groove Te (cross section along line III-III) slightly rearward of the end of the ridge R in the light propagation direction closest to the front end facet 1F from which light of the semiconductor light-emitting element 1 is emitted is located on the second etching stop layer 45. In other words, the contact layer 50 connected to the bonding member is not present on the front end facet 1F side of the ridge R closer to the front end facet 1F. Therefore, no current is injected into the isolation region De or the window region 30w, which suppresses heat generation near the front end facet 1F. This suppresses bandgap shrink near the front end facet 1F of the semiconductor light-emitting element 1, thereby improving the lifetime of the semiconductor light-emitting element 1. In this embodiment, a similar ridge structure is also present near the rear end facet 1R of the semiconductor light-emitting element 1. While a similar structure is not required near the rear end facet 1R, having one on both sides is more effective.

[0056] In this embodiment, wing portions G are formed in a region including the P-type cladding layer 40 and the contact layer 50, extending along the ridge R and having the same height as the ridge R at the top surface. In other words, grooves T are formed along the ridge R between the wing portions G and the ridge R. Note that the outline of the top surface of the wing portions G is shown by a dashed line in FIG. 1 . In this embodiment, the ridge R is formed between two wing portions G. Such wing portions G allow the stress applied to the ridge R to be distributed to the wing portions G when the semiconductor light emitting element 1 is mounted on a mounting substrate or the like.

[0057] In this embodiment, the region including the P-type cladding layer 40 and the contact layer 50 is disposed between the end of the semiconductor laminate 1S on the front facet 1F side and the ridge R, and has a separation region De separated from the ridge R. In other words, as shown in Fig. 5, a trench Te is formed between the ridge R and the separation region De. In this embodiment, the contact layer 50 and a portion of the P-type cladding layer 40 (a portion of the second etching stop layer 45) are removed in the trench Te.

[0058] 1 and 4, the isolation region De is disposed between the two wing portions G. The isolation region De and the two wing portions G are connected to each other. In other words, the upper surface of the contact layer 50 at the end of the semiconductor laminate 1S in the light propagation direction is flat and continuous over the entire length of the contact layer 50 in the width direction (i.e., the X-axis direction). This structure does not have to be located near the rear end face 1R, but having it on both sides is more effective.

[0059] In this way, at the end portion in the light propagation direction of the semiconductor laminate 1S according to the present embodiment, the contact layer 50 and the second etching stop layer 45 cover the second cladding layer 44 having a high Al composition ratio, etc., thereby suppressing oxidation and erosion of the second cladding layer 44, etc. By suppressing oxidation and erosion of the second cladding layer 44 having a high Al composition ratio, it is possible to improve adhesion between the semiconductor laminate including these layers and the insulating film 60.

[0060] Furthermore, when the semiconductor light emitting element 1 is singulated, it is cleaved at positions corresponding to the front and rear ends of the semiconductor laminate 1S, and therefore, if the adhesion between the contact layer 50 and the insulating film 60 is low, the insulating film 60 may peel off. However, in the semiconductor light emitting element 1 according to this embodiment, as described above, the adhesion between the insulating film 60 and the contact layer 50 can be increased at positions corresponding to the front and rear ends of the semiconductor laminate 1S, and therefore peeling of the insulating film 60 can be suppressed.

[0061] A recess 3 recessed in the width direction of the semiconductor light emitting element 1 is formed at the end in the width direction (i.e., the end in the X-axis direction) of the semiconductor light emitting element 1. The recess 3 is formed on the outer side in the X-axis direction of the wing portion G. The recess 3 is part of a separation groove used when singulating the semiconductor light emitting element 1. As shown in FIGS. 2 to 4 , the portion of the side surface of the semiconductor light emitting element 1 corresponding to the recess 3 is constricted inward in the X-axis direction.

[0062] The position of the recess 3 in the width direction of the semiconductor light emitting element 1 is located at the innermost position in the width direction (i.e., closer to the ridge R) in the P-type cladding layer 40. In other words, the recess 3 is most constricted in the P-type cladding layer 40. The position of the recess 3 in the width direction of the semiconductor light emitting element 1 moves outward in the width direction of the semiconductor light emitting element 1 (i.e., away from the ridge R) as it approaches the substrate 10 from the active layer 30.

[0063] The insulating film 60 is an electrical insulating film disposed above the P-type cladding layer 40. As shown in FIG. 7 , the insulating film 60 continuously covers from the side surface of the ridge R to a portion of the upper surface of the ridge R. In this embodiment, an opening 60 a is formed in the insulating film 60 at a position corresponding to the upper surface of the ridge R. Current is injected from the first P-side electrode 71 to the contact layer 50 through the opening 60 a. In other words, the opening 60 a is a current injection window region for the contact layer 50. The insulating film 60 continuously covers the entire upper surface of the semiconductor stack formed on the substrate 10 except for the opening 60 a. This makes it possible to prevent current from flowing to regions other than the ridge R.

[0064] As shown in FIG. 5 , the first P-side electrode 71 continuously covers the area from the top surface of the isolation region De to the top surface of the ridge R, including the bottom and both side surfaces of the trench Te. The insulating film 60 continuously covers the area from the top surface of the isolation region De to a portion of the top surface of the ridge R, including the bottom and both side surfaces of the trench Te. Therefore, current is not injected into the isolation region De from the first P-side electrode 71 formed on the top surface of the ridge R. Since the pad electrode 73 serves to inject current into the first P-side electrode 71 on the ridge, the end of the pad electrode 73 on the front end surface 1F side above the waveguide region of the semiconductor laminate 1S can be positioned near the trench Te. Furthermore, since current is not injected into the isolation region De or the window region 30w, heat generation near the front end surface 1F can be suppressed. This suppresses bandgap shrink near the front end surface 1F of the semiconductor light-emitting element 1, thereby improving the life of the semiconductor light-emitting element 1.

[0065] There are no particular limitations on the material of the insulating film 60 as long as it is electrically insulating. In this embodiment, the insulating film 60 is a silicon nitride film with a film thickness of 100 nm.

[0066] The first P-side electrode 71 is a conductive layer disposed above the semiconductor laminate. In this embodiment, the first P-side electrode 71 is disposed above the contact layer 50. As shown in FIGS. 2 and 3 , the first P-side electrode 71 contacts the contact layer 50 on the upper surface of the ridge R. The first P-side electrode 71 continuously covers from the upper surface of one wing portion G to the upper surface of the other wing portion G. The material of the first P-side electrode 71 is not particularly limited as long as it is conductive. The first P-side electrode 71 includes, for example, a 50-nm-thick Ti film, a 150-nm-thick Pt film, and an Au film with a thickness of 100 nm to 300 nm, which are stacked in this order from the contact layer 50 side. In this embodiment, the Au film included in the first P-side electrode 71 has a thickness of 200 nm.

[0067] The pad electrode 73 shown in FIGS. 2, 3, and 5 is a pad-shaped conductive layer disposed above the first P-side electrode 71. In this embodiment, the pad electrode 73 has overhanging portions 73a at the X-axis direction end and the Y-axis direction end. The overhanging portions 73a are portions that protrude outward in the X-axis direction and the Y-axis direction at the upper ends of the X-axis direction end of the pad electrode 73. The configuration of the pad electrode 73 is not particularly limited. The film thickness of the pad electrode 73 is, for example, 1.5 μm or more and 4.0 μm or less. In this embodiment, the pad electrode 73 is an Au plating film with a film thickness of 2.5 μm.

[0068] The second P-side electrode 72 shown in FIGS. 2 to 5 is a conductive layer disposed above the first P-side electrode 71 and the pad electrode 73. The second P-side electrode 72 may also be disposed in an area of ​​the upper surface of the first P-side electrode 71 and the insulating film 60 where the pad electrode 73 is not disposed. The configuration of the second P-side electrode 72 is not particularly limited. The second P-side electrode 72 may have a barrier layer containing at least one of Ti, Pt, and Cr. This can prevent Sn, oxygen, and the like from diffusing from the outside of the second P-side electrode 72 to the pad electrode 73 and the first P-side electrode 71 via the second P-side electrode 72. This can prevent high resistance due to deterioration of the first P-side electrode 71. In this embodiment, the second P-side electrode 72 includes a 50-nm-thick Ti film, a 150-nm-thick Pt film, and an Au film with a thickness of 100 nm to 300 nm, stacked in this order from the pad electrode 73 side. In this embodiment, the thickness of the Au film included in the second p-side electrode 72 is 200 nm.

[0069] 2, 3, and 5 is a conductive layer disposed on the lower principal surface of the substrate 10 (i.e., the principal surface of the substrate 10 on the back side of the principal surface on which the semiconductor layers are stacked). The configuration of the N-side electrode 80 is not particularly limited. In this embodiment, the N-side electrode 80 includes, stacked in this order from the substrate 10 side, a 90-nm-thick AuGe film, a 20-nm-thick Ni film, a 50-nm-thick Au film, a 100-nm-thick Ti film, a 50-nm-thick Pt film, a 50-nm-thick Ti film, a 100-nm-thick Pt film, and a 500-nm-thick Au film.

[0070] 1 and 5 , in this embodiment, a front bottom L1, a front protrusion H1, a rear bottom L2, and a rear protrusion H2 are formed on the top surface of the semiconductor light-emitting element 1 above the optical axis Ax of light emitted by the semiconductor light-emitting element 1. In other words, the semiconductor light-emitting element 1 has the front bottom L1, the front protrusion H1, the rear bottom L2, and the rear protrusion H2 on the top surface of the semiconductor light-emitting element 1 above the waveguide along the optical axis Ax. The optical axis Ax is an axis along the waveguide formed by the ridge R. Note that, in the vicinity of the front end face 1F and the rear end face 1R where the ridge R is not formed, "above the waveguide" may be defined as, for example, above a region in the semiconductor stack 1S that has the same width as the ridge R along the optical axis Ax. In this embodiment, the optical axis Ax is located in the active layer 30 in the stacking direction (i.e., the Z-axis direction), and is located at approximately the center of the semiconductor light-emitting element 1 in the lateral direction perpendicular to the stacking direction and the light propagation direction (i.e., the X-axis direction). The front bottom L1, the front protrusion H1, the rear bottom L2, and the rear protrusion H2 do not have to be arranged across the entire width of the waveguide (i.e., the X-axis direction), but may be arranged only above a certain region in the width of the waveguide.

[0071] The front bottom portion L1 is a part of the upper surface of the semiconductor light-emitting device 1 and extends rearward from the front end facet 1F. In this embodiment, as shown in FIG. 5 , a first P-side electrode 71 and a second P-side electrode 72 are disposed on the semiconductor laminate 1S at the front bottom portion L1, but no pad electrode 73 is disposed thereon. The coating film 2F is disposed continuously from the cleavage end face 10C through the front bottom portion L1 to the front surface of the forward protrusion H1 (i.e., the front end face). Note that the coating films 2F and 2R disposed on the upper surface of the semiconductor light-emitting device 1 are omitted from FIG. 1 to avoid cluttering the drawing.

[0072] The rear bottom portion L2 is a part of the upper surface of the semiconductor light emitting device 1 and is disposed behind the front bottom portion L1. In this embodiment, as shown in Fig. 5, a first P-side electrode 71 and a second P-side electrode 72 are disposed on the semiconductor laminate 1S at the rear bottom portion L2, but no pad electrode 73 is disposed thereon. Furthermore, no coating film 2F is disposed on the rear bottom portion L2.

[0073] Furthermore, no coating film 2F is disposed on the upper surface of the forward protrusion H1, and no coating film 2F is disposed on the rear surface (i.e., rear end surface) of the forward protrusion H1.

[0074] The forward protrusion H1 is disposed between the front bottom L1 and the rear bottom L2 and protrudes upward relative to the front bottom L1 and the rear bottom L2. In this embodiment, as shown in FIG. 5 , the first P-side electrode 71, the pad electrode 73, and the second P-side electrode 72 are disposed on the semiconductor laminate 1S in the forward protrusion H1. That is, the forward protrusion H1 according to this embodiment includes a portion of each of the first P-side electrode 71, the pad electrode 73, and the second P-side electrode. In this manner, the forward protrusion H1 includes a portion of the pad electrode 73, and thereby protrudes upward relative to the front bottom L1 and the rear bottom L2 that do not include the pad electrode 73.

[0075] The pad electrode 73 included in the forward protrusion H1 has a visor-shaped portion 73a at the end in the Y-axis direction. Furthermore, the pad electrode 73 included in the forward protrusion H1 has an inverted tapered shape in a cross section parallel to the YZ plane. That is, the width of the pad electrode 73 in the Y-axis direction increases with increasing distance from the semiconductor laminate 1S. Because the pad electrode 73 has such a shape, the second P-side electrode 72 formed on the pad electrode 73 is discontinuous between the forward protrusion H1 and the front bottom L1 and rear bottom L2. That is, the second P-side electrode 72 is not disposed on the side surface (end surface in the Y-axis direction) of the pad electrode 73.

[0076] The rear protrusion H2 is disposed behind the rear bottom L2 and protrudes upward relative to the front bottom L1 and the rear bottom L2. As shown in FIG. 5 , the first P-side electrode 71, the pad electrode 73, and the second P-side electrode 72 are disposed on the semiconductor laminate 1S in the rear protrusion H2. That is, the rear protrusion H2 according to this embodiment includes a portion of each of the first P-side electrode 71, the pad electrode 73, and the second P-side electrode. In this way, the rear protrusion H2 includes a portion of the pad electrode 73, and thereby protrudes upward relative to the front bottom L1 and the rear bottom L2, which do not include the pad electrode 73.

[0077] The rear protrusion H2 is disposed so as to cover the groove Te. Covering the groove Te not only prevents the diffusion of moisture in the air through cracks that may occur at the corners of the thin films (the insulating film 60 and the first p-side electrode 71) disposed on the groove Te, but also suppresses cracks in the semiconductor stack that originate from the groove Te.

[0078] The pad electrode 73 included in the rear protrusion H2 has a visor-shaped portion 73a at the end in the Y-axis direction, similar to the pad electrode 73 included in the forward protrusion H1. Furthermore, the pad electrode 73 included in the rear protrusion H2 has an inverted tapered shape in a cross section parallel to the YZ plane. Because the pad electrode 73 has such a shape, the second P-side electrode 72 formed on the pad electrode 73 by a vapor deposition method or the like is discontinuous between the rear protrusion H2 and the rear bottom L2. In other words, the second P-side electrode 72 is not formed on the side surface (end surface in the Y-axis direction) of the pad electrode 73. Furthermore, the coating film 2F is not disposed on the rear protrusion H2.

[0079] In this embodiment, the front bottom L1 and the front protrusion H1 are disposed contiguously. That is, the front bottom L1 and the front protrusion H1 are in contact with each other. Similarly, the front protrusion H1 and the rear bottom L2 are disposed contiguously, and the rear bottom L2 and the rear protrusion H2 are disposed contiguously. Furthermore, the heights of the front bottom L1 and the rear bottom L2 (i.e., the positions of the upper surfaces in the Z-axis direction) are the same, and the heights of the front protrusion H1 and the rear protrusion H2 are the same. The heights of the front protrusion H1 and the rear protrusion H2 from the front bottom L1 or the rear bottom L2 (i.e., the dimensions in the Z-axis direction) are, for example, 1.5 μm or more and 4.0 μm or less.

[0080] The length of the front bottom portion L1 in the direction of the optical axis Ax may be shorter than the length of the rear bottom portion L2 in the direction of the optical axis Ax, and may be longer than the length of the forward protrusion H1 in the direction of the optical axis Ax. For example, the length of the front bottom portion L1 (in this embodiment, the distance from the front end face 1F to the forward protrusion H1) may be 3 μm or more and 7 μm or less.

[0081] In this embodiment, the structure of the region near the rear end face 1R on the top surface of the semiconductor light emitting element 1 is the same as the structure of the region near the front end face 1F. That is, the structure of the region near the rear end face 1R has a structure that is symmetrical with respect to a plane that passes through the center of the semiconductor light emitting element 1 in the Y-axis direction and is parallel to the XZ plane. Note that the structure near the rear end face 1R is not limited to this. For example, the region near the rear end face 1R may not have a structure corresponding to the forward protrusion H1.

[0082] Although the present embodiment shows an example of semiconductor light emitting device 1 having window regions 30w near front end face 1F and rear end face 1R, the same effect can be achieved in a semiconductor light emitting device that does not have window regions. In this case, the configuration of the semiconductor light emitting device is the same as that of semiconductor light emitting device 1 according to the present embodiment, except for the window regions 30w.

[0083] [1-2. Overall Configuration of Semiconductor Light-Emitting Device] The overall configuration of the semiconductor light-emitting device according to this embodiment will be described with reference to Fig. 9 and Fig. 10. Fig. 9 and Fig. 10 are a schematic plan view and a cross-sectional view, respectively, showing the overall configuration of the semiconductor light-emitting device 5 according to this embodiment. Fig. 10 shows only a portion of the cross section of the semiconductor light-emitting device 5 passing through the optical axis Ax shown in Fig. 9 (a cross section parallel to the YZ plane in Fig. 9) including the front end face 1F.

[0084] 9 and 10 , a semiconductor light emitting device 5 according to the present embodiment includes a semiconductor light emitting element 1, a heat sink 7, and a bonding member 9. In the present embodiment, the semiconductor light emitting device 5 further includes a conductive layer 8.

[0085] The heat sink 7 is a base on which the semiconductor light emitting element 1 is mounted, and has the function of dissipating heat generated by the semiconductor light emitting element 1. There are no particular limitations on the material from which the heat sink 7 is made as long as it has high thermal conductivity. In this embodiment, the heat sink 7 is an AlN substrate.

[0086] The conductive layer 8 is a conductive member disposed on the main surface of the heat sink 7. In the present embodiment, as shown in Fig. 10 , the conductive layer 8 has a first conductive layer 81 disposed on the main surface of the heat sink 7 and a second conductive layer 82 covering the first conductive layer 81. The first conductive layer 81 is formed of, for example, Cu. The second conductive layer 82 is a multilayer film in which, for example, a Ni layer, a Pt layer, and an Au layer are stacked in this order from the first conductive layer 81 side.

[0087] The cleavage end facet 10C is located forward of the end facet in the optical axis Ax direction of the conductive layer 8. This prevents the conductive layer 8 from blocking light emitted from the semiconductor light-emitting element 1. On the other hand, if the distance D4 between the end facet in the optical axis Ax direction of the conductive layer 8 and the cleavage end facet 10C is too large, the bonding member 9 will have difficulty reaching the vicinity of the front end facet 1F, which may degrade the heat dissipation characteristics of the semiconductor light-emitting element 1. For this reason, the distance D4 may be greater than 1 μm and less than 10 μm. This prevents the conductive layer 8 from blocking light while also suppressing degradation of the heat dissipation characteristics of the semiconductor light-emitting element 1.

[0088] The bonding member 9 is a member that bonds the upper surface of the semiconductor light emitting element 1 to the heat sink 7. In the present embodiment, the bonding member 9 is disposed on the conductive layer 8 and is bonded to the heat sink 7 via the conductive layer 8, as shown in Fig. 10. The bonding member 9 is, for example, AuSn solder.

[0089] The bonding member 9 is bonded mainly to the second P-side electrode 72 of the semiconductor light emitting element 1. In this embodiment, the bonding member 9 is disposed from the second P-side electrode 72 included in the forward protrusion H1 to the second P-side electrode 72 included in the rear protrusion H2. The bonding member 9 is also bonded to the second P-side electrodes 72 included in each of the front bottom L1, the forward protrusion H1, the rear bottom L2, and the rear protrusion H2 of the semiconductor light emitting element 1. To press and bond the semiconductor light emitting element 1 toward the heat sink 7, the bonding member 9 extends beyond the forward protrusion H1 to the left in FIG. 10 , and a fillet portion is formed on the bonding member 9 on the front bottom L1. The height (height in the positive Z-axis direction) of the fillet portion gradually decreases from the upper surface of the forward protrusion H1 toward the front end surface 1F. The surface of the bonding member 9 at the fillet portion may be a concave curved surface. The bonding member 9 protrudes from the end of the conductive layer 8 on the front end surface 1F side, and the protruding portion covers part of the side surface on the front end surface 1F side of the conductive layer 8. In the bonding member 9, the fillet portion and the portion covering the front end surface side of the conductive layer are continuously connected, and the maximum height of the fillet portion may be higher than the height of the forward protrusion H1, as shown in Fig. 10. In other words, the bonding member 9 may cover the entire forward protrusion.

[0090] [1-3. Effects] The effects of the semiconductor light emitting element 1 and the semiconductor light emitting device 5 according to the present embodiment will be described in comparison with a semiconductor light emitting element and a semiconductor light emitting device of a comparative example. Fig. 11 is a cross-sectional view showing the configuration of a semiconductor light emitting device 905 including a semiconductor light emitting element 901 of the comparative example. Fig. 11 shows a portion of a cross section passing through the optical axis Ax of the semiconductor light emitting element 901 and parallel to the stacking direction of the semiconductor stack 1S included in the semiconductor light emitting element 901.

[0091] The semiconductor light-emitting element 901 of the comparative example differs from the semiconductor light-emitting element 1 of the present embodiment in that the pad electrode 73 is arranged from near the front end face 1F to near the rear end face 1R (not shown in Figure 11), but is identical in other respects.

[0092] In a semiconductor light emitting device 905 including the semiconductor light emitting element 901 of this comparative example, the Au pad electrode 73 is disposed up to the front end of the semiconductor laminate 1S, and the pad electrode 73 is joined to the joining member 9 and the heat sink 7 via the second P-side electrode 72. In this semiconductor light emitting device 905, heat generated near the front end face 1F can be dissipated to the heat sink 7 via the electrodes and the joining member 9, and therefore the heat dissipation characteristics are good.

[0093] The end face of the semiconductor light emitting device 901 of the comparative example is generally formed by forming a semiconductor laminate 1S, a first P-side electrode 71, a pad electrode 73, and a second P-side electrode 72 on a wafer, which is the base material of the substrate 10, and then cleaving the wafer. Furthermore, a coating film 2F is formed on the cleaved end face of the substrate 10 (and the semiconductor laminate 1S) formed by cleavage, thereby forming a front end face 1F. In this way, if the pad electrode 73 is formed up to the front end face 1F, which is the end face from which light is emitted, there is a problem in that the molten bonding material spreads beyond the front end face 1F of the semiconductor light emitting device 1 and covers part of the light-emitting surface. In this case, the bonding material may block light emitted from the front end face 1F.

[0094] In contrast, in the semiconductor light emitting element 1 according to the present embodiment, the top surface of the semiconductor light emitting element 1 and above the optical axis Ax are provided with: a front bottom L1 extending rearward from the front end face 1F; a rear bottom L2 located rearward of the front bottom L1; a front protrusion H1 located between the front bottom L1 and the rear bottom L2 and protruding upward relative to the front bottom L1 and the rear bottom L2; and a rear protrusion H2 located rearward of the rear bottom L2 and protruding upward relative to the front bottom L1 and the rear bottom L2. No pad electrode 73 is provided on the front bottom L1, and the rear protrusion H2 includes at least a portion of the pad electrode 73.

[0095] As described above, the semiconductor light emitting element 1 according to this embodiment has the front bottom portion L1 where the pad electrode 73 is not disposed near the front end face 1F, and therefore does not encounter a problem in which the molten bonding material spreads beyond the front end face 1F of the semiconductor light emitting element 1. Therefore, it is possible to prevent light from being blocked by the bonding material 9.

[0096] Furthermore, in the semiconductor light emitting element 1 according to this embodiment, the forward protrusion H1 prevents the formation of a coating film 2F behind the front surface of the forward protrusion H1. Therefore, for example, when the semiconductor light emitting element 1 is bonded to a heat sink 7 using a bonding member 9, the formation of the coating film 2F on the area other than the front surface of the forward protrusion H1, the rear bottom L2, and the rear protrusion H2 can prevent a decrease in wettability of the bonding member 9. This facilitates alloying between the bonding member 9 and the electrodes of the forward protrusion H1, the rear bottom L2, and the rear protrusion H2. For example, if the bonding member 9 is AuSn solder, it facilitates alloying with the Au of each electrode. Therefore, the bonding member 9 is sufficiently distributed from the rear protrusion H2 to the upper surface of the forward protrusion H1. This further extends the bonding member 9 from the upper surface of the forward protrusion H1 to the front bottom L1, forming a fillet. Therefore, heat generated near the front end face 1F can be dissipated to the heat sink 7 via this fillet portion, thereby suppressing deterioration in the heat dissipation characteristics of the semiconductor light emitting element 1 and the semiconductor light emitting device 5 including it.

[0097] Furthermore, the semiconductor light-emitting element 1 according to this embodiment has a coating film formed on the front end face 1F, the front bottom L1, and the front surface of the forward protrusion H1, and the coating film 2F does not have to be formed on the rear surface of the forward protrusion H1.

[0098] This can suppress a decrease in wettability of the rear surface of the forward protrusion H1 with respect to the joining member 9, which facilitates alloying between the electrodes included in the forward protrusion H1 and the joining member 9. This facilitates the formation of a fillet portion of the joining member 9 between the forward protrusion H1 and the front bottom L1.

[0099] In the semiconductor light emitting element 1 according to this embodiment, the forward protrusion H1 may include a part of the pad electrode 73 .

[0100] This allows the forward protrusion H1 to be formed simultaneously with the rearward protrusion H2 including at least a part of the pad electrode 73, thereby simplifying the manufacturing process of the forward protrusion H1.

[0101] In the semiconductor light emitting element 1 according to this embodiment, the distance from the front end facet 1F to the forward protrusion H1 may be not less than 3 μm and not more than 7 μm.

[0102] If this distance is too small, the pad electrode 73 included in the forward protrusion H1 may deform during the cleavage process that is generally included in the manufacturing process of the semiconductor light emitting element 1. On the other hand, if this distance is too long, when the semiconductor light emitting element 1 is mounted on a heat sink 7 or the like, it becomes difficult for the bonding member 9 or the like to reach the vicinity of the front end face 1F, thereby degrading the heat dissipation characteristics of the semiconductor light emitting element 1. Therefore, by setting this distance to be equal to or greater than 3 μm and equal to or less than 7 μm, it is possible to more reliably suppress the degradation of the heat dissipation characteristics while suppressing the blocking of light at the front end face.

[0103] Furthermore, in the semiconductor light emitting element 1 according to this embodiment, the distance from the forward protrusion H1 to the rearward protrusion H2 may be 10 μm or more and 35 μm or less. In this embodiment, it is 20 μm. If it is 20 μm, when a joining member 9 made of AuSn solder with a thickness of 4.0 μm is used and heated at a predetermined heating temperature for a predetermined time, the joining member 9 melts and spreads, so that it can straddle the forward protrusion H1 and the rearward protrusion H2.

[0104] The heating temperature of the bonding members 9 may be, for example, 320°C or higher and 350°C or lower. By setting the heating temperature to 320°C or higher, the bonding members 9 can be sufficiently melted and spread. Furthermore, by setting the heating temperature to 360°C or lower, excessive alloying reaction between the bonding members 9 and each electrode can be suppressed, thereby suppressing deformation of each electrode. Therefore, application of non-uniform stress to the semiconductor light-emitting element 1 due to deformation of each electrode can be suppressed, thereby suppressing a decrease in the deflection ratio and reliability of the semiconductor light-emitting element 1. In this embodiment, the heating temperature is 330°C.

[0105] The heating time of the bonding members 9 may be, for example, 3 seconds or more and 20 seconds or less. By setting the heating time to 3 seconds or more, the bonding members 9 can be sufficiently melted and spread. Furthermore, by setting the heating time to 20 seconds or less, excessive alloying reaction between the bonding members 9 and each electrode can be suppressed, thereby suppressing deformation of each electrode. Therefore, application of non-uniform stress to the semiconductor light emitting element 1 due to deformation of each electrode can be suppressed, thereby suppressing deterioration in the deflection ratio and reliability of the semiconductor light emitting element 1. In this embodiment, the heating time is 3 seconds.

[0106] Furthermore, the semiconductor light-emitting element 1 according to this embodiment includes a second P-side electrode 72 arranged above the first P-side electrode 71 and the pad electrode 73, and the second P-side electrode 72 arranged on the front bottom L1 and the rear bottom L2 may be spaced apart from the pad electrode 73 included in the forward protrusion H1.

[0107] When the bonding member 9 and the second P-side electrode 72 are bonded, the bonding member 9 bonded to the second P-side electrode 72 on the rear protrusion H2 melts and spreads forward, protruding from the rear protrusion H2 and contacting the second P-side electrode 72 at the rear bottom L2. The molten bonding member 9 spreads in the front-rear direction at the rear bottom L2, but as shown in FIG. 10 , the effect of preventing the liquid from spreading at the boundary between the high-wettability and low-wettability portions (the so-called pinning effect) is exerted. This configuration therefore prevents contact between the bonding member 9 and the pad electrode 73. That is, Sn in the bonding member 9 diffuses to the pad electrode 73 included in the forward protrusion H1, preventing the pad electrode 73 included in the forward protrusion H1 from being alloyed. This prevents a deterioration in heat dissipation characteristics due to alloying of the pad electrode 73 included in the forward protrusion H1.

[0108] Furthermore, the semiconductor light-emitting element 1 according to this embodiment includes a second P-side electrode 72 arranged above the first P-side electrode 71 and the pad electrode 73, and the second P-side electrode 72 may have a barrier layer containing at least one of Ti, Pt, and Cr.

[0109] This makes it possible to suppress the diffusion of impurities such as oxygen to the pad electrode 73 and the first P-side electrode 71 via the second P-side electrode 72. Furthermore, when a member containing Sn, such as the bonding member 9, is bonded to the second P-side electrode 72, it is possible to more reliably suppress the diffusion of Sn to the pad electrode 73 and the first P-side electrode 71 via the second P-side electrode 72. Therefore, it is possible to more reliably suppress the increase in resistance and the decrease in thermal conductivity caused by the deterioration of the Au layer of the first P-side electrode 71 and the pad electrode 73.

[0110] Moreover, the semiconductor light emitting device 5 according to this embodiment includes a semiconductor light emitting element 1, a heat sink 7, and a bonding member 9 that bonds the upper surface of the semiconductor light emitting element 1 to the heat sink 7. The semiconductor light emitting element 1 includes a first P-side electrode 71 and a second P-side electrode 72 that is disposed above the pad electrode 73. Each of the forward protrusion H1 and the rear protrusion H2 includes a portion of the second P-side electrode 72, and the bonding member 9 may be disposed from the second P-side electrode 72 included in the forward protrusion H1 to the second P-side electrode 72 included in the rear protrusion H2.

[0111] This increases the contact area between the bonding member 9 and the semiconductor light emitting element 1, thereby improving the heat dissipation characteristics. Furthermore, the shape of the bonding member 9 after melting is less variable, so stable heat dissipation characteristics can be obtained.

[0112] Furthermore, in the semiconductor light-emitting device 5 according to the present embodiment, the semiconductor light-emitting element 1 includes a second P-side electrode 72 disposed above the first P-side electrode 71 and the pad electrode 73. The rear bottom portion L2 and the rear protrusion H2 each include a portion of the second P-side electrode 72, and the rear protrusion H2 includes a portion of the pad electrode 73, and the pad electrode 73 included in the rear protrusion H2 and the bonding member 9 may be spaced apart.

[0113] This makes it possible to prevent Sn in the bonding member 9 from diffusing into the pad electrode 73 and alloying the pad electrode 73. Therefore, it is possible to prevent the pad electrode 73 from becoming high in resistance and from having a reduced heat dissipation characteristic.

[0114] In the semiconductor light emitting device 5 according to the present embodiment, the pad electrode 73 included in the forward protrusion H1 and the bonding member 9 may be spaced apart.

[0115] This prevents Sn and other elements contained in the joining member 9 from diffusing into the pad electrode 73, thereby preventing the pad electrode 73 from being alloyed, and therefore prevents a decrease in heat dissipation characteristics due to alloying of the pad electrode 73 contained in the forward protrusion H1.

[0116] The first p-side electrode 71 may also include an Au film with a film thickness of 100 nm to 300 nm as the uppermost layer.

[0117] In this way, by setting the thickness of the Au film included in the first p-side electrode 71 to 100 nm or more, it is possible to prevent a shortage of Au at the rear bottom portion L2 that undergoes an alloying reaction with the joining members 9. Therefore, it is possible to prevent a shortage of Au at the rear bottom portion L2 that undergoes an alloying reaction with the joining members 9 from making it difficult for the joining members 9 to climb over the forward protrusion H1.

[0118] Furthermore, by making the thickness of the Au film included in the first P-side electrode 71 300 nm or less, it is possible to suppress a decrease in cleavability in the cleavage step of the method for manufacturing the semiconductor light emitting element 1 described later.

[0119] The second p-side electrode 72 may also include an Au film with a thickness of 100 nm to 300 nm as the uppermost layer.

[0120] In this way, by setting the film thickness of the Au film included in the second p-side electrode 72 to 100 nm or more, it is possible to prevent a shortage of Au at the rear bottom portion L2 that undergoes an alloying reaction with the joining members 9. Therefore, it is possible to prevent a situation in which a shortage of Au that undergoes an alloying reaction with the joining members 9 at the rear bottom portion L2 makes it difficult for the joining members 9 to climb over the forward protrusion H1.

[0121] Furthermore, by making the thickness of the Au film included in the second P-side electrode 72 300 nm or less, it is possible to suppress a decrease in cleavability in the cleavage step of the method for manufacturing the semiconductor light emitting element 1 described later.

[0122] [1-4. Manufacturing Method of Semiconductor Light-Emitting Device] A manufacturing method of the semiconductor light-emitting device 1 according to this embodiment will be described with reference to FIGS. 12 to 35. FIGS. 12 to 31 are schematic cross-sectional views illustrating the steps of the manufacturing method of the semiconductor light-emitting device 1 according to this embodiment. FIGS. 12, 13, 15, 17, 19, 21, 23, 24, 26, 29, and 23 illustrate a cross section corresponding to line II-II of the semiconductor light-emitting device 1 shown in FIG. 1. FIGS. 14, 16, 18, 20, 22, 25, 27, 30, and 24 illustrate a cross section corresponding to line III-III of the semiconductor light-emitting device 1 shown in FIG. 1. FIGS. 28 and 31 illustrate a cross section passing through the forward protrusion H1 of the semiconductor light-emitting device 1 and parallel to the ZX plane. FIG. 32 is a schematic perspective view illustrating the configuration of the substrate base material 10M according to this embodiment. FIG. 33 is a schematic perspective view illustrating a cleavage step of the manufacturing method of the semiconductor light-emitting device 1 according to this embodiment. 34 and 35 are a schematic perspective view and a cross-sectional view, respectively, showing the steps of forming the coating films 2F and 2R in the method for manufacturing the semiconductor light emitting device 1 according to this embodiment.

[0123] First, a semiconductor laminate 1S having a waveguide is formed on a substrate 10. Specifically, as shown in Fig. 12, a substrate base material, which is a wafer including the substrate 10, is prepared, and the semiconductor laminate 1S is formed above the substrate base material. The process of forming each semiconductor layer includes a step of forming an N-type semiconductor layer 20 above the substrate 10, a step of forming an active layer 30 above the N-type semiconductor layer 20, a step of forming a P-type cladding layer 40 above the active layer 30, and a step of forming a contact layer 50 above the P-type cladding layer 40.

[0124] In this embodiment, the step of forming each semiconductor layer further includes a step of forming a cap layer 55 on the contact layer 50. The cap layer 55 functions as a mask for forming a window region 30w in the active layer 30. The cap layer 55 includes, for example, a GaInP layer on the contact layer 50 and an AlGaAs layer on the GaInP layer.

[0125] Each semiconductor layer is formed by crystal growth using, for example, MOCVD (Metalorganic Chemical Vapor Deposition).

[0126] Next, a window region 30w is formed in a region of the active layer 30 corresponding to the vicinity of the front end facet 1F. Specifically, for example, by annealing the semiconductor laminate 1S, the window region 30w can be formed in the vicinity of the front end facet 1F of the active layer 30 that is not masked by the cap layer 55. In this embodiment, the window region 30w is also formed in a region corresponding to the vicinity of the rear end facet 1R.

[0127] 13 and 14, the cap layer 55 is removed, thereby forming the active layer 30 having a window region 30w in the region near the front end facet 1F, as shown in FIG.

[0128] Next, a ridge R is formed in a region including the P-type cladding layer 40 and the contact layer 50. The process of forming the ridge R includes a step of forming an upper ridge Ru and a step of forming a lower ridge Rd (see FIG. 17 described later) after the step of forming the upper ridge Ru. First, as shown in FIGS. 15 and 16 , the upper ridge Ru is formed. In this embodiment, the upper wing portions Gu are also formed at the same time. Also, in this embodiment, wet etching is used in the step of forming the upper ridge Ru. This makes it possible to incline the side surfaces of the upper ridge Ru so that the upper ridge Ru has a forward mesa shape. Therefore, it is possible to improve the adhesion between the side surfaces of the upper ridge Ru and the insulating film 60.

[0129] At the same time, a groove Te is also formed. Since the extension direction of the groove Te is 90 degrees different from the extension direction of the side surface of the upper ridge Ru, the side surface of the groove Te is inclined from the top surface of the semiconductor light-emitting element 1 toward the groove direction, and the width of the groove Te at its lower end is wider than the width at its upper end.

[0130] In this process, specifically, SiO ２A mask consisting of a material such as a silicon dioxide film or the like is formed in a predetermined pattern. Then, wet etching is used to remove the portions of the contact layer 50 that are not covered by the mask. The chemical solution used for etching and the configuration of each semiconductor layer are determined so that the etching rate of the second etching stop layer 45 is slower than that of the contact layer 50 when wet etching is performed. This makes it easier to stop etching at the second etching stop layer 45. In other words, the controllability of the heights of the upper ridge Ru and the upper wing portions Gu can be improved. In this embodiment, the contact layer 50 and a portion of the second etching stop layer 45 are removed by wet etching.

[0131] The predetermined pattern may be a pattern that can remove the outer periphery of the upper ridge Ru in a planar view and the portion extending in the front-to-rear direction of the side of the upper ridge Ru relative to the optical axis, similar to the pattern shown by the dashed line in Figure 1.

[0132] Furthermore, in this embodiment, the second etching stop layer 45 has constant regions 45a and 45c (see FIG. 8) in which the Al composition ratio is constant with respect to the position in the stacking direction, and therefore etching can be more reliably stopped in the second etching stop layer 45 than when the entire second etching stop layer 45 is made up of inclined regions.

[0133] The chemical solution used for etching may be, for example, a solution containing tartaric acid and hydrogen peroxide, the mixture ratio of which is, for example, 2:1.

[0134] By the above-described method, it is possible to form an upper ridge Ru and upper wing portions Gu having a forward mesa shape in a cross section perpendicular to the light propagation direction, as shown in Figures 15 and 16. Note that, as shown in Figure 16, the upper ridge Ru is not formed in the region corresponding to the trench Te. As shown in Figure 5, in a cross section parallel to the light propagation direction (and the stacking direction) of the upper ridge Ru, the side surfaces of the trench Te are inclined from the top surface of the semiconductor light-emitting element 1 toward the trench direction, and have a shape in which the width of the lower end of the trench Te is wider than the width of the upper end of the trench Te.

[0135] Next, after forming the upper ridge Ru and the upper wing portions Gu as described above, the lower ridge Rd and the lower wing portions Gd are formed as shown in Figures 17 and 18. In this embodiment, wet etching is used in the process of forming the lower ridge Rd. Specifically, SiO ２ A mask made of, for example, a SiO 2 mask is formed to cover the upper ridge Ru and the upper wing portions Gu. The mask pattern can be similar to the pattern shown by the dashed lines in FIG. 1 , and can have openings only in regions parallel to the upper ridge Ru within the exposed region of the second etching stop layer 45. Then, using wet etching, the P-type cladding layer 40 is etched down to the first etching stop layer 43 in the regions not covered by the mask, forming trenches T. This allows the lower ridge Rd and the lower wing portions Gd to be formed. The chemical solution used for the wet etching and the composition of each semiconductor layer are determined so that the etching rate of the first etching stop layer 43 is slower than that of the second cladding layer 44. This makes it easier to stop etching at the first etching stop layer 43. In other words, the heights of the lower ridge Rd and the lower wing portions Gd can be more easily controlled. In this embodiment, the second etching stop layer 45, the second cladding layer 44, and part of the first etching stop layer 43 are removed by wet etching.

[0136] The chemical solution used for etching may be, for example, a solution containing sulfuric acid, hydrogen peroxide, and water, with the mixture ratio of sulfuric acid, hydrogen peroxide, and water being, for example, 1:1:6.

[0137] 17 and 18, the lower ridge Rd and the lower wing Gd can be formed. In this embodiment, as shown in FIG. 1, the lower ridge Rd and the lower wing Gd are continuous from near the end of the P-type cladding layer 40 on the front end facet 1F side to near the end on the rear end facet 1R side.

[0138] Dry etching may be used in the process of forming the lower ridge Rd. Using dry etching improves the controllability of the film thickness removed by etching. This reduces the effective refractive index difference ΔN between the inside and outside of the ridge R of the semiconductor light-emitting element 1 and the individual differences in the divergence angle of the emitted light. Here, the effective refractive index difference refers to the difference between the effective refractive index n0 for light at the ridge R and below the ridge R and the effective refractive index n1 on the outside in the width direction of the ridge R. The outside in the width direction of the ridge R refers to the outside (in the X-axis direction) of the maximum width position of the ridge R. The effective refractive index is the product of the distribution of light guided through the semiconductor light-emitting element 1 (in this embodiment, the light distribution generated during laser oscillation) and the refractive index distribution of the semiconductor light-emitting element 1. Dry etching can be performed, for example, by employing (chemical) reactive etching to form the lower ridge Rd and lower wing portions Gd having the above-described shapes. Examples of dry etching gases include SiCl ４ can be used.

[0139] As described above, a semiconductor laminate 1S having a waveguide can be formed.

[0140] 19 and 20 , recesses 3 recessed in the width direction of the semiconductor light emitting element 1 are formed at the ends in the width direction of the semiconductor light emitting element 1. The recesses 3 are part of separation grooves used to separate the semiconductor light emitting elements 1. That is, in a state in which multiple semiconductor stacks are connected in the X-axis direction as shown in FIGS. 17 and 18 , separation grooves are formed between adjacent semiconductor stacks, and the semiconductor stacks are separated along the separation grooves. This forms the recesses 3 as shown in FIGS. 19 and 20 .

[0141] 21 , an insulating film 60 is formed on the ridge R. The insulating film 60 continuously covers from the side surface Rds of the lower ridge Rd to a part of the top surface of the upper ridge Ru. In this embodiment, the insulating film 60 is formed on the entire top surface of the semiconductor stack 1S shown in FIGS. 21 and 22 . In this embodiment, a silicon nitride film is formed as the insulating film 60 by using a CVD method or the like.

[0142] 23, an opening 60a is formed in a region of the insulating film 60 that corresponds to the top surface of the upper ridge Ru. Specifically, a mask is formed in a region of the insulating film 60 other than the region that corresponds to the opening 60a. The region of the insulating film 60 that corresponds to the opening 60a is, for example, etched to form the opening 60a.

[0143] 24 and 25 , a first P-side electrode 71 is formed above the semiconductor stacked body 1S. The first P-side electrode 71 is formed at least in the opening 60a of the insulating film 60. In the present embodiment, the first P-side electrode 71 continuously covers from the upper surface of one upper wing portion Gu to the upper surface of the other upper wing portion Gu. The first P-side electrode 71 is formed using, for example, photolithography and vapor deposition.

[0144] Next, as shown in FIGS. 26 to 28 , a pad electrode 73 is formed above the first P-side electrode 71. The pad electrode 73 is formed at least above the opening 60a of the insulating film 60. In this embodiment, the pad electrode 73 continuously covers the region on the first P-side electrode 71, from the upper surface of one upper wing portion Gu to the upper surface of the other upper wing portion Gu. As shown in FIG. 28 , the pad electrode 73 is also formed above the region of the first P-side electrode 71 corresponding to the forward protrusion H1. In this manner, at least a portion of the forward protrusion H1 and the rear protrusion H2 are formed in the process of forming the pad electrode 73. This simplifies the process of forming the forward protrusion H1. The pad electrode 73 is formed, for example, by a plating method using a mask. As shown in FIGS. 26 to 28 (and FIG. 5 ), the pad electrode 73 may have overhanging portions 73a at the X-axis and Y-axis ends. For example, it is possible to form the overhanging portion by forming a plating film thicker than the mask and then removing the mask.

[0145] 29 to 31, the second P-side electrode 72 is formed. The second P-side electrode 72 is formed in a region on the pad electrode 73, at least above the opening 60a of the insulating film 60. In this embodiment, the second P-side electrode 72 covers the entire upper surface of the pad electrode 73. The second P-side electrode 72 also covers at least a portion of the upper surface of the first P-side electrode 71 arranged on the periphery of the pad electrode 73. The second P-side electrode 72 does not need to cover the region of the side surface of the pad electrode 73 below the overhanging portion 73a. The second P-side electrode 72 is formed using, for example, photolithography and vapor deposition.

[0146] 2, 3, and 5, an N-side electrode 80 is formed on the lower surface of the substrate 10 (the main surface of the substrate 10 behind the main surface on which the semiconductor layers are stacked). The lower surface of the substrate 10 may be polished before forming the N-side electrode 80. The N-side electrode 80 is formed at least at a position facing the opening 60a of the insulating film 60. The N-side electrode 80 is formed using, for example, photolithography and vapor deposition.

[0147] Next, the substrate base material including the substrate 10 and on which the semiconductor laminate 1S and the like are stacked is cleaved to form cleaved facets 10C. In this process, as shown in FIG. 32, the substrate base material 10M on which a plurality of semiconductor laminates 1S and the like corresponding to a plurality of semiconductor light-emitting elements 1 are stacked is cleaved at positions corresponding to the front and rear end faces of the semiconductor light-emitting elements 1. This forms a bar-shaped substrate 10B as shown in FIG. 33. The bar-shaped substrate 10B is a component in which substrates 10 corresponding to a plurality of semiconductor light-emitting elements 1 are connected in the horizontal direction, and a plurality of semiconductor laminates 1S and the like corresponding to the plurality of semiconductor light-emitting elements 1 are stacked. This forms cleaved facets 10C, which are the end faces of the substrate 10 and the semiconductor laminate 1S.

[0148] Next, coating films 2F and 2R are formed on the pair of cleavage facets 10C, respectively, to form the front end facet 1F and the rear end facet 1R. In this embodiment, as shown in FIGS. 34 and 35 , the bar-shaped substrate 10B is sandwiched between spacers 10S so that the cleavage facets 10C are substantially flush with the side surfaces of the spacers 10S. In this state, the coating film 2F is formed on the cleavage facets 10C by, for example, sputtering. As the sputtering, for example, ECR (Electron Cyclotron Resonance) sputtering can be used. This forms the front end facet 1F as shown in FIG. 35 . Furthermore, in this embodiment, the bar-shaped substrate 10B has a front bottom portion L1 and a front protrusion portion H1 that protrudes upward from the front bottom portion L1, thereby forming a gap between the front bottom portion L1 and the spacer. Therefore, not only is the sputtering material (e.g., a dielectric material) deposited on the cleavage end facet 10C, but the sputtering material entering through the gap is also deposited on the front bottom L1 and the front surface of the forward protrusion H1. Furthermore, since the bar-shaped substrate 10B has an N-side electrode formed on the rear surface of the substrate (the surface behind the main surface on which the semiconductor laminate 1S of the substrate 10 is formed) at a distance rearward from the front end facet, a narrow gap is also formed between the rear surface of the substrate and the spacer. Therefore, some of the sputtering material entering through the gap is also deposited near the front end facet on the rear surface of the substrate. Therefore, in this embodiment, the coating film 2F is continuous from the rear surface of the substrate through the cleavage end facet 10C to the front bottom L1. While FIG. 35 shows the coating film 2F, the coating film 2R is also similarly formed on the other cleavage end facet 10C to form the rear end facet 1R.

[0149] Next, the plurality of semiconductor light emitting elements 1 included in the bar-shaped substrate 10B are separated into individual pieces. Specifically, the bar-shaped substrate 10B is divided along the recesses 3 that function as element isolation grooves. This allows the semiconductor light emitting element 1 according to this embodiment to be manufactured. The manufacturing method for the semiconductor light emitting element 1 according to this embodiment provides the same effects as those described above for the semiconductor light emitting element 1.

[0150] [1-5. Method for Manufacturing Semiconductor Light-Emitting Device] A method for manufacturing the semiconductor light-emitting device 5 will be described with reference to Fig. 36. Fig. 36 is a flowchart showing a method for manufacturing the semiconductor light-emitting device 5 according to this embodiment.

[0151] As shown in FIG. 36, first, the semiconductor light emitting device 1 is manufactured as described above (S10).

[0152] Next, the upper surface of the semiconductor light emitting element 1 is bonded to the heat sink 7 using a bonding member 9 (S20). In this embodiment, as shown in Figures 9 and 10, the upper surface of the semiconductor light emitting element 1 is bonded to the heat sink 7 via the conductive layer 8 by the bonding member 9.

[0153] This completes the manufacturing process of the semiconductor light emitting device 5. The manufacturing method of the semiconductor light emitting device 5 according to this embodiment provides the same effects as those described above for the semiconductor light emitting element 1 and the semiconductor light emitting device 5.

[0154] [1-6. Other Examples] Other examples of the semiconductor light emitting device 1 according to the present embodiment will be described with reference to FIGS. 37 to 40. FIG. 37 is a diagram showing an example of the configuration of each layer of the contact layer 50, the P-type cladding layer 40, and the active layer 30 in Example 1. FIG. 38 is a diagram showing an example of the configuration of each layer of the N-type semiconductor layer 20 and the substrate 10 in Example 1. FIG. 39 is a diagram showing an example of the configuration of each layer of the contact layer 50, the P-type cladding layer 40, and the active layer 30 in Example 2. FIG. 40 is a diagram showing an example of the configuration of each layer of the N-type semiconductor layer 20 and the substrate 10 in Example 2.

[0155] 37 and 38 , Example 1 differs from the above-described configuration mainly in the configurations of the N-type cladding layer 23, the N-side guide layer 32, and the P-side guide layer 36. In this example, the N-type cladding layer 23 has a first N-type cladding layer 23 a, a 2DEG layer 23 b, and a second N-type cladding layer 23 c, the N-side guide layer 32 has a first N-side guide layer 32 a and an N-side carrier block layer 32 b, and the P-side guide layer 36 has a P-side carrier block layer 36 a and a first P-side guide layer 36 b. Here, the 2DEG layer 23 b is a layer that generates two-dimensional electron gas.

[0156] In Example 1, the 2DEG layer 23b is an undoped Al layer having a thickness of 0.005 μm. ０．２４ Ga ０．７６ As layer and concentration 2.0 × 10 １８ cm －３ Si-doped N-type Al film with a thickness of 0.005 μm ０．２８ Ga ０．７２ The N-side carrier blocking layer 32b includes a layer having a lower valence band energy position than the first N-side guide layer 32a, is doped with Si, and is thin enough not to affect the optical guiding. The P-side carrier blocking layer 36a includes a layer having a higher conduction band energy position than the first P-side guide layer 36b, is doped with C, and is thin enough not to affect the optical guiding.

[0157] The use of such an N-type cladding layer 23 enables the resistance of the N-type cladding layer 23 to be reduced. Additionally, by using such an N-side guide layer 32 and a P-side guide layer 36, the N-side carrier block layer 32b suppresses holes from leaking out of the well layer 34, and the P-side carrier block layer 36a suppresses electrons from leaking out of the well layer 34. Effectively confining holes and electrons in the well layer 34 reduces the oscillation threshold current and improves light-emitting efficiency, thereby enabling a reduction in the operating current value. This reduces heat generation in the semiconductor light-emitting element 1, thereby improving the reliability of the semiconductor light-emitting element 1. Furthermore, although the N-side barrier layer 33 and the P-side barrier layer 35 have different thicknesses, this has almost no effect on heat generation.

[0158] [1-6-2. Example 2] As shown in Figures 39 and 40, Example 2 differs from the above-described configurations mainly in the configurations of the N-type cladding layer 23, the N-side guide layer 32, and the P-side guide layer 36. In this example, these layers use AlGaAsP, which has a band gap approximately the same as that of AlGaAs but a different lattice constant. Because there is a positive correlation between the band gap and the refractive index, adjusting the composition ratio of the constituent elements of these layers can reduce the amount of strain in the stacking direction without affecting optical confinement. This reduces the amount of warpage of the semiconductor light-emitting element 1. By reducing the amount of warpage of the semiconductor light-emitting element 1 in this way, the wettability of the semiconductor light-emitting element 1 to the bonding member 9 near the front end face 1F can be improved when the semiconductor light-emitting element 1 is used as a heat sink 7 or the like.

[0159] (Embodiment 2) A semiconductor light emitting element and a semiconductor light emitting device according to embodiment 2 will be described. The semiconductor light emitting element according to this embodiment differs from the semiconductor light emitting element 1 according to embodiment 1 in the configuration of the forward protrusion H1. The semiconductor light emitting element and semiconductor light emitting device according to this embodiment will be described below with reference to FIG. 41 , focusing on the differences from the semiconductor light emitting element 1 and semiconductor light emitting device 5 according to embodiment 1.

[0160] 41 is a schematic top view showing the configuration of the forward protrusion H1 of the semiconductor light emitting device 101 according to this embodiment. As shown in FIG. 41 , the forward protrusion H1 of the semiconductor light emitting device 101 according to this embodiment is arranged discontinuously in a direction along the front end face 1F. In other words, the forward protrusion H1 is formed discontinuously in a lateral direction (i.e., X-axis direction) perpendicular to the stacking direction and the optical axis direction (i.e., Y-axis direction). In the example shown in FIG. 41 , the forward protrusion H1 has a plurality of continuous regions H1C and one or more gap regions H1G.

[0161] Each of the multiple continuous regions H1C is a region that protrudes upward relative to the front bottom L1 and the rear bottom L2. Each of the one or more gap regions H1G is a region that is located between two adjacent continuous regions H1C among the multiple continuous regions H1C and does not protrude upward relative to the front bottom L1 and the rear bottom L2. In this embodiment, the multiple continuous regions H1C include a portion of the pad electrode 73, and the pad electrode 73 is not disposed in each of the one or more gap regions H1G. Therefore, the position of the upper surface of each of the one or more gap regions H1G in the stacking direction is equal to the position of the upper surfaces of the front bottom L1 and the rear bottom L2 in the stacking direction.

[0162] The effects of such a semiconductor light-emitting element 101 will be described with reference to FIGS. 42 and 43. FIGS. 42 and 43 are schematic cross-sectional views showing the overall configuration of a semiconductor light-emitting device 105 according to this embodiment. FIG. 42 shows a cross section parallel to the YZ plane and passing through a gap region H1G of the forward protrusion H1 of the semiconductor light-emitting element 101. FIG. 43 shows a cross section parallel to the YZ plane and passing through a continuous region H1C of the forward protrusion H1 of the semiconductor light-emitting element 101. In FIG. 42, the position of the forward protrusion H1 is indicated by a dashed line so that the positional relationship between the forward protrusion H1 (continuous region H1C) and the rear bottom L2 and the like can be seen.

[0163] As shown in FIG. 42 , the gap region H1G does not protrude upward relative to the front bottom portion L1 and the rear bottom portion L2. Therefore, the molten bonding material 9 spreads into the gap region H1G, starting from a highly wettable region of the rear bottom portion L2 located behind the forward protrusion H1. Since the gap region H1G does not have an upward protruding region, the bonding material 9 can easily pass through the gap region H1G and reach the vicinity of the front end surface 1F (see the flow direction of the bonding material 9 indicated by the dashed arrow in FIG. 41 ). That is, the bonding material 9 extends from the gap region H1G to a position forward of the forward protrusion H1. In this embodiment, the bonding material 9 extends from the rear bottom portion L2 to the gap region H1G and to a position forward of the forward protrusion H1. Meanwhile, as shown in FIG. 43 , the continuous region H1C protrudes upward relative to the rear bottom portion L2. Therefore, the molten joining material 9 does not extend beyond the forward protrusion H1 and contact the forward bottom L1, but rather the joining material spreads through the gap region H1G to the forward bottom L1, and may then spread laterally and pass through the continuous region H1C and be present at the forward bottom in a cross section parallel to the YZ plane.

[0164] Therefore, particularly in a cross-sectional view of the gap region H1G, a fillet portion made of the joining member 9 extending from the forward protrusion H1 to the front bottom L1 is easily formed. In the joining member 9 according to this embodiment, the height of the fillet portion gradually decreases from the upper surface of the forward protrusion H1 toward the front end face 1F. The fillet portion of the joining member 9 according to this embodiment will be described below with reference to FIG. 43 . As shown in FIG. 43 , the surface 9FG of the fillet portion located in front of the gap region H1G of the forward protrusion H1 may have a concave shape in cross section near the center of the gap region. Because heat generated near the front end face 1F can be dissipated to the heat sink 7 via such a fillet portion, deterioration of the heat dissipation characteristics of the semiconductor light emitting element 101 and the semiconductor light emitting device 105 including the same can be suppressed.

[0165] Although the material of the coating film 2F can easily pass through the gap region H1G during the formation of the coating film 2F, the continuous region H1C can block at least a portion of the material of the coating film 2F. Therefore, compared to the case where the forward protrusion H1 is not present, the formation of the coating film 2F on the rear bottom portion L2 and the rear protrusion H2 can be suppressed.

[0166] 41 , the width of the gap region H1G in the lateral direction may be larger than the width of the continuous region H1C in the lateral direction. This prevents the material of the coating film 2F from invading rearward from the gap region H1G without interfering with the flow from the rear bottom L2 to the front bottom L1 of the bonding member 9. For example, specifically, in this embodiment, the width of the continuous region H1C in the lateral direction is 8 μm, and the width of the gap region H1G in the lateral direction is 12 μm.

[0167] It should be noted that the configuration of the forward protrusion H1 according to this embodiment is not limited to the example shown in Fig. 41. Configuration examples of the forward protrusion H1 will be described below with reference to Fig. 44 to Fig. 47. Fig. 44 to Fig. 47 are schematic top views showing configuration examples of the forward protrusion H1 according to this embodiment.

[0168] 44, the continuous regions H1C may be arranged in two rows, with one row of continuous regions H1C positioned behind the gap regions H1G in the other row. In other words, the continuous regions H1C may be arranged in a staggered pattern to prevent gaps when viewed from the front end face 1F. While the flow of raw material by sputtering or the like is linear, the flow of solder can change direction midway. This configuration allows the flow of the joining member 9 from the rear bottom L2 to the front bottom L1 to be completely unimpeded, and almost completely prevents the coating film 2F from being formed behind the forward protrusion H1.

[0169] 41 and 44, the continuous region H1C has a rectangular shape in top view. However, the shape of the continuous region H1C does not have to be rectangular. For example, as shown in FIG. 45, the continuous region H1C may have a diamond shape in top view. The vertices of the diamond-shaped continuous region H1C in top view are positioned opposite the vertices of the adjacent continuous region H1C, and a gap region H1G is defined between the opposing vertices of the two adjacent continuous regions H1C. This allows the end face of the continuous region H1C to be inclined relative to the flow direction from the rear bottom portion L2 toward the front end surface 1F of the joining member 9 (i.e., the negative Y-axis direction). This prevents the flow toward the front end surface 1F of the joining member 9 from being obstructed compared to when the end face is perpendicular to the flow direction of the joining member 9 (see the dashed arrow in FIG. 45). Furthermore, since the end face of the continuous region H1C on the front end face 1F side is inclined with respect to the flow direction of the joining material 9, the width of the gap region H1G increases as it approaches the front end face 1F, making it easier for the joining material 9 that passes through the gap to expand, and since the area of ​​the forward protrusion H1 can be secured to a certain extent, heat dissipation via the pad electrode can be almost maintained.

[0170] Furthermore, as shown in FIG. 46 , the shape of the continuous region H1C in a top view may be hexagonal. In the example shown in FIG. 46 , two adjacent hexagonal continuous regions H1C are arranged with one side facing each other. This provides the same effect as the diamond-shaped continuous region H1C shown in FIG. 45 . Furthermore, in the example shown in FIG. 46 , the change in the lateral width of the gap region H1G with respect to the position in the Y-axis direction can be made gentler. This further promotes the flow of the joining material 9.

[0171] 47, the continuous region H1C may have a trapezoidal shape in a top view. In the example shown in FIG. 47, the continuous region H1C is disposed so that its lateral width increases toward the front end face 1F. In other words, the gap region H1G is disposed so that its lateral width decreases toward the front end face 1F. This type of forward protrusion H1 does not impede the flow of the joining material 9, as with the diamond-shaped continuous region H1C shown in FIG.

[0172] (Embodiment 3) A semiconductor light emitting element and a semiconductor light emitting device according to embodiment 3 will be described. The semiconductor light emitting element according to this embodiment differs from the semiconductor light emitting element 1 according to embodiment 1 in the configuration of the second P-side electrode 72. The semiconductor light emitting element and semiconductor light emitting device according to this embodiment will be described below with reference to FIGS. 48 to 51, focusing on the differences from the semiconductor light emitting element 1 and semiconductor light emitting device 5 according to embodiment 1.

[0173] Fig. 48 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 201 according to this embodiment. Fig. 48 shows a cross section passing through the optical axis Ax of the semiconductor light emitting device 201 and parallel to the YZ plane.

[0174] 48 , the first P-side electrode 71 is exposed on at least a portion of the front bottom L1 and the rear bottom L2 of the semiconductor light emitting element 201 according to this embodiment. In other words, the second P-side electrode 72 is not formed on at least a portion of the front bottom L1 and the rear bottom L2 of the semiconductor light emitting element 201. Specifically, the second P-side electrode 72 is not formed in a wide region of the rear bottom L2 closer to the front end face 1F. The second P-side electrode 72 is also not formed on the forward protrusion H1.

[0175] The effects of the semiconductor light emitting element 201 according to this embodiment and the semiconductor light emitting device 205 including the same will be described with reference to Fig. 49. Fig. 49 is a schematic cross-sectional view showing the overall configuration of the semiconductor light emitting device 205 according to this embodiment. Fig. 49 shows only a portion of the cross section of the semiconductor light emitting device 205 that passes through the optical axis Ax and is parallel to the YZ plane, and that includes the front end face 1F.

[0176] In the manufacturing method of the semiconductor light-emitting device 205, during the process of bonding the upper surface of the semiconductor light-emitting element 201 to the heat sink 7 or the like using the bonding member 9, the bonding member 9 made of AuSn solder melts and deforms, spreading forward from the rear protrusion H2. At this time, it extends beyond the end of the second P-side electrode 72 on the rear bottom L2 on the front end surface 1F side and contacts the first P-side electrode 71. Therefore, even if the pad electrode 73 on the forward protrusion H1 has an eave structure, there is a portion where the lower end of the pad electrode 73 and the first P-side electrode 71 contact each other in a wide region of the rear bottom L2 closer to the front end surface 1F, making it easier for the bonding member 9 to reach the pad electrode 73 on the forward protrusion H1 without interruption along the first P-side electrode 71. In this embodiment, the bonding member 9 contacts the pad electrode 73 on the forward protrusion H1, as shown in FIG. 49 .

[0177] After the bonding member 9 reaches the pad electrode 73, the bonding member 9 climbs over the forward protrusion H1 and reaches the front bottom L1. At this time, a fillet portion of the bonding member 9 is formed from the forward protrusion H1 to the front bottom L1. Heat generated near the front end face 1F can be dissipated to the heat sink 7 via this fillet portion, thereby improving the heat dissipation characteristics of the semiconductor light emitting element 201 and the semiconductor light emitting device 205 including the same.

[0178] 48, the second P-side electrode 72 is formed on a part of the rear bottom portion L2, but the second P-side electrode 72 does not have to be formed on the rear bottom portion L2. Such an example will be described with reference to FIG. 50. FIG. 50 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 201a according to a modified example of this embodiment. FIG. 50 shows a cross section passing through the optical axis Ax of the semiconductor light emitting device 201a and parallel to the YZ plane.

[0179] 50 , the first P-side electrode 71 is exposed from the second P-side electrode 72 over the entire area of ​​the front bottom L1 and the rear bottom L2 of the semiconductor light emitting element 201a according to this modification. In other words, the second P-side electrode 72 is not formed on the front bottom L1 or the rear bottom L2 of the semiconductor light emitting element 201a. Furthermore, as shown in FIG. 50 , the second P-side electrode 72 does not necessarily have to be disposed on the upper surface of the front end of the rear protrusion H2.

[0180] The effects of the semiconductor light emitting element 201a according to this modification and the semiconductor light emitting device 205a including the same will be described with reference to Fig. 51. Fig. 51 is a schematic cross-sectional view showing the overall configuration of the semiconductor light emitting device 205a according to this modification. Fig. 51 shows only a portion of the cross section of the semiconductor light emitting device 205a that passes through the optical axis Ax and is parallel to the YZ plane, and that includes the front end face 1F.

[0181] In the manufacturing method of the semiconductor light-emitting device 205a, during the process of bonding the upper surface of the semiconductor light-emitting element 201a to a heat sink 7 or the like using the bonding member 9, the bonding member 9 made of AuSn solder melts and deforms, spreading forward from the rear protrusion H2. During this process, the bonding member 9 extends from the upper surface of the pad electrode 73 at the front end of the rear protrusion H2 to the upper surface of the first P-side electrode 71 at the rear bottom L2 via the front end face of the rear protrusion H2. In this modification, there is also a portion where the lower end of the pad electrode 73 at the forward protrusion H1 contacts the first P-side electrode 71, making it easier for the bonding member 9 to extend uninterrupted along the first P-side electrode 71 to the pad electrode 73 at the forward protrusion H1. In this modification, the bonding member 9 contacts the pad electrode 73 at the forward protrusion H1 and the pad electrode 73 at the rear protrusion H2, as shown in FIG. 51 .

[0182] The behavior of the bonding member 9 after the bonding member 9 reaches the pad electrode 73 is the same as in the example shown in Fig. 49. In this way, the semiconductor light emitting element 201a and the semiconductor light emitting device 205a according to this modification also achieve the same effects as the semiconductor light emitting element 201 and the semiconductor light emitting device 205 according to the present embodiment.

[0183] (Fourth Embodiment) A semiconductor light emitting element and a semiconductor light emitting device according to the fourth embodiment will be described. The semiconductor light emitting element according to the present embodiment differs from the semiconductor light emitting element 1 according to the first embodiment mainly in the configuration of the rear protrusion H2. The semiconductor light emitting element and the semiconductor light emitting device according to the present embodiment will be described below with reference to Figures 52 and 53, focusing on the differences from the semiconductor light emitting element 1 and the semiconductor light emitting device 5 according to the first embodiment.

[0184] Fig. 52 is a schematic top view showing the overall configuration of a semiconductor light emitting element 301 according to this embodiment. Fig. 53 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 305 according to this embodiment. Fig. 53 shows a cross section passing through the second region H22 of the rear protrusion H2 and parallel to the YZ plane.

[0185] In the semiconductor light-emitting element 301 according to this embodiment, on the upper surface of the semiconductor light-emitting element 301, above the optical axis Ax of the light emitted by the semiconductor light-emitting element 301, there are formed a front bottom portion L1 extending rearward from the front end face 1F, and a rear protrusion H2 arranged rearward of the front bottom portion L1 and protruding upward relative to the front bottom portion L1.

[0186] The rearward protrusion H2 of the semiconductor light emitting element 301 has a first region H21 and a second region H22. The first region H21 is a region of the rearward protrusion H2 that is located above the optical axis Ax of the light emitted by the semiconductor light emitting element 301. The second region H22 is a region adjacent to the first region H21 in the lateral direction (i.e., the X-axis direction) perpendicular to the light propagation direction and the stacking direction of the semiconductor stack 1S. As shown in FIG. 52 , the distance D1 from the front end facet 1F to the front end of the first region H21 is greater than the distance D2 from the front end facet 1F to the front end of the second region H22.

[0187] In this embodiment, the second region H22 of the rearward protrusion H2 extends to the vicinity of the front end face 1F, which allows heat generated near the front end face 1F to be dissipated via the second region H22, thereby further improving the heat dissipation characteristics of the semiconductor light emitting element 301.

[0188] In addition, in a semiconductor light emitting device 305 in which a semiconductor light emitting element 301 is bonded to a heat sink 7 or the like using a bonding member 9, the bonding member 9 may travel along the second region H22 and reach the front end face 1F, as shown in Fig. 53. However, because the second region H22 is not directly above the optical axis Ax, it is possible to prevent light from being blocked by the bonding member 9 that reaches the front end face 1F.

[0189] By increasing the distance D1, the bonding member 9 formed on the rearward protrusion H2 can be prevented from reaching the front end face 1F of the semiconductor light emitting element 301 when it melts and spreads forward. On the other hand, if the distance D1 is too large, the area of ​​the rearward protrusion H2 made of Au or the like, which has high thermal conductivity, is reduced, which may result in a deterioration in heat dissipation characteristics. In this embodiment, by increasing the distance D1, the bonding member 9 can be prevented from reaching the front end face 1F, while by decreasing the distance D2, the heat dissipation characteristics can be improved. The distance D1 may be, for example, 15 μm or more and 50 μm or less. In this embodiment, the distance D1 is 25 μm.

[0190] 52 , the semiconductor light emitting device 301 has a ridge R and a trench T arranged along the ridge R, and the second region H22 covers the trench T. Because a layer with a high Al composition ratio is exposed in the trench T, covering the trench T with the pad electrode 73 included in the second region H22 can improve the adhesion of the insulating film 60 arranged in the trench T to the trench T. Specifically, in the case of this embodiment, the width of the first region H21 is 12 μm narrower than the inner spacing between the trenches T (i.e., the width of the top surface of the ridge R located between two trenches T). Note that the configuration for covering the trench T is not limited to a configuration for covering the entire trench T. For example, the configuration for covering the trench T also includes a configuration for covering only a portion of the trench T.

[0191] Also in this embodiment, similarly to the semiconductor light emitting element 1 according to the first embodiment, a rear bottom L2 is disposed between the front bottom L1 and the rear protrusion H2 on the upper surface of the semiconductor light emitting element 301 above the optical axis Ax, and a forward protrusion H1 is disposed between the front bottom L1 and the rear bottom L2 and protrudes upward relative to the front bottom L1 and the rear bottom L2. This allows the semiconductor light emitting element 301 according to this embodiment to achieve the same effects as the semiconductor light emitting element 1 according to the first embodiment. The semiconductor light emitting element 301 according to this embodiment does not necessarily have to include the forward protrusion H1. In this case, the front bottom L1 and the rear bottom L2 may be integrated. For example, the combined region of the front bottom L1 and the rear bottom L2 may be referred to as the front bottom L1.

[0192] 52, it is preferable that the distance D3 from the front end face 1F to the front end of the forward protrusion H1 is not too small. If the distance D3 is too small, the joining member 9 may reach the front end face 1F from the forward protrusion H1, and light may be blocked by the joining member 9. The distance D3 may be, for example, 3 μm or more and 7 μm or less. In this embodiment, the distance D3 is 5 μm.

[0193] Furthermore, the distance D3 may be smaller than the distance D2 from the front end face 1F to the front end of the second region. This allows a gap to be provided between the forward protrusion H1 and the second region H22 of the rear protrusion H2. This allows the bonding member 9 to flow out from the rear bottom L2 through the gap. Therefore, the area from which heat can be dissipated by the bonding member 9 can be expanded. The distance D2 may be, for example, 5 μm or more and 15 μm or less. In this embodiment, the distance D2 is 10 μm.

[0194] In the semiconductor light-emitting device 305 according to the present embodiment, as in the semiconductor light-emitting device 5 according to the first embodiment, the bonding member 9 located in front of the first region H21 is not disposed forward of the front end face 1F. On the other hand, as shown in Fig. 53 , in the semiconductor light-emitting device 305 according to the present embodiment, the bonding member 9 located in front of the second region H22 extends from the front bottom L1 to a position forward of the front end face 1F.

[0195] As a result, in front of the second region H22, the bonding member 9 reliably covers up to the front end face 1F, maximizing the heat dissipation effect in front of the second region H22. In addition, since the second region H22 is not directly above the optical axis Ax, it is possible to prevent light from being blocked by the bonding member 9 that reaches the front end face 1F.

[0196] 52 and 53 , in the semiconductor light emitting device 301 according to the present embodiment, the rear bottom portion L2 and the rear protrusion H2 each include a portion of the second P-side electrode 72, similar to the semiconductor light emitting device 1 according to the first embodiment. The rear protrusion H2 also includes a portion of the pad electrode 73, and as shown in FIG. 53 , the pad electrode 73 included in the second region H22 is spaced apart from the bonding member 9. This prevents Sn and other elements included in the bonding member 9 from diffusing into the pad electrode 73 and alloying the pad electrode 73. This prevents a decrease in heat dissipation characteristics due to alloying of the pad electrode 73 included in the second region H22. Furthermore, similar to the semiconductor light emitting device 5 according to the first embodiment, the pad electrode 73 included in the first region H21 may be spaced apart from the bonding member 9. This provides the same effect as a configuration in which the second region H22 is spaced apart from the bonding member 9.

[0197] (Embodiment 5) A semiconductor light emitting device according to embodiment 5 will be described. The semiconductor light emitting device according to this embodiment differs from the semiconductor light emitting device 1 according to embodiment 1 mainly in the configuration of the forward protrusion H1. The semiconductor light emitting device according to this embodiment will be described below with reference to FIG. 54 , focusing on the differences from the semiconductor light emitting device 1 according to embodiment 1.

[0198] Fig. 54 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 401 according to this embodiment. Fig. 54 shows a cross section passing through the optical axis Ax and parallel to the YZ plane.

[0199] 54, the semiconductor light emitting device 401 according to this embodiment has a forward protrusion H1. The forward protrusion H1 according to this embodiment includes a part of the semiconductor laminate 401S.

[0200] The semiconductor stack 401S according to the present embodiment includes the semiconductor stack 1S according to the first embodiment and a cap layer 55. The cap layer 55 is a semiconductor layer used when forming the window region 30w in the active layer 30, as described above.

[0201] In this embodiment, the used cap layer 55 is patterned into a desired shape using photolithography or the like, and used as part of the forward protrusion H1. As described above, in the method for manufacturing the semiconductor light emitting device 401 according to this embodiment, at least a part of the forward protrusion H1 is formed in the step of forming the semiconductor stack 401S. In this embodiment, the forward protrusion H1 further includes a part of each of the first P-side electrode 71 and the second P-side electrode 72. The forward protrusion H1 does not include a part of the pad electrode 73, but may include it.

[0202] As described above, the forward protrusion H1 may include the cap layer 55. The semiconductor light emitting device 401 according to this embodiment having such a configuration also achieves the same effects as the semiconductor light emitting device 1 according to the first embodiment.

[0203] In the semiconductor light emitting device 401 according to this embodiment, if the height of the forward protrusion H1 (i.e., the position of the upper surface in the Z-axis direction) is higher than the height of the rear protrusion H2, stress is applied to the forward protrusion H1 during junction-down mounting and during the formation of the coating films 2F and 2R, which may damage the semiconductor stack 401S. On the other hand, if the height of the forward protrusion H1 is lower than the height of the rear protrusion H2, the material of the coating film 2F may reach the rear bottom L2 and the rear protrusion H2. Therefore, the height of the forward protrusion H1 may be equal to the height of the rear protrusion H2.

[0204] Sixth Embodiment A semiconductor light emitting device according to a sixth embodiment will be described. The semiconductor light emitting device according to this embodiment differs from the semiconductor light emitting device 1 according to the first embodiment mainly in the relative height configuration of the forward protrusion H1 and the rearward protrusion H2. The semiconductor light emitting device according to this embodiment will be described below with reference to FIG. 55 , focusing on the differences from the semiconductor light emitting device 1 according to the first embodiment.

[0205] Fig. 55 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 501 according to this embodiment. Fig. 55 shows a cross section passing through the optical axis Ax and parallel to the YZ plane.

[0206] As shown in FIG. 55, the height of the forward protrusion H1 of the semiconductor light emitting device 501 according to this embodiment is lower than the height of the rearward protrusion H2.

[0207] With this configuration, when the joining member 9 made of AuSn solder melts and deforms to spread forward from the rear protrusion H2 in the process of joining the top surface of the semiconductor light emitting element 501 to the heat sink 7 or the like with the joining member 9, the joining member 9 easily climbs over the front protrusion H1. Therefore, a fillet portion of the joining member 9 is easily formed from the front protrusion H1 to the front bottom L1.

[0208] The difference Δh between the height of the forward protrusion H1 and the height of the rear protrusion H2 may be greater than 0 and equal to or less than 1 μm, thereby preventing the coating film 2F from being formed behind the forward protrusion H1.

[0209] Seventh Embodiment A semiconductor light emitting element, a semiconductor light emitting device, and a manufacturing method thereof according to a seventh embodiment will be described. The semiconductor light emitting element according to this embodiment differs from the semiconductor light emitting element 1 according to the first embodiment in the shape of the pad electrode 73. The following description will focus on the differences between the semiconductor light emitting element 1 according to the first embodiment and the semiconductor light emitting element according to the present embodiment.

[0210] [7-1. Overall Configuration of Semiconductor Light Emitting Element and Semiconductor Light Emitting Device] The overall configuration of the semiconductor light emitting element and semiconductor light emitting device according to this embodiment will be described with reference to FIGS. 56 and 57. FIG.

[0211] Fig. 56 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 601 according to this embodiment. Fig. 56 shows a cross section passing through the optical axis Ax and parallel to the YZ plane.

[0212] 56 , the pad electrode 73 on the forward protrusion H1 and the rear protrusion H2 according to this embodiment has a forward tapered shape in a cross section perpendicular to the front end face 1F and parallel to the stacking direction of the semiconductor laminate 1S. That is, the width of the pad electrode 73 in the Y-axis direction decreases with increasing distance from the semiconductor laminate 1S. In the example shown in FIG. 56 , the height of the forward protrusion H1 is equal to the height of the rear protrusion H2, and the pad electrode 73 on the forward protrusion H1 has a flat upper surface 73ft.

[0213] Since the pad electrode 73 has this shape, the second P-side electrode 72 is continuously arranged between the front bottom L1 and the front protrusion H1, between the front protrusion H1 and the rear bottom L2, and between the rear bottom L2 and the rear protrusion H2.

[0214] The effects of a semiconductor light emitting element 601 according to this embodiment and a semiconductor light emitting device 605 including the same will be described with reference to Fig. 57. Fig. 57 is a schematic cross-sectional view showing the overall configuration of the semiconductor light emitting device 605 according to this embodiment. Fig. 57 shows only a portion of a cross section of the semiconductor light emitting device 605 that passes through the optical axis Ax and is parallel to the YZ plane, and that includes the front end face 1F.

[0215] 57 , in the process of joining the upper surface of the semiconductor light emitting element 601 to the heat sink 7 or the like with the joining member 9, the joining member 9 made of AuSn solder melts and deforms, and spreads forward from the rear protrusion H2. Since the pad electrode 73 of the semiconductor light emitting element 601 according to this embodiment has a forward tapered shape, the joining member 9 can easily climb over the front protrusion H1 when spreading from the rear protrusion H2 to the rear bottom L2, the front protrusion H1, and the front bottom L1.

[0216] After the bonding member 9 reaches the pad electrode 73, the bonding member 9 extends over the forward protrusion H1 and from the forward protrusion H1 to the front bottom L1. At this time, a fillet portion of the bonding member 9 is formed from the forward protrusion H1 to the front bottom L1. Heat generated near the front end face 1F can be dissipated to the heat sink 7 via this fillet portion, thereby improving the heat dissipation characteristics of the semiconductor light emitting element 601 and a semiconductor light emitting device including the same.

[0217] In addition, in this embodiment, the second P-side electrode 72 is continuously disposed from the front bottom portion L1 to the rear protrusion portion H2, so that the pad electrode 73 is covered with the second P-side electrode 72. This makes it possible to suppress alloying of the pad electrode 73. Therefore, it is possible to suppress deterioration of the heat dissipation characteristics due to alloying of the pad electrode 73.

[0218] The inclination angle θf of the forward tapered shape of the pad electrode 73 at the forward protrusion H1 (i.e., the inclination angle of the front and rear side surfaces of the pad electrode 73 with respect to the XY plane) may be greater than 0 degrees and not greater than 40 degrees. This makes it even easier for the joining member 9 to climb over the forward protrusion H1. The inclination angle θf may also be 20 degrees or greater. This prevents the dimension of the forward protrusion H1 in the Y-axis direction from becoming too large.

[0219] The inclination angle θb of the forward tapered shape of the pad electrode 73 at the rear protrusion H2 may be equal to the inclination angle θf.

[0220] [7-2. Manufacturing Method of Semiconductor Light Emitting Device] A manufacturing method of semiconductor light emitting device 601 according to this embodiment will be described with reference to Figures 58 to 60. Each of Figures 58 to 60 shows a step in a method of forming pad electrode 73 of semiconductor light emitting device 601 according to this embodiment.

[0221] 58 , first, similarly to the semiconductor light-emitting device 1 according to the first embodiment, a semiconductor laminate 1S, an insulating film 60, and a first P-side electrode 71 are formed on a substrate 10, and a pad electrode 73 is formed above the first P-side electrode 71. In this embodiment, the pad electrode 73 is formed on almost the entire surface of the first P-side electrode 71 using a plating method or the like. After forming the pad electrode 73, the pad electrode 73 may be subjected to a heat treatment at approximately several hundred degrees Celsius. This can increase the grain size of Au constituting the pad electrode 73. Accordingly, in etching the pad electrode 73, which will be described later, the flatness of the etched surface of the pad electrode 73 can be improved.

[0222] 59, a resist 91 is formed on the pad electrode 73 at positions corresponding to the forward protrusion H1 and the rearward protrusion H2. An undercut may be formed in the resist 91 near the contact portion with the pad electrode 73. This further promotes the forward tapering of the shape of the pad electrode 73.

[0223] 60, the pad electrode 73 is etched. In this embodiment, the pad electrode 73 is etched by, for example, wet etching. As the etching solution, for example, a mixed solution of iodine and potassium iodide can be used. The etching solution may contain an organic solvent such as N-methyl-2-pyrrolidine. This can further promote the formation of a forward tapered shape for the pad electrode 73.

[0224] Subsequently, the resist 91 is removed, thereby forming the pad electrode 73 having a forward tapered shape.

[0225] [7-3. Modifications] A semiconductor light emitting device according to a modification of this embodiment will be described.

[0226] In the example shown in Fig. 56, the height of the forward protrusion H1 is equal to the height of the rearward protrusion H2, but the height of the forward protrusion H1 may be lower than the height of the rearward protrusion H2. Such an example will be described with reference to Fig. 61. Fig. 61 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 601a according to a modified example of this embodiment. Fig. 61 shows a cross section passing through the optical axis Ax of the semiconductor light emitting device 601a and parallel to the YZ plane.

[0227] As shown in FIG. 61 , in the semiconductor light emitting device 601a according to this modification, the height of the forward protrusion H1 is lower than the height of the rear protrusion H2. Furthermore, the pad electrode 73 on the forward protrusion H1 does not need to have a flat upper surface. Such a pad electrode 73 on the forward protrusion H1 can be formed, for example, by appropriately adjusting the relationship between the width of the forward protrusion H1 in the Y-axis direction and the inclination angle θf. For example, by making the width of the forward protrusion H1 in the Y-axis direction smaller than a predetermined value, the upper surface of the pad electrode 73 on the forward protrusion H1 can be etched during etching of the pad electrode 73. This allows the height of the pad electrode 73 on the forward protrusion H1 to be lower than the height of the pad electrode 73 on the rear protrusion H2.

[0228] The semiconductor light emitting element 601a according to this modification also achieves the same effects as the semiconductor light emitting element 601. Furthermore, in the semiconductor light emitting element 601a according to this modification, in the process of joining the upper surface of the semiconductor light emitting element 601a to the heat sink 7 or the like by the joining member 9, when the joining member 9 made of AuSn solder melts and deforms and spreads forward from the rear protrusion H2, the joining member 9 becomes more likely to overcome the front protrusion H1. Therefore, a fillet portion of the joining member 9 becomes more likely to be formed from the front protrusion H1 to the front bottom L1.

[0229] The difference Δh between the height of the forward protrusion H1 and the height of the rear protrusion H2 may be greater than 0 and equal to or less than 1 μm, thereby preventing the coating film 2F from being formed behind the forward protrusion H1.

[0230] (Other Modifications, etc.) The semiconductor light emitting device according to the present disclosure has been described above based on the embodiments and modifications, but the present disclosure is not limited to the above-described embodiments and modifications.

[0231] For example, although the semiconductor light emitting element is a semiconductor laser element in the above embodiment, the semiconductor light emitting element is not limited to a semiconductor laser element. For example, the semiconductor light emitting element may be a superluminescent diode.

[0232] Furthermore, in the above-described embodiments, the front bottoms and rear bottoms do not include the pad electrodes 73, but the front bottoms and rear bottoms may include the pad electrodes 73. For example, the film thickness of the pad electrodes 73 on the front bottoms and rear bottoms may be smaller than the film thickness of the pad electrodes 73 on the front protruding portions and rear protruding portions.

[0233] Furthermore, in each of the above-described embodiments, the pad electrode 73 has the eave-shaped portion 73a, but the pad electrode 73 does not necessarily have to have the eave-shaped portion 73a.

[0234] Furthermore, in the above embodiment, the semiconductor light emitting device 1 has two wing portions G, but the semiconductor light emitting device 1 may have only one wing portion G.

[0235] In the above embodiment, the active layer 30 of the semiconductor light emitting device 1 has a single quantum well structure, but it may have a multiple quantum well structure.

[0236] In the above embodiment, the active layer 30 of the semiconductor light emitting device 1 has the window regions 30w near the front end facet 1F and the rear end facet 1R, but the semiconductor light emitting device 1 does not necessarily have to have the window regions 30w.

[0237] In addition, in the above embodiment, the inclined regions 45b and 45d of the second etching stop layer 45 are regions in which the Al composition ratio decreases as the region approaches the contact layer 50, but they may also be regions in which the Al composition ratio increases as the region approaches the contact layer 50.

[0238] This disclosure also includes forms obtained by applying various modifications to the above embodiments and modifications that a person skilled in the art would conceive, and forms realized by arbitrarily combining the components and functions of the above embodiments and modifications within the scope that does not deviate from the intent of this disclosure.

[0239] The semiconductor light emitting device and the like according to the present disclosure can be used, for example, as a high-output, highly efficient light source in a light source for laser processing.

[0240] REFERENCE SIGNS LIST 1, 101, 201, 201a, 301, 401, 501, 601, 601a Semiconductor light emitting element 1F Front end facet 1R Rear end facet 1S, 401S Semiconductor laminate 2F, 2R Coating film 3 Recess 5, 105, 205, 205a, 305, 605 Semiconductor light emitting device 7 Heat sink 8 Conductive layer 9 Bonding member 10 Substrate 10B Bar-shaped substrate 10C Cleaved end face 10M Substrate base material 10S Spacer 20 N-type semiconductor layer 21 N-type buffer layer 22 N-type buffer boundary layer 23 N-type cladding layer 30 Active layer 30w Window region 31 N-side cladding boundary layer 32 N-side guide layer 32a First N-side guide layer 32b N-side carrier block layer 33 N-side barrier layer 34 Well layer 35 P-side barrier layer 36 P-side guide layer 36a P-side carrier block layer 36b First P-side guide layer 37 P-side cladding boundary layer 40 P-type cladding layer 41 Lower cladding layer 42 First cladding layer 43 First etching stop layer 44 Second cladding layer 45 Second etching stop layer 45a, 45c Constant region 45b, 45d Sloped region 50 Contact layer 55 Cap layer 60 Insulating film 60a Opening 71 First P-side electrode 72 Second P-side electrode 73 Pad electrode 73a Overhanging portion 73ft Upper surface 80 N-side electrode 81 First conductive layer 82 Second conductive layer 91 Resist Ax Optical axis De Separation region G Wing portion Gd Lower wing portion Gu Upper wing portion H1: Forward protrusion H2: Rear protrusion H21: First region H22: Second region L1: Forward bottom L2: Rear bottom R: Ridge Rd: Lower ridge Ru: Upper ridge T, Te: Groove

Claims

1. An edge-emitting semiconductor light-emitting device that includes a waveguide between a front end face and a rear end face and emits light from the front end face, A substrate; a semiconductor laminate disposed above the substrate and having the waveguide; A first P-side electrode disposed above the semiconductor laminate; a pad electrode disposed above the first P-side electrode, The semiconductor light emitting device is A top surface of the semiconductor light emitting device, above the waveguide of the semiconductor light emitting device, a front bottom portion extending rearward from the front end surface, on which the pad electrodes are not disposed; a rear bottom portion disposed rearward of the front bottom portion; a forward protrusion disposed between the front bottom and the rear bottom and protruding upward relative to the front bottom and the rear bottom; a rear protrusion disposed rearward of the rear bottom and protruding upward relative to the front bottom and the rear bottom, The pad electrode is not disposed on the front bottom portion, the rear protrusion includes at least a portion of the pad electrode, A coating film is provided on the front end surface, the front bottom portion, and the front surface of the forward protrusion, The coating film is not present on the rear surface of the forward protrusion. Semiconductor light emitting element.

2. An edge-emitting semiconductor light-emitting device that includes a waveguide between a front end face and a rear end face and emits light from the front end face, A substrate; a semiconductor laminate disposed above the substrate and having the waveguide; A first P-side electrode disposed above the semiconductor laminate; a pad electrode disposed above the first P-side electrode, The semiconductor light emitting device is A top surface of the semiconductor light emitting device, above the waveguide of the semiconductor light emitting device, a front bottom portion extending rearward from the front end surface, on which the pad electrodes are not disposed; a rear bottom portion disposed rearward of the front bottom portion; a forward protrusion disposed between the front bottom and the rear bottom and protruding upward relative to the front bottom and the rear bottom; a rear protrusion disposed rearward of the rear bottom and protruding upward relative to the front bottom and the rear bottom, The pad electrode is not disposed on the front bottom portion, the rear protrusion includes at least a portion of the pad electrode, The semiconductor light emitting element further includes an insulating film covering a part of an upper surface of the semiconductor laminate, The insulating film is disposed on the forward protrusion or below the forward protrusion between the semiconductor stack and the first P-side electrode. Semiconductor light emitting element.

3. The forward protrusions are disposed intermittently in a direction along the front end surface. The semiconductor light emitting device according to claim 1 .

4. The height of the forward protrusion is less than the height of the rear protrusion. The semiconductor light emitting device according to claim 1 .

5. The difference in height between the forward protrusion and the rear protrusion is 1 μm or less. The semiconductor light emitting device according to claim 4 .

6. the forward protrusion includes a portion of the pad electrode, The pad electrode in the forward protruding portion has a forward tapered shape in a cross section perpendicular to the front end face and parallel to the stacking direction of the semiconductor stack. The semiconductor light emitting device according to claim 1 .

7. The inclination angle of the forward tapered shape is 40 degrees or less. The semiconductor light emitting device according to claim 6 .

8. a second P-side electrode disposed above the first P-side electrode and the pad electrode; The first P-side electrode is exposed at least partially on the upper surfaces of the front bottom and the rear bottom. The semiconductor light emitting device according to claim 1 .

9. a second P-side electrode disposed above the first P-side electrode and the pad electrode; The second P-side electrode has a barrier layer containing at least one of Ti, Pt, and Cr. The semiconductor light emitting device according to claim 1 .

10. The forward protrusion includes a part of the pad electrode. The semiconductor light emitting device according to claim 1 .

11. the forward protrusion includes a portion of the pad electrode, a second P-side electrode disposed above the first P-side electrode and the pad electrode; the second P-side electrode disposed on the front bottom portion and the rear bottom portion and the pad electrode included in the front protrusion portion are spaced apart from each other, The second P-side electrode disposed on the rear bottom portion and the pad electrode included in the rear protruding portion are spaced apart from each other. The semiconductor light emitting device according to claim 1 .

12. An edge-emitting semiconductor light-emitting device that includes a waveguide between a front end face and a rear end face and emits light from the front end face, A substrate; a semiconductor laminate disposed above the substrate and having the waveguide; A first P-side electrode disposed above the semiconductor laminate; a pad electrode disposed above the first P-side electrode, The semiconductor light emitting device is A top surface of the semiconductor light emitting device, above the waveguide of the semiconductor light emitting device, a front bottom portion extending rearward from the front end surface; a rear protrusion disposed rearward of the front bottom and protruding upward relative to the front bottom, The pad electrode is not disposed on the front bottom portion, the rear protrusion includes at least a portion of the pad electrode, The rear protrusion is A first region located above an optical axis of the light; A second region adjacent to the first region in a lateral direction perpendicular to the propagation direction of the light and the stacking direction of the semiconductor stack, a distance from the front end surface to a front end of the first region is greater than a distance from the front end surface to a front end of the second region; The semiconductor light emitting device is The upper surface of the semiconductor light emitting element is provided above the waveguide of the semiconductor light emitting element. a rear bottom portion disposed between the front bottom portion and the rear protrusion portion; a forward protrusion disposed between the front bottom and the rear bottom and protruding upward relative to the front bottom and the rear bottom, The rear protrusion protrudes upward from the rear bottom. Semiconductor light emitting element.

13. The semiconductor stack has a ridge and a groove disposed along the ridge, The second region covers the groove. The semiconductor light emitting device according to claim 12 .

14. The distance from the front end surface to the front end of the forward protrusion is smaller than the distance from the front end surface to the front end of the second region. The semiconductor light emitting device according to claim 12 .

15. The forward protrusion includes a portion of the semiconductor laminate. The semiconductor light emitting device according to claim 1 .

16. The semiconductor light emitting device according to claim 1 or 2, A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, the semiconductor light emitting element includes a second P-side electrode disposed above the first P-side electrode and the pad electrode, each of the forward protrusion and the rear protrusion includes a portion of the second p-side electrode; The joining member is disposed from the second P-side electrode included in the forward protrusion portion to the second P-side electrode included in the rear protrusion portion. Semiconductor light emitting device.

17. The semiconductor light emitting device according to claim 3 ; A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, the forward projection has a plurality of continuous regions and one or more gap regions; Each of the plurality of continuous regions is a region that protrudes upward relative to the front bottom portion and the rear bottom portion, Each of the one or more gap regions is located between two adjacent continuous regions among the plurality of continuous regions and is a region that does not protrude upward relative to the front bottom portion and the rear bottom portion, The joining member is disposed in the one or more gap regions. Semiconductor light emitting device.

18. The semiconductor light emitting device according to claim 3 ; A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, the forward projection has a plurality of continuous regions and one or more gap regions; Each of the plurality of continuous regions is a region that protrudes upward relative to the front bottom portion and the rear bottom portion, Each of the one or more gap regions is located between two adjacent continuous regions among the plurality of continuous regions and is a region that does not protrude upward relative to the front bottom portion and the rear bottom portion, The joining member extends from the one or more gap regions to a location forward of the forward projection. Semiconductor light emitting device.

19. A semiconductor light emitting device according to any one of claims 12 to 14, A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, The joining member located in front of the first region is not located in front of the front end surface, The joint member located in front of the second region extends from the front bottom portion to a position forward of the front end surface. Semiconductor light emitting device.

20. The semiconductor light emitting device according to claim 1 or 2, A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, the semiconductor light emitting element includes a second P-side electrode disposed above the first P-side electrode and the pad electrode, each of the rear bottom portion and the rear protrusion portion includes a portion of the second P-side electrode; the rear protrusion includes a part of the pad electrode, The pad electrode included in the rear protruding portion and the bonding member are spaced apart from each other. Semiconductor light emitting device.

21. A semiconductor light emitting device according to any one of claims 12 to 14, A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, the semiconductor light emitting element includes a second P-side electrode disposed above the first P-side electrode and the pad electrode, each of the rear bottom portion and the rear protrusion portion includes a portion of the second P-side electrode; the rear protrusion includes a part of the pad electrode, At least one of the pad electrode included in the first region and the pad electrode included in the second region is spaced apart from the bonding member. Semiconductor light emitting device.

22. The semiconductor light emitting device according to claim 1 or 2, A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, the forward protrusion includes a portion of the pad electrode, The pad electrode included in the forward protruding portion and the bonding member are spaced apart from each other. Semiconductor light emitting device.

23. An edge-emitting semiconductor light-emitting device that includes a waveguide between a front end face and a rear end face and emits light from the front end face, A substrate; a semiconductor laminate disposed above the substrate and having the waveguide; A first P-side electrode disposed above the semiconductor laminate; a pad electrode disposed above the first P-side electrode, The semiconductor light emitting device is A top surface of the semiconductor light emitting device, above the waveguide of the semiconductor light emitting device, a front bottom portion extending rearward from the front end surface, on which the pad electrodes are not disposed; a rear bottom portion disposed rearward of the front bottom portion; a forward protrusion disposed between the front bottom and the rear bottom and protruding upward relative to the front bottom and the rear bottom; a rear protrusion disposed rearward of the rear bottom and protruding upward relative to the front bottom and the rear bottom, The pad electrode is not disposed on the front bottom portion, the rear protrusion includes at least a portion of the pad electrode, The forward protrusions are disposed intermittently in a direction along the front end surface. Semiconductor light emitting element.

24. A semiconductor light emitting device including an edge-emitting semiconductor light emitting element that includes a waveguide between a front end face and a rear end face and emits light from the front end face, The semiconductor light emitting device is A substrate; a semiconductor laminate disposed above the substrate and having the waveguide; A first P-side electrode disposed above the semiconductor laminate; a pad electrode disposed above the first P-side electrode, The semiconductor light emitting device is A top surface of the semiconductor light emitting device, above the waveguide of the semiconductor light emitting device, a front bottom portion extending rearward from the front end surface, on which the pad electrodes are not disposed; a rear bottom portion disposed rearward of the front bottom portion; a forward protrusion disposed between the front bottom and the rear bottom and protruding upward relative to the front bottom and the rear bottom; a rear protrusion disposed rearward of the rear bottom and protruding upward relative to the front bottom and the rear bottom, The pad electrode is not disposed on the front bottom portion, the rear protrusion includes at least a portion of the pad electrode, The semiconductor light emitting device comprises: A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, the semiconductor light emitting element includes a second P-side electrode disposed above the first P-side electrode and the pad electrode, each of the rear bottom portion and the rear protrusion portion includes a portion of the second P-side electrode; the rear protrusion includes a part of the pad electrode, The pad electrode included in the rear protruding portion and the bonding member are spaced apart from each other. Semiconductor light emitting device.

25. A semiconductor light emitting device including an edge-emitting semiconductor light emitting element that includes a waveguide between a front end face and a rear end face and emits light from the front end face, The semiconductor light emitting device is A substrate; a semiconductor laminate disposed above the substrate and having the waveguide; A first P-side electrode disposed above the semiconductor laminate; a pad electrode disposed above the first P-side electrode, The semiconductor light emitting device is A top surface of the semiconductor light emitting device, above the waveguide of the semiconductor light emitting device, a front bottom portion extending rearward from the front end surface, on which the pad electrodes are not disposed; a rear bottom portion disposed rearward of the front bottom portion; a forward protrusion disposed between the front bottom and the rear bottom and protruding upward relative to the front bottom and the rear bottom; a rear protrusion disposed rearward of the rear bottom and protruding upward relative to the front bottom and the rear bottom, The pad electrode is not disposed on the front bottom portion, the rear protrusion includes at least a portion of the pad electrode, The semiconductor light emitting device comprises: A heat sink; a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, the forward protrusion includes a portion of the pad electrode, The pad electrode included in the forward protruding portion and the bonding member are spaced apart from each other. Semiconductor light emitting device.