Gallium arsenide single crystal substrate and method for producing same

Abstract

Provided is a gallium arsenide single crystal substrate having a circular principal surface, wherein an average value of the dislocation density on the principal surface is 5 cm-2 to 100 cm-2. In a virtual grating formed by spreading, on the principal surface, squares each having a side of 2 mm so as to be arranged the most in parallel without overlapping each other, the ratio of the number of the squares in which no dislocation is present with respect to the total number of the squares constituting the grating is 97.0-99.5%. The gallium arsenide single crystal substrate contains silicon, and the concentration of the silicon is 1.0×1018 cm-3 to 5.0×1019 cm-3. The carrier concentration of the gallium arsenide single crystal substrate is 1.0×1018 cm-3 to 4.0×1018 cm-3.

Description

Gallium arsenide single crystal substrate and method for manufacturing same

[0001] The present disclosure relates to gallium arsenide single crystal substrates and methods for manufacturing the same.

[0002] International Publication No. 2006 / 106644 (Patent Document 1) discloses a silicon (Si)-doped gallium arsenide single crystal ingot (hereinafter also referred to as a "GaAs single crystal ingot") that is applied to a gallium arsenide single crystal substrate (hereinafter also referred to as a "GaAs single crystal substrate"). The GaAs single crystal ingot has an average dislocation density of 50 cm -2 When the carrier concentration in the portion with a solidification rate of 0.1 is C0.1 and the carrier concentration in the portion with a solidification rate of 0.8 is C0.8, the relationship C0.8 / C0.1<2.0 is satisfied. Furthermore, Patent Document 1 discloses that the carrier concentration of the GaAs single crystal ingot is 1.0×10 17 cm -3 Above 1.0 x 10 19 cm -3 International Publication No. 2021 / 251349 (Patent Document 2) discloses that the average value of the dislocation density is 500 cm -2 The atomic concentration of Si is 2.0×10 or less. 17 cm -3 1.5 x 10 19 cm -3 and the carrier concentration is 5.5×10 17 cm -3 The following GaAs single crystal ingot is disclosed.

[0003] Japanese Patent Laid-Open No. 2011-148693 (Patent Document 3) and Japanese Patent Laid-Open No. 2011-148694 (Patent Document 4) both disclose Si-doped n-type GaAs single crystal substrates. The GaAs single crystal substrates each have an average dislocation density of 40 to 100 cm -2 and 15-30 cm -2 and the atomic concentration of Si is 5.0 × 10 16 cm -3 Above 5.0 x 10 17 cm -3 or less and 5.0 x 10 16 cm -3 Above 5.0 x 1017 cm -3 JP 2011-527280 A (Patent Document 5) and Non-Patent Document 1 below disclose a measurement method for determining dislocation density by forming a mass having a predetermined size on a main surface and counting dislocations present in the mass.

[0004] International Publication No. 2006 / 106644 International Publication No. 2021 / 251349 JP 2011-148693 A JP 2011-148694 A JP 2011-527280 A

[0005] Sasane et al., "Low Dislocation Density GaAs Wafers by VGF Method Suitable for Mass Production of Semiconductor Lasers," Hitachi Cable, No. 20, August 2001, pp. 33-36

[0006] The gallium arsenide single crystal substrate according to the present disclosure is a gallium arsenide single crystal substrate having a circular main surface. The average dislocation density of the main surface is 5 cm -2 More than 100cm -2 In a virtual lattice formed by arranging squares, each 2 mm on a side, on the main surface in the largest number of parallel arrangements without overlapping, the ratio of the number of squares having no dislocations to the total number of squares constituting the lattice is 97.0% or more and 99.5% or less. The diameter of the gallium arsenide single crystal substrate is 70 mm or more. The gallium arsenide single crystal substrate contains silicon. The atomic concentration of the silicon is 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the gallium arsenide single crystal substrate is 1.0×10 18 cm -3 Above 4.0 x 10 18 cm -3 The following is the result.

[0007] A method for manufacturing a gallium arsenide single crystal substrate according to the present disclosure is for manufacturing a gallium arsenide single crystal substrate having a circular major surface. The method includes the steps of growing a gallium arsenide single crystal using a gallium arsenide single crystal growth apparatus and processing the gallium arsenide single crystal to obtain the gallium arsenide single crystal substrate. The gallium arsenide single crystal growth apparatus includes a crucible, a crucible holder for holding the crucible, and a heating element for heating the crucible. The crucible includes a cylindrical seed crystal holder, an increasing diameter section connected to the seed crystal holder, and a straight body section connected to the increasing diameter section. The seed crystal holder has a hollow section that opens to the side connected to the increasing diameter section and has a bottom wall formed on the side opposite the increasing diameter section. The increasing diameter section has a truncated cone shape that expands axially upward and is connected to the seed crystal holder at the smaller diameter side of the increasing diameter section. The body portion has a hollow cylindrical shape and is connected to the larger diameter side of the increased diameter portion. The crucible holder holds the increased diameter portion without contacting the body portion. When the inner diameter of the body portion is represented by D1 and the outer diameter of the crucible holder is represented by D2, D1 and D2 satisfy the relationship 1.0<D2 / D1<1.5, and D1 and D2 are expressed in mm.

[0008] Fig. 1 is an explanatory diagram illustrating etch pits that appear on the main surface of a gallium arsenide single crystal substrate according to this embodiment due to etching using molten potassium hydroxide. Fig. 2 is an explanatory diagram illustrating a virtual lattice in which squares with sides of 2 mm are laid out on the main surface so as to maximize the number of squares that do not overlap each other, in order to determine the dislocation density on the main surface of the gallium arsenide single crystal substrate shown in Fig. 1. Fig. 3 is a flowchart illustrating an example of a method for producing a gallium arsenide single crystal substrate according to this embodiment. Fig. 4 is an explanatory diagram illustrating the steps of obtaining a gallium arsenide single crystal using a single crystal growth apparatus, in connection with the method for producing a gallium arsenide single crystal substrate according to this embodiment.

[0009] [Problem to be Solved by the Present Disclosure] It is generally believed that the lower the average dislocation density of a GaAs single crystal substrate on its main surface, the higher the yield of semiconductor devices fabricated from the substrate (hereinafter also referred to as "device yield"). However, research by the present inventors has revealed that even when comparing GaAs single crystal substrates with similarly low average dislocation densities on their main surfaces, differences in device yield occur. Furthermore, it has been found that when the dislocation density on the main surface is zero or extremely low, cracks are more likely to occur during processing of GaAs single crystal ingots and GaAs single crystal substrates, and therefore device yield does not necessarily improve. In other words, even if GaAs single crystal substrates with a lower average dislocation density on their main surfaces are developed, device yield does not necessarily improve. Therefore, the GaAs single crystal substrates of Patent Documents 1 to 4 above have room for improvement in terms of improving device yield. In addition, the average dislocation density of the GaAs single crystal substrate in Non-Patent Document 1 was not calculated for the entire main surface, and therefore it cannot be said that the device yield was necessarily improved. Also, the GaAs single crystal substrate in Patent Document 5 had a high average dislocation density on the main surface to begin with.

[0010] In view of the above circumstances, an object of the present disclosure is to provide a gallium arsenide single crystal substrate capable of improving device yield and a method for manufacturing the same.

[0011] Effect of the Present Disclosure According to the present disclosure, it is possible to provide a gallium arsenide single crystal substrate capable of improving device yield and a method for manufacturing the same.

[0012] [Summary of the Embodiments] First, an overview of the embodiments of the present disclosure will be described. The inventors conducted extensive research to solve the above-mentioned problems. The inventors first divided a GaAs single crystal substrate into sections of a size corresponding to the elements constituting a semiconductor device and evaluated the dislocation density for each section. They found that the substrate with a larger number of sections with zero dislocation density would result in a higher device yield. Furthermore, the inventors also found that a GaAs single crystal substrate with a low but non-zero dislocation density across its entire main surface, as described above, would have fewer cracks during processing than a GaAs single crystal substrate with zero dislocation density across its entire main surface, thereby improving device yield. Based on these findings, the inventors grew a GaAs single crystal with a low average dislocation density while controlling the heat distribution within the crystal to be uniform. As a result, they found that the device yield described above could be dramatically improved in GaAs single crystal substrates obtained from the GaAs single crystal, and thus completed the present disclosure.

[0013] Next, embodiments of the present disclosure will be described. [1] A gallium arsenide single crystal substrate according to one aspect of the present disclosure is a gallium arsenide single crystal substrate having a circular main surface. The average dislocation density of the main surface is 5 cm -2 More than 100cm -2 In a virtual lattice formed by arranging squares, each 2 mm on a side, on the main surface in the largest number of parallel arrangements without overlapping, the ratio of the number of squares having no dislocations to the total number of squares constituting the lattice is 97.0% or more and 99.5% or less. The diameter of the gallium arsenide single crystal substrate is 70 mm or more. The gallium arsenide single crystal substrate contains silicon. The atomic concentration of the silicon is 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the gallium arsenide single crystal substrate is 1.0×10 18 cm -3 Above 4.0 x 10 18 cm -3The gallium arsenide single crystal substrate having these characteristics can improve device yield.

[0014] [2] The crystal plane of the main surface is preferably the {100} plane of the gallium arsenide single crystal, or a plane having an off-angle of more than 0° and not more than 3° from the {100} plane of the gallium arsenide single crystal. The dislocations are preferably contained in slip lines, and the slip lines preferably exist from the outer periphery of the main surface to the inside, along at least one direction selected from the group consisting of four directions equivalent to the [01-1] direction of the gallium arsenide single crystal. This makes it possible to improve device yield in a gallium arsenide single crystal substrate containing slip lines.

[0015] [3] and [4] The diameter of the gallium arsenide single crystal substrate is preferably 70 mm or more and 210 mm or less, thereby improving the device yield in so-called large-diameter gallium arsenide single crystal substrates having a diameter of 70 mm or more and 210 mm or less.

[0016] [5] The gallium arsenide single crystal substrate contains boron, and the atomic concentration of the boron is 1.0 × 10 18 cm -3 Above 1.0 x 10 19 cm -3 This makes it possible to provide a gallium arsenide single crystal substrate with fewer dislocations.

[0017] [6] A method for manufacturing a gallium arsenide single crystal substrate according to one aspect of the present disclosure is a method for manufacturing a gallium arsenide single crystal substrate having a circular major surface. The method includes the steps of obtaining a gallium arsenide single crystal by performing crystal growth using a gallium arsenide single crystal growth apparatus and processing the gallium arsenide single crystal to obtain the gallium arsenide single crystal substrate. The gallium arsenide single crystal growth apparatus includes a crucible, a crucible holder for holding the crucible, and a heating element for heating the crucible. The crucible includes a cylindrical seed crystal holder, an increasing diameter section connected to the seed crystal holder, and a straight body section connected to the increasing diameter section. The seed crystal holder has a hollow section that opens to the side connected to the increasing diameter section and has a bottom wall formed on the side opposite the increasing diameter section. The increasing diameter section has a truncated cone shape expanding upward in the axial direction of the crucible, and is connected to the seed crystal accommodation section at the smaller diameter side of the increasing diameter section. The straight body section has a hollow cylindrical shape and is connected to the larger diameter side of the increasing diameter section. The crucible holder holds the increasing diameter section without contacting the straight body section. When the inner diameter of the straight body section is represented by D1 and the outer diameter of the crucible holder is represented by D2, D1 and D2 satisfy the relationship 1.0 < D2 / D1 < 1.5, and the units of D1 and D2 are mm. A manufacturing method for a gallium arsenide single crystal substrate having these characteristics can obtain a gallium arsenide single crystal substrate with improved device yield.

[0018] [7] The step of obtaining the gallium arsenide single crystal preferably includes the steps of: accommodating a seed crystal in the seed crystal accommodation section and accommodating a lump of gallium arsenide together with silicon in the increased diameter section and the straight body section; heating the crucible with the heating element to melt a portion of the seed crystal and the gallium arsenide into a gallium arsenide melt and bringing the gallium arsenide melt into contact with the remainder of the seed crystal; and growing the gallium arsenide single crystal from the gallium arsenide melt on the remainder of the seed crystal. The crystal growth step preferably includes the steps of: second-order differentiation of the temperature at the interface between the gallium arsenide single crystal and the gallium arsenide melt at a position in the axial direction of the crucible at the interface; and 2 0.012℃ / mm or more 2The positive direction of the position is preferably a direction from the bottom to the top of the crucible along the axial direction. The silicon concentration of the gallium arsenide single crystal substrate is preferably 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 This makes it possible to obtain a gallium arsenide single crystal substrate with a further improved device yield.

[0019] [Details of the embodiment] One embodiment according to the present disclosure (hereinafter also referred to as "the present embodiment") will be described in further detail below, but the present disclosure is not limited thereto. The following description may be made with reference to the drawings, and the same or corresponding elements in this specification and the drawings will be denoted by the same reference numerals, and the same description will not be repeated. Furthermore, the scale of the drawings has been adjusted appropriately to facilitate understanding of each component, and the scale of each component shown in the drawings does not necessarily coincide with the scale of the actual component.

[0020] In this specification, the expression "A to B" means the upper and lower limits of a range (i.e., A or more and B or less), and when no unit is specified for A and only a unit is specified for B, the units of A and B are the same. Furthermore, when a compound or the like is expressed in this specification by a chemical formula, unless the atomic ratio is particularly limited, it is understood to include any conventionally known atomic ratio, and should not necessarily be limited to only those within a stoichiometric range.

[0021] As used herein, the "main surface" of a gallium arsenide single crystal substrate refers to both of the two circular faces of the substrate. A gallium arsenide single crystal substrate falls within the scope of the present invention if at least one of the two faces satisfies the scope of the claims of the present disclosure. An epitaxial film may be disposed on the "main surface" of the gallium arsenide single crystal substrate. Furthermore, the term "plane" used in the term "in-plane" herein refers to the "main surface." Furthermore, when the diameter of a gallium arsenide single crystal substrate is described as "70 mm," this means that the diameter is approximately 70 mm (approximately 70 to 76.5 mm) or 3 inches. When the diameter is described as "100 mm," this means that the diameter is approximately 100 mm (approximately 95 to 105 mm) or 4 inches. When the diameter is described as "150 mm," this means that the diameter is approximately 150 mm (approximately 145 to 155 mm) or 6 inches. When the diameter is described as "210 mm," this means that the diameter is approximately 210 mm (approximately 195 to 210 mm), or 8 inches. The diameter can be measured using a conventionally known outer diameter measuring device such as a vernier caliper.

[0022] As used herein, the term "device yield" refers to the yield obtained by multiplying the processing yield, which indicates the percentage of vertical cavity surface emitting laser (VCSEL) wafers that can be obtained from a gallium arsenide single crystal substrate without cracks, chips, or the like occurring during processing, by the performance yield, which indicates the percentage of VCSELs obtained from the wafers that meet the required performance. The "device yield" can be expressed as a percentage. The "processing yield" can be expressed as the percentage of VCSELs that do not crack, chip, or the like occurring in the substrate during a series of processes from the process of epitaxially growing a gallium arsenide single crystal substrate to form a light-emitting layer, etc., to the process of forming a VCSEL-formed wafer. The "performance yield" can be expressed as the percentage of non-defective VCSELs obtained from the wafers, by performing a burn-in accelerated degradation test and determining whether the VCSELs are good or bad based on the degree of degradation after the test.

[0023] In the crystallographic descriptions in this specification, individual orientations are represented by [ ], collective orientations by < >, individual planes by ( ), and collective planes by {}. A negative index in crystallographic terms is usually represented by placing a "- (bar)" before the number, but when this is expressed in this specification, a negative sign is placed before the number.

[0024] [Gallium Arsenide Single Crystal Substrate] The gallium arsenide single crystal substrate (GaAs single crystal substrate) according to this embodiment is a GaAs single crystal substrate having a circular main surface. The average dislocation density of the main surface is 5 cm -2 More than 100cm -2 In a virtual lattice formed by arranging as many squares, each 2 mm on a side, as possible in parallel on the main surface without overlapping, the ratio of the number of squares without dislocations to the total number of squares constituting the lattice is 97.0% or more and 99.5% or less. The GaAs single crystal substrate has a diameter of 70 mm or more. The GaAs single crystal substrate contains silicon. The concentration of silicon is 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the GaAs single crystal substrate is 1.0×10 18 cm -3 Above 4.0 x 10 18 cm -3 The GaAs single crystal substrate having these characteristics can improve the device yield.

[0025] The reason why the GaAs single crystal substrate can improve device yield is presumed to be as follows. That is, the GaAs single crystal substrate is composed of a gallium arsenide single crystal (hereinafter also referred to as "GaAs single crystal"). The gallium arsenide single crystal is manufactured using a gallium arsenide single crystal growth apparatus (hereinafter also referred to as "GaAs single crystal growth apparatus") having a predetermined crucible holder, based on the method described below in the section "Method for Manufacturing a Gallium Arsenide Single Crystal Substrate." That is, the gallium arsenide single crystal is manufactured using the single crystal growth apparatus by strictly controlling the temperature at the interface between the GaAs single crystal and the gallium arsenide melt (hereinafter also referred to as "GaAs melt"). This allows the GaAs single crystal to be grown while maintaining the interface shape formed by uniform heat distribution within the crystal, thereby suppressing the occurrence of dislocations due to thermal strain in the GaAs single crystal ingot. The GaAs single crystal ingot can also achieve the effect of reducing dislocation density by doping with silicon. In addition, since no special manufacturing method is used to make the entire main surface dislocation-free, the GaAs single crystal substrate can avoid cracks, chips, and the like that occur when processing GaAs single crystals. From the above, it is believed that the GaAs single crystal substrate according to this embodiment can improve device yield based on the manufacturing method described below.

[0026] <Major Surface> The GaAs single crystal substrate according to this embodiment has a circular major surface as described above. In this specification, the term "circular shape" used to describe the shape of the major surface includes not only a geometrically circular shape, but also a shape in which the major surface does not form a geometrically circular shape due to the presence of at least one of a notch, an orientation flat (hereinafter also referred to as "OF"), and an index flat (hereinafter also referred to as "IF") on the periphery of the major surface. Here, "a shape in which the major surface does not form a geometrically circular shape" refers to a shape in which, among line segments extending from any point on the periphery of the major surface to the center of the main surface, the lengths of line segments extending from any point on the notch, OF, or IF to the center of the main surface are shorter. Furthermore, "a shape in which the main surface does not form a geometrically circular shape" also includes a shape in which the lengths of all line segments extending from any point on the periphery of the main surface to the center of the main surface are not necessarily the same due to the shape of the GaAs single crystal used as the raw material for the GaAs single crystal substrate. In this case, the center of the main surface refers to the position of the center of gravity. The diameter of the GaAs single crystal substrate refers to the length of the longest line segment that extends from any point on the periphery of the GaAs single crystal substrate, passes through the center of the main surface, and extends to another point on the periphery.

[0027] The surface roughness of the main surface is preferably 0.3 nm or less in terms of surface roughness Sa as defined in JIS B 0681-2:2018. This results in a mirror-finished main surface, which can contribute to improving device characteristics. The surface roughness Sa of the main surface is more preferably 0.2 nm or less, and even more preferably 0.1 nm or less. The surface roughness Sa of the main surface is measured using an intermittent contact mode of a conventionally known atomic force microscope (for example, a product name "Dimension 3000" manufactured by Bruker). More specifically, the surface roughness Sa of the main surface is measured by using the atomic force microscope to correspond the 512 x 512 pixel size for calculating the surface roughness Sa to any square area of ​​0.2 μm length x 0.2 μm width on the main surface. This allows the surface roughness Sa of that area to be determined.

[0028] Here, the surface roughness Sa does not need to be 0.3 nm or less in all of the regions measured on the main surface, but it is sufficient that the surface roughness Sa measured in at least one of the multiple regions set on the main surface of the GaAs single crystal substrate is 0.3 nm or less. As the regions on the main surface for measuring the surface roughness Sa, for example, a total of five regions can be selected, with the centers of the measurement range being the center of the GaAs single crystal substrate and any four points on a circumference 5 mm inward from the outer edge of the GaAs single crystal substrate.

[0029] (Dislocation Density) The average dislocation density on the main surface is 5 cm -2 More than 100cm -2 or less. Furthermore, in a virtual lattice formed by arranging squares, each 2 mm on a side, in parallel on the main surface so that the maximum number of squares without overlapping each other is maximized, the ratio of the number of squares in which dislocations are not present to the total number of squares constituting the lattice (hereinafter also referred to as the "dislocation-free rate") is 97.0% or more and 99.5% or less. From another perspective, the probability that dislocations are not present in the squares constituting the lattice is 97.0% or more and 99.5% or less. The average dislocation density and the dislocation-free rate on the main surface are specifically determined by counting corrosion pits (hereinafter also referred to as "etch pits") that appear on the main surface after etching the main surface with molten potassium hydroxide. That is, the GaAs single crystal substrate according to this embodiment has an average number of etch pits of 5 cm -2 More than 100cm -2 and further, the ratio of the number of squares that do not have etch pits to the total number of squares that make up the lattice is 97.0% or more and 99.5% or less. Although etch pits are not academically synonymous with dislocations, they can be considered equivalent to dislocations in this technical field.

[0030] (Method of calculating the number of etch pits) Figure 1 is an explanatory diagram illustrating etch pits that appeared on the main surface of a gallium arsenide single crystal substrate according to this embodiment due to etching using molten potassium hydroxide. Figure 2 is an explanatory diagram illustrating a state in which a virtual lattice is set on the main surface in which squares with sides of 2 mm are laid out in parallel so as to maximize the number of squares without overlapping each other, in order to determine the dislocation density on the main surface of the gallium arsenide single crystal substrate shown in Figure 1. A specific method of calculating the number of etch pits will be described below with reference to Figures 1 and 2.

[0031] First, the main surface of a GaAs single crystal substrate is immersed in molten potassium hydroxide at 500°C for 10 minutes. The GaAs single crystal substrate is then removed from the molten potassium hydroxide. A conventionally known method can be used to immerse the GaAs single crystal substrate. This process results in a GaAs single crystal substrate in which dislocations present on the main surface appear as etch pits. For example, as shown in FIG. 1 , a GaAs single crystal substrate 1 is obtained in which multiple dislocations t appear as etch pits extending from the outer periphery of the main surface 11 inward. The bundles of dislocations t that appear in the GaAs single crystal substrate 1 are called slip lines S, as will be described later. The crystal plane of the main surface 11 of the GaAs single crystal substrate 1 shown in FIG. 1 is a {100} plane.

[0032] Next, as shown in FIG. 2 , a virtual lattice G is established on the main surface 11 of the GaAs single crystal substrate 1 by arranging as many squares, each 2 mm on a side, in parallel as possible without overlapping. Each square constituting the virtual lattice G is then observed with a known optical microscope (e.g., trade name: "ECLIPSE (registered trademark) LV150N" manufactured by Nikon Corporation), and the number of etch pits appearing in one field of view of the optical microscope is counted. In this case, the observation with the optical microscope is performed at a magnification of 50x. As a result, one field of view of the optical microscope is 2 mm x 2 mm in size, which corresponds to the size of the squares. Therefore, the number of etch pits per field of view is calculated as the number of dislocations per square constituting the virtual lattice G. The number of etch pits is calculated based on ... when the area is 100 μm.2 Only etch pits that are confirmed to be equal to or greater than this shall be counted.

[0033] Finally, the etch pits counted for each square constituting the virtual lattice G were 1 cm 2 The dislocation density for each square is then calculated. The sum of the dislocation densities is then divided by the number of squares to determine the average dislocation density for the main surface. The dislocation-free rate is then calculated by determining the ratio of the number of squares that are free of dislocations to the total number of squares that make up the virtual lattice G. In this specification, the phrase "laying the squares so as to maximize the number of parallel squares without overlapping each other" on the main surface means that when the squares are laid out parallel to the main surface 11 without overlapping each other, and the squares overlap the periphery of the main surface 11 and its outside, the squares are excluded from the elements that make up the virtual lattice G. This is because the number of dislocations in the region near the periphery, including the periphery of the main surface 11 of the GaAs single crystal substrate 1, varies greatly from substrate to substrate, and is typically not used as a material for semiconductor devices.

[0034] The average dislocation density of the main surface is 10 cm -2 More than 90cm -2 Preferably, it is 15 cm or less. -2 80cm or more -2 The dislocation-free rate is preferably 97.0% or more and 99.4% or less, and more preferably 97.5% or more and 99.4% or less. This makes it possible to provide GaAs single crystal substrates with improved device yields.

[0035] Here, the state in which multiple dislocations t appearing on the main surface 11 of the GaAs single crystal substrate 1 shown in FIG. 1 are connected together as etch pits is called a slip line S. Slip lines S are crystal defects introduced by thermal stress during single crystal fabrication. Slip lines S are bundles of multiple dislocations t and result from atomic slippage along the (111) plane of the GaAs single crystal. Therefore, when the crystal plane of the main surface 11 is the {100} plane of the GaAs single crystal, slip lines S tend to exist along any one direction selected from a group consisting of four directions equivalent to the [01-1] direction of the GaAs single crystal. In particular, in the GaAs single crystal substrate 1 shown in FIG. 1, slip lines S exist from the outer periphery of the main surface 11 toward the inside in all four directions equivalent to the [01-1] direction of the GaAs single crystal.

[0036] In the GaAs single crystal substrate, the crystal plane of the main surface is preferably a {100} plane of the GaAs single crystal. In this case, the dislocations are preferably contained in slip lines. The slip lines extend from the outer periphery of the main surface to the inside, along at least one direction selected from a group consisting of four directions equivalent to the [01-1] direction of the GaAs single crystal. This allows for improved device yield in GaAs single crystal substrates containing slip lines.

[0037] Alternatively, the crystal plane of the main surface is preferably a plane having an off-angle of more than 0° and not more than 3° from the {100} plane of the gallium arsenide single crystal. In this case, the off-direction of the off-angled plane is preferably the

[011] direction. Even when the off-angled plane includes slip lines, the slip lines extend from the outer periphery of the main surface to the inside, along at least one direction selected from the group consisting of four directions equivalent to the

[011] direction of the GaAs single crystal.

[0038] In this disclosure, the crystal plane of the main surface is assumed to have an accuracy error of ±0.5°. For example, when the main surface is referred to as the "{100} plane" of a GaAs single crystal, this means that the main surface may be a {100} just plane and may have an off-angle of -0.5 to +0.5° from the {100} plane. The off-angle from the {100} plane of the main surface of a GaAs single crystal substrate can be measured using a conventionally known crystal orientation measurement device (for example, product name (product number) "2991G2" manufactured by Rigaku Corporation). The four directions equivalent to the [01-1] direction of a GaAs single crystal refer to the [01-1] direction, [0-1-1] direction, [0-11] direction, and

[011] direction of the GaAs single crystal.

[0039] <Diameter> The diameter of the GaAs single crystal substrate is 70 mm or more. In particular, the diameter of the GaAs single crystal substrate is preferably 70 mm or more and 210 mm or less. Specifically, GaAs single crystal substrates having a diameter of 70 mm or more and 210 mm or less are preferably 70 mm, 100 mm, 150 mm, or 210 mm, in other words, preferably 3 inches, 4 inches, 6 inches, or 8 inches. This allows for improved device yield in large-diameter GaAs single crystal substrates having a diameter of 70 mm or more and 210 mm or less. Here, the diameter of the GaAs single crystal substrate is determined based on the circular shape before the formation of the OF, IF, etc., even if the main surface does not have a geometrically circular shape due to the influence of OF, IF, etc. Furthermore, as described above, the diameter of the GaAs single crystal substrate can be measured using a conventionally known outer diameter measuring instrument such as a vernier caliper.

[0040] <Dopant> The GaAs single crystal substrate according to this embodiment contains silicon (Si). The atomic concentration of the Si is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 The atomic concentration of Si is 1.4×10 18 cm -3 Above 2.0 x 10 19 cm -3Preferably, it is 1.8×10 or less. 18 cm -3 Above 1.0 x 10 19 cm -3 It is more preferable that the following condition is satisfied: This makes it possible to impart n-type (electron-donating) conductivity characteristics to the GaAs single crystal substrate, and also to obtain the effect of reducing dislocation density.

[0041] The GaAs single crystal substrate preferably contains boron (B). In this case, the atomic concentration of B is 1.0×10 18 cm -3 Above 1.0 x 10 19 cm -3 The atomic concentration of B is preferably 2.0×10 or less. 18 cm -3 Above 8.0 x 10 18 cm -3 It is more preferable that the atomic concentration of Si and B in the GaAs single crystal substrate is less than 1000 Å. This allows the GaAs single crystal substrate to have fewer dislocations. The atomic concentrations of Si and B in the GaAs single crystal substrate are both measured using glow discharge mass spectrometry (GDMS). When a GaAs single crystal substrate is obtained by a GaAs single crystal substrate manufacturing method described below, the B can be produced by a reaction between silicon added to gallium arsenide, which is the raw material, and boron oxide, which functions as a sealant. This allows the B to be contained in the GaAs single crystal substrate.

[0042] <Carrier concentration> The carrier concentration of the GaAs single crystal substrate is 1.0×10 18 cm -3 Above 4.0 x 10 18 cm -3 The carrier concentration is 1.2×10 18 cm -3 3.8 x 10 18 cm -3 Preferably, it is 1.4 × 10 or less. 18 cm -3 3.6 x 10 18 cm -3or less. This provides the GaAs single crystal substrate with n-type (electron-donating) conductivity. The carrier concentration of the GaAs single crystal substrate is determined by applying the Van der Pauw method to a rectangular slice obtained by cleaving the GaAs single crystal substrate from near the center of the main surface along the {011} plane at room temperature of 25°C. The size of the rectangular slice is, for example, 20 mm long x 20 mm wide x 1 mm thick.

[0043] [Method for Manufacturing Gallium Arsenide Single Crystal Substrate] The method for manufacturing a gallium arsenide single crystal substrate (GaAs single crystal substrate) according to this embodiment can be, for example, a method for manufacturing a GaAs single crystal substrate having a circular main surface as described above. That is, the manufacturing method is a method for manufacturing a GaAs single crystal substrate having a circular main surface, and includes the steps of growing a GaAs single crystal using a gallium arsenide single crystal growth apparatus (GaAs single crystal growth apparatus) and processing the GaAs single crystal to obtain the GaAs single crystal substrate. The GaAs single crystal growth apparatus includes a crucible, a crucible holder for holding the crucible, and a heating element for heating the crucible. The crucible includes a cylindrical seed crystal holder, an increasing diameter portion connected to the seed crystal holder, and a straight body portion connected to the increasing diameter portion. The seed crystal accommodation portion has a hollow portion that opens to a side connected to the increasing diameter portion and has a bottom wall formed on the side opposite the increasing diameter portion. The increasing diameter portion has a truncated cone shape that expands upward in the axial direction of the crucible and is connected to the seed crystal accommodation portion at the small diameter side of the increasing diameter portion. The straight body portion has a hollow cylindrical shape and is connected to the large diameter side of the increasing diameter portion. The crucible holder holds the increasing diameter portion without contacting the straight body portion. When the inner diameter of the straight body portion is represented by D1 and the outer diameter of the crucible holder is represented by D2, D1 and D2 satisfy the relationship 1.0 < D2 / D1 < 1.5, and D1 and D2 are expressed in mm. A manufacturing method for a GaAs single crystal substrate having these characteristics can obtain GaAs single crystal substrates with improved device yield.

[0044] Specifically, the manufacturing method preferably includes steps such as those shown in the flowchart of Fig. 3. Fig. 3 is a flowchart showing an example of a manufacturing method for a gallium arsenide single crystal substrate according to this embodiment. According to Fig. 3, the manufacturing method for the GaAs single crystal substrate includes a step S10 (first step: preparation step) of preparing a GaAs single crystal growth apparatus, a seed crystal, and a chunk of gallium arsenide, a step S20 (second step: GaAs single crystal obtaining step) of growing a GaAs single crystal by using the GaAs single crystal growth apparatus, and a step S30 (third step: GaAs single crystal substrate obtaining step) of processing the GaAs single crystal to obtain a GaAs single crystal substrate. Furthermore, the step S20 of obtaining a GaAs single crystal can include the steps of: accommodating a seed crystal in the seed crystal accommodation section, and accommodating a lump of gallium arsenide together with silicon in the diameter increasing section and the straight body section (raw material loading step S21); heating the crucible with a heating element to melt a portion of the seed crystal and the gallium arsenide into a gallium arsenide melt (GaAs melt), and bringing the GaAs melt into contact with the remainder of the seed crystal (raw material melting step S22); and growing a GaAs single crystal from the GaAs melt on the remainder of the seed crystal (GaAs single crystal growing step S23).

[0045] In particular, in the crystal growth step (GaAs single crystal growth step S23), the value obtained by second-order differentiation of the temperature at the interface between the GaAs single crystal and the GaAs melt with respect to the position in the axial direction of the crucible at the interface is 0.003°C / mm 2 0.012℃ / mm or more 2 The positive direction of the position is the direction from the bottom to the top of the crucible along the axial direction. This allows for the production of GaAs single crystal substrates with improved device yields. The silicon concentration of the GaAs single crystal substrate is preferably 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 It is preferable that:

[0046] The present inventors have focused on the structure of a crucible holder constituting a GaAs single crystal growth apparatus for growing GaAs single crystals, which are used as raw materials for GaAs single crystal substrates. Specifically, the inventors have designed the crucible holder to support the increased diameter portion of the crucible without contacting the body portion of the crucible, and have designed the outer diameter of the crucible holder to satisfy a predetermined relationship between the inner diameter of the body portion of the crucible (the inner diameter D1 of the body portion and the outer diameter D2 of the crucible holder satisfy the relationship 1.0 < D2 / D1 < 1.5). This prevents heat dissipation from the inside of the crucible to the outside, allowing for precise control of the temperature at the interface between the GaAs single crystal growing in the crucible and the GaAs melt. As a result, it became possible to make the heat distribution in the GaAs single crystal uniform, and to suppress the occurrence of dislocations due to thermal strain. Based on the above, the inventors conceived the idea of ​​producing a GaAs single crystal substrate that can achieve extremely low dislocations, in addition to the effect of reducing the dislocation density by doping with silicon, and can improve device yield.

[0047] An overview of the GaAs single crystal growth apparatus and each step included in the manufacturing method will be described below with reference to FIG. 4 . FIG. 4 is an explanatory diagram illustrating the steps of obtaining a gallium arsenide single crystal using a single crystal growth apparatus, relating to a method for manufacturing a gallium arsenide single crystal substrate according to this embodiment. The method for manufacturing a GaAs single crystal substrate according to this embodiment employs, for example, a GaAs single crystal growth apparatus 10 shown in FIG. 4 . The GaAs single crystal growth apparatus 10 includes a crucible 5, a crucible holder 6 for holding the crucible 5, and a heating element 7 for heating the crucible 5. The GaAs single crystal growth apparatus 10 can grow a single crystal by the vertical boat method using a crucible. Hereinafter, the vertical boat method will be abbreviated as the VB method. The VB method includes the vertical Bridgman method and the vertical temperature gradient solidification method.

[0048] <GaAs Single Crystal Growth Apparatus> (Crucible) As shown in FIG. 4 , in the GaAs single crystal growth apparatus 10, the crucible 5 includes a cylindrical seed crystal accommodation portion 51, an increasing diameter portion 52 connected to the seed crystal accommodation portion 51, and a straight body portion 53 connected to the increasing diameter portion 52. The seed crystal accommodation portion 51 is cylindrical and has a hollow portion that opens on the side connected to the increasing diameter portion 52 and has a bottom wall formed on the side opposite the increasing diameter portion 52. The seed crystal accommodation portion 51 can accommodate and hold a seed crystal 8 a in the hollow portion. The increasing diameter portion 52 has a truncated cone shape that widens upward in the axial direction of the crucible 5 and is connected to the seed crystal accommodation portion 51 on the small diameter side of the increasing diameter portion 52. The straight body portion 53 has a hollow cylindrical shape and is connected to the large diameter side of the increasing diameter portion 52. The diameter increasing portion 52 and the straight body portion 53 function to hold a gallium arsenide block (specifically, polycrystalline gallium arsenide) therein. Furthermore, as described below, the diameter increasing portion 52 and the straight body portion 53 function to solidify a GaAs melt 82, which is a molten state of the gallium arsenide, thereby growing a GaAs single crystal 81 as a crystalline solid. Various materials that can withstand the temperature of the GaAs melt 82 are used for the crucible 5. For example, pyrolytic boron nitride (pBN) can be used as the material for the crucible 5. The inner diameter D1 of the straight body portion 53 is, for example, 70 mm or more and 215 mm or less, depending on the diameter of the GaAs single crystal to be manufactured.

[0049] (Crucible Holder) The GaAs single crystal growth apparatus 10 includes a crucible holder 6 that holds the crucible 5. The crucible holder 6 has a cylindrical appearance. In particular, the crucible holder 6 holds the increased diameter portion 52 without contacting the straight body portion 53. The crucible holder 6 can be made of, for example, quartz, alumina, or silicon carbide. The outer diameter D2 of the crucible holder 6 depends on the diameter of the GaAs single crystal to be produced, but is, for example, 72 mm or more and 320 mm or less.

[0050] In the GaAs single crystal growth apparatus 10, the crucible 5 and the crucible holder 6 have the following relationship. That is, when the inner diameter of the straight body portion 53 of the crucible 5 is represented by D1 and the outer diameter of the crucible holder 6 is represented by D2, D1 and D2 satisfy the relationship 1.0<D2 / D1<1.5. Here, the units of D1 and D2 are mm. It is preferable that D1 and D2 satisfy the relationship 1.05≦D2 / D1≦1.3. As described above, it is preferable that D1 is 70 mm or more and 215 mm or less, and D2 is 72 mm or more and 320 mm or less. This allows for improved device yields in so-called large-diameter gallium arsenide single crystal substrates having a diameter of 70 mm or more and 210 mm or less.

[0051] (Heater) The GaAs single crystal growth apparatus 10 is equipped with a heater 7 that heats the crucible 5. The heater 7 consists of two elements. These two elements are arranged so as to surround the outer periphery of the crucible 5. Each heater 7 is divided into multiple sections perpendicular to the axis of the crucible. This allows each heater 7 to be configured in multiple stages. The output of the heater 7 can be controlled independently for each element and for each section. This makes it possible to precisely control the temperature at the interface between the GaAs single crystal 81 and the GaAs melt 82. For example, a known electric heater can be used as the heater 7.

[0052] The GaAs single crystal growth apparatus 10 can include thermocouples 75 capable of measuring the temperature of the crucible 5 heated by the heating element 7. A plurality of thermocouples 75 are arranged outside the crucible 5 along the axial direction. In particular, it is preferable to arrange at least a plurality of thermocouples 75 outside the crucible 5 along the axial direction, at a height corresponding to the interface between the GaAs single crystal 81 and the GaAs melt 82 in the crucible 5. Based on the temperatures measured by each thermocouple 75, it is possible to estimate the temperature at each location of the GaAs single crystal 81 growing in the crucible 5. It is also possible to determine a value (hereinafter also referred to as a "second-order differential value") obtained by second-order differentiation of the temperature at the interface with respect to the position in the axial direction of the crucible 5 at the interface. In this embodiment, the second-order differential value is 0.003°C / mm, as will be described later in the crystal growth process. 2 0.012℃ / mm or more 2The thermocouple 75 may be, for example, a known temperature monitor. 2 T / dz 2 " where T represents the temperature (unit: °C) at the interface, and z represents the position (unit: mm) in the axial direction of the crucible 5. The positive direction of z represents the direction from the bottom to the top of the crucible 5 along the axial direction of the crucible 5 as shown in FIG. 4. The direction of r shown in FIG. 4 represents the radial direction of the crucible 5.

[0053] <Steps Included in the Method for Manufacturing GaAs Single Crystal Substrate> (First Step: Preparation Step S10) As shown in FIG. 3 , in the method for manufacturing a GaAs single crystal substrate according to this embodiment, the first step is the preparation step S10. In the preparation step S10, the GaAs single crystal growth apparatus 10, the seed crystal 8a, and the lump gallium arsenide are prepared for producing GaAs single crystal, which is the raw material for the GaAs single crystal substrate. The seed crystal 8a is made of GaAs single crystal. The seed crystal 8a and the lump gallium arsenide may be prepared by a conventionally known method or may be obtained commercially.

[0054] (Second Step: Step S20 of Obtaining GaAs Single Crystal) Next, in the method for manufacturing a GaAs single crystal substrate according to this embodiment, step S20 of obtaining a GaAs single crystal by performing crystal growth using a GaAs single crystal growth apparatus is carried out. Step S20 of obtaining a GaAs single crystal includes the following steps: step S21 of loading raw materials, step S22 of melting raw materials, and step S23 of growing a GaAs single crystal. In step S20 of obtaining a GaAs single crystal, these steps are carried out in this order.

[0055] 1) Raw Material Charging Step S21 The raw material charging step S21 is a step of accommodating a seed crystal in the seed crystal accommodating section and accommodating gallium arsenide chunks together with silicon in the enlarged diameter section and the straight body section. The raw material charging step S21 includes a seed crystal charging step, a gallium arsenide charging step, and a sealant placement step. As shown in FIG. 4 , in the seed crystal charging step, a seed crystal 8a made of GaAs is charged into the hollow section of the seed crystal accommodating section 51 of the crucible 5. A conventionally known method can be used to charge the seed crystal 8a into the seed crystal accommodating section 51. In the gallium arsenide charging step, multiple chunks made of polycrystalline GaAs are charged as gallium arsenide chunks into the enlarged diameter section 52 and the straight body section 53 of the crucible 5 and stacked. Furthermore, in the gallium arsenide charging step, the silicon concentration in the GaAs single crystal substrate obtained by this manufacturing method is adjusted to 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 A predetermined amount of silicon is added to the increased diameter portion 52 and the body portion 53 of the crucible 5 as follows: In the sealant placement step, a sealant conventionally known in the VB method (for example, a solid sealant made of BO (boron oxide)) is placed on the above-mentioned mass.

[0056] 2) Raw Material Melting Step S22 In the raw material melting step S22, the crucible 5 is heated by the heating element 7 to melt a portion of the seed crystal 8a and a mass of polycrystalline GaAs into a GaAs melt 82, and the GaAs melt 82 is brought into contact with the remainder of the seed crystal 8a. In this step, the seed crystal 8a and the GaAs melt 82 are brought into contact with each other to obtain a GaAs single crystal 81. This allows the GaAs single crystal 81 to grow on the remainder of the seed crystal 8a in the next step of this manufacturing method. Specifically, in the raw material melting step S22, the crucible 5 containing the seed crystal 8a, a mass of polycrystalline GaAs, and a solid sealant is supported on the crucible holder 6. Then, a current is supplied to the heating element 7 to heat the crucible 5. As a result, the solid sealant melts into a liquid sealant (not shown in FIG. 4), and the mass melts into GaAs melt 82. Next, a part of the seed crystal 8a also melts, and the remainder of the seed crystal 8a and the GaAs melt 82 come into contact with each other at the interface.

[0057] 3) GaAs Single Crystal Growth Step S23 The GaAs single crystal growth step S23 is a step of growing a GaAs single crystal 81 from the GaAs melt 82 on the remaining portion of the seed crystal 8a. In the GaAs single crystal growth step S23, for example, the crucible 5 is gradually lowered downward (toward the seed crystal accommodation portion 51) along its axis relative to the heating element 7, thereby creating a temperature gradient in the crucible 5 such that the temperature on the seed crystal 8a side is lower and the temperature on the GaAs melt 82 side is higher. This solidifies the GaAs melt 82 in contact with the seed crystal 8a, and a GaAs single crystal 81 is continuously grown from the GaAs melt 82 on the remaining portion of the seed crystal 8a. The speed at which the crucible 5 is lowered downward along its axis is not particularly limited, but can be, for example, 1 to 5 mm / hour.

[0058] Here, the crucible holder 6 holds the increased diameter portion 52 without contacting the body portion 53 of the crucible 5. In the GaAs single crystal growth apparatus 10, the crucible 5 and the crucible holder 6 have a relationship of 1.0<D2 / D1<1.5, where D1 is the inner diameter of the body portion 53 and D2 is the outer diameter of the crucible holder 6. The units of D1 and D2 are mm. As a result, in the GaAs single crystal growth step S23, the second-order differential value obtained by second-order differentiation of the temperature at the interface between the GaAs single crystal 81 and the GaAs melt 82 at the axial position of the crucible 5 at the interface is 0.003°C / mm 2 0.012℃ / mm or more 2 The positive direction of the axial position of the crucible 5 is the direction from the bottom to the top of the crucible 5 along the axial direction. 2 If the second-order differential value is less than 0.012°C / mm, the dislocation-free rate will be extremely high, which may result in cracks, chips, etc. during processing of the GaAs single crystal substrate, resulting in a deterioration in processing yield. 2 If the second derivative exceeds 0.003°C / mm, the occurrence of dislocations due to thermal strain may not be sufficiently suppressed. 2 0.012℃ / mm or more 2It is preferable that the second derivative is controlled to be equal to or less than 0.004°C / mm 2 0.008℃ / mm or more 2 It is preferable to control the temperature to be equal to or less than -0.008°C / mm 2 -0.004℃ / mm or more 2 As described above, in the GaAs single crystal growth step S23, the GaAs single crystal 81 can be grown while controlling the heat distribution in the GaAs single crystal 81 to be uniform. This makes it possible to suppress the occurrence of dislocations in the GaAs single crystal 81 due to thermal strain.

[0059] If the D2 / D1 ratio is 1.0 or less, it tends to be difficult to sufficiently suppress heat dissipation from the inside to the outside of the crucible 5. This may result in a risk of not being able to sufficiently suppress the occurrence of dislocations due to thermal strain in the GaAs single crystal 81. If the D2 / D1 ratio is 1.5 or more, it is possible to sufficiently suppress the occurrence of dislocations due to thermal strain in the GaAs single crystal 81, but the output of the heating element 7 increases, which may result in a lower economic rationality.

[0060] In the GaAs single crystal growth step S23, the crucible 5 is subsequently pulled downward along its axis relative to the heating element 7, thereby raising the interface between the GaAs single crystal 81 and the GaAs melt 82 toward the liquid sealant and solidifying the GaAs melt 82. This allows the GaAs single crystal 81 to grow upward along the axis of the crucible 5. The crystal growth of the GaAs single crystal 81 continues until solidification of the GaAs melt 82 remaining in the body portion 53 of the crucible 5 is completed. In this manner, an ingot of the GaAs single crystal 81 can be obtained.

[0061] (Third Step: Step S30 of Obtaining a GaAs Single Crystal Substrate) Next, in the method for manufacturing a GaAs single crystal substrate according to this embodiment, step S30 of obtaining a GaAs single crystal substrate by processing the GaAs single crystal is carried out. Step S30 of obtaining a GaAs single crystal substrate includes the following cutting step, outer periphery grinding step, and polishing step, and by carrying out these steps in this order, a GaAs single crystal substrate can be obtained.

[0062] The cutting step is a step of slicing the ingot made of GaAs single crystal removed from the crucible 5 into wafers having a predetermined thickness in order to obtain GaAs single crystal substrates from the ingot. Furthermore, the periphery grinding step is a step of grinding the periphery of the wafer to obtain GaAs single crystal substrates having circular main surfaces. Conventionally known cutting and periphery grinding methods can be used for the cutting step and the periphery grinding step. Furthermore, the polishing step is a step of polishing the main surfaces to a mirror finish. Conventionally known polishing methods can be used for the polishing step. By the polishing step, the main surfaces can be polished to a surface roughness Sa of 0.3 nm or less as specified in JIS B 0681-2:2018, for example.

[0063] <Effects> By carrying out the above steps, a GaAs single crystal substrate having a circular main surface is manufactured. In the method for manufacturing a GaAs single crystal substrate according to this embodiment, particularly in the second step, the GaAs single crystal 81 can be grown with uniform heat distribution in the GaAs single crystal 81. This, combined with the effect of reducing dislocation density due to silicon doping, makes it possible to manufacture a GaAs single crystal with extremely low dislocations. As described above, the present disclosure makes it possible to obtain a GaAs single crystal substrate that can improve device yield.

[0064] The present disclosure will be described in more detail below with reference to examples, but the present disclosure is not limited to these examples. In these examples, the inventors used a GaAs single crystal growth apparatus as shown in FIG. 4 to grow GaAs single crystals by the vertical Bridgman method, with the growth direction being the <100> direction. Furthermore, GaAs single crystal substrates having a {100} plane as the major surface orientation were obtained from the GaAs single crystal ingot. In the following description, Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, and Samples 41 to 44 are examples, and Samples 111 to 113, Samples 121 to 123, Samples 131 to 134, and Samples 141 to 143 are comparative examples.

[0065] [Fabrication of GaAs Single Crystal Substrates] First, GaAs single crystal substrates of samples 11 to 14 and samples 111 to 113 each having a diameter of 76 mm were fabricated in the following manner.

[0066] <Sample 11> (First Step: Preparation Step S10) As shown in FIG. 4 , a GaAs single crystal growth apparatus 10, a seed crystal 8a made of a GaAs single crystal, and a mass made of GaAs polycrystal were prepared by known methods. The relationship between the straight body portion 53 of the crucible 5 and the crucible holder 6 provided in the GaAs single crystal growth apparatus 10 was as follows: That is, when the inner diameter of the straight body portion 53 of the crucible 5 is represented by D1 and the outer diameter of the crucible holder 6 is represented by D2, the ratio D2 / D1 was set to 1.05. Furthermore, the inner diameter D1 of the straight body portion 53 of the crucible 5 was 82 mm. The outer diameter D2 of the crucible holder 6 was 86.1 mm.

[0067] (Second Step: Step S20 for Obtaining GaAs Single Crystals) 1) Raw Material Charging Step S21: A seed crystal 8a was charged into the hollow portion of the seed crystal accommodating portion 51 of the crucible 5 provided in the GaAs single crystal growth apparatus 10 by a conventionally known method. Furthermore, multiple blocks of polycrystalline GaAs were charged into the increased diameter portion 52 and the straight body portion 53 of the crucible 5 and stacked. A trace amount of silicon (Si) was also added. Furthermore, a sealant made of BO was placed on the blocks.

[0068] 2) Raw Material Melting Step S22: Current was supplied to the heating element 7 to heat the crucible 5, thereby converting the sealant into a liquid sealant and converting the polycrystalline GaAs charged into the diameter-increasing portion 52 and the straight body portion 53 into GaAs melt 82. Furthermore, by controlling the heating element 7 that heats the seed crystal accommodation portion 51, a portion of the seed crystal 8a in the hollow portion of the seed crystal accommodation portion 51 was also melted. This brought the remaining portion of the seed crystal 8a into contact with the GaAs melt 82.

[0069] 3) GaAs Single Crystal Growth Step S23 The output of the heating element 7 that heats the crucible 5 was controlled, and the crucible 5 was gradually lowered along its axis (towards the seed crystal accommodating portion 51) relative to the heating element 7, thereby forming a temperature gradient in the crucible 5 such that the temperature on the seed crystal 8a side was low and the temperature on the GaAs melt 82 side was high. This resulted in continuous crystal growth of a GaAs single crystal 81 from the GaAs melt 82 on the remaining portion of the seed crystal 8a. At this time, the second-order differential value obtained by second-order differentiation of the temperature at the interface between the GaAs single crystal 81 and the GaAs melt 82 at the position in the axial direction of the crucible 5 was 0.011°C / mm 2 The speed at which the crucible 5 was pulled downward along its axis was set to 2 mm / hour.

[0070] Subsequently, the output of the heating element 7 for heating the crucible 5 was controlled, and the crucible 5 was pulled downward along its axis relative to the heating element 7, thereby solidifying the GaAs melt 82, and thereby growing a GaAs single crystal 81 upward along the axis of the crucible 5. Thereafter, crystal growth of the GaAs single crystal 81 continued until solidification of the GaAs melt 82 remaining in the body portion 53 of the crucible 5 was completed, thereby obtaining an ingot of the GaAs single crystal 81.

[0071] (Third step: Step S30 of obtaining a GaAs single crystal substrate) Using conventionally known cutting and outer periphery grinding methods, wafers having a predetermined thickness were obtained from the ingot of GaAs single crystal 81 removed from crucible 5, and then GaAs single crystal substrates having circular main surfaces were obtained from the wafers. The main surfaces of the GaAs single crystal substrates were then polished to a mirror finish using a conventionally known method. As a result, a GaAs single crystal substrate having a diameter of 76 mm was obtained as sample 11. The surface roughness Sa of the main surface of the GaAs single crystal substrate was determined using the above-mentioned measurement method and was found to be 0.15 nm.

[0072] <Samples 12 to 14 and Samples 111 to 113> In preparation step S10, the inner diameter D1 of the straight body portion 53 of the crucible 5 provided in the GaAs single crystal growth apparatus 10 was set to 82 mm, the outer diameter D2 of the crucible holder 6 was changed so that the D2 / D1 ratio was as shown in Table 1, and in GaAs single crystal growth step S23, the output of the heating element 7 was controlled so that the second-order differential value was as shown in Table 1. The GaAs single crystal substrates of Samples 12 to 14 and Samples 111 to 113 were obtained in the same manner as Sample 11. The surface roughness Sa of the main surfaces of the GaAs single crystal substrates was determined by the above-mentioned measurement method, and was 0.15 nm in all cases.

[0073] Next, GaAs single crystal substrates of Samples 21 to 24 and Samples 121 to 123, each having a diameter of 100 mm, were prepared in the following manner.

[0074] <Sample 21> In the preparation step S10, the crucible 5 provided in the GaAs single crystal growth apparatus 10 was changed to one in which the inner diameter D1 of the straight body portion 53 was 106 mm, and the outer diameter D2 of the crucible holder 6 was changed to one in which the outer diameter D2 was 111.3 mm. In the GaAs single crystal growth step S23, the second-order differential value was 0.012°C / mm 2 A GaAs single crystal substrate of sample 21 was obtained in the same manner as sample 11, except that the output of heating element 7 was controlled so that the surface roughness Sa of the main surface of the GaAs single crystal substrate was found to be 0.15 nm by the above-mentioned measurement method.

[0075] <Samples 22 to 24 and Samples 121 to 123> In preparation step S10, the inner diameter D1 of the body portion 53 of the crucible 5 provided in the GaAs single crystal growth apparatus 10 was set to 106 mm, the outer diameter D2 of the crucible holder 6 was changed so that the D2 / D1 ratio was as shown in Table 2, and the output of the heating element 7 was controlled in GaAs single crystal growth step S23 so that the second-order differential value was as shown in Table 2. The GaAs single crystal substrates of Samples 22 to 24 and Samples 121 to 123 were obtained in the same manner as Sample 21. The surface roughness Sa of the main surfaces of the GaAs single crystal substrates was determined by the above-mentioned measurement method, and was 0.15 nm in all cases.

[0076] Next, GaAs single crystal substrates of samples 31 to 34 and samples 131 to 134 each having a diameter of 150 mm were prepared in the following manner.

[0077] <Sample 31> In the preparation step S10, the crucible 5 provided in the GaAs single crystal growth apparatus 10 was changed to one in which the inner diameter D1 of the straight body portion 53 was 156 mm, and the outer diameter D2 of the crucible holder 6 was changed to one in which the outer diameter D2 was 163.8 mm. In the GaAs single crystal growth step S23, the second-order differential value was 0.010°C / mm 2 A GaAs single crystal substrate of sample 31 was obtained in the same manner as sample 11, except that the output of heating element 7 was controlled so that the surface roughness Sa of the main surface of the GaAs single crystal substrate was found to be 0.15 nm by the above-mentioned measurement method.

[0078] <Samples 32 to 34 and Samples 131 to 133> In preparation step S10, the inner diameter D1 of the body portion 53 of the crucible 5 provided in the GaAs single crystal growth apparatus 10 was set to 156 mm, the outer diameter D2 of the crucible holder 6 was changed so that the D2 / D1 ratio was as shown in Table 3, and the output of the heating element 7 was controlled in GaAs single crystal growth step S23 so that the second-order differential value was as shown in Table 3. The GaAs single crystal substrates of Samples 32 to 34 and Samples 131 to 133 were obtained in the same manner as Sample 31. The surface roughness Sa of the main surfaces of the GaAs single crystal substrates was measured by the above-mentioned measurement method, and was 0.15 nm in all cases.

[0079] <Sample 134> GaAs single crystal substrates for sample 134 were obtained in the same manner as sample 34, except that the amount of Si added in trace amounts in raw material charging step S21 was reduced and the output of heating element 7 in GaAs single crystal growth step S23 was controlled so that the second-order differential values ​​were the values ​​shown in Table 3. The surface roughness Sa of the main surface of each of the GaAs single crystal substrates was determined by the above-mentioned measurement method and was found to be 0.15 nm.

[0080] Next, GaAs single crystal substrates of Samples 41 to 44 and Samples 141 to 143, each having a diameter of 200 mm, were prepared in the following manner.

[0081] <Sample 41> In the preparation step S10, the crucible 5 provided in the GaAs single crystal growth apparatus 10 was changed to one in which the inner diameter D1 of the straight body portion 53 was 206 mm, and the outer diameter D2 of the crucible holder 6 was changed to one in which the outer diameter D2 was 216.3 mm. In the GaAs single crystal growth step S23, the second-order differential value was 0.012°C / mm 2 A GaAs single crystal substrate of sample 41 was obtained in the same manner as sample 11, except that the output of heating element 7 was controlled so that the surface roughness Sa of the main surface of the GaAs single crystal substrate was found to be 0.15 nm by the above-mentioned measurement method.

[0082] <Samples 42 to 44, and Samples 141 to 143> In preparation step S10, the inner diameter D1 of the body portion 53 of the crucible 5 provided in the GaAs single crystal growth apparatus 10 was set to 206 mm, the outer diameter D2 of the crucible holder 6 was changed so that the D2 / D1 ratio was the value shown in Table 4, and in GaAs single crystal growth step S23, the output of the heating element 7 was controlled so that the second-order differential value was the value shown in Table 4. The GaAs single crystal substrates 42 to 44 and 141 to 143 were obtained in the same manner as sample 41, except that the surface roughness Sa of the main surfaces of the GaAs single crystal substrates was determined by the above-mentioned measurement method and was 0.15 nm in all cases.

[0083] <Characteristics Evaluation> The silicon atomic concentration, carrier concentration, boron atomic concentration, average dislocation density, and dislocation-free rate were determined for each of the GaAs single crystal substrates of Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, Samples 41 to 44, Samples 111 to 113, Samples 121 to 123, Samples 131 to 134, and Samples 141 to 143. The results are shown in Tables 1 to 4.

[0084] <Device Yield> VCSELs were fabricated according to the method disclosed in Japanese Patent Application Laid-Open No. 2008-283137 using the GaAs single crystal substrates of Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, Samples 41 to 44, Samples 111 to 113, Samples 121 to 123, Samples 131 to 134, and Samples 141 to 143. The device yield (%) was calculated by multiplying the processing yield, which indicates the percentage of VCSEL-formed wafers containing multiple VCSEL portions that could be obtained from the GaAs single crystal substrates without cracking, chipping, or the like occurring during processing, by the performance yield, which indicates the percentage of VCSELs obtained from the wafers that satisfied the required predetermined performance. The "performance yield" was evaluated using the following accelerated degradation test. The "VCSEL portion" refers to an element-like portion on the wafer that can function as a VCSEL when the VCSEL-formed wafer is divided and mounted. The size of the VCSEL portion was set so that each VCSEL had a length of 500 μm and a width of 500 μm.

[0085] First, before conducting the accelerated degradation test, initial characteristics were evaluated for each VCSEL portion in the VCSEL-formed wafer fabricated for each sample in the on-wafer state. In the initial characteristic evaluation, VCSEL portions with an optical output of 4 mW or more at an operating current of 9 mA were determined to be good products. Furthermore, VCSEL portions with an optical output of less than 4 mW at an operating current of 9 mA were marked as defective on the wafer. Next, the wafer was divided into chips. Next, 40 good chips (i.e., unmarked chips) were randomly selected from the chips and mounted to obtain VCSELs. Furthermore, an accelerated degradation test was conducted on the VCSELs by applying an applied current of 18 mA at an ambient temperature of 80°C for 100 hours. After that, each VCSEL was returned to room temperature, and the optical output at an operating current of 9 mA was evaluated. In the above evaluation, VCSELs whose optical output had decreased by 10% or less (i.e., optical output of 3.6 mW or more) from before the accelerated aging test were considered to be good products, and the ratio of good products to the 40 VCSELs was taken as the performance yield. The results are shown in Tables 1 to 4.

[0086]

[0087]

[0088]

[0089]

[0090] <Discussion> In the GaAs single crystal substrates of Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, and Samples 41 to 44, the average dislocation density on the main surface was 5 cm -2 More than 100cm -2 The dislocation-free rate was 97.0% or more and 99.5% or less. Furthermore, the silicon atomic concentration was 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration is 1.0×10 18 cm -3 Above 4.0 x 10 18 cm -3 or less. Furthermore, the device yields for these GaAs single crystal substrates were 85% or more. In contrast, the GaAs single crystal substrates of Samples 111 to 113, Samples 121 to 123, Samples 131 to 134, and Samples 141 to 143 did not satisfy the above ranges for at least one of the average surface dislocation density, dislocation-free rate, silicon atomic concentration, or carrier concentration. In such cases, the device yields for these GaAs single crystal substrates were less than 85%. The GaAs single crystal substrates of Samples 113, 123, 133, and 143 had dislocation-free rates of 100%. However, the device yield of the GaAs single crystal substrates of Samples 113, 123, 133, and 143 was worse than that of the GaAs single crystal substrates of Samples 11 to 14, 21 to 24, 31 to 34, and 41 to 44 due to the occurrence of cracks, chips, etc. when obtaining the VCSEL-formed wafers.

[0091] Although the embodiments and examples of the present disclosure have been described above, it is also planned from the beginning that the configurations of the above-described embodiments and examples may be appropriately combined.

[0092] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims, not by the embodiments and examples described above, and is intended to include meanings equivalent to the claims and all modifications within the scope of the claims.

[0093] 1 Gallium arsenide single crystal substrate (GaAs single crystal substrate), 11 Main surface, t Dislocation, G Virtual lattice, S Slip line, 10 GaAs single crystal growth apparatus 5 Crucible, 51 Seed crystal accommodation section, 52 Diameter increasing section, 53 Straight body section, 6 Crucible holder, 7 Heating element, 75 Thermocouple, 8a Seed crystal, 81 Gallium arsenide single crystal (GaAs single crystal), 82 Gallium arsenide melt (GaAs melt), D1 Inner diameter of straight body section, D2 Outer diameter of crucible holder, z Direction from bottom to top of crucible along the axial direction of the crucible, r Diameter direction of crucible, S10 Preparation step, S20 Step of obtaining GaAs single crystal, S21 Raw material loading step, S22 A raw material melting step, S23 a GaAs single crystal growing step, and S30 a step of obtaining a GaAs single crystal substrate.

Claims

1. A gallium arsenide single crystal substrate having a circular major surface, The average dislocation density of the main surface is 5 cm -2 More than 100cm -2 is as follows: a virtual lattice is formed by arranging as many squares, each 2 mm on a side, in parallel as possible on the main surface without overlapping each other, the ratio of the number of squares in which no dislocations exist to the total number of squares constituting the lattice is 97.0% or more and 99.5% or less, The diameter of the gallium arsenide single crystal substrate is 70 mm or more; the gallium arsenide single crystal substrate comprises silicon; The atomic concentration of silicon is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 is as follows: The carrier concentration of the gallium arsenide single crystal substrate is 1.0×10 18 cm -3 Above 4.0 x 10 18 cm -3 The following is a gallium arsenide single crystal substrate.

2. the crystal plane of the main surface is a {100} plane of a gallium arsenide single crystal or a plane having an off angle of more than 0° and not more than 3° from the {100} plane of the gallium arsenide single crystal, The dislocation is contained in a slip line, 2. The gallium arsenide single crystal substrate according to claim 1, wherein the slip lines are present from the outer periphery of the main surface to the inside along at least one direction selected from the group consisting of four directions equivalent to the [01-1] direction of the gallium arsenide single crystal.

3. 2. The gallium arsenide single crystal substrate according to claim 1, wherein the diameter of the gallium arsenide single crystal substrate is not less than 70 mm and not more than 210 mm.

4. 3. The gallium arsenide single crystal substrate according to claim 2, wherein the diameter of the gallium arsenide single crystal substrate is not less than 70 mm and not more than 210 mm.

5. the gallium arsenide single crystal substrate contains boron; The atomic concentration of boron is 1.0×10 18 cm -3 Above 1.0 x 10 19 cm -3 5. The gallium arsenide single crystal substrate according to claim 1 , wherein:

6. A method for producing a gallium arsenide single crystal substrate having a circular main surface, comprising the steps of: The manufacturing method includes: Obtaining a gallium arsenide single crystal by performing crystal growth using a gallium arsenide single crystal growth apparatus; and obtaining the gallium arsenide single crystal substrate by processing the gallium arsenide single crystal; The gallium arsenide single crystal growth apparatus includes a crucible, a crucible holder that holds the crucible, and a heating element that heats the crucible; The crucible includes a cylindrical seed crystal accommodating portion, an increased diameter portion connected to the seed crystal accommodating portion, and a straight body portion connected to the increased diameter portion, The seed crystal accommodating portion has a hollow portion that opens to a side connected to the increased diameter portion and has a bottom wall formed on the side opposite to the increased diameter portion, The increased diameter portion has a truncated cone shape expanding in an axial direction of the crucible and is connected to the seed crystal accommodation portion at a small diameter side of the increased diameter portion; The straight body portion has a hollow cylindrical shape and is connected to the large diameter side of the increased diameter portion, the crucible holder holds the increased diameter portion without contacting the body portion, a gallium arsenide single crystal substrate manufacturing method, wherein, when an inner diameter of the straight body portion is represented as D1 and an outer diameter of the crucible holding stand is represented as D2, D1 and D2 satisfy a relationship of 1.05≦D2 / D1<1.5, and the units of D1 and D2 are mm.

7. The step of obtaining a gallium arsenide single crystal comprises: a step of accommodating a seed crystal in the seed crystal accommodation portion and accommodating a lump of gallium arsenide together with silicon in the increased diameter portion and the straight body portion; heating the crucible with the heating element to melt a portion of the seed crystal and the gallium arsenide into a gallium arsenide melt and bring the gallium arsenide melt into contact with the remainder of the seed crystal; and growing the gallium arsenide single crystal from the gallium arsenide melt on the remainder of the seed crystal; In the crystal growing step, a value obtained by second-order differentiation of a temperature at an interface between the gallium arsenide single crystal and the gallium arsenide melt with respect to a position at the interface in the axial direction of the crucible is 0.003° C. / mm 2 0.012℃ / mm or more 2 The execution is controlled as follows: The positive direction of the position is a direction from the bottom to the top of the crucible along the axial direction, The silicon concentration of the gallium arsenide single crystal substrate is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 The method for producing a gallium arsenide single crystal substrate according to claim 6, wherein: