Semiconductor chip alignment method, bonding method, electronic component manufacturing device, and electronic component manufacturing system

Abstract

An alignment method for a first semiconductor chip (221) and a second semiconductor chip (231) to be stacked, wherein the first semiconductor chip (221) is ultrasonically vibrated, a lower surface (231a) of the second semiconductor chip (231) is brought close to an upper surface (221a) of the first semiconductor chip (221) so as to overlap the first semiconductor chip (221) that is vibrating ultrasonically and the second semiconductor chip (231) is released to self-align the second semiconductor chip (231) on the first semiconductor chip (221).

Description

Semiconductor chip alignment method, bonding method, electronic component manufacturing device, and electronic component manufacturing system

[0001] The present invention relates to an alignment method for stacked semiconductor chips, a bonding method, an electronic component manufacturing apparatus, and the configuration of an electronic component manufacturing system.

[0002] A method is used in which a semiconductor chip is stacked on top of a semiconductor chip having solder bumps formed on its electrodes, and the semiconductor chips are temporarily bonded by pressing, and then heated in a reflow furnace to cause self-alignment due to the surface tension and interfacial tension when the solder becomes liquid, and then the temperature is lowered to solidify the solder, thereby stacking and bonding the semiconductor chips (see, for example, Patent Document 1).In this method, after the solder has solidified, resin is filled into the gaps between the semiconductor chips to seal them and form a stacked electronic component.

[0003] JP 2009-110995 A

[0004] Incidentally, the conventional technology described in Patent Document 1 is capable of self-aligning stacked semiconductor chips using molten solder, but the process is complicated, requiring the solder to be solidified and then resin to be filled into the gaps, leaving room for improvement.

[0005] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a method for easily aligning and bonding stacked semiconductor chips.

[0006] The alignment method of the present invention is a method for aligning a first semiconductor chip and a second semiconductor chip that are stacked, and is characterized by ultrasonically vibrating the first semiconductor chip, bringing the bottom surface of the second semiconductor chip close to the top surface of the first semiconductor chip so that it overlaps the ultrasonically vibrating first semiconductor chip, thereby opening the second semiconductor chip, and allowing the second semiconductor chip to self-align on top of the first semiconductor chip.

[0007] In this way, the upper semiconductor chip is self-aligned onto the lower semiconductor chip by ultrasonically vibrating the lower semiconductor chip, so that the semiconductor chips can be self-aligned in a simple manner.

[0008] In the alignment method of the present invention, the first semiconductor chip and the second semiconductor chip may have the same outer shape.

[0009] This makes it possible to improve the accuracy of self-alignment.

[0010] In the self-alignment method of the present invention, ultrasonic vibration may be performed by ultrasonically vibrating a wafer or substrate to ultrasonically vibrate a plurality of first semiconductor chips mounted on the wafer or substrate, and self-alignment may be performed by repeatedly performing an operation for each of the plurality of first semiconductor chips to bring the bottom surface of a second semiconductor chip close to the top surface of a first semiconductor chip so that the second semiconductor chip overlaps the ultrasonically vibrating first semiconductor chip, and then releasing the second semiconductor chip, thereby self-aligning the plurality of second semiconductor chips on the plurality of first semiconductor chips.

[0011] This allows multiple second semiconductor chips to be self-aligned simultaneously on multiple first semiconductor chips. Furthermore, because ultrasonic vibration is not stopped until the multiple second semiconductor chips are self-aligned on each of the first semiconductor chips, it is possible to prevent foreign matter from adhering to the first semiconductor chips above which the second semiconductor chips are not floating, thereby improving bonding quality.

[0012] The bonding method of the present invention is a bonding method for stacking and bonding a second semiconductor chip on top of a first semiconductor chip, and is characterized by comprising: an ultrasonic vibration step of ultrasonically vibrating the first semiconductor chip; a self-alignment step of opening the second semiconductor chip by bringing the bottom surface of the second semiconductor chip close to the top surface of the first semiconductor chip so that it overlaps the ultrasonically vibrating first semiconductor chip, and self-aligning the second semiconductor chip on top of the first semiconductor chip; and a bonding step of reducing the ultrasonic vibration of the first semiconductor chip until the bottom surface of the second semiconductor chip contacts the top surface of the first semiconductor chip, and stacking and bonding the second semiconductor chip on the first semiconductor chip.

[0013] This allows semiconductor chips to be stacked and bonded in a simple manner.

[0014] In the bonding method of the present invention, the first semiconductor chip and the second semiconductor chip may have the same outer shape.

[0015] This makes it possible to improve the accuracy of self-alignment.

[0016] In the bonding method of the present invention, the ultrasonic vibration step ultrasonically vibrates a plurality of first semiconductor chips mounted on the wafer or substrate by ultrasonically vibrating the wafer or substrate, the self-alignment step repeatedly performs an operation for each of the plurality of first semiconductor chips to bring the bottom surface of a second semiconductor chip close to the top surface of the first semiconductor chip so that the second semiconductor chip overlaps the ultrasonically vibrated first semiconductor chip, thereby self-aligning the plurality of second semiconductor chips on the plurality of first semiconductor chips, and the bonding step may reduce the ultrasonic vibration of the wafer or substrate until the bottom surfaces of the second semiconductor chips contact the top surfaces of the first semiconductor chips, thereby stacking and bonding each second semiconductor chip to each first semiconductor chip.

[0017] This allows the multiple second semiconductor chips to be self-aligned and bonded simultaneously onto the multiple first semiconductor chips. Furthermore, because ultrasonic vibration is not stopped until the multiple second semiconductor chips are self-aligned onto the respective first semiconductor chips, it is possible to prevent foreign matter from adhering to the first semiconductor chips above which the second semiconductor chips are not floating, thereby improving bonding quality.

[0018] The bonding method of the present invention includes a first hydrophilization step of hydrophilizing the upper surface of a first semiconductor chip, and a second hydrophilization step of hydrophilizing the lower surface of a second semiconductor chip, and the bonding step may include a hydrophilization bonding step of contacting and bonding the lower surface of a hydrophilized second semiconductor chip with the upper surface of the hydrophilized first semiconductor chip, and a thermal diffusion bonding step of heating the hydrophilically bonded first semiconductor chip and second semiconductor chip to thermally diffuse bond the electrodes of the first semiconductor chip and the electrodes of the second semiconductor chip.

[0019] In this way, by bonding the surfaces of the semiconductor chips together by hydrophilic bonding and bonding the electrodes by thermal diffusion bonding, stacked bonding of semiconductor chips can be achieved in a simple manner.

[0020] The bonding method of the present invention may include a third hydrophilization step of hydrophilizing each of the upper surfaces of a plurality of first semiconductor chips mounted on a wafer or substrate, and a fourth hydrophilization step of hydrophilizing each of the lower surfaces of a plurality of second semiconductor chips, and the bonding step may include a hydrophilization bonding step of bringing each of the lower surfaces of each of the hydrophilized second semiconductor chips into contact with each of the upper surfaces of each of the hydrophilized first semiconductor chips to bond them, and a thermal diffusion bonding step of heating each of the hydrophilically bonded first semiconductor chips and each of the second semiconductor chips together with the wafer or substrate to thermally diffuse bond each of the electrodes of each of the first semiconductor chips to each of the electrodes of each of the second semiconductor chips.

[0021] This allows a plurality of semiconductor chips to be simultaneously hydrophilically bonded and each electrode to be simultaneously thermally diffused and bonded.

[0022] The bonding method of the present invention includes a first activation step of activating the top surface of the first semiconductor chip and a second activation step of activating the bottom surface of the second semiconductor chip, and the bonding step may involve bonding the bottom surface of the activated second semiconductor chip to the top surface of the activated first semiconductor chip by surface activated bonding.

[0023] This allows stacking and bonding of semiconductor chips by surface activated bonding.

[0024] The electronic component manufacturing apparatus of the present invention is an electronic component manufacturing apparatus for stacking and bonding a second semiconductor chip to a first semiconductor chip, and includes a stage for suction-fixing the first semiconductor chip to an upper suction surface, a collet for gripping and releasing the second semiconductor chip, a bonding head for moving the collet in a direction along the suction surface of the stage and in a direction toward and away from the suction surface, an ultrasonic vibrator for ultrasonically vibrating the stage, and a control unit for adjusting the operations of the collet, the bonding head, and the ultrasonic vibrator, the control unit including a processor for processing information, and the processor for controlling the speed of the stage by the ultrasonic vibrator. the stage is ultrasonically vibrated to ultrasonically vibrate the first semiconductor chip, the collet holding the second semiconductor chip is moved by the bonding head to a position where it overlaps the first semiconductor chip, the collet is lowered until the bottom surface of the second semiconductor chip is close to the top surface of the first semiconductor chip, the collet is caused to release the second semiconductor chip so that the second semiconductor chip self-aligns over the first semiconductor chip, the output of the ultrasonic vibrator is reduced to bring the bottom surface of the second semiconductor chip into contact with the top surface of the first semiconductor chip, and the second semiconductor chip is stacked and bonded to the first semiconductor chip.

[0025] In the electronic component manufacturing apparatus of the present invention, the first semiconductor chip and the second semiconductor chip may have the same outer shape.

[0026] In the electronic component manufacturing apparatus of the present invention, the stage may suction and fix a wafer or substrate on which a plurality of first semiconductor chips are mounted, and the processor of the control unit may ultrasonically vibrate the stage using an ultrasonic vibrator to ultrasonically vibrate the plurality of first semiconductor chips mounted on the wafer or substrate, repeatedly perform the following operations: move a collet holding a second semiconductor chip using a bonding head to a position where it overlaps the first semiconductor chip, lower the collet until it comes close to the top surface of the first semiconductor chip, and have the collet release the second semiconductor chip, self-align the plurality of second semiconductor chips on the plurality of first semiconductor chips, reduce the output of the ultrasonic vibrator to bring the bottom surfaces of the second semiconductor chips into contact with the top surfaces of the first semiconductor chips, and stack-bond each second semiconductor chip to each first semiconductor chip.

[0027] The electronic component manufacturing system of the present invention is an electronic component manufacturing system that includes an electronic component manufacturing apparatus, and further includes a hydrophilization apparatus and a heating apparatus, wherein the hydrophilization apparatus hydrophilizes the upper surface of a first semiconductor chip and the lower surface of a second semiconductor chip and supplies them to the electronic component manufacturing apparatus, the processor of the electronic component manufacturing apparatus reduces the output of the ultrasonic vibrator to bring the hydrophilized lower surface of the second semiconductor chip into contact with the hydrophilized upper surface of the first semiconductor chip, thereby hydrophilically bonding the first semiconductor chip and the second semiconductor chip, and the heating apparatus heats the bonded assembly in which the second semiconductor chip is hydrophilically bonded to the first semiconductor chip, thereby thermally diffusing bonding the electrodes of the first semiconductor chip and the electrodes of the second semiconductor chip.

[0028] This makes it possible to efficiently manufacture electronic components in which semiconductor chips are stacked.

[0029] The electronic component manufacturing system of the present invention is an electronic component manufacturing system that includes an electronic component manufacturing apparatus, and further includes a hydrophilization apparatus and a heating apparatus, wherein the hydrophilization apparatus hydrophilizes the upper surfaces of each first semiconductor chip and the lower surfaces of each second semiconductor chip and supplies them to the electronic component manufacturing apparatus, the processor of the electronic component manufacturing apparatus reduces the output of the ultrasonic vibrator to bring the hydrophilized lower surfaces of each second semiconductor chip into contact with the hydrophilized upper surfaces of each first semiconductor chip, thereby hydrophilically bonding each first semiconductor chip and each second semiconductor chip, and the heating apparatus heats the bonded assembly in which the second semiconductor chips are hydrophilically bonded to each first semiconductor chip, thereby thermally diffusing bonding each electrode of each first semiconductor chip and each electrode of each second semiconductor chip.

[0030] This makes it possible to efficiently manufacture electronic components in which semiconductor chips are stacked.

[0031] The present invention makes it possible to align and bond stacked semiconductor chips in a simple manner.

[0032] 7 is a system diagram showing a schematic configuration of an electronic component manufacturing system according to an embodiment. FIG. 8 is a system diagram showing the configuration of a bonding apparatus according to an embodiment. FIG. 9 is a flowchart showing the operation of the electronic component manufacturing system shown in FIG. 1. FIG. 10 is an explanatory diagram showing a process of carrying in a wafer having a first semiconductor chip attached thereto and a second semiconductor chip into the bonding apparatus shown in FIG. 2. FIG. 11 is an explanatory diagram showing a process of picking up a second semiconductor chip and aligning it over the first semiconductor chip in the bonding apparatus shown in FIG. 2. FIG. 12 is an explanatory diagram showing a state in which ultrasonic vibration is started with the second semiconductor chip aligned over the first semiconductor chip and the collet is lowered to bring it close to the first semiconductor chip. FIG. 13 is an explanatory diagram showing self-alignment of the second semiconductor chip. FIG. 14 is a detailed cross-sectional view of part A shown in FIG. 7. FIG. 15 is an explanatory diagram showing hydrophilic bonding of the second semiconductor chip. FIG. 16 is a detailed cross-sectional view of part B shown in FIG. 17. FIG. 18 is an explanatory diagram showing self-alignment of a second second semiconductor chip. FIG. 19 is an explanatory diagram showing an intermediate product in which hydrophilic bonding of all second semiconductor chips has been completed. FIG. 11 is an explanatory diagram showing a carrying-out process of carrying out the intermediate product to a hydrophilic device. FIG. 12 is an explanatory diagram showing a thermal diffusion bonding process of an electronic component in which a predetermined number of second semiconductor chips are stacked. Fig. 15 is a flowchart showing another operation of the electronic component manufacturing system shown in Fig. 1. Fig. 16 is an explanatory diagram showing self-alignment in the bonding apparatus shown in Fig. 2 during the operation shown in Fig. 15. Fig. 17 is an explanatory diagram showing hydrophilic bonding in the bonding apparatus shown in Fig. 2 during the operation shown in Fig. 15. Fig. 18 is a system diagram showing a schematic configuration of an electronic component manufacturing system of another embodiment.

[0033] The following describes an embodiment of an electronic component manufacturing system 100. As shown in Figure 1, the electronic component manufacturing system 100 includes a bonding device 10, which is an electronic component manufacturing device, a hydrophilization device 50, a heating device 60, a first conveying device 55, and a second conveying device 65.

[0034] The bonding apparatus 10 stacks and bonds the second semiconductor chip 23 on the first semiconductor chip 22. Details of the bonding apparatus 10 will be described later with reference to Fig. 2. In this embodiment, the first semiconductor chip 22 and the second semiconductor chip 23 have the same outer shape.

[0035] The hydrophilization device 50 hydrophilizes the upper surface 22a of the first semiconductor chip 22 and the lower surface 23a of the second semiconductor chip 23. Various configurations of the hydrophilization device 50 are conceivable. For example, the hydrophilization device 50 may be configured to hydrophilize the upper surface 22a of the first semiconductor chip 22 and the lower surface 23a of the second semiconductor chip 23 by irradiating them with atmospheric pressure plasma. Alternatively, the upper surface 22a and the lower surface 23a may be washed with pure water or the like, and then the upper surface 22a and the lower surface 23a may be hydrophilized by atmospheric pressure plasma after washing.

[0036] The first transfer device 55 carries the second semiconductor chip 23, the lower surface 23a of which has been hydrophilized, into the bonding device 10, as indicated by arrow 56 in Fig. 1. The first transfer device 55 also carries the wafer 21, on which the first semiconductor chip 22, the upper surface 22a of which has been hydrophilized, is mounted, to the bonding device 10, as indicated by arrow 57 in Fig. 1. The first transfer device 55 also carries out the intermediate product 27, in which the second semiconductor chip 23 is bonded onto the first semiconductor chip 22 by the bonding device 10, to the hydrophilization device 50, as indicated by arrow 58 in Fig. 1, and carries the intermediate product 27, in which the upper surface 23d of the second semiconductor chip 23 has been hydrophilized by the hydrophilization device 50, into the bonding device 10, as indicated by arrow 59 in Fig. 1.

[0037] 1, second transport device 65 transports electronic component 28, which is a bonded body formed by stacking a predetermined number of second semiconductor chips 23 to 25 by bonding device 10, to heating device 60. Heating device 60 heats the transported electronic component 28 to thermally diffuse and bond the electrodes of first semiconductor chip 22 and the electrodes of each of second semiconductor chips 23 to 25.

[0038] Next, the structure of the bonding apparatus 10 will be described with reference to FIG. 2. As shown in FIG. 2, the bonding apparatus 10 includes a stage 11, a collet 12, a bonding head 13, a camera 14, a guide rail 15, an ultrasonic vibrator 16, a mounting table 17, and a control unit 40. In the following description, the direction in which the guide rail 15 extends is referred to as the Y direction, the direction perpendicular to the Y direction on a horizontal plane is referred to as the X direction, and the up-down direction is referred to as the Z direction. The mounting table 17 side is referred to as the negative Y direction, the stage 11 side is referred to as the positive Y direction, the near side of the page in FIG. 1 is referred to as the positive X direction, the far side of the page is referred to as the negative X direction, the upward direction is referred to as the positive Z direction, and the downward direction is referred to as the negative Z direction.

[0039] The stage 11 vacuum-sucks the first semiconductor chip 22 or the wafer 21 on which a plurality of first semiconductor chips 22 are mounted onto the upper suction surface 11a, thereby vacuum-sucking the first semiconductor chip 22.

[0040] The collet 12 is connected to the lower end of the bonding head 13, and sucks the second semiconductor chip 23 onto the tip thereof to hold the second semiconductor chip 23, and then releases the second semiconductor chip 23.

[0041] The bonding head 13 has an internal Y-direction drive motor 13M and is guided by a guide rail 15 to move in the Y direction as indicated by arrow 91 in Fig. 2. The bonding head 13 also has a built-in Z-direction drive motor 12M that moves the collet 12 in the Z direction as indicated by arrow 92 in Fig. 2. The guide rail 15 is moved in the X direction by an X-direction drive device (not shown). Therefore, the bonding head 13 and the X-direction drive device (not shown) move the collet 12 in the XY directions along the suction surface 11a of the stage 11, and in the Z direction that moves the collet 12 toward and away from the suction surface 11a.

[0042] The camera 14 is attached to the bonding head 13 and captures an image of the first semiconductor chip 22 sucked onto the suction surface 11 a of the stage 11 or the second semiconductor chip 23 placed on the mounting table 17 .

[0043] The ultrasonic vibrator 16 includes an ultrasonic vibrator therein, and is connected to the stage 11 to ultrasonically vibrate the stage 11 .

[0044] The mounting table 17 is a table on which the second semiconductor chip 23, the lower surface 23a of which has been hydrophilized by the hydrophilization device 50, is temporarily placed. The mounting table 17 may be configured so that the second semiconductor chip 23 can be placed on the upper surface in a non-contact manner by, for example, ultrasonic vibration, air pressure, or the like.

[0045] The control unit 40 is a computer that includes a CPU 41, which is a processor that processes information, and a memory 42 that stores operating programs and control data. Image data acquired by the camera 14 is input to the control unit 40. The control unit 40 detects the positions of the first semiconductor chip 22 and the second semiconductor chip 23 by performing image analysis of the input image data. In addition, the Z-direction drive motor 12M attached inside the bonding head 13 detects the position of the collet 12 in the Z direction and outputs the detected position to the control unit 40.

[0046] The Y-direction drive motor 13M, Z-direction drive motor 12M, X-direction drive device, collet 12, and ultrasonic vibrator 16 of the bonding head 13 operate according to commands from the control unit 40. The Y-direction drive motor 13M, Z-direction drive motor 12M, and X-direction drive device adjust the XYZ position of the collet 12 based on commands from the control unit 40. The collet 12 also suction-holds and releases the second semiconductor chip 23 based on commands from the control unit 40. The ultrasonic vibrator 16 applies ultrasonic vibrations to the stage 11 based on commands from the control unit 40.

[0047] Next, the operation of the electronic component manufacturing system 100 according to the embodiment will be described with reference to FIGS. 3 to 14 . The following description will discuss the operation of vacuum-adsorbing the wafer 21, on which three first semiconductor chips 22 are mounted, onto the suction surface 11a of the stage 11, and bonding a second semiconductor chip 23 onto each of the first semiconductor chips 22. When distinguishing between the three first semiconductor chips 22, they will be referred to as first semiconductor chips 221, 222, and 223. When distinguishing between the three second semiconductor chips 23, they will be referred to as second semiconductor chips 231, 232, and 233. The first semiconductor chips 221, 222, and 223 and the second semiconductor chips 231, 232, and 233 have the same external shape. The number of first semiconductor chips 22 mounted on the wafer 21 is not limited to three, and may be one or more.

[0048] First, the wafer 21 mounted with a plurality of first semiconductor chips 22 for manufacturing electronic components 28 (see FIG. 1 ) and a plurality of second semiconductor chips 23 are loaded into the hydrophilization device 50. The hydrophilization device 50 performs a hydrophilization process as shown in step S101 of FIG. 3 . The hydrophilization process hydrophilizes the upper surfaces 22 a of the first semiconductor chips 22 and the lower surfaces 23 a of the second semiconductor chips 23 by irradiating them with atmospheric pressure plasma. After the hydrophilization process is completed, the first transport device 55 performs a workpiece transport process as shown in step S102 of FIG. 3 , in which the first transport device 55 transports the wafer 21 mounted with the first semiconductor chips 22 and the second semiconductor chips 23 that have been subjected to the hydrophilization process to the bonding device 10.

[0049] As indicated by arrow 95a in Fig. 4, in the workpiece transport step, the first transport device 55 transports the second semiconductor chip 23, the lower surface 23a of which has been hydrophilized, onto the mounting table 17 inside the bonding device 10. Also, as indicated by arrow 95b in Fig. 4, in the workpiece transport step, the first transport device 55 transports the wafer 21, on which the first semiconductor chip 22, the hydrophilization of which has been completed, is mounted, to the vicinity of the suction surface 11a of the stage 11. The transported wafer 21 is transported by a feed device (not shown) onto the suction surface 11a of the stage 11 and fixed by suction at a predetermined position on the suction surface 11a.

[0050] Once the first semiconductor chip 22 and the second semiconductor chip 23 have been carried into their predetermined positions, the CPU 41 of the control unit 40 of the bonding apparatus 10 picks up the second semiconductor chip 23 in step S103 of FIG. 3. As shown in FIG. 4, the CPU 41 moves the bonding head 13 in the X and Y directions using the Y-direction drive motor 13M and the X-direction drive motor to move the collet 12 onto the first second semiconductor chip 231 placed on the mounting table 17. Then, the CPU 41 lowers the collet 12 using the Z-direction drive motor 12M as indicated by arrow 94 in FIG. 4, and the tip of the collet 12 sucks and grips the second semiconductor chip 231. Then, as indicated by arrow 96 in FIG. 5, the CPU 41 raises the collet 12 using the Z-direction drive motor 12M to pick up the second semiconductor chip 231.

[0051] Next, the CPU 41 aligns the second semiconductor chip 231, as shown in step S103 of FIG. 3. The CPU 41 moves the bonding head 13 in the positive Y direction, as shown by arrow 96 in FIG. 5, using the Y-direction drive motor 13M. The CPU 41 then detects the position of the first semiconductor chip 221 based on the image of the first semiconductor chip 221 captured by the camera 14. The CPU 41 then aligns the second semiconductor chip 231 by moving the bonding head 13 using the Y-direction drive motor 13M and the X-direction drive device so that the position of the second semiconductor chip 231 overlaps the position of the first semiconductor chip 221.

[0052] Next, the CPU 41 proceeds to step S104 in FIG. 3 to drive the ultrasonic vibrator 16 and start ultrasonically vibrating the stage 11, as indicated by arrow 97 in FIG. 6 . Then, the CPU 41 proceeds to step S105 in FIG. 3 to operate the Z-direction drive motor 12M to bring the lower surface 231 a of the second semiconductor chip 231 close to the upper surface 221 a of the first semiconductor chip 221, as indicated by arrow 98 in FIG. 6 . In this manner, when the second semiconductor chip 231 is brought close while the first semiconductor chip 221 is ultrasonically vibrating, an ultrasonic squeeze effect is generated between the upper surface 221 a of the first semiconductor chip 221 and the lower surface 231 a of the second semiconductor chip 231. The ultrasonic squeeze effect is an effect in which, when one of two flat plates facing each other across a minute gap is vibrated, a pressure higher than the outside pressure is generated in the gap due to the influence of viscosity in the gap. When this ultrasonic squeeze effect occurs, an ultrasonic squeeze air film 291 is formed between the upper surface 221a of the first semiconductor chip 221 and the lower surface 231a of the second semiconductor chip 231, preventing contact between the two, and a holding force is generated that holds the lower surface 231a of the second semiconductor chip 231 against the upper surface 211a of the first semiconductor chip 221. Here, the proximity distance between the lower surface 231a of the second semiconductor chip 231 and the upper surface 221a of the first semiconductor chip 221 may be slightly greater than the thickness H (see FIG. 8) of the ultrasonic squeeze air film 291. The thickness H of the ultrasonic squeeze air film 291 varies depending on the amplitude of the ultrasonic vibrations, but for example, when the thickness H of the ultrasonic squeeze air film 291 is several μm to 10 μm, the proximity distance may be approximately 10 μm to 20 μm.

[0053] Next, the CPU 41 causes the collet 12 to perform an opening operation as shown in step S105 of FIG. 3 , and then proceeds to step S106 of FIG. 3 to perform self-alignment. When the second semiconductor chip 231 is released from the collet 12, it separates from the tip of the collet 12 as shown in FIGS. 7 and 8 , and is held in a state where it is lifted above the upper surface 221 a of the first semiconductor chip 221 by the ultrasonic squeeze air film 291. The holding force generated by the ultrasonic squeeze effect occurs in both directions perpendicular to and parallel to the upper surface 221 a of the first semiconductor chip 221 (i.e., the planar direction). In other words, when the ultrasonic squeeze effect occurs, a force acts on the second semiconductor chip 231 in a direction that lifts it above the upper surface 221 a of the first semiconductor chip 221. Furthermore, when the ultrasonic squeeze effect occurs, the second semiconductor chip 231 tends to remain within the vibration plane. Therefore, even if the second semiconductor chip 231 is temporarily displaced in the planar direction due to an external force, the second semiconductor chip 231 will move in the planar direction so that its entirety is positioned within the vibration plane, and will attempt to return to a position directly facing the upper surface 221a of the first semiconductor chip 221.

[0054] In this embodiment, since the outer shapes of the first semiconductor chip 221 and the second semiconductor chip 231 are the same, the ultrasonic squeeze effect causes the second semiconductor chip 231 to automatically move in the planar direction so that its entirety is positioned within the vibration plane (i.e., within the area inside the outline of the top surface 221a of the first semiconductor chip 221). This causes the second semiconductor chip 231 to self-align in the planar direction. As shown in FIG. 8 , the positions of the electrodes 231b of the second semiconductor chip 231 and the electrodes 221b of the first semiconductor chip 221 are aligned.

[0055] Next, as shown in step S107 of FIG. 3 , the CPU 41 reduces the amplitude of the ultrasonic vibration of the stage 11 by the ultrasonic vibrator 16. As a result, the thickness H of the ultrasonic squeeze air film 291 shown in FIG. 8 gradually becomes thinner. When the CPU 41 reduces the amplitude of the ultrasonic vibration to a certain extent, the second semiconductor chip 231 falls onto the first semiconductor chip 221 due to gravity, as shown in FIGS. 9 and 10 , and the lower surface 231 a of the second semiconductor chip 231 comes into contact with the upper surface 221 a of the first semiconductor chip 221. Because the lower surface 231 a of the second semiconductor chip 231 and the upper surface 221 a of the first semiconductor chip 221 have been hydrophilized by the hydrophilization device 50, when the lower surface 231 a comes into contact with the upper surface 221 a, they are hydrophilically bonded at the bonding surface 301, as shown in step S108 of FIG. 3 .

[0056] The CPU 41 proceeds to step S109 in FIG. 3 and stops applying ultrasonic vibration to the stage 11 by the ultrasonic vibrator 16.

[0057] In step S110 of Fig. 3, the CPU 41 determines whether the second semiconductor chips 23 have been bonded to all of the first semiconductor chips 22 in a certain row (N rows). If the CPU 41 determines NO in step S110 of Fig. 3, the CPU 41 returns to step S103 of Fig. 3, picks up and aligns the second second semiconductor chip 232, performs self-alignment by ultrasonic vibration, and bonds the second second semiconductor chip 232 onto the second first semiconductor chip 222, as shown in Fig. 11. The CPU 41 repeatedly executes steps S103 to S109 of Fig. 3 until it determines YES in step S110 of Fig. 3.

[0058] Then, as shown in Fig. 12, three second semiconductor chips 231-233 are bonded onto the three first semiconductor chips 221-223, and when the intermediate product 27 is completed, the CPU 41 determines YES in step S110 of Fig. 3 and proceeds to step S111 of Fig. 3 to determine whether the second semiconductor chips 23, 24, and 25 have been stacked in a predetermined number of layers, for example, three layers in the case of the electronic component 28 shown in Fig. 1. If the CPU 41 determines NO in step S111 of Fig. 3, it releases the suction of the intermediate product 27 to the stage 11 and outputs an operation start signal to the first transport device 55. As a result, the first transport device 55 transports the intermediate product 27 to the hydrophilization device 50 as indicated by arrow 99 in Fig. 13 (work transport process). 3, the hydrophilizing apparatus 50 performs a hydrophilizing process on the upper surface 23d (see FIG. 1) of the second semiconductor chip 23 of the intermediate product 27, and transports the hydrophilized intermediate product 27 to the bonding apparatus 10. The bonding apparatus 10 performs the operations of steps S103 to S110 in FIG. 3 to bond the second tier second semiconductor chip 24 onto the first tier second semiconductor chip 23.

[0059] 3, the bonding apparatus 10 and the hydrophilization apparatus 50 repeatedly execute the operations of steps S101 to S111 and S113 to form an electronic component 28, which is a bonded body in which second semiconductor chips 23, 24, and 25 are stacked in three layers on top of a first semiconductor chip 22, as shown in FIG. 14. Once the electronic component 28 is formed, the CPU 41 determines YES in step S111 in FIG. 3, releases the suction of the electronic component 28 on the stage 11, and outputs an operation start signal to the second transport apparatus 65. This causes the second transport apparatus 65 to transport the electronic component 28 to the heating apparatus 60.

[0060] 3, heating device 60 heats electronic component 28, and as shown in detail in part C of Fig. 14, thermal diffusion bonding is performed between upper end surfaces 221c of electrodes 221b of first semiconductor chip 221 and lower end surfaces 231c of electrodes 231b of second semiconductor chip 231. When thermal diffusion bonding is complete, electronic component 28 becomes a finished product.

[0061] As described above, the bonding apparatus 10 of the embodiment can self-align the upper second semiconductor chip 23 onto the first semiconductor chip 22 by ultrasonically vibrating the lower first semiconductor chip 22, and can stack and bond the first semiconductor chip 22 and the second semiconductor chip 23 in a simple manner.

[0062] The configurations and operations of electronic component manufacturing system 100 and bonding apparatus 10 according to the embodiment have been described above, but the operations of bonding apparatus 10 in steps S103 to S106 in Fig. 3 are a method for self-aligning second semiconductor chip 23 on first semiconductor chip 22. Also, the operations of bonding apparatus 10 in steps S103 to S109 in Fig. 3 are a bonding method for stacking and bonding second semiconductor chip 23 on first semiconductor chip 22. Here, step S104 in Fig. 3 is an ultrasonic vibration step of the bonding method, steps S105 and S106 in Fig. 3 are self-alignment steps of the bonding method, and steps S107 to S109 in Fig. 3 are bonding steps of the bonding method. 3 is a first hydrophilization step and a second hydrophilization step of the bonding method, steps S107 to S109 of FIG. 3 are a hydrophilization bonding step of the bonding method, and step S112 of FIG. 3 is a thermal diffusion bonding step of the bonding method.

[0063] In the above description, the CPU 41 reduces the amplitude of ultrasonic vibration of the stage 11 by the ultrasonic vibrator 16 in step S107 of Fig. 3, causes the lower surface 231a of the second semiconductor chip 231 to contact the upper surface 221a of the first semiconductor chip 221 due to gravity in step S108 of Fig. 3, and then stops ultrasonic vibration of the stage 11 by the ultrasonic vibrator 16 in step S109 of Fig. 3, but this is not limiting. For example, the lower surface 231a of the second semiconductor chip 231 may be brought into contact with the upper surface 221a of the first semiconductor chip 221 by stopping the ultrasonic vibration of the stage 11 by the ultrasonic vibrator 16 without reducing the amplitude.

[0064] Next, other operations of the bonding apparatus 10 will be described with reference to Figures 15 to 17. Operations similar to those previously described with reference to Figures 3 to 14 will be assigned the same step numbers and will not be described again.

[0065] This operation ultrasonically vibrates a plurality of first semiconductor chips 22 mounted on a wafer 21, brings the lower surfaces 23a of a plurality of second semiconductor chips 23 close to and open to the upper surfaces 22a of the first semiconductor chips 22 so that they overlap the ultrasonically vibrating first semiconductor chips 22, respectively, causes the second semiconductor chips 23 to self-align simultaneously on the first semiconductor chips 22, and reduces the ultrasonic vibration to simultaneously stack and bond the second semiconductor chips 23 on the first semiconductor chips 22.

[0066] As shown in step S102 of Figure 15, the wafer 21 on which the three first semiconductor chips 221, 222, and 223 are mounted is vacuum-sucked onto the suction surface 11a of the stage 11, and the three second semiconductor chips 231, 232, and 233 are placed on the mounting table 17.

[0067] 15, the CPU 41 of the control unit 40 of the bonding apparatus 10 starts ultrasonic vibration of the stage 11 by the ultrasonic vibrator 16. As a result, the three first semiconductor chips 221, 222, and 223 mounted on the wafer 21 start ultrasonic vibration.

[0068] 15, CPU 41 aligns the first second semiconductor chip 231 with the first first semiconductor chip 221, and in step S203 in Fig. 15, brings second semiconductor chip 231 close to first semiconductor chip 221 and causes collet 12 to release second semiconductor chip 231. As a result, first second semiconductor chip 231 floats above first semiconductor chip 221 and is in a self-aligned state, as shown in step S204 in Fig. 3.

[0069] Next, in step S205 of Fig. 15, the CPU 41 determines whether all of the second semiconductor chips 23 in a certain row (row N) have been brought into a self-aligned state. If the determination in step S205 of Fig. 15 is NO, the CPU 41 returns to step S202 of Fig. 15, aligns the second second semiconductor chip 232 over the second first semiconductor chip 222, and executes the approach and release of the second semiconductor chip 232 in step S203 of Fig. 15. This brings the second second semiconductor chip 232 into a self-aligned state over the second first semiconductor chip 222.

[0070] Similarly, the CPU 41 causes the third second semiconductor chip 233 to be self-aligned on the third first semiconductor chip 223. As a result, the three second semiconductor chips 231 to 233 are simultaneously self-aligned on the three first semiconductor chips 221 to 223, as shown in FIG.

[0071] If the CPU 41 determines YES in step S205 of Fig. 15, the process proceeds to step S206 of Fig. 15, where it reduces the amplitude of the ultrasonic vibration of the ultrasonic vibrator 16. Then, the three second semiconductor chips 231, 232, 233 come into contact with the tops of the first semiconductor chips 221, 222, 223, respectively, due to gravity, and are hydrophilically bonded at their bonding surfaces 301, 302, 303, as shown in step S207 of Fig. 15 and Fig. 17. Then, the CPU 41 stops ultrasonic vibration of the stage 11 by the ultrasonic vibrator 16 in step S208 of Fig. 15.

[0072] As described above, this operation allows the plurality of second semiconductor chips 23 to be simultaneously self-aligned and bonded onto the plurality of first semiconductor chips 22. Furthermore, ultrasonic vibration is not stopped until the plurality of second semiconductor chips 23 are self-aligned onto the respective first semiconductor chips 22, so that it is possible to prevent foreign matter from adhering onto the first semiconductor chip 22 above which the second semiconductor chip 23 is not floating, thereby improving bonding quality.

[0073] Other operations of the electronic component manufacturing system 100 and the bonding apparatus 10 according to the embodiment have been described above, but the operations of the bonding apparatus 10 in steps S201 to S205 in Fig. 15 are a method for self-aligning the second semiconductor chip 23 on the first semiconductor chip 22. Also, the operations of the bonding apparatus 10 in steps S206 to S208 in Fig. 15 are a bonding method for stacking and bonding the second semiconductor chip 23 on the first semiconductor chip 22. Here, step S201 in Fig. 15 is an ultrasonic vibration step of the bonding method, steps S202 to S205 in Fig. 15 are self-alignment steps of the bonding method, and steps S206 to S208 in Fig. 15 are bonding steps of the bonding method. 15 is a third hydrophilization step and a fourth hydrophilization step of the bonding method, steps S206 to S208 of FIG. 15 are hydrophilization bonding steps of the bonding method, and step S112 of FIG. 15 is a thermal diffusion bonding step of the bonding method.

[0074] Next, an electronic component manufacturing system 200 according to another embodiment will be described with reference to Fig. 18. The electronic component manufacturing system 200 bonds the first semiconductor chip 22 and the second semiconductor chip 23 together by surface activated bonding instead of hydrophilic bonding.

[0075] As shown in FIG. 18, the electronic component manufacturing system 200 comprises a surface activation device 70, a first transfer device 55, and a bonding device 10.

[0076] The surface activation device 70 is a device that irradiates the upper surface 22a of the first semiconductor chip 22 and the lower surface 23a of the second semiconductor chip 23 with an inert atomic beam of argon in a vacuum to activate the surfaces of the upper surface 22a and the lower surface 23a. The surface activation device 70 performs a first activation process to activate the upper surface 22a of the first semiconductor chip 22 and a second activation process to activate the lower surface 23a of the second semiconductor chip 23. Furthermore, the bonding device 10 performs self-alignment of the second semiconductor chip 23, and then performs surface activation bonding by matching the activated lower surface 23a of the second semiconductor chip 23 with the activated upper surface 22a of the first semiconductor chip 22. In this case, the bonding device 10 may be configured to perform surface activation bonding in a vacuum.

[0077] In the above description, the first semiconductor chip 22 and the second semiconductor chip 23 have the same external shape, but this is not limited to this. The second semiconductor chip 23 may be larger than the first semiconductor chip 22, or conversely, may be smaller than the first semiconductor chip 22, as long as the external shape is similar to that of the first semiconductor chip 22.

[0078] In the above description, the wafer 21 on which a plurality of first semiconductor chips 22 are mounted is vacuum-sucked onto the suction surface 11a of the stage 11, and the second semiconductor chips 23 are stacked and bonded onto each of the first semiconductor chips 22. However, this is not limiting. For example, a substrate on which a plurality of first semiconductor chips 22 are mounted may be vacuum-sucked onto the suction surface 11a of the stage 11, and the second semiconductor chips 23 may be stacked and bonded. Furthermore, the plurality of first semiconductor chips 22 may be vacuum-sucked onto the suction surface 11a of the stage 11 directly or via a holding jig, and the second semiconductor chips 23 may be stacked and bonded.

[0079] 10 Bonding device, 11 Stage, 11a Suction surface, 12 Collet, 12M Z-direction drive motor, 13 Bonding head, 13M Y-direction drive motor, 14 Camera, 15 Guide rail, 16 Ultrasonic vibrator, 17 Mounting table, 21 Wafer, 22, 221, 222, 223 First semiconductor chip, 22a, 221a, 23d Upper surface, 23, 24, 25, 231, 232, 233 Second semiconductor chip, 23a, 231a Lower surface, 27 Intermediate product, 28 Electronic component, 40 Control unit, 41 CPU, 42 Memory, 50 Hydrophilization device, 55 First conveying device, 60 Heating device, 65 Second conveying device, 70 Surface activation device, 75 Metal thin film forming device, 100, 200, 300 Electronic component manufacturing system, 221b, 231b electrodes, 221c upper end surface, 231c lower end surface, 291 ultrasonic squeeze air film, 301, 302, 303 joining surfaces.

Claims

1. A method for aligning a first semiconductor chip and a second semiconductor chip that are stacked, comprising: ultrasonically vibrating the first semiconductor chip; bringing a lower surface of the second semiconductor chip close to an upper surface of the first semiconductor chip so as to overlap the ultrasonically vibrated first semiconductor chip, thereby releasing the second semiconductor chip, and self-aligning the second semiconductor chip above the first semiconductor chip in a state where the second semiconductor chip is floating above the upper surface of the first semiconductor chip; An alignment method comprising:

2. 2. The alignment method according to claim 1, the first semiconductor chip and the second semiconductor chip have the same outer shape; An alignment method comprising:

3. 3. The alignment method according to claim 2, the ultrasonic vibration is applied to a wafer or a substrate, thereby ultrasonically vibrating the plurality of first semiconductor chips mounted on the wafer or the substrate; the self-alignment includes repeatedly performing an operation for each of a plurality of first semiconductor chips, in which the bottom surface of one of the second semiconductor chips is brought close to the top surface of one of the first semiconductor chips so as to overlap one of the first semiconductor chips that is being ultrasonically vibrated, and then releasing the one of the second semiconductor chips, thereby self-aligning the plurality of second semiconductor chips onto the plurality of first semiconductor chips; An alignment method comprising:

4. A bonding method for stacking and bonding a second semiconductor chip onto a first semiconductor chip, comprising: an ultrasonic vibration applying step of ultrasonically vibrating the first semiconductor chip; a self-alignment step of bringing a bottom surface of the second semiconductor chip close to an upper surface of the first semiconductor chip so as to overlap the ultrasonically vibrated first semiconductor chip, thereby releasing the second semiconductor chip, and self-aligning the second semiconductor chip above the first semiconductor chip in a state where the second semiconductor chip is floating above the upper surface of the first semiconductor chip; a bonding step of reducing ultrasonic vibration of the first semiconductor chip until the bottom surface of the second semiconductor chip comes into contact with the top surface of the first semiconductor chip, and stacking and bonding the second semiconductor chip to the first semiconductor chip; A joining method characterized by:

5. The joining method according to claim 4, the first semiconductor chip and the second semiconductor chip have the same outer shape; A joining method characterized by:

6. The joining method according to claim 5, the ultrasonic vibration applying step ultrasonically vibrates a wafer or a substrate to ultrasonically vibrate the plurality of first semiconductor chips mounted on the wafer or the substrate; the self-alignment step includes repeatedly performing an operation for each of a plurality of first semiconductor chips, in which the bottom surface of one of the second semiconductor chips is brought close to the top surface of one of the first semiconductor chips so as to overlap one of the first semiconductor chips being ultrasonically vibrated, and then releasing the one of the second semiconductor chips, thereby self-aligning the plurality of second semiconductor chips onto the plurality of first semiconductor chips; the bonding step includes reducing ultrasonic vibration of the wafer or the substrate until the lower surfaces of the second semiconductor chips contact the upper surfaces of the first semiconductor chips, and stacking and bonding the second semiconductor chips to the first semiconductor chips; A joining method characterized by:

7. The joining method according to claim 5, a first hydrophilization step of hydrophilizing the top surface of the first semiconductor chip; a second hydrophilization step of hydrophilizing the lower surface of the second semiconductor chip, the bonding step includes a hydrophilic bonding step of bringing the hydrophilic lower surface of the second semiconductor chip into contact with the hydrophilic upper surface of the first semiconductor chip to bond them together, and a thermal diffusion bonding step of heating the hydrophilic bonded first semiconductor chip and second semiconductor chip to thermally diffuse bond electrodes of the first semiconductor chip and electrodes of the second semiconductor chip together; A joining method characterized by:

8. The joining method according to claim 6, a third hydrophilization step of hydrophilizing the top surfaces of the plurality of first semiconductor chips mounted on the wafer or the substrate; a fourth hydrophilization step of hydrophilizing the lower surfaces of the plurality of second semiconductor chips, the bonding step includes a hydrophilic bonding step of bringing the hydrophilized lower surfaces of the second semiconductor chips into contact with the hydrophilized upper surfaces of the first semiconductor chips, and bonding them together; and a thermal diffusion bonding step of heating the hydrophilically bonded first semiconductor chips and second semiconductor chips together with the wafer or the substrate to thermally diffuse bond each electrode of the first semiconductor chip to each electrode of the second semiconductor chip, A joining method characterized by:

9. The joining method according to claim 5, a first activation step of activating the top surface of the first semiconductor chip; a second activation step of activating the lower surface of the second semiconductor chip; the bonding step includes bonding the lower surface of the activated second semiconductor chip to the upper surface of the activated first semiconductor chip by surface activated bonding; A joining method characterized by:

10. An electronic component manufacturing apparatus for stacking and bonding a second semiconductor chip onto a first semiconductor chip, a stage for suction-fixing the first semiconductor chip to an upper suction surface thereof; a collet for gripping and releasing the second semiconductor chip; a bonding head that moves the collet in a direction along the suction surface of the stage and in a direction toward and away from the suction surface; an ultrasonic vibrator that ultrasonically vibrates the stage; a control unit that adjusts the operations of the collet, the bonding head, and the ultrasonic vibrator, the control unit includes a processor that processes information, The processor: the ultrasonic vibrator ultrasonically vibrates the stage to ultrasonically vibrate the first semiconductor chip; the collet holding the second semiconductor chip is moved by the bonding head to a position where the collet overlaps the first semiconductor chip, and the collet is lowered until the bottom surface of the second semiconductor chip comes close to the top surface of the first semiconductor chip; releasing the second semiconductor chip from the collet, and self-aligning the second semiconductor chip above the first semiconductor chip in a state where the second semiconductor chip is floating above the upper surface of the first semiconductor chip; reducing an output of the ultrasonic vibrator to bring the lower surface of the second semiconductor chip into contact with the upper surface of the first semiconductor chip, thereby stacking and bonding the second semiconductor chip to the first semiconductor chip; An electronic component manufacturing device characterized by:

11. The electronic component manufacturing apparatus according to claim 10, the first semiconductor chip and the second semiconductor chip have the same outer shape; An electronic component manufacturing device characterized by:

12. The electronic component manufacturing apparatus according to claim 11, the stage suction-fixes a wafer or a substrate on which a plurality of the first semiconductor chips are mounted, The processor of the control unit ultrasonically vibrating the stage by the ultrasonic vibrator to ultrasonically vibrate the plurality of first semiconductor chips mounted on the wafer or the substrate; the collet holding one of the second semiconductor chips is moved by the bonding head to a position where it overlaps one of the first semiconductor chips, the collet is lowered until it comes close to the top surface of one of the first semiconductor chips, and the collet is caused to release one of the second semiconductor chips, and this operation is repeated, thereby self-aligning the plurality of second semiconductor chips onto the plurality of first semiconductor chips; reducing an output of the ultrasonic vibrator to bring the lower surfaces of the second semiconductor chips into contact with the upper surfaces of the first semiconductor chips, thereby stacking and bonding the second semiconductor chips to the first semiconductor chips; An electronic component manufacturing device characterized by:

13. An electronic component manufacturing system including the electronic component manufacturing apparatus according to claim 11, Further comprising a hydrophilizing device and a heating device, the hydrophilization device hydrophilizes the upper surface of the first semiconductor chip and the lower surface of the second semiconductor chip and supplies them to the electronic component manufacturing device; the processor of the electronic component manufacturing apparatus reduces the output of the ultrasonic vibrator to bring the hydrophilically treated lower surface of the second semiconductor chip into contact with the hydrophilically treated upper surface of the first semiconductor chip, thereby hydrophilically bonding the first semiconductor chip and the second semiconductor chip; the heating device heats a bonded body in which the second semiconductor chip is hydrophilically bonded to the first semiconductor chip, thereby thermally diffusing the electrodes of the first semiconductor chip and the electrodes of the second semiconductor chip; An electronic component manufacturing system characterized by:

14. An electronic component manufacturing system including the electronic component manufacturing apparatus according to claim 12, Further comprising a hydrophilizing device and a heating device, the hydrophilization device hydrophilizes the upper surfaces of the first semiconductor chips and the lower surfaces of the second semiconductor chips, and supplies the resulting semiconductor chips to the electronic component manufacturing apparatus; the processor of the electronic component manufacturing apparatus reduces the output of the ultrasonic vibrator to bring the hydrophilically treated lower surfaces of the second semiconductor chips into contact with the hydrophilically treated upper surfaces of the first semiconductor chips, thereby hydrophilically bonding the first semiconductor chips and the second semiconductor chips; the heating device heats a bonded body in which each of the second semiconductor chips is hydrophilically bonded to each of the first semiconductor chips, thereby thermally diffusing and bonding each electrode of each of the first semiconductor chips to each electrode of each of the second semiconductor chips; An electronic component manufacturing system characterized by: