Power Module

Abstract

The power module (101) includes a first substrate (1A) having a first surface (1A1), a first power semiconductor element (2A) mounted on the first surface, a printed circuit board (4) having a first opposing portion (4A) arranged to overlap the first surface of the first substrate in a first direction (Z) perpendicular to the first surface, and a first conductor post (3A) electrically connecting the first power semiconductor element and the first opposing portion. A first recess (4C) is formed in the first opposing portion to accommodate the first power semiconductor element and the first conductor post therein.

Description

[Technical field]

[0001] The present disclosure relates to a power module. [Background technology]

[0002] 2. Description of the Related Art Power modules equipped with vertical power semiconductor elements are used as power conversion devices in a wide range of fields, such as industrial equipment, automobiles, and railways.

[0003] In a typical power module, an electrode of a power semiconductor element is connected to one end of a lead frame serving as an external terminal via a bonding wire, and the power semiconductor element, the one end of the lead frame, and the bonding wire are sealed with resin.

[0004] On the other hand, JP 2009-64852 A (Patent Document 1) discloses a semiconductor device in which a main electrode of a semiconductor element mounted on an insulating substrate and a metal foil of a printed circuit board arranged above the semiconductor element are electrically connected via multiple post electrodes. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2009-64852 A Summary of the Invention [Problem to be solved by the invention]

[0006] In recent years, with the trend toward higher performance and smaller, lighter equipment equipped with power modules, in addition to the conventional demands for increases in the rated voltage and rated current of power modules and an expansion of the operating temperature range, there is an increasing demand for lower wiring inductance, smaller size, and thinner design in conjunction with high-speed switching operations.

[0007] However, in the above-mentioned general power module, there is a structural limit to shortening the length between the electrode of the power semiconductor element and the other end of the lead frame, so it is difficult to sufficiently reduce the wiring inductance. Also, in the above-mentioned general power module, the electrode of the power semiconductor element connected via the bonding wire and the one end of the lead frame must be spaced apart in a plan view, so there is a structural limit to reducing the size in a plan view.

[0008] Furthermore, in the semiconductor device described in Patent Document 1, the insulating substrate, the semiconductor element, the post electrodes, and the printed circuit board are arranged side by side in the thickness direction, so there is a structural limit to how thin the device can be made.

[0009] A primary object of the present disclosure is to provide a power module which, compared to conventional power modules, simultaneously achieves reduced wiring inductance associated with high-speed switching operation, and is smaller and thinner. [Means for solving the problem]

[0010] The power module according to the present disclosure includes a first substrate having a first surface, a first power semiconductor element mounted on the first surface, a printed circuit board having a first opposing portion arranged to overlap the first surface of the first substrate in a first direction perpendicular to the first surface, and a first conductor post electrically connecting the first power semiconductor element and the first opposing portion. A first recess is formed in the first opposing portion to accommodate the first power semiconductor element and the first conductor post therein. Effect of the Invention

[0011] According to the present disclosure, it is possible to provide a power module which, compared to conventional power modules, simultaneously achieves reduced wiring inductance associated with high-speed switching operation, and is smaller and thinner. [Brief description of the drawings]

[0012] [Figure 1]1 is a plan view perspective view showing a power module according to a first embodiment. [Diagram 2] 2 is a bottom perspective view showing the power module shown in FIG. 1. [Diagram 3] FIG. 3 is a cross-sectional view taken along the line of arrows III-III in FIG. [Figure 4] 2 is a cross-sectional view illustrating one step of a method for manufacturing the power module shown in FIG. 1. [Diagram 5] 10 is a plan view perspective view showing a modified example of the power module according to the first embodiment. FIG. [Figure 6] 6 is a cross-sectional view for explaining one step of a method for manufacturing the power module shown in FIG. 5. [Figure 7] FIG. 11 is a plan view perspective view showing a power module according to a second embodiment. [Figure 8] FIG. 8 is a bottom perspective view showing the power module shown in FIG. 7. [Figure 9] FIG. 8 is a cross-sectional view taken along the line of arrows IX-IX in FIG. [Figure 10] 8 is a cross-sectional view illustrating a step of a method for manufacturing the power module shown in FIG. 7. [Figure 11] FIG. 11 is a cross-sectional view showing a power module according to a third embodiment. [Figure 12] 12 is a cross-sectional view for explaining a semiconductor package included in the power module shown in FIG. 11. [Figure 13] FIG. 11 is a cross-sectional view showing a power module according to a fourth embodiment. [Figure 14] FIG. 11 is a cross-sectional view showing a modified example of the power module according to the fourth embodiment. [Figure 15] FIG. 11 is a cross-sectional view showing a power module according to a fifth embodiment. [Figure 16] FIG. 13 is a cross-sectional view showing a power module according to a sixth embodiment. [Figure 17] FIG. 13 is a cross-sectional view showing a modified example of the power module according to the sixth embodiment. [Figure 18] FIG. 13 is a cross-sectional view showing a power module according to a seventh embodiment. [Figure 19] FIG. 13 is a cross-sectional view showing a power module according to an eighth embodiment. [Figure 20] FIG. 2 is a plan view perspective view showing a power module according to Comparative Example 1. [Figure 21] FIG. 21 is a cross-sectional view showing Comparative Example 1 shown in FIG. [Figure 22] FIG. 11 is a plan view perspective view showing a power module according to Comparative Example 2. [Figure 23] FIG. 23 is a cross-sectional view showing Comparative Example 2 shown in FIG. [Figure 24] FIG. 11 is a plan view perspective view showing a power module according to Comparative Example 3. [Diagram 25] FIG. 25 is a cross-sectional view showing Comparative Example 3 shown in FIG. 24. [Figure 26] FIG. 11 is a plan view perspective view showing a power module according to Comparative Example 4. [Figure 27] FIG. 27 is a cross-sectional view showing Comparative Example 4 shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the following, the same or corresponding parts are denoted by the same reference characters, and overlapping descriptions will not be repeated.

[0014] Embodiment 1 <Power module configuration> As shown in Figures 1 and 2, the power module 101 of embodiment 1 includes a first insulating substrate 1A (first substrate), a second insulating substrate 1B (second substrate), a first power semiconductor element 2A, a second power semiconductor element 2B, a plurality of first conductor posts 3A, a plurality of second conductor posts 3B, and a printed circuit board 4.

[0015] The first insulating substrate 1A has a first surface 1A1 on which the first power semiconductor element 2A is mounted. In this specification, a direction perpendicular to the first surface 1A1 is referred to as a first direction Z. The first insulating substrate 1A includes a base material 10, a first conductor layer 11, and a second conductor layer 12. The first conductor layer 11 and the second conductor layer 12 are arranged to sandwich the base material 10 in the first direction Z. Each of the first conductor layer 11 and the second conductor layer 12 is bonded to the base material 10, for example. The first surface 1A1 is formed by a surface of the first conductor layer 11 of the first insulating substrate 1A opposite to a surface bonded to the base material 10.

[0016] The material constituting the substrate 10 may be any material having electrical insulation properties. The substrate 10 is, for example, a ceramic plate. The material constituting the first conductor layer 11 and the second conductor layer 12 may be any material having electrical conductivity, for example, a metal material.

[0017] The second insulating substrate 1B has a second surface 1B1 on which the second power semiconductor element 2B is mounted. The second insulating substrate 1B has, for example, the same configuration as the first insulating substrate 1A. The second insulating substrate 1B includes a base material 10, a first conductor layer 11, and a second conductor layer 12. The second surface 1B1 is formed by the surface of the first conductor layer 11 of the second insulating substrate 1B opposite to the surface bonded to the base material 10.

[0018] First insulating substrate 1A and second insulating substrate 1B are arranged side by side in a first direction along first surface 1A1. In power module 101, second surface 1B1 faces the same side as first surface 1A1.

[0019] The first power semiconductor element 2A and the second power semiconductor element 2B are, for example, vertical power semiconductor elements. The first power semiconductor element 2A and the second power semiconductor element 2B are, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a bipolar transistor, or a free wheel diode. The first power semiconductor element 2A and the second power semiconductor element 2B are, for example, the same type of semiconductor element. The first power semiconductor element 2A and the second power semiconductor element 2B may be different types of semiconductor elements.

[0020] The first power semiconductor element 2A has a back surface facing the first insulating substrate 1A in the first direction Z, and a front surface located on the opposite side to the back surface facing the printed circuit board 4 in the first direction Z. A back surface electrode (not shown) is formed on the back surface of the first power semiconductor element 2A. The back surface electrode is bonded to the first conductor layer 11 of the first insulating substrate 1A via a bonding material 5. A main electrode 21A and a control electrode 22A are formed on the front surface of the first power semiconductor element 2A. Each of the main electrode 21A and the control electrode 22A of the first power semiconductor element 2A is electrically connected to a first conductor post 3A. The main electrode 21A is electrically connected to a first wiring layer 41 of the printed circuit board 4 described later via the first conductor post 3A. The control electrode 22A is electrically connected to a first wiring layer 41 of the printed circuit board 4 described later via the first conductor post 3A.

[0021] The second power semiconductor element 2B has a back surface facing the second insulating substrate 1B in the first direction Z, and a front surface located on the opposite side to the back surface facing the printed circuit board 4 in the first direction Z. A back surface electrode (not shown) is formed on the back surface of the second power semiconductor element 2B. The back surface electrode is bonded to the first conductor layer 11 of the second insulating substrate 1B via a bonding material 5. For example, a main electrode 21B and a control electrode 22B are formed on the front surface of the second power semiconductor element 2B. Each of the main electrode 21B and the control electrode 22B of the second power semiconductor element 2B is electrically connected to a second conductor post 3B. The main electrode 21B is electrically connected to a first wiring layer 41 of the printed circuit board 4 described later via the second conductor post 3B. The control electrode 22B is electrically connected to a first wiring layer 41 of the printed circuit board 4 described later via the second conductor post 3B.

[0022] Each of the multiple first conductive posts 3A and the multiple second conductive posts 3B is a columnar body extending along the first direction Z. The material constituting each of the multiple first conductive posts 3A and the multiple second conductive posts 3B may be any material that has electrical conductivity.

[0023] One end in the first direction Z of each of the multiple first conductor posts 3A is joined to the main electrode 21A or the control electrode 22A of the first power semiconductor element 2A via a bonding material (not shown) such as solder. The other end in the first direction Z of each of the multiple first conductor posts 3A is joined to a first wiring layer 41 of the printed circuit board 4 (described later) via a bonding material (not shown) such as solder.

[0024] One end in the first direction Z of each of the multiple second conductor posts 3B is joined to the main electrode 21B or the control electrode 22B of the second power semiconductor element 2B via a bonding material (not shown) such as solder. The other end in the first direction Z of each of the multiple second conductor posts 3B is joined to a first wiring layer 41 of the printed circuit board 4 (described later) via a bonding material (not shown) such as solder.

[0025] The printed circuit board 4 includes a first wiring layer 41, a second wiring layer 42, an insulator layer 44, a through via 45, a first protective layer 46, and a second protective layer 47. The first protective layer 46, the first wiring layer 41, the insulator layer 44, the second wiring layer 42, and the second protective layer 47 are laminated in the first direction Z in the above-described order. The first wiring layer 41 includes a plurality of patterns that are arranged at intervals on the same plane perpendicular to the first direction Z and are electrically separated from each other. The patterns of the first wiring layer 41 are formed by patterning the same conductor layer and are electrically separated from each other. The second wiring layer 42 includes a plurality of patterns that are arranged at intervals on the same plane perpendicular to the first direction Z and are electrically separated from each other. The patterns of the second wiring layer 42 are formed by patterning the same conductor layer. The first wiring layer 41 and the second wiring layer 42 are electrically connected via the through via 45. The first protective layer 46 and the second protective layer 47 are for protecting the surfaces of the first wiring layer 41 and the second wiring layer 42. The through via 45 is formed so as to fill the entire through hole penetrating the insulator layer 44, for example. The through via 45 is, for example, a metal material pressed into the through hole of the insulator layer 44. The through via 45 may be a metal thin film formed by plating on the wall surface of the through hole of the insulator layer 44. The first protective layer 46 and the second protective layer 47 are, for example, resist layers. The first protective layer 46 includes a portion included in the first opposing portion 4A and a portion included in the second opposing portion 4B, and is formed so that both portions are continuous in the second direction Y and the third direction X. The second protective layer 47 is arranged around the first recess 4C in a plan view.

[0026] The printed circuit board 4 includes a first opposing portion 4A arranged to overlap the first surface 1A1 of the first insulating substrate 1A in the first direction Z, and a second opposing portion 4B arranged to overlap the second surface 1B1 of the second insulating substrate 1B in the first direction Z. The first opposing portion 4A is arranged side by side with the second opposing portion 4B in the second direction Y.

[0027] The first opposing portion 4A includes a portion of each of the first wiring layer 41, the second wiring layer 42, the insulator layer 44, the first protective layer 46, and the second protective layer 47. The second opposing portion 4B includes another portion of each of the first wiring layer 41, the second wiring layer 42, the insulator layer 44, the first protective layer 46, and the second protective layer 47.

[0028] The first opposing portion 4A has a first recess 4C (spot recess) for accommodating the first power semiconductor element 2A and the first conductive posts 3A therein. The first recess 4C is recessed in the first direction Z with respect to the lower surface of the first opposing portion 4A facing the first insulating substrate 1A. The lower surface of the first opposing portion 4A is joined to the first surface 1A1 of the first insulating substrate 1A.

[0029] The first recess 4C has a bottom surface facing the first surface 1A1 in the first direction Z via the first power semiconductor element 2A, and wall surfaces protruding from the outer periphery of the bottom surface in the first direction Z and facing the side surfaces of the first power semiconductor element 2A and the multiple first conductor posts 3A in each of the second direction Y and the third direction X. The lower end of the wall surface of the first recess 4C is connected to the inner periphery of the lower surface of the first opposing portion 4A. Each of the lower surface of the first opposing portion 4A and the bottom surface and wall surface of the first recess 4C may be a single flat or curved surface, or may be an uneven surface formed by connecting multiple flat or curved surfaces to each other.

[0030] In the first opposing portion 4A, it is sufficient that at least the first wiring layer 41 and the first protective layer 46 are formed on the bottom surface of the first recess 4C. For example, another wiring layer stacked on the first wiring layer 41 in the first direction Z and an insulating layer separating the wiring layer and the first wiring layer 41 are not formed on the bottom surface of the first recess 4C.

[0031] For example, a portion of each of the first wiring layer 41 and the first protective layer 46 is exposed on the bottom surface of the first recess 4C. The first wiring layer 41 exposed on the bottom surface of the first recess 4C is joined to the other end of each of the first conductor posts 3A in the first direction Z via a joining material such as solder. For example, a portion of each of the insulator layer 44 and the second wiring layer 42 is exposed on the wall surface of the first recess 4C.

[0032] On the lower surface of the first opposing portion 4A, for example, the other part of each of the insulating layer 44 and the second wiring layer 42 is exposed. The second wiring layer 42 exposed on the lower surface of the first opposing portion 4A is bonded to the conductor layer 11 of the first insulating substrate 1A via a bonding material such as solder. In a plan view, the second wiring layer 42 exposed on the lower surface of the first opposing portion 4A is continuously arranged so as to surround the entire circumference of the first recess 4C. In a plan view, the conductor layer 11 of the first insulating substrate 1A is continuously arranged so as to surround the entire circumference of the first power semiconductor element 2A. In a plan view, the bonding material bonding the second wiring layer 42 and the conductor layer 11 is continuously arranged so as to surround the entire circumference of the first power semiconductor element 2A and the first recess 4C that accommodates it. As a result, the inside of the first recess 4C is sealed by the first insulating substrate 1A and the bonding material.

[0033] The second opposing portion 4B has a second recess 4D (spot recess) for accommodating the second power semiconductor element 2B and the second conductive posts 3B therein. The second recess 4D is recessed in the first direction Z with respect to the lower surface of the second opposing portion 4B facing the second insulating substrate 1B side. The lower surface of the second opposing portion 4B faces the second surface 1B1 of the second insulating substrate 1B without the second power semiconductor element 2B. The second recess 4D has a bottom surface facing the second surface 1B1 through the second power semiconductor element 2B in the first direction Z, and a wall surface protruding from the outer periphery of the bottom surface in the first direction Z and facing the side surfaces of the second power semiconductor element 2B and the second conductive posts 3B in each of the second direction Y and the third direction X. The lower end of the wall surface of the second recess 4D is connected to the inner periphery of the lower surface of the second opposing portion 4B. Each of the lower surface of the second opposing portion 4B and the bottom surface and wall surface of the second recess 4D may be a single flat or curved surface, or may be an uneven surface formed by connecting a plurality of flat or curved surfaces to each other.

[0034] The second opposing portion 4B includes a first wiring layer 41, a second wiring layer 42, an insulator layer 44, a first protective layer 46, and a second protective layer 47. In the second opposing portion 4B, the first protective layer 46, the first wiring layer 41, the insulator layer 44, the second wiring layer 42, and the second protective layer 47 are stacked in the first direction Z in the order described above.

[0035] In the second opposing portion 4B, it is sufficient that at least the first wiring layer 41 and the first protective layer 46 are formed on the bottom surface of the second recess 4D. For example, another wiring layer stacked on the first wiring layer 41 in the first direction Z and an insulating layer separating the wiring layer and the first wiring layer 41 are not formed on the bottom surface of the second recess 4D.

[0036] For example, a portion of each of the first wiring layer 41 and the first protective layer 46 is exposed on the bottom surface of the second recess 4D. Each of the first wiring layer 41 exposed on the bottom surface of the second recess 4D is joined to the other end of each of the second conductor posts 3B in the first direction Z via a joining material such as solder. For example, a portion of each of the insulating layer 44 and the second wiring layer 42 is exposed on the wall surface of the second recess 4D.

[0037] On the lower surface of the second opposing portion 4B, for example, the other part of each of the insulating layer 44 and the second wiring layer 42 is exposed. The second wiring layer 42 exposed on the lower surface of the second opposing portion 4B is joined to the conductor layer 11 of the second insulating substrate 1B via a bonding material such as solder. In a plan view, the second wiring layer 42 exposed on the lower surface of the second opposing portion 4B is continuously arranged so as to surround the entire circumference of the second recess 4D. In a plan view, the conductor layer 11 of the second insulating substrate 1B is continuously arranged so as to surround the entire circumference of the second power semiconductor element 2B. In a plan view, the bonding material that bonds the second wiring layer 42 and the conductor layer 11 is continuously arranged so as to surround the entire circumference of the second power semiconductor element 2B and the second recess 4D that accommodates it. As a result, the inside of the second recess 4D is sealed by the second insulating substrate 1B and the bonding material.

[0038] The inside of the first recess 4C and the second recess 4D is filled with a gas such as air. A part of the first wiring layer 41 of the printed circuit board 4 is exposed from the first protective layer 46 and the second protective layer 47 to form a first external connection terminal 41A connected to an external device in the power module 101. A part of the first wiring layer 41 is exposed from the first protective layer 46 and the second protective layer 47 to form second external connection terminals 41B, 41C connected to an external device in the power module 101. The second external connection terminals 41A, 41B are control external terminals. A part of the second wiring layer 42 of the printed circuit board 4 is exposed from the first protective layer 46 and the second protective layer 47 to form third external connection terminals 42A, 42B connected to an external device in the power module 101.

[0039] In this embodiment, solder is exemplified as the bonding material included in the power module 101, but the bonding material is not limited thereto. For bonding between the members included in the power module 101, sintered silver, conductive adhesive, liquid tank diffusion bonding technology, etc. may be used.

[0040] Next, the flow of main electric signals in the power module 101 will be described. First, a signal input to the third external connection terminal 42A passes through the second wiring layer 42 and the conductor layer 11 of the first insulating substrate 1A, reaches the back electrode of the first power semiconductor element 2A, and is output from the main electrode 21A of the first power semiconductor element 2A. A signal output from the main electrode 21A of the first power semiconductor element 2A passes through the first conductor post 3A, the first wiring layer 41, the through via 45, and the conductor layer 11 of the second insulating substrate 1B, reaches the back electrode of the second power semiconductor element 2B, and is output from the main electrode 21B of the second power semiconductor element 2B. A signal output from the main electrode 21B of the second power semiconductor element 2B passes through the second conductor post 3B and the first wiring layer 41, reaches the first external connection terminal 41A, and is output to an external device.

[0041] In addition, a control signal is input from an external device to the control electrodes 22A, 22B of each of the first power semiconductor element 2A and the second power semiconductor element 2B via the second external connection terminals 41B, 41C, the first wiring layer 41, and the first conductor post 3A or the second conductor post 3B.

[0042] <Power module manufacturing method> Hereinafter, an example of a method for manufacturing the power module 101 will be described with reference to Fig. 4. As shown in Fig. 4, first, a first semi-finished product 201, a second semi-finished product 202, and a printed circuit board 4 are prepared.

[0043] The first semi-finished product 201 is an integral part of the first insulating substrate 1A, the first power semiconductor element 2A, and a plurality of first conductor posts 3A. In the first semi-finished product 201, the first power semiconductor element 2A is joined to the conductor layer 11 of the first insulating substrate 1A by solder or the like, and each of the plurality of first conductor posts 3A is joined to the main electrode 21A or the control electrode 22A of the first power semiconductor element 2A by solder or the like.

[0044] The second semi-finished product 202 is an integral part of the second insulating substrate 1B, the second power semiconductor element 2B, and the plurality of second conductor posts 3B. In the second semi-finished product 202, the second power semiconductor element 2B is joined to the conductor layer 11 of the second insulating substrate 1B by solder or the like, and each of the plurality of second conductor posts 3B is joined to the main electrode 21B or the control electrode 22B of the second power semiconductor element 2B by solder or the like.

[0045] The printed circuit board 4 includes a first opposing portion 4A and a second opposing portion 4B. The first opposing portion 4A is a portion that is intended to be disposed so as to overlap with the first surface 1A1 of the first insulating substrate 1A in the first direction Z. The second opposing portion 4B is a portion that is intended to be disposed so as to overlap with the second surface 1B1 of the second insulating substrate 1B in the first direction Z.

[0046] A first recess 4C is formed in the first opposing portion 4A. For example, a portion of each of the first wiring layer 41 and the first protective layer 46 is exposed on the bottom surface of the first recess 4C. For example, a portion of each of the insulator layer 44 and the third wiring layer is exposed on the wall surface of the first recess 4C. For example, another portion of each of the insulator layer 44 and the third wiring layer is exposed on the lower surface of the first opposing portion 4A. In a plan view, the second wiring layer 42 exposed on the lower surface of the first opposing portion 4A is continuously arranged so as to surround the entire circumference of the first recess 4C. In a plan view, the conductor layer 11 of the first insulating substrate 1A is continuously arranged so as to surround the entire circumference of the first power semiconductor element 2A.

[0047] A second recess 4D is formed in the second opposing portion 4B. For example, a part of each of the first wiring layer 41 and the first protective layer 46 is exposed on the bottom surface of the second recess 4D. For example, a part of each of the insulator layer 44 and the third wiring layer is exposed on the wall surface of the second recess 4D. For example, another part of each of the insulator layer 44 and the third wiring layer is exposed on the lower surface of the second opposing portion 4B. In a plan view, the second wiring layer 42 exposed on the lower surface of the second opposing portion 4B is continuously arranged so as to surround the entire circumference of the second recess 4D. In a plan view, the conductor layer 11 of the second insulating substrate 1B is continuously arranged so as to surround the entire circumference of the second power semiconductor element 2B.

[0048] Secondly, a bonding material such as solder is continuously arranged on the conductor layer 11 so as to surround the entire periphery of the first power semiconductor element 2A. Furthermore, a bonding material such as solder is arranged on the main electrode 21A and the control electrode 22A of the first power semiconductor element 2A. Similarly, a bonding material such as solder is continuously arranged on the conductor layer 11 so as to surround the entire periphery of the second power semiconductor element 2B. A bonding material such as solder is arranged on the main electrode 21B and the control electrode 22B of the second power semiconductor element 2B.

[0049] 4, the first opposing portion 4A is arranged to overlap with the first surface 1A1 of the first insulating substrate 1A in the first direction Z, and the second opposing portion 4B is arranged to overlap with the second surface 1B1 of the second insulating substrate 1B in the first direction Z. At this time, the first recess 4C is arranged to overlap with the first power semiconductor element 2A and the multiple first conductor posts 3A in the first direction Z. Furthermore, the second recess 4D is arranged to overlap with the second power semiconductor element 2B and the multiple second conductor posts 3B in the first direction Z.

[0050] 4, the first semi-finished product 201 and the second semi-finished product 202 move relative to the printed circuit board 4 in the first direction Z. Furthermore, each of the first conductive posts 3A is bonded to the first wiring layer 41 exposed on the bottom surface of the first recess 4C by the bonding material, and the conductive layer 11 of the first insulating substrate 1A is bonded to the second wiring layer 42 exposed on the lower surface of the first opposing portion 4A by the bonding material. Furthermore, each of the second conductive posts 3B is bonded to the first wiring layer 41 exposed on the bottom surface of the second recess 4D by the bonding material, and the conductive layer 11 of the second insulating substrate 1B is bonded to the second wiring layer 42 exposed on the lower surface of the second opposing portion 4B by the bonding material.

[0051] In this way, the first semi-finished product 201 and the second semi-finished product 202 are integrated with the printed circuit board 4. The first recess 4C is sealed by the first insulating substrate 1A and the bonding material. The second recess 4D is sealed by the second insulating substrate 1B and the bonding material. The first power semiconductor element 2A and the multiple first conductor posts 3A are accommodated in the first recess 4C. The second power semiconductor element 2B and the multiple second conductor posts 3B are accommodated in the second recess 4D.

[0052] <Effects of power modules> The effects of the power module 101 will be described below in comparison with a power module according to a comparative example.

[0053] The power module 300 according to the comparative example 1 shown in FIG. 20 and FIG. 21 includes a plurality of insulating substrates 301, a plurality of power semiconductor elements 302, a plurality of bonding wires 303, and a plurality of lead frames 304. Each bonding wire 303 electrically connects the power semiconductor element 302 to the conductor layer of the insulating substrate 301, or between the power semiconductor element 302 and the lead frame 304. Generally, the plurality of lead frames 304 are manufactured by punching a metal plate made of copper or iron, and therefore, the inner leads 304A, which are the bonding regions with the bonding wires 303 in each of the plurality of lead frames 304, are arranged on the same plane. In the power module 300 including such a plurality of lead frames 304, each of the lead frames 304 is arranged so as not to overlap with the power semiconductor element 302 in a plan view, and further, the portion 304B forming the external connection terminal in each of the plurality of lead frames 304 is arranged outside the inner lead 304A in a plan view, so that it is difficult to reduce the area of ​​the power module 300 in a plan view.

[0054] Furthermore, in the power module 300, the electrical path between the power semiconductor element and the external connection terminal is long because it includes the bonding wire 303 and the lead frame 304 connected in series with each other. Therefore, it is difficult to reduce the wiring inductance L of the power module 300.

[0055] Each of a power module 310 according to comparative example 2 shown in Figures 22 and 23, a power module 320 according to comparative example 3 shown in Figures 24 and 25, and a power module 330 according to comparative example 4 shown in Figures 26 and 27 includes an insulating substrate 311, a first power semiconductor element 312A, a second power semiconductor element 312B, a conductor post 313, and a printed circuit board 314, similar to power module 101, but differs from power module 101 in that no recess is formed in printed circuit board 314.

[0056] In the power module 310, a wiring layer 315 in a printed circuit board 314 forms an external connection terminal, and an electrical path between each power semiconductor element and the wiring layer 315 does not include a bonding wire or an inner lead, but instead includes a conductor post 313. The conductor post 313 electrically connects between the first power semiconductor element 312A or the second power semiconductor element 312B, which are arranged to overlap each other in a plan view, and the wiring layer in the printed circuit board 314. Therefore, in the power module 310, the length of the conductor post 313 can be made shorter than the total length of the bonding wire and the inner lead, and the wiring inductance L can be made lower than that of the power module 300.

[0057] On the other hand, in the power module 310, the entire printed circuit board 314 is disposed on the power semiconductor element 312. Therefore, it is difficult to reduce the size of the power module 310 in the first direction Z, and in some cases the size of the power module 310 in the first direction Z may be larger than that of the power module 300.

[0058] Furthermore, the power module 310 also requires a conductor block 317 for electrically connecting the insulating substrate 311 and the wiring layer 315 of the printed circuit board 314, which face each other without the power semiconductor element 312 therebetween. The length of the conductor block 317 in the first direction Z is longer than that of the conductor post 313 by the thickness of the power semiconductor element. Therefore, it is difficult to reduce the manufacturing cost of the power module 310.

[0059] Furthermore, in the power module 310, the printed circuit board 314 includes a conductor via 318 for electrically connecting between the wiring layer 315 and the wiring layer 316 stacked in the first direction Z. Therefore, the manufacturing cost of the power module 310 which includes both the conductor block 317 and the conductor via 318 is high.

[0060] In addition, in a plan view, an external connection terminal 315A corresponding to the third external connection terminal 42A of the power module 101 and an external connection terminal 316A corresponding to the first external connection terminal 41A of the power module 101 are arranged on one end side of the power module 310 in the second direction Y. In the power module 310, the external connection terminal 315A, the conductor block 317, the first conductor layer of the insulating substrate 314, the power semiconductor element 312A, the wiring layer 315, the conductor block 317, the second conductor layer of the insulator layer 314, the power semiconductor element 312B, the conductor via 318, the wiring layer 316, and the external connection terminal 316A are electrically connected in this order.

[0061] A power module 320 according to Comparative Example 3 shown in Fig. 24 and Fig. 25 is different from the power module 310 in that the printed circuit board 314 does not include the conductor via 318. Only a part of the current path formed inside the power module 310 is formed inside such a power module 320, and the remainder of the current path needs to be formed outside the power module 320. An arrow C in Fig. 24 diagrammatically shows the current path inside the power module 320. In the power module 320, an external connection terminal 315C for connecting to an external wiring forming the remainder of the current path is arranged on the side of the end opposite to the external connection terminal 315A corresponding to the third external connection terminal 42A of the power module 101. In the power module 310, the external connection terminal 315A, the conductor block 317, the first conductor layer of the insulating substrate 314, the power semiconductor element 312A, the wiring layer 315, the conductor block 317, the second conductor layer of the insulator layer 314, the power semiconductor element 312B, the wiring layer 315, and the external connection terminal 315C are electrically connected in this order. Therefore, the sum of the lengths of the current paths and the external wiring in the power module 320 is longer than the length of the current path electrically connecting the external connection terminal 315A and the external connection terminal 316A in the power module 310.

[0062] The power module 330 according to Comparative Example 4 shown in Figs. 26 and 27 is different from the power module 310 in that the printed circuit board 314 does not include the conductor via 318. The power module 330 is also different from the power module 320 in that a current path equivalent to the current path formed inside the power module 310 is formed inside the power module 330. The arrow C shown in Figs. 26 and 27 shows a schematic current path inside the power module 330. In the power module 330, the external connection terminal 315A, the conductor block 317, the first conductor layer of the insulating substrate 314, the power semiconductor element 312A, the wiring layer 315D, the conductor block 317, the second conductor layer of the insulator layer 314, the power semiconductor element 312B, the wiring layer 315E, and the external connection terminal 315F are electrically connected in this order.

[0063] In the power module 330, it is difficult to reduce the dimension W1 of the wiring layer 315D that forms part of the current path between the first power semiconductor element 312A and the second power semiconductor element 312B in the direction in which the first power semiconductor element 312A and the second power semiconductor element 312B are arranged side by side (the third direction X in FIG. 26). Furthermore, in the power module 330, the wiring layer 315D and the wiring layer 315E are arranged side by side between the control terminal 315G connected to the first power semiconductor element 312A and the control terminal 315G connected to the second power semiconductor element 312B, so that in order to increase the dimension W2 of the wiring layer 315D in the third direction X to keep the wiring inductance low, it is necessary to increase the dimension of the power module 330 in the third direction X.

[0064] In contrast, since the power module 101 includes the first conductive post 3A and the second conductive post 3B instead of the bonding wire 303 and the lead frame 304, the wiring inductance L of the power module 101 can be lower than the wiring inductance L of the power module 300.

[0065] Furthermore, in the power module 101, on the bottom surface of the first recess 4C, there is not formed another wiring layer stacked on the first wiring layer 41 in the first direction Z, nor an insulating layer separating the wiring layer from the first wiring layer 41. Therefore, in the power module 101, the thickness of a partial region of the first opposing portion 4A arranged to overlap the first power semiconductor element 2A in the first direction Z is thinner than the thickness of the printed circuit board 314 arranged to overlap the power semiconductor elements 312A, 312B in the power modules 310-330.

[0066] Therefore, in the power module 101, a reduction in wiring inductance and a reduction in size associated with high-speed switching operation are simultaneously achieved compared to the power module 300, and a reduction in wiring inductance and a reduction in thickness associated with high-speed switching operation are simultaneously achieved compared to the power modules 310 to 330.

[0067] Furthermore, in the power module 101, the first recess 4C and the second recess 4D are formed in the printed circuit board 4, and therefore the conductor block 317 that is required in the power modules 310 to 330 that do not have the first recess 4C and the second recess 4D is not required. Therefore, the manufacturing cost of the power module 101 can be reduced compared to the power modules 310 to 330.

[0068] <Modification> 1 to 3 in that it includes a printed circuit board 4 that does not include a through via 45 and a conductor block 48, instead of the printed circuit board 4 that includes the through via 45. In FIG. 5, the conductor block 48 is shown only in the second recess 4D, but it is sufficient that the conductor block 48 is disposed inside at least one of the first recess 4C and the second recess 4D.

[0069] As shown in FIG. 6, in the manufacturing method of the power module 101 shown in FIG. 5, a second semi-finished product 202 including a conductor block 48 is prepared, and the conductor block 48 is joined to the first wiring layer 41 of the printed circuit board 4 with a bonding material such as solder.

[0070] The manufacturing cost of the printed circuit board 4 including the through via 45 tends to be higher than the total of the manufacturing cost of the printed circuit board 4 not including the through via 45 and the manufacturing cost of the conductor block 48. Specifically, when the through via 45 is a columnar metal body pressed into the through hole of the printed circuit board 4 as described above so as to withstand a large current, the manufacturing cost of the printed circuit board 4 including the through via 45 tends to be much higher than that of a printed circuit board not including the through via 45, and further tends to be higher than the total manufacturing cost of a general printed circuit board not including a conductor via and a conductor block. Therefore, the manufacturing cost of the power module 101 shown in FIG. 5 can be reduced compared to the power module 101 shown in FIGS. 1 to 3.

[0071] In addition, in the power module 101 shown in FIG. 5, similarly to the power module 101 shown in FIGS. 1 to 3, a reduction in wiring inductance and a reduction in size associated with high-speed switching operation are simultaneously achieved compared to the power module 300, and a reduction in wiring inductance and a reduction in thickness associated with high-speed switching operation are simultaneously achieved compared to the power modules 310 to 330.

[0072] Embodiment 2 As shown in FIGS. 7 to 9, the power module 102 according to the second embodiment basically has the same configuration as the power module 101 according to the first embodiment, but Power module 102 differs from power module 101 in that second surface 1B1 of second insulating substrate 1B faces the opposite side to first surface 1A1 of first insulating substrate 1A. The following will mainly describe the differences between power module 102 and power module 101.

[0073] The first recess 4C faces the first surface 1A1. The second recess 4D faces the second surface 1B1. The first protective layer 46 of the printed circuit board 4 is not included in the second opposing portion 4B that faces the second insulating substrate 1B. The first protective layer 46 is arranged side by side with the second insulating substrate 1B in the second direction Y and the third direction X. The second protective layer 47 is not included in the first opposing portion 4A that faces the first insulating substrate 1A. The second protective layer 47 is arranged side by side with the first insulating substrate 1A in the second direction Y and the third direction X.

[0074] The conductor layer 11 of the second insulating substrate 1B is joined to the first wiring layer 41 by a bonding material such as solder. Each of the main electrodes 21B and the control electrodes 22B of the second power semiconductor element 2B is electrically connected to each pattern of the second wiring layer 42 via a second conductor post 3B. A part of the second wiring layer 42 forms an external connection terminal 42C. Another part of the second wiring layer 42 forms an external connection terminal 42D as a control external terminal.

[0075] Each of the first wiring layers 41 is not electrically connected to the second wiring layer 42. In other words, the printed circuit board 4 does not include a through via 45 for electrically connecting at least one of the first wiring layers 41 and the second wiring layer 42.

[0076] In the power module 102, each of the first wiring layers 41 and the second wiring layer 42 is electrically connected only via the first power semiconductor element 2A or the second power semiconductor element 2B. The main electrode 21B of the second power semiconductor element 2B is electrically connected to the second wiring layer 42 via the second conductor post 3B.

[0077] 9, the power module 102 has, for example, two-fold rotational symmetry around the center of a cross section perpendicular to the third direction X. In this case, the center of the power module 102 is disposed within the insulating layer 44 of the printed circuit board 4.

[0078] Next, the flow of main electric signals in the power module 102 will be described. First, a signal input to the third external connection terminal 42A passes through the second wiring layer 42 and the conductor layer 11 of the first insulating substrate 1A, reaches the back electrode of the first power semiconductor element 2A, and is output from the main electrode 21A of the first power semiconductor element 2A. A signal output from the main electrode 21A of the first power semiconductor element 2A passes through the first conductor post 3A, the first wiring layer 41, and the conductor layer 11 of the second insulating substrate 1B, reaches the back electrode of the second power semiconductor element 2B, and is output from the main electrode 21B of the second power semiconductor element 2B. A signal output from the main electrode 21B of the second power semiconductor element 2B passes through the second conductor post 3B and the second wiring layer 42, reaches the external connection terminal 42C, and is output to an external device.

[0079] The manufacturing method of the power module 102 has a basically similar configuration to the manufacturing method of the power module 101, but differs from the manufacturing method of the power module 101 in that the first semifinished product 201 and the second semifinished product 202 are arranged facing in opposite directions to each other with respect to the printed circuit board 4, as shown in Fig. 10. On the other hand, the manufacturing method of the power module 102 is also the same as the manufacturing method of the power module 101 in that the first opposing portion 4A is arranged to overlap the first surface 1A1 of the first insulating substrate 1A in the first direction Z, and the second opposing portion 4B is arranged to overlap the second surface 1B1 of the second insulating substrate 1B in the first direction Z.

[0080] The power module 102 can achieve the same effects as the power module 101. Furthermore, the manufacturing cost of the power module 102 including the printed circuit board 4 not including the through via 45 can be reduced compared to the manufacturing cost of the power module 101 including the printed circuit board 4 including the through via 45. In other words, the manufacturing cost of the power module 102 can be significantly reduced compared to the power modules 310 to 330.

[0081] Embodiment 3 11, power module 103 according to the third embodiment has a basically similar configuration to power module 102 according to the second embodiment, but differs from power module 102 in that first power semiconductor element 2A is embedded in resin 6. The following mainly describes the differences between power module 103 and power module 102.

[0082] The second power semiconductor element 2B may also be embedded in a resin 6 different from the resin 6 in which the first power semiconductor element 2A is embedded.

[0083] The first conductor post 3A has an exposed portion 31A exposed from the resin 6 formed to cover the first power semiconductor element 2A. The second conductor post 3B has an exposed portion 31B exposed from the resin 6 formed to cover the second power semiconductor element 2B. The exposed portions 31A and 31B include, for example, the upper surfaces of the first conductor post 3A and the second conductor post 3B. The exposed portion 31A is electrically connected to the first wiring layer 41 of the first opposing portion 4A via a bonding material (not shown). The exposed portion 31B is electrically connected to the second wiring layer 42 of the second opposing portion 4B via a bonding material (not shown). The bonding material (not shown) is not embedded in the resin 6.

[0084] In the power module 103, at least one of the first power semiconductor element 2A and the second power semiconductor element 2B may be embedded in the resin. The first conductor post 3A and the second conductor post 3B may each be entirely exposed from the resin 6.

[0085] The material constituting the resin 6 may be any resin material having electrical insulation properties. The resin 6 formed so as to cover the first power semiconductor element 2A is not in contact with, for example, the first wiring layer 41 of the first opposing portion 4A. The resin 6 formed so as to cover the second power semiconductor element 2B is not in contact with, for example, the second wiring layer 42 of the second opposing portion 4B.

[0086] The manufacturing method of the power module 103 has a basically similar configuration to the manufacturing method of the power module 102, but differs from it in that a semifinished product 203 shown in Fig. 12 is prepared instead of each of the semifinished products 201, 202. In the semifinished product 203, the resin 6 is formed so as to embed the entire first power semiconductor element 2A or the second power semiconductor element 2B and the other portions of the first conductor post 3A or the second conductor post 3B other than the exposed portions 31A, 31B.

[0087] The semi-finished product 203 may include a plurality of first power semiconductor devices 2A or a plurality of second power semiconductor devices 2B.

[0088] Preferably, before assembling the power module 103 including the plurality of semi-finished products 203, a step of inspecting the characteristics of the power semiconductor elements embedded in the resin 6 for each of the semi-finished products 203 is performed, and the power module 103 is assembled using only the semi-finished products 203 that are judged to be non-defective in this step. In this manner, the power module 103 is not judged to be defective due to defective characteristics of some of the power semiconductor elements among the plurality of semi-finished products 203. In the inspection step, any inspection may be performed, and for example, a withstand voltage test is performed. In the withstand voltage test for the semi-finished products 203, a high voltage is applied to the power semiconductor elements embedded in the resin 6, so that an appropriate inspection can be performed without generating discharge in the air.

[0089] According to the power module 103, the first power semiconductor element 2A and the second power semiconductor element 2B are each embedded in the resin 6, and therefore the first power semiconductor element 2A and the second power semiconductor element 2B are less susceptible to the effects of the external environment (humidity and contamination). Therefore, the reliability of the power module 103 is high.

[0090] Furthermore, the power module 103 can be manufactured to include only the semi-finished products 203 that have been confirmed to be non-defective by inspection. Therefore, the power module 103 can have improved reliability and production efficiency at the same time.

[0091] The semiconductor material of each of the first power semiconductor element 2A and the second power semiconductor element 2B of the power module 103 is not particularly limited, but may be silicon carbide (SiC). Although SiC is expensive compared to silicon (Si), as described above, the production efficiency of the power module 103 is high, and therefore, an increase in manufacturing costs caused by discarding even non-defective products due to some power semiconductor elements incorporated in the power module 103 being defective is suppressed.

[0092] The power module 103 may have the same configuration as the power module 101 according to the first embodiment, except that the first power semiconductor element 2A is embedded in the resin 6.

[0093] Embodiment 4 13, power module 104 according to embodiment 4 basically has the same configuration as power module 102 according to embodiment 2, but differs from power module 102 in that it includes a first conductor plate 1E instead of a first insulating substrate as a first substrate. The following mainly describes the differences between power module 104 and power module 102.

[0094] The material constituting the first conductor plate 1E is, for example, a metal material with high thermal conductivity. The first conductor 1E is, for example, a metal plate acting as a heat spreader. The first conductor plate 1E has a first surface 1E1 facing the first opposing portion 4A. The first power semiconductor element 2A is mounted on the first surface 1E1.

[0095] The power module 104 further includes, for example, a second conductive plate 1F as a second substrate. The material constituting the second conductive plate 1F may be any metal material, for example, a metal material with high thermal conductivity. The second conductive plate 1F acts as a heat spreader. The second conductive plate 1F has a second surface 1F1 facing the second opposing portion 4B. The second power semiconductor element 2B is mounted on the second surface 1F1.

[0096] The thickness of the first conductor plate 1E is equal to the thickness of the first wiring layer 41 that faces the first power semiconductor element 2A, for example. The thickness of the second conductor plate 1F is equal to the thickness of the second wiring layer 42 that faces the first conductor plate 1E, for example. The thickness of the second conductor plate 1F is equal to the thickness of the second wiring layer 42 that faces the second power semiconductor element 2B, for example. In this way, warping of the power module 104 is reduced. Since each of the first conductor plate 1E and the second conductor plate 1F is a single metal plate, it is easy to adjust the thickness of each.

[0097] Since the power module 104 includes the first conductive plate 1E which is less expensive than the first insulating substrate 1A, the manufacturing cost of the power module 104 is lower than that of the power modules 101-103.

[0098] The power module 104 may include a second insulating substrate 1B as the second substrate. The power module 104 may have the same configuration as the power module 101 according to the first embodiment, except that the power module 104 includes a first conductive plate 1E as the first substrate instead of the first insulating substrate.

[0099] <Modification> As shown in FIG. 14, the first conductor plate 1E may include a thick portion 13 and a thin portion 14. The thick portion 13 protrudes toward the printed circuit board 4 in the first direction Z more than the thin portion 14. The first surface 1E1 is disposed as the top surface of the thick portion 13 at a position closest to the first opposing portion 4A on the surface of the first conductor plate 1E. The thin portion 14 is disposed so as to surround the entire periphery of the thick portion 13 in a plan view. The thick portion 13 is disposed inside the first recess 4C. Preferably, the thick portion 13 is formed so as to fit into the first recess 4C. The second conductor plate 1F may also include a thick portion and a thin portion. In the power module 104 shown in FIG. 14, it is easier to align the first recess 4C of the printed circuit board 4 with the first conductor plate 1E than in the power module 103 shown in FIG. 13.

[0100] Embodiment 5. 15, the power module 105 according to the fifth embodiment has a basically similar configuration to the power module 102 according to the second embodiment, but differs from the power module 105 in that the first power semiconductor element 2A, the plurality of first conductor posts 3A, and the portion of the first opposing portion 4A connected to the first conductor post 3A are embedded in resin 7. The following mainly describes the differences between the power module 105 and the power module 102.

[0101] In the power module 105, the first power semiconductor element 2A, the multiple first conductor posts 3A, the portion of the first opposing portion 4A that is connected to the first conductor post 3A via a bonding material (not shown), and the bonding material are embedded in resin 7.

[0102] The second power semiconductor element 2B, the multiple second conductor posts 3B, the portion of the second opposing portion 4B that is connected to the second conductor post 3B via a bonding material (not shown), and the bonding material may also be embedded in a resin 7 other than the resin 7 in which the first power semiconductor element 2A is embedded.

[0103] The material constituting the resin 7 may be any resin material having electrical insulation properties, for example, an underfill resin.

[0104] In the manufacturing method of the power module 105, first, there are prepared a first power semiconductor element 2A in which a plurality of first conductor posts 3A are joined to each of the main electrode 21A and the control electrode 22A, a second power semiconductor element 2B in which a plurality of second conductor posts 3B are joined to each of the main electrode 21B and the control electrode 22B, and a printed circuit board 4. The first power semiconductor element 2A and the second power semiconductor element 2B are not mounted on the first insulating substrate 1A or the second insulating substrate 1B.

[0105] Secondly, the first wiring layer 41 of the printed circuit board 4 and each of the multiple first conductor posts 3A are joined by a bonding material not shown, and the second wiring layer 42 and each of the multiple first conductor posts 3A are joined by a bonding material not shown.

[0106] Thirdly, resin 7 is formed so as to cover the first power semiconductor element 2A, the plurality of first conductor posts 3A, and the portion of the first opposing portion 4A connected to the first conductor post 3A via a bonding material (not shown), which are integrated in the previous step, and the bonding material. Similarly, resin 7 is formed so as to cover the second power semiconductor element 2B, the plurality of second conductor posts 3B, and the portion of the second opposing portion 4B connected to the second conductor post 3B via a bonding material (not shown), and the bonding material. The resin 7 is formed so as to expose the back electrodes of each of the first power semiconductor element 2A and the second power semiconductor element 2B.

[0107] Fourth, the back electrode of the first power semiconductor element 2A exposed from the resin 7 is joined to the conductor layer 11 of the first insulating substrate 1A by the bonding material 5, and the back electrode of the second power semiconductor element 2B exposed from the resin 7 is joined to the second insulating substrate 1B by the bonding material 5.

[0108] In this manner, the power module 105 is manufactured. In the power module 105, the first power semiconductor element 2A and the second power semiconductor element 2B are each embedded in the resin 6, and therefore the first power semiconductor element 2A and the second power semiconductor element 2B are less susceptible to the effects of the external environment (humidity and contamination). Therefore, the reliability of the power module 105 is high.

[0109] The power module 105 may have a configuration similar to any of the power modules 101, 103, and 104 according to embodiments 1, 3, and 4, except that the first power semiconductor element 2A, the multiple first conductor posts 3A, and the portion of the first opposing portion 4A connected to the first conductor post 3A are embedded in resin 7.

[0110] Embodiment 6 16, the power module 106 according to the sixth embodiment has a basically similar configuration to the power module 102 according to the second embodiment, but differs from the power module 102 in that the space between the first insulating substrate 1A facing the first power semiconductor element 2A and the first conductive post 3A and the first opposing portion 4A is filled with resin 8. The following mainly describes the differences between the power module 106 and the power module 102.

[0111] Resin 8 fills the space formed around first insulating substrate 1A, first power semiconductor element 2A, the plurality of first conductor posts 3A, and the bonding material within first recess 4C.

[0112] In the second recess 4D, the space formed around the second insulating substrate 1B, the second power semiconductor element 2B, the plurality of second conductor posts 3B, and the bonding material may also be filled with the resin 8.

[0113] The material constituting the resin 8 is, for example, an underfill resin. The material constituting the resin 8 has, for example, thermosetting or ultraviolet curing properties.

[0114] A first through hole 50A communicating with the inside of the first recess 4C is formed in the first opposing portion 4A. For example, the first through hole 50A is formed so as to penetrate the first wiring layer 41 and the first protective layer 46 facing the bottom surface of the first recess 4C.

[0115] A second through hole 50B communicating with the inside of the second recess 4D is formed in the second opposing portion 4B. For example, the second through hole 50B is formed so as to penetrate the second wiring layer 42 and the second protective layer 47 facing the bottom surface of the second recess 4D.

[0116] The first through hole 50A and the second through hole 50B are formed as a passage for introducing the resin 8 into the first recess 4C or the second recess 4D.

[0117] In the manufacturing method of the power module 106, a printed circuit board 4 having a first through hole 50A and a second through hole 50B formed therein is prepared. Then, similarly to the manufacturing method of the power module 102, the printed circuit board 4, the first semi-finished product 201, and the second semi-finished product 202 are assembled, and then a liquid curable resin material is introduced into the first recess 4C and the second recess 4D from the first through hole 50A and the second through hole 50B, respectively. Then, the liquid curable resin material is cured to form the resin 8, and the power module 106 is manufactured.

[0118] In the power module 106, similarly to the power module 105, the first power semiconductor element 2A and the second power semiconductor element 2B are each embedded in the resin 6, and therefore the first power semiconductor element 2A and the second power semiconductor element 2B are less susceptible to the effects of the external environment (humidity and contamination). Therefore, the reliability of the power module 106 is high.

[0119] Furthermore, in the power module 106, the first through hole 50A and the second through hole 50B are formed for introducing the material constituting the resin 8 into the first recess 4C and the second recess 4D, so that the resin 8 can be formed after assembling the printed circuit board 4, the first semifinished product 201, and the second semifinished product 202 in a procedure similar to that of the manufacturing method of the power module 102. Therefore, the power module 106 can be manufactured more easily than the power module 105.

[0120] Furthermore, in the power module 106, the bonding material 5 that bonds the first insulating substrate 1A and the first power semiconductor element 2A is covered with the resin 8, so that the bonding material 5 is prevented from breaking even when the power module 106 is placed in a temperature cycle environment. Therefore, the reliability of the power module 106 is high.

[0121] <Modification> As shown in FIG. 17, in the power module 106, at least the first power semiconductor element 2A, the bonding material 5 bonding the first power semiconductor element 2A to the first insulating substrate 1A, the plurality of first conductor posts 3A, and the bonding material bonding the plurality of first conductor posts 3A to the first opposing portion 4A are embedded in the resin 8 within the first recess 4C.

[0122] The power module 106 may have a configuration similar to any of the power modules 101, 103, and 104 according to embodiments 1, 3, and 4, except that the space between the first insulating substrate 1A facing the first power semiconductor element 2A and the first conductive post 3A and the first opposing portion 4A is filled with resin 8.

[0123] Embodiment 7 18, power module 107 according to the seventh embodiment has a basically similar configuration to power module 102 according to the second embodiment, but differs from power module 106 in that printed circuit board 4 is a ceramic substrate. The following mainly describes the differences between power module 107 and power module 102.

[0124] The printed circuit board 4 is a ceramic board and includes a base material 49A made of ceramic, and a first wiring layer 41 and a second wiring layer 42 (conductor layers) laminated on the base material 49A. The first wiring layer 41 is disposed on one surface of the base material 49A. The second wiring layer 42 is disposed on the other surface of the base material 49A. The printed circuit board 4 may further include a base material 49B and a base material 49C, for example, to sandwich the base material 49A, the first wiring layer 41, and the second wiring layer 42 in the first direction Z.

[0125] The material constituting the base materials 49A, 49B, and 49C includes at least one selected from the group consisting of alumina (Al2O3), aluminum nitride (AlN), and silicon nitride (Si3N4). The thermal conductivity of such a ceramic material is higher than that of the resin material constituting the insulator layer 44.

[0126] The first recess 4C is formed by a through hole formed in the base material 49A and a base material 49B that closes the through hole. The second recess 4D is formed by a through hole formed in the base material 49A and a base material 49C that closes the through hole.

[0127] Since the thermal conductivity of the printed circuit board 4 of the power module 107 is higher than that of the printed circuit board 4 of the power module 102, heat generated in the first power semiconductor element 2A is easily dissipated to the outside via the printed circuit board 4. As a result, the reliability of the power module 107 is high. Furthermore, since the earthquake resistance and impact resistance of the printed circuit board 4 of the power module 107 are higher than those of the printed circuit board 4 of the power module 102, the reliability of the power module 107 is high even in harsher environments where high earthquake resistance and impact resistance are required. The range of application of the power module 107 is wider than that of the power module 102.

[0128] Power module 107 may have the same configuration as power module 101 according to the first embodiment or any of power modules 103 to 106 according to the third to sixth embodiments, except that printed circuit board 4 is a ceramic substrate.

[0129] Embodiment 8 19 has a configuration basically similar to that of power module 106 according to embodiment 6, but differs from power module 106 in that it further includes a cooler 9A connected to first insulating substrate 1A and a cooler 9B connected to first opposing portion 4A. The following will mainly describe the differences between power module 108 and power module 106.

[0130] The first insulating substrate 1A further has a third surface 1A2 located on the opposite side to the first surface 1A1. The first opposing portion 4A further has a fourth surface 4A2 located on the opposite side to the surface on which the first recess 4C is formed. The fourth surface 4A2 is the surface of the first protective layer 46.

[0131] The second insulating substrate 1B further has a fifth surface 1B2 located on the opposite side to the second surface 1B1. The second opposing portion 4B further has a sixth surface 4B2 located on the opposite side to the surface on which the second recess 4D is formed. The sixth surface 4B2 is the surface of the second protective layer 47.

[0132] The fifth surface 1B2 is disposed, for example, on the same plane as the fourth surface 4A2, and the sixth surface 4B2 is disposed, for example, on the same plane as the third surface 1A2.

[0133] The cooler 9A is connected to, for example, the third surface 1A2 of the first insulating substrate 1A and the sixth surface 4B2 of the second opposing portion 4B. The cooler 9A is bonded to the third surface 1A2 and the sixth surface 4B2 by a bonding material 90, for example.

[0134] The cooler 9B is connected to, for example, the fifth surface 1B2 of the second insulating substrate 1B and the fourth surface 4A2 of the first opposing portion 4A. The cooler 9B is bonded to the fifth surface 1B2 and the fourth surface 4A2 by a bonding material 90, for example.

[0135] Each of the coolers 9A and 9B may have any structure as long as it can dissipate heat generated in the first power semiconductor element 2A and the second power semiconductor element 2B to the outside, and is, for example, a heat sink including a base portion 91 and a plurality of fins 92 connected to the base portion 91. The material constituting the coolers 9A and 9B may be any material having high thermal conductivity, and includes, for example, copper (Cu) or aluminum (Al).

[0136] The material constituting the bonding material 90 may be any bonding material having a higher thermal conductivity than the material constituting the insulator layer 44 of the printed circuit board 4. When the power module 108 includes a first insulating substrate 1A and a second insulating substrate 1B as the first substrate and the second substrate, the material constituting the bonding material 90 may be a conductive adhesive. Even in this case, the base material 10 of the first insulating substrate 1A made of an electrically insulating material is interposed between the first power semiconductor element 2A and the cooler 9A, so that the first power semiconductor element 2A can be electrically insulated from the cooler 9A.

[0137] It is sufficient that power module 108 includes at least one of cooler 9A and cooler 9B. In power module 108 including cooler 9A and cooler 9B, cooler 9A is connected to at least a part of first insulating substrate 1A, and cooler 9B is connected to at least a part of second insulating substrate 1B.

[0138] Furthermore, the power module 108 may have a similar configuration to any of the power modules 101 to 105 according to the first to fifth embodiments and the power module 107 according to the seventh embodiment, except that the power module 108 includes at least one of the cooler 9A and the cooler 9B. When the power module 107 includes the first conductive plate 1E as the first substrate like the power module 104, the material constituting the bonding material 90 may be selected from materials having electrical insulation and a higher thermal conductivity than the material constituting the insulator layer 44 of the printed circuit board 4.

[0139] Although the embodiment of the present disclosure has been described above, the above-mentioned embodiment can be modified in various ways. The scope of the present disclosure is not limited to the above-mentioned embodiment. The scope of the present disclosure is defined by the scope of the claims, and is intended to include all modifications within the scope and meaning equivalent to the scope of the claims. [Explanation of symbols]

[0140] 1A first insulating substrate, 1A1, 1E1 first surface, 1A2 third surface, 1B second insulating substrate, 1B1, 1F1 second surface, 1B2 fifth surface, 1E first conductive plate, 1F second conductive plate, 2A first power semiconductor element, 2B second power semiconductor element, 3A first conductive post, 3B second conductive post, 4 printed circuit board, 4A first opposing portion, 4A2 fourth surface, 4B second opposing portion, 4B2 sixth surface, 4C first recess, 4D second recess, 5, 90 bonding material, 6, 7, 8 resin, 9A, 9B cooler, 10, 49A, 49B, 49C substrate, 11 first conductive layer, 12 second conductive layer, 13 thick portion, 14 thin portion, 21A, 21B main electrode, 22A, 22B control electrode, 31A, 31B exposed portion, 41 First wiring layer, 42 Second wiring layer, 41A, 41B, 41C, 42A, 42B, 42C, 42D Second external connection terminal, 44 Insulator layer, 45 Through via, 46 First protective layer, 47 Second protective layer, 48 Conductor block, 50A First through hole, 50B Second through hole, 91 Base portion, 92 Fins, 101, 102, 103, 104, 105, 106, 107, 108, 300, 310, 320, 330 Power module, 201, 202, 203 Semi-finished product.

Claims

1. a first substrate having a first surface; A first power semiconductor element mounted on the first surface; a printed circuit board having a first opposing portion arranged to overlap the first surface of the first substrate in a first direction perpendicular to the first surface; a first conductor post electrically connecting the first power semiconductor element and the first opposing portion; a second substrate having a second surface; a second power semiconductor element mounted on the second surface, a first recess for accommodating the first power semiconductor element and the first conductive post therein is formed in the first opposing portion; the printed circuit board further includes a second opposing portion disposed so as to overlap the second surface of the second board in the first direction; a second conductor post electrically connecting the second power semiconductor element and the second opposing portion; a second recess for accommodating the second power semiconductor element and the second conductive post therein is formed in the second opposing portion; The second surface faces in a direction opposite to the first surface, The first recess faces the first surface, The second recess faces the second surface and is arranged alongside the first recess in a direction along the first surface.

2. A first substrate having a first surface; A first power semiconductor element mounted on the first surface; a printed circuit board having a first opposing portion arranged to overlap the first surface of the first substrate in a first direction perpendicular to the first surface; a first conductor post electrically connecting the first power semiconductor element and the first opposing portion, a first recess for accommodating the first power semiconductor element and the first conductive post therein is formed in the first opposing portion; The first power semiconductor element is embedded in a resin, the first conductive post has an exposed portion exposed from the resin, the exposed portion is electrically connected to the first opposing portion.

3. A first substrate having a first surface; A first power semiconductor element mounted on the first surface; a printed circuit board having a first opposing portion arranged to overlap the first surface of the first substrate in a first direction perpendicular to the first surface; a first conductor post electrically connecting the first power semiconductor element and the first opposing portion, a first recess for accommodating the first power semiconductor element and the first conductive post therein is formed in the first opposing portion; the first substrate includes a conductor layer having the first surface; the first opposing portion includes a first wiring layer, a second wiring layer, an insulator layer, a first protective layer, and a second protective layer; the first protective layer, the first wiring layer, the insulator layer, the second wiring layer, and the second protective layer are stacked in order in the first direction, the second wiring layer of the first opposing portion is bonded to the conductor layer of the first substrate via a bonding material; A power module, wherein, in a plan view, the second wiring layer, the conductor layer, and the bonding material are continuously arranged so as to surround an entire periphery of the first power semiconductor element or the first recess.

4. A power module as described in claim 1 or 2, wherein the first substrate is an insulating substrate including a conductor layer having the first surface and a base material laminated with the conductor layer in the first direction and composed of a material having electrical insulation properties.

5. A power module as described in claim 3, wherein the first substrate is an insulating substrate including the conductor layer and a base material laminated with the conductor layer in the first direction and composed of a material having electrical insulation properties.

6. 4. The power module according to claim 1, wherein the first substrate is a conductive plate having the first surface and a back surface located on the opposite side to the first surface.

7. the first substrate includes a thin portion that faces the first facing portion of the printed circuit board without the first power semiconductor element therebetween, and a thick portion that protrudes in the first direction relative to the thin portion, The power module according to claim 6 , wherein the first surface is a surface of the thick portion.

8. A power module described in any one of claims 1 to 3, wherein the first power semiconductor element, the first conductor post, and the portion of the first opposing portion connected to the first conductor post are embedded in resin.

9. A power module as described in claim 8, wherein the space between the first substrate and the first opposing portion facing the first power semiconductor element and the first conductor post is filled with the resin.

10. A power module described in any one of claims 1 to 3, wherein the printed circuit board is a ceramic substrate including a substrate made of ceramic and a conductor layer laminated on the substrate.

11. The first substrate further has a third surface located opposite the first surface in the first direction, the first opposing portion has a fourth surface located on an opposite side to the first recess in the first direction, The power module according to claim 1 , further comprising a cooler connected to the third surface or the fourth surface.

12. The first opposing portion has an opposing surface that faces the first surface without passing through the first power semiconductor element, The power module according to claim 1 , further comprising a bonding material that bonds the opposing surface and the first surface together.