Optical semiconductor inspection equipment
Patent Information
- Application Number
- JP2023533692
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-01-16
- Filing Date
- 2023-01-16
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2043-01-16
AI Technical Summary
The increasing number of LDs per chip complicates manufacturing and testing due to difficulties in maintaining the proper relative positional relationship between probes and pads, leading to potential contact issues and reduced yield, especially when dust or foreign matter interferes, and the need to secure optical paths for inspection.
An optical semiconductor inspection device using dummy probe pads and probes that are not directly connected to terminals, along with a control circuit to measure resistance values, ensuring proper contact by adjusting the installation angle and eliminating gaps through rotational control.
Enables accurate detection of normal contact states between probes and pads, preventing short circuits and ensuring high product yield while maintaining optical paths without altering chip design or increasing costs.
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Abstract
Description
Technical Field
[0001] This application relates to an optical semiconductor inspection apparatus.
Background Art
[0002] With the evolution of optical communication technology, the functions of optical semiconductors used in communication have also diversified. For example, a laser diode (hereinafter also referred to as LD) whose output optical wavelength is variable is used in high-capacity communication. As one method for realizing such an LD, a method may be used in which a plurality of LDs having different output wavelengths are prepared in one chip, and the output optical wavelength is made variable by controlling the chip temperature and the LD to be made to emit light with a control circuit (see, for example, Patent Document 1). Here, as the wavelength accuracy required by the system becomes higher, the number of LDs prepared in one chip is increasing, and accordingly, the manufacturing or inspection of the LD chips is becoming difficult.
[0003] The difficulties that may occur here are that when inspecting a plurality of LDs, when it is necessary to simultaneously contact probes for inspecting individual LDs, generally, it is difficult to know whether the contact state is normal. Therefore, depending on the contact state, there is a possibility that the yield of the product will decrease when manufacturing the product.
[0004] In response to the above problems, in a conventional attempt, after arranging three dummy pads on the probe contact surface, a judgment is made by a contactor capable of judging whether or not all of them are in a normal contact state, thereby ensuring appropriate contact with a plurality of terminals existing on the probe contact surface (see, for example, Patent Document 2).
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
Patent Document 2
[0006] As the number of LDs integrated into a single chip increases, if the relationship between the surface determined by the probe used to inspect them and the surface determined by the pad or contact pattern, or the relationship between the line connecting the centers of multiple probes and the line connecting the points on which the pad or contact pattern contacts those multiple probes, is disrupted (hereinafter simply referred to as a parallel relationship), in other words, if the appropriate relative positional relationship between both (the probe and the pad or contact pattern) for inspection is disrupted due to variations in the placement of the probe, then normal contact between the probe and the pad or contact pattern will not occur.
[0007] Furthermore, if, during inspection, dust or other debris adheres to the back surface of the tip, causing the parallel relationship between the probe tip surface (the surface determined by the points at the tips of multiple probes) and the tip surface to be disrupted, then, as in the previous example, normal contact between the probe and the pad or contact pattern may not occur.
[0008] Furthermore, if the object being inspected is an LD chip, it is necessary to check the light output intensity or its wavelength while current is flowing through the chip. Therefore, it is necessary to secure space for measuring equipment to check the light output outside at least a portion of the chip's periphery (for example, one side if the chip is rectangular), and thus structures such as the aforementioned probes cannot be placed there. In contrast, the area around the chip excluding the aforementioned at least portion, in other words, the area around the chip and its outer periphery, is referred to here as the outer periphery of the chip.
[0009] This application discloses a technology to solve the above-mentioned problems, and aims to provide an optical semiconductor inspection apparatus that can detect whether the probe pad and inspection probe used when inspecting an optical semiconductor are in a normal contact state by using a dummy probe pad and a dummy probe that are not directly connected to the terminals of the optical semiconductor, and by knowing the contact state between the dummy probe pad and the dummy probe. [Means for solving the problem]
[0010] The optical semiconductor inspection apparatus disclosed herein is Main unit of the optical semiconductor inspection device for inspecting optical semiconductors, A relay board that electrically connects the aforementioned optical semiconductor and the main body of the optical semiconductor inspection apparatus, Multiple probe pads are mounted on this relay board and are electrically connected to the current-carrying terminals of the optical components of the optical semiconductor during inspection. Multiple inspection probes are attached to the main body of the optical semiconductor inspection apparatus and individually contact multiple probe pads during the inspection of the optical semiconductor. Multiple dummy probe pads are placed on the relay board so as to sandwich the probe pads, A resistor is placed between adjacent dummy probe pads and connected in series with the dummy probe pads. Multiple dummy probes are attached to the main body of the optical semiconductor inspection apparatus and individually contact multiple dummy probe pads during the inspection of the optical semiconductor. A probe fixing device for fixing and supporting the aforementioned inspection probe and the aforementioned dummy probe, A rotary drive body that rotates the probe fixing device around its axis via a drive shaft, A control circuit controls the rotation angle of the drive shaft of the rotary drive body in order to install the probe fixing device at a desired installation angle position. Equipped with, The aforementioned control circuit is During the inspection of the optical semiconductor, multiple dummy probe pads and multiple dummy probes are brought into contact with each other, and multiple resistance values are measured between the dummy probe pads and the dummy probes. Based on the measured resistance values between different dummy probes, the probe fixing device is controlled to be installed at a desired installation angle position,It is characterized in that whether the contact state between the plurality of inspection probes and the plurality of probe pads is good or not is determined according to whether a plurality of measured resistance values satisfy a specified value.
Advantages of the Invention
[0011] According to the optical semiconductor inspection apparatus disclosed in the present application, when inspecting an optical semiconductor, by using a dummy probe pad and a dummy probe that are not directly connected to the terminals of the optical semiconductor, and knowing the contact state between the dummy probe pad and the dummy probe, it is possible to provide an optical semiconductor inspection apparatus that can detect whether the probe pad and the inspection probe used when inspecting the optical semiconductor are in a normal contact state.
Brief Description of the Drawings
[0012] [Figure 1] It is a top view showing the main part of the optical semiconductor inspection apparatus according to Embodiment 1 and the object to be measured. [Figure 2] It is a side view showing the main part of the optical semiconductor inspection apparatus according to Embodiment 1. [Figure 3] It is a diagram for explaining the main part of the optical semiconductor inspection apparatus according to Embodiment 2 and its control method. [Figure 4] It is a diagram for explaining the control operation of the main part of the optical semiconductor inspection apparatus according to Embodiment 2, and is a diagram for explaining the state of the main part before control. [Figure 5] It is a diagram for explaining the control operation of the main part of the optical semiconductor inspection apparatus according to Embodiment 2, and is a diagram for explaining the state after control completion. [Figure 6] It is a diagram for explaining the control operation of the main part of the optical semiconductor inspection apparatus according to Embodiment 2, and is a diagram showing an example of the resistance value measured by the contact detection circuit of the main part. [Figure 7] It is a diagram for explaining a control method capable of measuring the timing of the resistance value in the optical semiconductor inspection apparatus according to Embodiment 3. [Figure 8A] It is a diagram for explaining the response time of the contact detection circuit of the optical semiconductor inspection apparatus according to Embodiment 3. [Figure 8B] It is a diagram showing a measurement example of the resistance value measurement response time between dummy probes of the optical semiconductor inspection apparatus according to Embodiment 3.
Embodiments for Carrying Out the Invention
[0013] Embodiment 1. This application relates to an optical semiconductor inspection apparatus, and particularly to an apparatus suitable for inspecting a large number (multi-pin) of optical semiconductors and a method for inspecting a large number (multi-pin) of optical semiconductors.
[0014] Generally, in the manufacture of semiconductor integrated circuits such as LSIs, when the formation of a large number of LSIs on a wafer is completed, before the wafer is separated into individual LSI chips, a full inspection of all the LSI chips is performed using an LSI tester. At this time, the LSI tester, which is the main inspection apparatus for the LSI chips to be inspected, and the LSI chips are electrically connected by a probe card. Here, specifically, the probe card is a connection jig (a probe or a jig having a probe). Further, the test apparatus includes, in addition to the above-mentioned LSI tester and the above-mentioned probe card, a positioning handling apparatus called a wafer prober for electrically and mechanically connecting the above-mentioned wafer and the above-mentioned LSI tester via the above-mentioned probe card, and fully inspects a large number of LSI chips.
[0015] Following the above, in this application, we focused on changing the relative positional relationship between the probe (pointer) of the wafer prober and the connecting electrode (pad) of the LSI chip to the relative positional relationship between the probe and a multi-pin optical semiconductor, which is created by changing the numerous LSI chips to multi-pin chips. We then analyzed the factors that cause this relative positional relationship to deviate from the above-mentioned matching position and implemented countermeasures, thereby realizing the optical semiconductor inspection apparatus of this application as an inspection device that can accurately position at the above-mentioned matching position. Below, we will explain in detail with reference to figures, paying particular attention to the part of this optical semiconductor inspection apparatus that corresponds to the positioning handling device (hereinafter also referred to as the main part of the optical semiconductor inspection apparatus).
[0016] Figure 1 is a top view of the entire main part of the optical semiconductor inspection apparatus according to Embodiment 1. In Figure 1, the optical semiconductor 100 (corresponding to the chip mentioned above) is composed of a plurality of LD101 (laser diodes 101) with different output wavelengths, and the drive current for each of these LD101 is supplied through a current supply terminal 102 corresponding to the LD101. Since there are as many current supply terminals 102 as there are LD101, the optical semiconductor 100 as a whole has a multi-pin structure. Furthermore, the relay board 104 (hereinafter also referred to as the evaluation board 104) is an auxiliary inspection component designed to inspect the optical semiconductor 100, and is connected to the individual current supply terminals 102 of the LD 101 by wires 103, so that a drive current is supplied to each of the LD 101 individually. In addition to the original probe pads (hereinafter also referred to as wiring) provided in conventional inspection equipment, the evaluation board 104 has newly been equipped with a contact detection circuit including a resistor 110 and a dummy probe pad 107 (hereinafter also referred to as dummy wiring 107) that constitutes this contact detection circuit as components. Furthermore, the probe pads 105 to which this wire 103 is connected are wiring components provided for individually testing the LDs 101. By passing current through each probe pad via the test probe 106 (hereinafter also simply referred to as probe 106), it becomes possible to measure the current-optical output characteristics, etc. The optical path 201 of the optical semiconductor 100, indicated by the dotted arrow, shows the direction of the optical output from each LD, and the aforementioned current-optical output characteristics are tested by individually measuring the output intensity, etc., for each LD.
[0017] Furthermore, in Figure 1, the dummy probe pad 107 and the dummy probe 108, shown by the dotted line, are additional components for facilitating inspection in this application. The dummy probe pad 107 is not connected to the LD 101, but to the resistor 110. Here, a dummy probe is an operational probe added to the originally required inspection probe to activate the contact detection circuit. Note that the optical components of the optoelectronic semiconductor are not limited to the LD described above, but may also be optical components such as LEDs, photodiodes, and phototransistors.
[0018] Figure 2 shows a side view of a part of the main components of the inspection apparatus for the optical semiconductor 100 in Embodiment 1. In Figure 2, the contact points 109 where the evaluation substrate 104 and the probes come into contact are, more specifically, the points where the probe 106 and the probe pad 105 come into contact, or the points where the dummy probe 108 and the dummy probe pad 107 come into contact. These are the contact points when the relative positions of the surface of the relay substrate 104 and the surface formed by the points where the multiple probes 106 come into contact and the points where the multiple dummy probes 108 come into contact, as shown in Figure 1, are properly maintained (for example, when the arrangement of the two surfaces is kept parallel to each other). In such cases, each contact is made normally.
[0019] On the other hand, in an inspection device for the optical semiconductor 100, if the relative positions of the probe 106 and the relay substrate 104 are not properly maintained (for example, if their positions are not kept parallel), the contact point 109 may shift from the position of the probe pad 105 that it normally contacts, ultimately resulting in a short circuit between the probe pads.
[0020] Furthermore, in the inspection apparatus for the optical semiconductor 100, the inspection using a probe is generally performed by placing the substrate to be inspected on the surface of an inspection stage made of metal. However, if foreign matter such as dust is present on the back surface of the substrate, the parallel state between the substrate and the inspection stage may not be maintained, causing a gap to form between the probe and the substrate, which can result in a poor connection between the probe and the probe pad.
[0021] Therefore, when inspecting semiconductors, due to the difficulty in handling caused by the thinness of the chip, or from the perspective of heat dissipation, when performing characteristic tests on semiconductor chips, for example, instead of directly applying a probe to the semiconductor chip being tested, a method is employed indirectly by using a transmission substrate made of polyimide or the like as an intermediary, and applying the probe to that substrate (i.e., the intermediary substrate).
[0022] As semiconductor chips become more complex in their functionality, or as the number of input / output pins on them increases (so-called multi-pinning), the pitch between pins becomes smaller, making the ease of probing in inspection equipment a crucial issue. In particular, for optical semiconductor chips, since optical input / output is a critical function of the chip, ensuring a clear optical path must also be achieved simultaneously. Here, probing refers to the process of making (proper) contact between a probe and a pad or similar object in order to inspect a semiconductor chip.
[0023] In particular, when probing an object with multiple pins, it is necessary to maintain accurate contact positions between all the probes and the evaluation board. If even one contact position is misaligned, a probe may end up resting in the gap between adjacent probe pads 105 that are arranged parallel to each other at approximately equal intervals. For example, if one probe comes into contact with the surfaces of both adjacent probe pads 105, a short circuit may occur between the two probe pads, resulting in inappropriate test results and ultimately a deterioration in product yield (hereinafter simply referred to as product yield).
[0024] Furthermore, as mentioned above, securing optical paths is also a challenge for optical semiconductor chips. Unlike ordinary semiconductors, if, for example, the shape of an optical semiconductor chip is rectangular, at least one side of the rectangle must be open for optical input and output. Thus, an inspection device for optical semiconductors is needed that can simultaneously satisfy the requirements of maintaining product yield and securing optical paths.
[0025] The optical semiconductor inspection apparatus of this embodiment 1 solves the above-mentioned problems and is characterized by being an inspection apparatus that does not increase costs or require changes to the semiconductor chip design. In this optical semiconductor inspection apparatus of embodiment 1, dummy probe pads 107, which function as wiring for the contact detection circuit of a normally used inspection probe, are added at regular intervals on the evaluation substrate 104, and dummy probes 108 are positioned to correspond to the dummy probe pads 107 during inspection. That is, when inspecting a multi-pin optical semiconductor, even if dummy probe pads 107 and dummy probes 108 are positioned to correspond to the dummy probe pads 107 and used, the optical path for input and output of LD light from the optical semiconductor is secured (see Figure 1).
[0026] Furthermore, by placing additional resistors 110 in the gaps between the multiple dummy probe pads 107 on the evaluation board 104, and checking whether the resistance value can be reproduced between the dummy probes 108, it becomes possible to determine whether the inspection probes are making proper contact.
[0027] Here, the probe pad 105 has the function of wiring to connect to the current supply terminal 102, which is a normal chip input / output terminal, via the wire 103, and a normal test probe 106 is positioned to correspond to this probe pad 105. Furthermore, by not connecting the dummy probe pad 107 to the current supply terminal 102, it is unnecessary to change the number of chip inputs and outputs, and in this configuration as well, there is no need to change the design of the optical semiconductor 100.
[0028] Furthermore, if probing is performed using the inspection probe of the optical semiconductor inspection apparatus of this embodiment 1, and the surfaces formed by the tip surfaces of multiple probes 106 or multiple dummy probes 108 are not parallel to the surface of the evaluation substrate 104, for example, if a short circuit occurs between multiple pads, the resistance value between the dummy probes 108 placed at regular intervals will not be a constant value, and a high resistance value will be observed, indicating that probing has not been performed correctly.
[0029] Specifically, for example, if the resistance value of resistor 110 is set to 100Ω, if a resistance value of 1kΩ or more is observed, it can be determined that the probe contact is poor (hereinafter also referred to as a probe failure). By detecting this probe failure before measurement, the effort of re-probing is avoided, and the reduction in product yield due to inaccurate measurements is prevented.
[0030] Embodiment 2. Figure 3 is a top view (top view) of the inspection apparatus for the optical semiconductor 100 in the optical semiconductor inspection apparatus of Embodiment 2, showing a characteristic part extracted from above. In this figure, the configuration to the right of the evaluation substrate 104 is the same as in Figure 1, so it is omitted from the illustration.
[0031] In Figure 3, the probe fixing device 202, which securely supports the test probe 106 and the dummy probe 108, is configured to allow rotational control of the entire evaluation board 104, with the drive shaft of the rotary drive unit 206 as the center of rotation. The wiring wire 203 is an electrical signal line connected to the dummy probe 108, and is electrically connected to both ends of the resistor 110 when contact with the evaluation board 104 is made correctly. The measuring instrument 204 is a device that measures the resistance between adjacent dummy probes and transmits the result to the control circuit 205. The control circuit 205 can adjust the positions of the probe 106 and the dummy probe 108 by controlling the rotary drive unit 206.
[0032] Figures 4 and 5 are side views of the main parts of the optical semiconductor inspection apparatus, illustrating the position control method for the probe 106 and dummy probe 108 described above. In these figures, foreign matter 112 such as dust is interposed between the evaluation substrate 104 and the inspection stage 111, which normally creates a clear gap 113 between the probe 106 and the probe pad 105 on the evaluation substrate, as shown in Figure 4. However, with the inspection probe of the optical semiconductor inspection apparatus of this embodiment 2, by controlling the rotation of the probe fixing device 202, it can be seen that the gap 113 does not occur in a clear form, as shown in Figure 5. In other words, before rotational control is applied, the upper surface of the probe fixing device 202 is at an angle θ1, creating a gap 113. However, when the rotational drive unit 206 starts the rotation of the probe fixing device 202, it rotates by an angle Δθ, and rotational control is applied so that its upper surface rotates to an angle θ2. As a result, the gap 113 between the probe 106 and the probe pad 105 (or the gap 113 between the dummy probe and the dummy probe pad) disappears.
[0033] When probing semiconductors, it is necessary to hold the surface formed by multiple probe tips (hereinafter referred to as the probe tip surface) parallel to the surface of the evaluation substrate during inspection, and to bring the probe tip surface into contact with the surface of the evaluation substrate. However, if foreign matter such as dust adheres to the back surface of the evaluation substrate, the probe tip surface and the surface of the evaluation substrate become non-parallel, preventing some of the probes from making contact with the substrate. As a result, inaccurate inspections are performed, leading to a problem of reduced product yield.
[0034] In the inspection using the inspection probe of the optical semiconductor inspection apparatus of this embodiment 2, accurate measurements can be performed even if foreign matter adheres to the substrate and the probe tip surface and the surface of the evaluation substrate are in a non-parallel position.
[0035] In the inspection using the inspection probe of the optical semiconductor inspection apparatus of this second embodiment, in addition to the first embodiment, the desired function can be achieved by controlling the rotation angle of the probe fixing device 202 and installing it at a desired installation angle position.
[0036] Furthermore, when probing is performed correctly, the resistance value between the dummy probes is approximately constant. However, as shown in Figure 4, when foreign matter 112 is interposed between the evaluation board 104 and the inspection stage 111, as shown in Figure 6, the resistance value between the evaluation board and the probes may vary depending on the dummy probe used for measurement. For example, the greater the distance between the dummy probes used for measurement, the higher the resistance value.
[0037] Therefore, by using the control circuit 205 to transmit this high resistance value information, the rotary drive unit 206 rotates the probe fixing device 202 in a direction that allows the high-resistance probe to make contact (the figure shows clockwise rotation as an example), thereby eliminating the gap 113 and ensuring reliable contact between the probe and the evaluation substrate. After the probe fixing device 202 is rotated by the rotary drive unit 206, the position where reliable contact between the probe and the evaluation substrate is first achieved corresponds to the desired installation angle position of the probe fixing device 202.
[0038] Embodiment 3. To solve the same problems as in Embodiment 2, it is possible to achieve equivalent effects by implementing control using a control method that allows for timing measurement of resistance value observation, as shown in Figure 7.
[0039] As described above, in resistance measurement between dummy probes 108, when the substrate and probe are in normal contact, a specified resistance value (for example, RΩ (ohms) as shown in Figure 8A) is detected almost simultaneously. However, if the substrate is tilted due to foreign matter under the evaluation substrate, as shown in Figure 4, the detection timing of the resistance measurement at the end of the dummy probe is shifted. For example, as shown in Figure 8A, before the detection timing, the resistance value between dummy probes 108 is much larger than the specified resistance value (specifically, an infinite value: ∞Ω as shown in Figure 8A), and the reaction time becomes larger than a constant value (reaction time: t0 shown by the dotted line in Figure 8B). In other words, the reaction time t will differ depending on the dummy probes 108 (combination) used for measurement. Here, the reaction time t is defined as the time t when the dummy probe starts descending, as shown in Figure 8A. s The time t is the time during which the dummy probe and the dummy probe pad of the contact detection circuit come into contact. c This refers to the time until (that is, t=t c ―t s (That is.)
[0040] Therefore, based on this detection timing information, the dummy probe with a reaction time greater than a certain value is identified, and this identified dummy probe is moved using the rotary drive unit 206 to contact the substrate and then into contact with the dummy probe pad. This eliminates the gap 113 (see Figure 4) between the identified dummy probe and the dummy probe pad, thereby ensuring reliable contact between the inspection probe and the evaluation substrate.
[0041] Although this application describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but can be applied individually or in various combinations to the embodiments. Accordingly, countless variations not illustrated are conceivable within the scope of the technology disclosed herein. These include, for example, modifications, additions, or omissions of at least one component, as well as the extraction of at least one component and its combination with components of other embodiments.
[0042] Specifically, in Figure 1, the current-carrying terminals 102 of the optical semiconductor 100 are concentrated on one side of the optical semiconductor 100 and its vicinity on the left side. This ensures that the optical paths 201 of the multiple LDs placed on the optical semiconductor 100 are secured on the lower side of the optical semiconductor 100 during inspection. However, the arrangement is not limited to this figure. The current-carrying terminals 102 may also be placed on the upper and right sides of the rectangular optical semiconductor 100, in addition to the left side, or they may be placed on only one of the upper or right sides of the rectangular optical semiconductor 100. Furthermore, the wire 103 is positioned to connect the current-carrying terminal 102 and the probe pad 105 over the shortest distance, but the connecting distance is not limited to the shortest distance (the left side may also be the upper side). [Explanation of Symbols]
[0043] 100 Optical semiconductor, 101 Laser diode (LD), 102 Current-carrying terminal, 103 Wire, 104 Evaluation board (intermediate board), 105 Probe pad, 106 Inspection probe, 107 Dummy probe pad, 108 Dummy probe, 109 Contact point, 110 Resistor, 111 Inspection stage, 112 Foreign object, 113 Gap, 201 Optical path, 202 Probe fixing device, 203 Wiring wire, 204 Measuring instrument, 205 Control circuit, 206 Rotary drive unit
Claims
1. An optical semiconductor inspection device main body for inspecting optical semiconductors; an intermediate substrate that electrically connects the optical semiconductor and the optical semiconductor inspection device body; a plurality of probe pads mounted on the relay board and electrically connected to current-carrying terminals of the optical components of the optical semiconductor during testing; a plurality of inspection probes attached to the optical semiconductor inspection apparatus body and adapted to come into contact with the plurality of probe pads respectively during inspection of the optical semiconductor; a plurality of dummy probe pads disposed on the relay substrate so as to sandwich the probe pad; A resistor disposed between adjacent dummy probe pads and connected in series to the dummy probe pads; a plurality of dummy probes attached to the optical semiconductor inspection apparatus body and contacting the plurality of dummy probe pads respectively during inspection of the optical semiconductor; a probe fixing device that fixes and supports the inspection probe and the dummy probe; a rotation driver that rotates the probe fixing device around an axis via a drive shaft; a control circuit for controlling a rotation angle of the drive shaft of the rotary drive body in order to set the probe fixing device at a desired setting angle position; Equipped with The control circuit, during inspection of the optical semiconductor, brings the multiple dummy probe pads into contact with the multiple dummy probes, measures multiple resistance values between the dummy probe pads and the dummy probes, controls the probe fixing device to install at a desired installation angle position based on the measured resistance values between the different dummy probes, and determines whether the contact state between the multiple inspection probes and the multiple probe pads is good or bad depending on whether the measured resistance values satisfy a specified value.
2. When inspecting the optical semiconductor, wires are provided for connecting the plurality of probe pads of the relay board to the plurality of current-carrying terminals of the optical component, respectively, the wire connects the current-carrying terminal and the probe pad at an outer periphery of the optical semiconductor excluding the optical path of the optical component; 2. The optical semiconductor inspection device according to claim 1.
3. determining the desired installation angle position of the probe fixing device based on a response time when a contact detection circuit constituted by the plurality of dummy probes, the plurality of dummy probe pads, and the plurality of resistors measures a resistance value between different dummy probes; 2. The optical semiconductor inspection device according to claim 1.
4. when a difference occurs in detection timing of resistance values between different dummy probes of a contact detection circuit constituted by the plurality of dummy probes, the plurality of dummy probe pads, and the plurality of resistors, the contact detection circuit identifies the dummy probe in which the difference in detection timing occurs, moves the identified dummy probe so as to contact the dummy probe pad, and controls the probe fixing device to be set at the desired setting angle position.
2. The optical semiconductor inspection device according to claim 1.
