Display device

JPWO2024195051A5Active Publication Date: 2025-11-25SHARP DISPLAY TECHNOLOGY CORP
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Patent Information

Application Number
JP2025508018
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-09-09
Publication Date
2025-11-25
Estimated Expiration
2043-03-22

AI Technical Summary

Technical Problem

In self-luminous organic EL display devices, the light-emitting functional layer tends to deteriorate at the panel edge side of through holes due to moisture intrusion, especially when the resin substrate layer is exposed and the distance between the through hole and the panel edge is narrow, leading to reliability issues.

Method used

A display device design featuring a resin substrate layer with an inorganic insulating film and a thin film transistor layer, where annular slits are formed in the resin substrate layer and inorganic insulating film around through holes to separate the inorganic insulating layer into display area and through hole sides, with a protruding first inorganic sealing film covering the slits, effectively preventing moisture intrusion and deterioration of the light-emitting functional layer.

Benefits of technology

This design effectively suppresses the deterioration of the light-emitting functional layer on the panel edge side of through holes, enhancing the reliability and longevity of the organic EL display device by preventing moisture ingress and maintaining the structural integrity of the light-emitting components.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

A non-display region (N) is provided in island form inside a display region (D) along a panel end edge (E) of a display panel (50a), and a through-hole (H) penetrating the display panel (50a) in a thickness direction is provided in the non-display region (N). In the non-display region (N), a plurality of slits (Sa, Sb, Sc) are annularly provided in the thin-film-transistor-layer side of a resin substrate layer and in an inorganic insulating film of the thin-film transistor layer so as to surround the through-hole (H), at least one of the plurality of slits (Sa, Sb, Sc) being provided so as to be divided into a plurality of portions on the panel-end-edge (E) side.
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Description

display device

[0001] The present invention relates to a display device.

[0002] In recent years, self-luminous organic EL display devices using organic electroluminescence (EL) elements have been attracting attention as a display device that can replace liquid crystal display devices. Here, an organic EL display panel constituting an organic EL display device includes, for example, a resin substrate layer, a TFT layer provided on the resin substrate layer and having thin film transistors (TFTs) arranged therein, an organic EL element layer provided on the TFT layer and having organic EL elements arranged therein, and a sealing film provided on the organic EL element layer. For organic EL display devices including this organic EL display panel, a structure has been proposed in which an island-shaped non-display area is provided within a display area for displaying images, and through-holes are provided in the non-display area in the thickness direction to accommodate electronic components such as a camera or a fingerprint sensor.

[0003] For example, Patent Document 1 discloses a display device in which a first functional layer and / or a second functional layer are interrupted (or separated) by an undercut structure or an eave structure arranged in the intermediate region around the through hole.

[0004] Japanese Patent Application Laid-Open No. 2021-67949

[0005] A self-luminous element, such as an organic EL element, includes, for example, a first electrode provided on a TFT layer, a light-emitting functional layer provided on the first electrode, and a second electrode provided on the light-emitting functional layer. The light-emitting functional layer includes a plurality of individual light-emitting functional layers corresponding to the plurality of subpixels constituting the display area, and a common light-emitting functional layer provided common to the plurality of subpixels. The second electrode, like the common light-emitting functional layer, is also provided common to the plurality of subpixels. In a self-luminous display device having a through-hole formed within the display area as described above, moisture or the like may penetrate through the common light-emitting functional layer or second electrode exposed through the through-hole, potentially deteriorating the common light-emitting functional layer and the individual light-emitting functional layers in contact therewith. Therefore, the common light-emitting functional layer and the second electrode must be formed separately on the display area side and the through-hole side around the through-hole. Therefore, in a self-luminous display device, it has been proposed to pattern an inorganic insulating film constituting the TFT layer and then use the patterned inorganic insulating film to form an annular slit in the resin substrate layer around the through-hole. Although this reverse tapered structure using slits allows the common light-emitting functional layer and second electrode to be formed separately on the display area side and the through-hole side, in self-luminous display devices for which a narrower frame width is increasingly required, the distance between the through-hole and the panel edge tends to be closer. In this case, in self-luminous display devices having the reverse tapered structure using slits, the resin substrate layer is exposed at the end faces of the through-hole and the panel edge, which are located close to each other, and moisture penetrates into the resin substrate layer from both the end faces of the through-hole and the panel edge, making the light-emitting functional layer on the panel edge side of the through-hole more susceptible to deterioration, and therefore there is room for improvement.

[0006] The present invention has been made in view of the above points, and an object of the present invention is to suppress deterioration of the light-emitting functional layer on the panel edge side of the through-hole.

[0007] a light-emitting element layer provided on the thin-film transistor layer, the light-emitting element layer including a plurality of first electrodes, a light-emitting function layer, and a second electrode stacked in this order corresponding to a plurality of sub-pixels constituting a display area; and a first inorganic sealing film provided on the light-emitting element layer, wherein a non-display area is provided in an island shape within the display area along a panel edge of the display panel, the non-display area having a through-hole penetrating the display panel in a thickness direction, and a plurality of slits are provided in the non-display area, in a thin-film transistor layer side of the resin substrate layer and in the inorganic insulating film, so as to surround the through-hole, and an inorganic insulating layer formed by separating the inorganic insulating film by the plurality of slits is provided so as to protrude toward at least one of the display area side and the through-hole side beyond a resin layer formed by separating the thin-film transistor layer side of the resin substrate layer by the plurality of slits, and the first inorganic sealing film is provided so as to cover the plurality of slits, and at least one of the plurality of slits is provided so as to be divided into a plurality of parts on the panel edge side.

[0008] According to the present invention, it is possible to suppress deterioration of the light-emitting functional layer on the panel edge side of the through-hole.

[0009] FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention. FIG. 2 is a plan view of a display region of an organic EL display panel constituting the organic EL display device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view of the display region of the organic EL display panel taken along line III-III in FIG. 1. FIG. 4 is an equivalent circuit diagram of a TFT layer constituting the organic EL display panel according to the first embodiment of the present invention. FIG. 5 is a cross-sectional view of an organic EL layer constituting the organic EL display panel according to the first embodiment of the present invention. FIG. 6 is a plan view of a non-display region and its periphery of an organic EL display panel according to the first embodiment of the present invention. FIG. 7 is a plan view of a non-display region and its periphery of a modified organic EL display panel according to the first embodiment of the present invention, corresponding to FIG. 6. FIG. 8 is a cross-sectional view of the non-display region of the organic EL display panel taken along line VIII-VIII in FIG. 6. FIG. 9 is a cross-sectional view of the non-display region of the organic EL display panel taken along line IX-IX in FIG. 6. FIG. 10 is a cross-sectional view of the organic EL display panel taken along line X-X in FIG. 1.

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.

[0011] First Embodiment FIGS. 1 to 10 illustrate a first embodiment of a display device according to the present invention. In the following embodiments, an organic EL display device including an organic EL element layer is exemplified as a display device including a light-emitting element layer. FIG. 1 is a plan view showing a schematic configuration of an organic EL display device 70 according to this embodiment. FIG. 2 is a plan view of a display region D of an organic EL display panel 50a constituting the organic EL display device 70. FIG. 3 is a cross-sectional view of the display region D of the organic EL display panel 50a taken along line III-III in FIG. 1. FIG. 4 is an equivalent circuit diagram of a TFT layer 30 constituting the organic EL display panel 50a. FIG. 5 is a cross-sectional view of an organic EL layer 33 constituting the organic EL display panel 50a. FIG. 6 is a plan view of the non-display region N of the organic EL display panel 50a and its surrounding area. FIG. 7 is a plan view of the non-display region N and its surrounding area of ​​an organic EL display panel 50b, which is a modification of the organic EL display panel 50a, and corresponds to FIG. 6. 8 and 9 are cross-sectional views of the non-display area N of the organic EL display panel 50a taken along lines VIII-VIII and IX-IX in Fig. 6. Fig. 10 is a cross-sectional view of the organic EL display panel 50a taken along line XX in Fig. 1.

[0012] As shown in FIG. 1, the organic EL display device 70 includes an organic EL display panel 50a having a through-hole H in a non-display area N, and an image sensor 60 installed as an electronic component on the back side of the through-hole H of the organic EL display panel 50a, as will be described later.

[0013] 1, the organic EL display panel 50a includes, for example, a rectangular display area D for displaying images, and a frame area F provided in a frame shape around the display area D. Note that, although the present embodiment illustrates a rectangular display area D, this rectangular shape also includes, for example, a substantially rectangular shape with arc-shaped sides, arc-shaped corners, or a shape with a notch in one of the sides.

[0014] As shown in FIG. 2 , a plurality of sub-pixels P are arranged in a matrix in the display region D. Also, as shown in FIG. 2 , for example, a sub-pixel P having a red light-emitting region Lr for displaying red, a sub-pixel P having a green light-emitting region Lg for displaying green, and a sub-pixel P having a blue light-emitting region Lb for displaying blue are arranged adjacent to one another in the display region D. Note that, for example, three adjacent sub-pixels P each having a red light-emitting region Lr, a green light-emitting region Lg, and a blue light-emitting region Lb form one pixel in the display region D. Also, as shown in FIG. 1 , a non-display region N is provided in the display region D in an island shape along the panel edge E of the organic EL display panel 50a. Here, as shown in FIG. 1 , a through-hole H is provided in the non-display region N, which has a circular shape in a plan view and penetrates the organic EL display panel 50a in the thickness direction, in order to install an image sensor 60 on the back side.

[0015] At the lower end of the frame region F in FIG. 1 , a terminal portion T is provided extending in one direction (the X direction in the figure). Here, in the frame region F, as shown in FIG. 1 , a bending portion B is provided between the display region D and the terminal portion T, extending in one direction (the X direction in the figure). The bending portion B can be bent, for example, 180° (in a U-shape) with the X direction in the figure as the bending axis. Also, in the frame region F, a trench G, which is approximately C-shaped in plan view, is provided in the first planarization film 19 a and the second planarization film 21 a (described later), as shown in FIGS. 1 and 10 , penetrating the first planarization film 19 a and the second planarization film 21 a. Here, the trench G is provided in an approximately C-shape in plan view so as to open on the terminal portion T side, as shown in FIG. 1 .

[0016] As shown in FIG. 3, the organic EL display panel 50a includes a resin substrate layer 10, a TFT layer 30 provided on the resin substrate layer 10, an organic EL element layer 40 provided as a light-emitting element layer on the TFT layer 30, and a sealing film 45 provided on the organic EL element layer 40.

[0017] 3 , 8 , 9 , and 10 , the resin substrate layer 10 includes a first resin substrate layer 6 provided on the side opposite the TFT layer 30, a second resin substrate layer 8 provided on the TFT layer 30 side, and an intra-substrate inorganic insulating film 7 provided between the first resin substrate layer 6 and the second resin substrate layer 8. Here, the first resin substrate layer 6 and the second resin substrate layer 8 are made of, for example, a polyimide resin. The intra-substrate inorganic insulating film 7, a base coat film 11 (described later), a gate insulating film 13, a first interlayer insulating film 15, and a second interlayer insulating film 17 are made of, for example, a single layer or a multilayer film of an inorganic insulating film such as silicon nitride, silicon oxide, or silicon oxynitride.

[0018] As shown in Figure 3, the TFT layer 30 includes a base coat film 11 provided on a resin substrate layer 10, a plurality of first TFTs 9a, a plurality of second TFTs 9b (see Figure 4), a plurality of third TFTs 9c, and a plurality of capacitors 9d provided on the base coat film 11, and a first planarization film 19a and a second planarization film 21a provided in that order on each of the first TFTs 9a, each of the second TFTs 9b, each of the third TFTs 9c, and each of the capacitors 9d. 3 , the TFT layer 30 includes a base coat film 11, a semiconductor film that will become a semiconductor layer 12a (described later) and the like, a gate insulating film 13, a first metal film that will become a gate line 14g (described later) and the like, a first interlayer insulating film 15, a second metal film that will become an upper conductive layer 16c (described later) and the like, a second interlayer insulating film 17, a third metal film that will become a source line 18f (described later) and the like, a first planarization film 19a, a fourth metal film that will become a power line 20a (described later) and the like, and a second planarization film 21a that are stacked in this order on the resin substrate layer 10. As described above, the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 are provided as inorganic insulating films that constitute the TFT layer 30.

[0019] As shown in FIG. 2 , the TFT layer 30 includes a plurality of gate lines 14g extending parallel to one another in the X direction. Also, as shown in FIG. 2 , the TFT layer 30 includes a plurality of light-emitting control lines 14e extending parallel to one another in the X direction. Each light-emitting control line 14e is adjacent to a corresponding gate line 14g, as shown in FIG. 2 . Also, as shown in FIG. 2 , the TFT layer 30 includes a plurality of source lines 18f extending parallel to one another in the Y direction. Also, as shown in FIGS. 1 and 3 , the TFT layer 30 includes a power supply line 20a arranged in a grid pattern between a first planarization film 19a and a second planarization film 21a. Also, as shown in FIG. 4 , the TFT layer 30 includes a first TFT 9a, a second TFT 9b, a third TFT 9c, and a capacitor 9d in each subpixel P.

[0020] 4, the first TFT 9a is electrically connected to the corresponding gate line 14g, source line 18f, and second TFT 9b in each subpixel P. Also, as shown in Fig. 3, the first TFT 9a includes a semiconductor layer 12a provided on the base coat film 11, a gate electrode 14a provided on the semiconductor layer 12a via a gate insulating film 13, and a source electrode 18a and a drain electrode 18b provided on the second interlayer insulating film 17 so as to be spaced apart from each other.

[0021] The semiconductor layer 12a is formed of a semiconductor film made of polysilicon such as LTPS (low temperature polysilicon), and includes a source region and a drain region that are spaced apart from each other, and a channel region that is defined between the source region and the drain region. Although the semiconductor layer 12a formed of a semiconductor film made of polysilicon is exemplified in this embodiment, the semiconductor layer 12a and a semiconductor layer 12b, which will be described later, may be formed of a semiconductor film made of an oxide semiconductor such as an In—Ga—Zn—O system.

[0022] The gate electrode 14a is provided so as to overlap the channel region of the semiconductor layer 12a and is configured to control conduction between the source region and the drain region of the semiconductor layer 12a. Here, the gate electrode 14a is formed of the first metal film, similar to the gate line 14g.

[0023] 3, the source electrode 18a and the drain electrode 18b are electrically connected to the source region and the drain region of the semiconductor layer 12a, respectively, through contact holes formed in the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17. Here, the source electrode 18a and the drain electrode 18b are formed of the third metal film, similar to the source line 18f and the like.

[0024] 4, the second TFT 9b is electrically connected to the corresponding first TFT 9a, power supply line 20a, and third TFT 9c in each subpixel P. The second TFT 9b has substantially the same structure as the first TFT 9a and a third TFT 9c described later.

[0025] 4, the third TFT 9c is electrically connected to the corresponding second TFT 9b, a first electrode 31a of an organic EL element 35 (described later), and an emission control line 14e in each subpixel P. Also, as shown in Fig. 3, the third TFT 9c includes a semiconductor layer 12b provided on the base coat film 11, a gate electrode 14b provided on the semiconductor layer 12b via a gate insulating film 13, and a source electrode 18c and a drain electrode 18d provided spaced apart from each other on the second interlayer insulating film 17.

[0026] Like the semiconductor layer 12a, the semiconductor layer 12b is formed of a semiconductor film made of polysilicon such as LTPS, and includes a source region and a drain region defined to be spaced apart from each other, and a channel region defined between the source region and the drain region.

[0027] The gate electrode 14b is provided so as to overlap the channel region of the semiconductor layer 12b and is configured to control conduction between the source region and the drain region of the semiconductor layer 12b. Here, the gate electrode 14b is formed of the first metal film, similar to the gate line 14g.

[0028] 3, the source electrode 18c and the drain electrode 18d are electrically connected to the source region and the drain region of the semiconductor layer 12b, respectively, through contact holes formed in the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17. Here, the source electrode 18c and the drain electrode 18d are formed of the third metal film, similar to the source line 18f and the like.

[0029] In this embodiment, the first TFT 9a, the second TFT 9b, and the third TFT 9c are illustrated as being of a top gate type, but the first TFT 9a, the second TFT 9b, and the third TFT 9c may be of a bottom gate type.

[0030] As shown in Fig. 4, the capacitor 9d is electrically connected to the corresponding first TFT 9a and power supply line 20a in each subpixel P. Here, as shown in Fig. 3, the capacitor 9d includes a lower conductive layer 14c formed of the first metal film, a first interlayer insulating film 15 formed so as to cover the lower conductive layer 14c, and an upper conductive layer 16c formed of the second metal film on the first interlayer insulating film 15 so as to overlap the lower conductive layer 14c. The upper conductive layer 16c is electrically connected to the power supply line 20a via a contact hole (not shown) formed in the second interlayer insulating film 17 and the first planarization film 19a.

[0031] The first planarization film 19a and the second planarization film 21a have flat surfaces in the display region D and are made of, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based SOG (spin on glass) material, etc. Here, as shown in Fig. 3, in addition to the power supply line 20a described above, a relay electrode 20b is provided between the first planarization film 19a and the second planarization film 21a by the fourth metal film.

[0032] 3, the organic EL element layer 40 includes a plurality of first electrodes 31a, edge covers 32a, organic EL layers 33, and second electrodes 34 that are stacked in this order on the TFT layer 30, corresponding to a plurality of subpixels P. Here, in each subpixel P, the first electrodes 31a, the organic EL layers 33, and the second electrodes 34 constitute an organic EL element 35 (see FIG. 4).

[0033] As shown in FIG. 3 , the plurality of first electrodes 31a are provided in a matrix on the second planarization film 21a so as to correspond to the plurality of subpixels P. Here, as shown in FIG. 3 , the first electrodes 31a are electrically connected to the drain electrodes 18d of the respective third TFTs 9c via contact holes formed in the first planarization film 19a, relay electrodes 20b, and contact holes formed in the second planarization film 21a. The first electrodes 31a also have the function of injecting holes (positive holes) into the organic EL layer 33. In order to improve the efficiency of hole injection into the organic EL layer 33, it is preferable that the first electrodes 31a be formed of a material with a large work function. Here, examples of materials constituting the first electrode 31a include metal materials such as silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), titanium (Ti), ruthenium (Ru), manganese (Mn), indium (In), ytterbium (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), and tin (Sn). Examples of materials constituting the first electrode 31a include astatine (At) / astatine oxide (AtO 2 The first electrode 31a may be made of an alloy of tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), indium zinc oxide (IZO), or another conductive oxide. The first electrode 31a may be formed by stacking multiple layers made of the above materials. Examples of compound materials with a large work function include indium tin oxide (ITO) and indium zinc oxide (IZO).

[0034] 3, the edge cover 32a is provided in a lattice pattern so as to cover the peripheral edge of each first electrode 31a. Here, the edge cover 32a is made of, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based SOG material.

[0035] As shown in FIG. 3 , the organic EL layer 33 is disposed on each first electrode 31 a and includes individual light-emitting functional layers provided in a matrix pattern corresponding to the plurality of subpixels P, and a common light-emitting functional layer provided common to the plurality of subpixels P. Here, as shown in FIG. 5 , the organic EL layer 33 includes a hole injection layer 1, a hole transport layer 2, an organic light-emitting layer 3, an electron transport layer 4, and an electron injection layer 5, which are provided in this order on the first electrode 31 a. Note that in this embodiment, an organic EL layer 33 is illustrated in which the organic light-emitting layer 3 is provided as an individual light-emitting functional layer and the hole injection layer 1, the hole transport layer 2, the electron transport layer 4, and the electron injection layer 5 are provided as common light-emitting functional layers. However, color conversion may be performed using a QLED (Quantum-dot light emitting diode) or the like, and the organic light-emitting layer 3 may be used as a common light-emitting functional layer, or at least one of the hole injection layer 1, the hole transport layer 2, the electron transport layer 4, and the electron injection layer 5 may be used as an individual light-emitting functional layer.

[0036] The hole injection layer 1, also called an anode buffer layer, has a function of bringing the energy levels of the first electrode 31 a and the organic EL layer 33 closer to each other and improving the efficiency of hole injection from the first electrode 31 a to the organic EL layer 33, and is provided as a common light-emitting functional layer shared by the plurality of sub-pixels P. Examples of materials that form the hole injection layer 1 include triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives.

[0037] The hole transport layer 2 has a function of improving the efficiency of transporting holes from the first electrode 31 a to the organic EL layer 33, and is provided as a common light-emitting functional layer shared by the plurality of sub-pixels P. Here, examples of materials constituting the hole transport layer 2 include porphyrin derivatives, aromatic tertiary amine compounds, styrylamine derivatives, polyvinylcarbazole, poly-p-phenylenevinylene, polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, zinc sulfide, and zinc selenide.

[0038] The organic light-emitting layer 3 is a region into which holes and electrons are injected from the first electrode 31 a and the second electrode 34, respectively, and where the holes and electrons recombine when a voltage is applied by the first electrode 31 a and the second electrode 34, and is provided as an individual light-emitting functional layer corresponding to a plurality of sub-pixels P. Here, the organic light-emitting layer 3 is formed from a material with high luminous efficiency. Examples of materials that can be used to form the organic light-emitting layer 3 include metal oxinoid compounds [8-hydroxyquinoline metal complexes], naphthalene derivatives, anthracene derivatives, diphenylethylene derivatives, vinylacetone derivatives, triphenylamine derivatives, butadiene derivatives, coumarin derivatives, benzoxazole derivatives, oxadiazole derivatives, oxazole derivatives, benzimidazole derivatives, thiadiazole derivatives, benzothiazole derivatives, styryl derivatives, styrylamine derivatives, bisstyrylbenzene derivatives, trisstyrylbenzene derivatives, perylene derivatives, perinone derivatives, aminopyrene derivatives, pyridine derivatives, rhodamine derivatives, aquidin derivatives, phenoxazone, quinacridone derivatives, rubrene, poly-p-phenylenevinylene, and polysilane.

[0039] The electron transport layer 4 has a function of efficiently transferring electrons to the organic light-emitting layer 3, and is provided as a common light-emitting functional layer shared by a plurality of sub-pixels P. Here, examples of materials constituting the electron transport layer 4 include organic compounds such as oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinodimethane derivatives, diphenoquinone derivatives, fluorenone derivatives, silole derivatives, and metal oxinoid compounds.

[0040] The electron injection layer 5 has a function of bringing the energy levels of the second electrode 34 and the organic EL layer 33 closer to each other and improving the efficiency of electron injection from the second electrode 34 to the organic EL layer 33, and this function makes it possible to reduce the driving voltage of the organic EL element 35. The electron injection layer 5 is also called a cathode buffer layer, and is provided as a common light-emitting functional layer shared by a plurality of sub-pixels P. Here, examples of materials constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF 2 ), calcium fluoride (CaF 2 ), strontium fluoride (SrF 2 ), barium fluoride (BaF 2 inorganic alkali compounds such as aluminum oxide (Al 2 O 3 ), strontium oxide (SrO), etc.

[0041] The second electrode 34 is provided on the plurality of organic EL layers 33 so as to be common to the plurality of subpixels P, i.e., so as to cover each organic EL layer 33 and the edge cover 32a, as shown in FIG. 3 . The second electrode 34 has a function of injecting electrons into the organic EL layer 33. The second electrode 34 is preferably made of a material with a small work function to improve the efficiency of electron injection into the organic EL layer 33. Examples of materials that can be used for the second electrode 34 include silver (Ag), aluminum (Al), vanadium (V), calcium (Ca), titanium (Ti), yttrium (Y), sodium (Na), manganese (Mn), indium (In), magnesium (Mg), lithium (Li), ytterbium (Yb), and lithium fluoride (LiF). The second electrode 34 may be made of, for example, magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), or astatine (At) / astatine oxide (AtO 2 The second electrode 34 may be formed of an alloy such as lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), or lithium fluoride (LiF) / calcium (Ca) / aluminum (Al). The second electrode 34 may be formed of a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The second electrode 34 may be formed by stacking multiple layers made of the above materials. Examples of materials with a low work function include magnesium (Mg), lithium (Li), lithium fluoride (LiF), magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), and lithium fluoride (LiF) / calcium (Ca) / aluminum (Al).

[0042] As shown in FIG. 3 , the sealing film 45 is provided to cover the second electrode 34. It includes a first inorganic sealing film 41, an organic sealing film 42, and a second inorganic sealing film 43 stacked in this order on the second electrode 34, and functions to protect the organic EL layer 33 of the organic EL element 35 from moisture and oxygen. The first inorganic sealing film 41 and the second inorganic sealing film 43 are made of inorganic insulating films such as silicon nitride, silicon oxide, and silicon oxynitride. The organic sealing film 42 is made of an organic resin material such as acrylic resin, epoxy resin, silicone resin, polyurea resin, parylene resin, polyimide resin, and polyamide resin. While the present embodiment illustrates a three-layer sealing film 45 in which the first inorganic sealing film 41, the organic sealing film 42, and the second inorganic sealing film 43 are stacked in this order, the sealing film 45 may have, for example, a single-layer structure including only the first inorganic sealing film 41, or a two-layer structure in which the first inorganic sealing film 41 and the organic sealing film 42 are stacked in this order. Furthermore, in the sealing film 45, as shown in Figures 3, 8 and 10, an organic sealing film 42 and a second inorganic sealing film 43 are provided on a first inorganic sealing film 41, and the second inorganic sealing film 43 is provided so as to cover the organic sealing film 42 on the first inorganic sealing film 41.

[0043] 6, 8, and 9, the organic EL display panel 50a has a first slit Sa, a second slit Sb, and a third slit Sc formed in a ring shape in the non-display region N so as to surround the through-hole H. Here, the first slit Sa, the second slit Sb, and the third slit Sc are formed on the TFT layer 30 side of the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 that constitute the TFT layer 30, as well as the second resin substrate layer 8, as shown in FIG. 8 and 9. The base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 are separated in the non-display region N by the first slit Sa, the second slit Sb, the third slit Sc, and an outer slit St (described later), forming a first inorganic insulating layer 11a, a second inorganic insulating layer 13a, a third inorganic insulating layer 15a, and a fourth inorganic insulating layer 17a, as shown in FIG. 8 , the TFT layer 30 side of the second resin substrate layer 8 is separated by first slits Sa, second slits Sb, third slits Sc, and an outer slit St (described later) to form a resin layer 8a in the non-display region N. The first inorganic insulating layer 11a, second inorganic insulating layer 13a, third inorganic insulating layer 15a, and fourth inorganic insulating layer 17a are provided to protrude in an eave-like manner from the resin layer 8a toward the display region D (left side in FIG. 8 ) and toward the through-hole H (right side in FIG. 8 ), and have an inverted tapered structure R. Due to the step created by this inverted tapered structure R, the organic EL layer 33 and the second electrode 34 are stacked in order on the top surface of the fourth inorganic insulating layer 17a and on the bottom surfaces of the first slits Sa, second slits Sb, third slits Sc, and outer slits St, separated from those in the display region D, as shown in FIG. 8 and FIG. 9 . In this embodiment, a configuration is exemplified in which the first inorganic insulating layer 11a, the second inorganic insulating layer 13a, the third inorganic insulating layer 15a, and the fourth inorganic insulating layer 17a protrude in an eave-like manner from the resin part 8a toward both the through-hole H side and the display area D side, but the first inorganic insulating layer 11a, the second inorganic insulating layer 13a, the third inorganic insulating layer 15a, and the fourth inorganic insulating layer 17a may also protrude in an eave-like manner from the resin part 8a toward either the through-hole H side or the display area D side.

[0044] 6, the first slit Sa is provided on the panel edge E side of the organic EL display panel 50a so as to be divided into a first slit inner peripheral portion Saa and a first slit outer peripheral portion Sab. Note that the panel edge E side of the first slit Sa, i.e., the first slit inner peripheral portion Saa and the first slit outer peripheral portion Sab, and the side opposite to the panel edge E side, are each provided in an arc shape, as shown in FIG.

[0045] 6, the second slit Sb is provided so as to be divided into a second slit inner peripheral portion Sba and a second slit outer peripheral portion Sbb on the panel edge E side of the organic EL display panel 50a. Note that the panel edge E side of the second slit Sb, i.e., the second slit inner peripheral portion Sba and the second slit outer peripheral portion Sbb, and the side opposite to the panel edge E side, are each provided in an arc shape, as shown in FIG.

[0046] 6, the third slit Sc is provided on the panel edge E side of the organic EL display panel 50a so as to be divided into a third slit inner peripheral portion Sca and a third slit outer peripheral portion Scb. Note that the panel edge E side of the third slit Sc, i.e., the third slit inner peripheral portion Sca and the third slit outer peripheral portion Scb, and the side opposite to the panel edge E side, are each provided in an arc shape, as shown in FIG.

[0047] In this embodiment, an organic EL display panel 50a is exemplified in which the first slits Sa, the second slits Sb, and the third slits Sc are arranged in a partially arc-shaped manner in the non-display area N. However, as shown in FIG. 7, the first slits Sa, the second slits Sb, and the third slits Sc may be arranged in a partially U-shaped manner in the non-display area N.

[0048] Specifically, in a modified organic EL display panel 50b shown in Fig. 7, a first slit Sa, a second slit Sb, and a third slit Sc are provided in a ring shape in the non-display region N so as to surround a through-hole H. Here, the first slit Sa is provided in a rectangular shape as shown in Fig. 7. Furthermore, the second slit Sb is provided on the panel edge E side of the organic EL display panel 50b so as to be divided into a second slit inner peripheral portion Sba and a second slit outer peripheral portion Sbb as shown in Fig. 7. Note that the panel edge E side of the second slit Sb, i.e., the second slit inner peripheral portion Sba and the second slit outer peripheral portion Sbb, and the side opposite to the panel edge E side are each provided in a U-shape as shown in Fig. 7.

[0049] 7, the third slit Sc is provided so as to be divided into a third slit inner peripheral portion Sca, a third slit middle portion Scb, and a third slit outer peripheral portion Scc on the panel edge E side of the organic EL display panel 50b. Note that the panel edge E side of the third slit Sc, i.e., the third slit inner peripheral portion Sca, the third slit middle portion Scb, and the third slit outer peripheral portion Scc, and the side opposite to the panel edge E side, are each provided in a U-shape, as shown in FIG.

[0050] In this embodiment, an organic EL display panel 50a is exemplified in which the first slit Sa, the second slit Sb, and the third slit Sc are each divided into two on the panel edge E side, but as in the above-mentioned modified example, at least one of the first slit Sa, the second slit Sb, and the third slit Sc may be divided into multiple parts on the panel edge E side.

[0051] 8 and 9, the above-mentioned sealing film 45 is formed in a state in which the second inorganic sealing film 43 is laminated on the first inorganic sealing film 41 in the region where the first slit Sa, the second slit Sb, and the third slit Sc are arranged in the non-display region N. Here, the laminated film of the first inorganic sealing film 41 and the second inorganic sealing film 43 is provided so as to cover the first slit Sa, the second slit Sb, and the third slit Sc, as shown in FIG.

[0052] 7, the organic EL display panel 50a has an outer slit St formed in a ring shape in the non-display region N so as to surround the first slit Sa, the second slit Sb, and the third slit Sc. As shown in FIG. 8, the outer slit St is provided on the TFT layer 30 side of the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 that constitute the TFT layer 30, and the second resin substrate layer 8. As shown in FIG. 8, the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 are separated by the outer slit St and protrude into the outer slit St like an eave. As shown in FIG. 8, the interior of the outer slit St is filled with an organic sealing film 42 via a first inorganic sealing film 41.

[0053] 8, the organic EL display panel 50a includes an inner dam wall Wc provided in a ring shape between the first slit Sa, the second slit Sb, and the third slit Sc and the outer slit St in the non-display region N. As shown in FIG. 8, the inner dam wall Wc includes a resin layer 32e formed in the same layer and made of the same material as the edge cover 32a. The inner dam wall Wc is provided to contact the inner peripheral edge of the organic sealing film 42 via the organic EL layer 33, the second electrode 34, and the first inorganic sealing film 41, thereby suppressing the spreading of ink that forms the organic sealing film 42. Furthermore, as shown in FIG. 8, the top of the inner dam wall Wc is provided in an uneven shape, which can improve adhesion to the first inorganic sealing film 41 provided via the ultra-thin organic EL layer 33 and the second electrode 34 formed by, for example, a vapor deposition method. In this embodiment, an example is given of an inner dam wall Wc formed in the same layer and made of the same material as the edge cover 32a, but the inner dam wall Wc may also be formed in the same layer and made of the same material as the first planarization film 19a or the second planarization film 21a, or may be formed by a laminated film of these.

[0054] 8 , in the organic EL display panel 50a, first detour wiring 16n and second detour wiring 18n that detour around the through-hole H are provided around the outer slits St in the non-display region N. Here, the first detour wiring 16n is formed from the second metal film. Also, the second detour wiring 18n is formed from the third metal film. The first detour wiring 16n and the second detour wiring 18n are electrically connected to display wiring (gate lines 14g, light-emitting control lines 14e, source lines 18f, etc.) that extends to portions corresponding to the through-hole H.

[0055] As shown in FIG. 1, the organic EL display panel 50a also includes a first outer dam wall Wa in the frame region F, which is arranged in a frame shape outside the trench G so as to surround the display region D, and a second outer dam wall Wb in a frame shape around the first outer dam wall Wa.

[0056] 10, the first outer damming wall Wa includes a lower resin layer 21b formed in the same layer and made of the same material as the second planarization film 21a, and an upper resin layer 32c provided on the lower resin layer 21b via a connection wiring 31b and formed in the same layer and made of the same material as the edge cover 32a. The connection wiring 31b is formed in the same layer and made of the same material as the first electrode 31a. The first outer damming wall Wa is provided to overlap the peripheral edge of the organic sealing film 42 and is configured to suppress the spread of ink that will become the organic sealing film 42.

[0057] As shown in Figure 10, the second outer damming wall Wb comprises a lower resin layer 21c formed in the same layer and made of the same material as the second planarization film 21a, and an upper resin layer 32d provided on the lower resin layer 21c via connection wiring 31b and formed in the same layer and made of the same material as the edge cover 32a.

[0058] 1, the organic EL display panel 50a also includes a first frame wiring 18h that is provided in a frame shape inside the trench G in the frame region F, and whose both ends of the opening of the trench G extend to the terminal portion T. Here, the first frame wiring 18h is electrically connected to the power supply line 20a in the display region D via a contact hole formed in the first planarization film 19a, and is configured so that a high power supply voltage (ELVDD) is input at the terminal portion T. The first frame wiring 18h is formed from the third metal film.

[0059] 1, the organic EL display panel 50a also includes second frame wiring 18i that is provided in a generally C-shape outside the trench G in the frame region F and has both ends extending to the terminal portion T. Here, as shown in Fig. 10, the second frame wiring 18i is electrically connected to the second electrode 34 in the display region D via the connection wiring 31b provided in the trench G, and is configured so that a low power supply voltage (ELVSS) is input at the terminal portion T. The second frame wiring 18i is formed of the third metal film.

[0060] 10, the organic EL display panel 50a also includes a plurality of peripheral photo spacers 32b provided in the frame region F in the shape of islands so as to protrude upward from both edges of the trench G. Here, the peripheral photo spacers 32b are formed in the same layer as the edge cover 32a and made of the same material.

[0061] The imaging element 60 is configured by, for example, a complementary metal oxide semiconductor (CMOS) camera, a charge coupled device (CCD) camera, etc. Note that, although the imaging element 60 is exemplified as an electronic component in this embodiment, the electronic component may be, for example, an optical sensor such as a fingerprint sensor or a face authentication sensor.

[0062] In the organic EL display device 70 described above, in each subpixel P, a gate signal is input to the first TFT 9 a via the gate line 14 g, turning the first TFT 9 a on, a predetermined voltage corresponding to the source signal is written to the gate electrode of the second TFT 9 b and the capacitor 9 d via the source line 18 f, and when a light-emission control signal is input to the third TFT 9 c via the light-emission control line 14 e, the third TFT 9 c is turned on, and a current corresponding to the gate voltage of the second TFT 9 b is supplied from the power supply line 20 a to the organic EL layer 33, causing the organic light-emitting layer 3 of the organic EL layer 33 to emit light, thereby displaying an image. Note that in the organic EL display device 70, even if the first TFT 9 a is turned off, the gate voltage of the second TFT 9 b is held by the capacitor 9 d, so that light emission by the organic light-emitting layer 3 is maintained in each subpixel P until a gate signal for the next frame is input. The organic EL display device 70 is configured to capture an image of the front side of the organic EL display panel 50a using the imaging element 60 installed on the rear side of the organic EL display panel 50a.

[0063] Next, a method for manufacturing the organic EL display device 70 of this embodiment will be described. The method for manufacturing the organic EL display device 70 of this embodiment includes a TFT layer forming step, an organic EL element layer forming step, a sealing film forming step, and a through-hole forming step.

[0064] <TFT Layer Forming Process> First, for example, a non-photosensitive polyimide resin (about 6 μm thick) is applied onto a glass substrate, and then the applied film is pre-baked and post-baked to form a first resin substrate layer 6.

[0065] Next, an inorganic insulating film (approximately 500 nm thick) such as a silicon oxide film is formed on the substrate surface on which the first resin substrate layer 6 is formed, for example, by plasma CVD (chemical vapor deposition), thereby forming an intra-substrate inorganic insulating film 7.

[0066] Furthermore, for example, a non-photosensitive polyimide resin (thickness: about 6 μm) is applied to the substrate surface on which the intra-substrate inorganic insulating film 7 is formed, and then the applied film is pre-baked and post-baked to form a second resin substrate layer 8, thereby forming a resin substrate layer 10.

[0067] Then, a silicon oxide film (approximately 500 nm thick) and a silicon nitride film (approximately 100 nm thick) are sequentially formed on the substrate surface on which the resin substrate layer 10 is formed, for example, by plasma CVD, thereby forming a base coat film 11.

[0068] Next, an amorphous silicon film (about 50 nm thick) is formed by plasma CVD on the substrate surface on which the base coat film 11 has been formed, and the amorphous silicon film is crystallized by laser annealing or the like to form a semiconductor film of polysilicon film, and then the semiconductor film is patterned to form semiconductor layers 12 a and 12 b, etc.

[0069] Thereafter, an inorganic insulating film (about 100 nm) such as a silicon oxide film is formed on the substrate surface on which the semiconductor layer 12a and the like are formed, for example, by plasma CVD, to form a gate insulating film 13 so as to cover the semiconductor layer 12a and the like.

[0070] Furthermore, a first metal film such as a molybdenum film (about 250 nm thick) is formed on the surface of the substrate on which the gate insulating film 13 is formed, for example, by sputtering, and then the first metal film is patterned to form the gate line 14g, the light-emitting control line 14e, the gate electrodes 14a and 14b, etc.

[0071] Subsequently, impurity ions are doped into the semiconductor layers 12a, 12b, etc. using the gate electrodes 14a, 14b, etc. as a mask, thereby forming channel regions, source regions, and drain regions in the semiconductor layers 12a, 12b, etc.

[0072] Thereafter, a silicon nitride film (about 100 nm thick) is formed by, for example, plasma CVD on the substrate surface where the semiconductor layers 12a and 12b etc. are doped with impurity ions, thereby forming the first interlayer insulating film 15.

[0073] Next, a second metal film such as a molybdenum film (approximately 250 nm thick) is formed on the substrate surface on which the first interlayer insulating film 15 is formed, for example, by sputtering, and then the second metal film is patterned to form an upper conductive layer 16c, etc.

[0074] Furthermore, a silicon oxide film (approximately 300 nm thick) and a silicon nitride film (approximately 200 nm thick) are sequentially formed on the substrate surface on which the upper conductive layer 16c and the like are formed, for example, by plasma CVD, thereby forming a second interlayer insulating film 17.

[0075] Thereafter, the gate insulating film 13, the first interlayer insulating film 15 and the second interlayer insulating film 17 are patterned to form contact holes.

[0076] Furthermore, at the bending portion B, the laminated film of the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 is removed, and a strip-shaped slit is formed in the laminated film of the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17.

[0077] Next, on the surface of the substrate on which the above-mentioned strip-shaped slits are formed, a titanium film (thickness: about 50 nm), an aluminum film (thickness: about 600 nm), and a titanium film (thickness: about 50 nm) are sequentially formed by, for example, a sputtering method to form a third metal film, and then the third metal film is patterned to form source lines 18f, etc.

[0078] Furthermore, a photosensitive polyimide resin (about 2.5 μm thick) is applied to the substrate surface on which the source lines 18 f and the like are formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed, and post-baked to form a first planarization film 19 a and the like.

[0079] Thereafter, on the substrate surface on which the first planarization film 19a etc. has been formed, a titanium film (thickness: about 50 nm), an aluminum film (thickness: about 600 nm), and a titanium film (thickness: about 50 nm) etc. are sequentially formed by, for example, a sputtering method to form a fourth metal film, and then the fourth metal film is patterned to form the power supply line 20a etc.

[0080] Finally, a polyimide-based photosensitive resin film (approximately 2.5 μm thick) is applied to the substrate surface on which the power supply lines 20 a etc. are formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed, and post-baked to form a second planarization film 21 a etc.

[0081] In this manner, the TFT layer 30 can be formed.

[0082] <Organic EL Element Layer Forming Process> Using a well-known method, a first electrode 31a, an edge cover 32a, an organic EL layer 33 (hole injection layer 1, hole transport layer 2, organic light-emitting layer 3, electron transport layer 4, electron injection layer 5), and a second electrode 34 are formed on the second planarization film 21a of the TFT layer 30 formed in the TFT layer forming process, thereby forming an organic EL element layer 40. Here, after forming the first electrode 31a, the stacked film of the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 is partially removed in the non-display region N, and then the second resin substrate layer 8 exposed from the stacked film of the base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 is ashed, thereby forming the first slit Sa, the second slit Sb, the third slit Sc, and the outer slit St. Then, when the organic EL layer 33 and the second electrode 34 are formed thereafter by, for example, a vapor deposition method, the organic EL layer 33 and the second electrode 34 are formed in the non-display region N so as to be separated from those in the display region D by the first slit Sa, the second slit Sb, the third slit Sc, and the outer slit St. Note that, although the present embodiment exemplifies a manufacturing method in which the first slit Sa, the second slit Sb, the third slit Sc, and the outer slit St are formed in the organic EL element layer forming step, the first slit Sa, the second slit Sb, the third slit Sc, and the outer slit St may also be formed in the TFT layer forming step.

[0083] <Sealing film forming process> First, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed by plasma CVD using a mask on the surface of the substrate on which the organic EL element layer 40 formed in the organic EL element layer forming process is formed, thereby forming a first inorganic sealing film 41.

[0084] Subsequently, an organic resin material such as an acrylic resin is deposited by, for example, an inkjet method on the surface of the substrate on which the first inorganic sealing film 41 has been formed, to form an organic sealing film 42 .

[0085] Then, using a mask, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is deposited by plasma CVD on the substrate surface on which the organic sealing film 42 has been formed, thereby forming a second inorganic sealing film 43, thereby forming a sealing film 45.

[0086] Furthermore, after a front-side protective sheet (not shown) is attached to the surface of the substrate on which the sealing film 45 is formed, laser light is irradiated from the glass substrate side of the resin substrate layer 10 to peel the glass substrate from the underside of the resin substrate layer 10, and further, a back-side protective sheet (not shown) is attached to the underside of the resin substrate layer 10 from which the glass substrate has been peeled.

[0087] In this manner, the organic EL display panel 50a can be formed.

[0088] <Through-hole forming process> In the non-display region N of the organic EL display panel 50a formed in the sealing film forming process, for example, a laser beam is irradiated while being scanned in a circular pattern to form a through-hole H. Thereafter, when the organic EL display panel 50a having the through-hole H formed therein is fixed, for example, inside a housing, an imaging element 60 such as a camera is installed so that the imaging element 60 is located on the back side of the through-hole H.

[0089] In this manner, the organic EL display device 70 of this embodiment can be manufactured.

[0090] As described above, according to the organic EL display device 70 of this embodiment, the non-display region N is provided in an island shape within the display region D along the panel edge E of the organic EL display panel 50a, and the non-display region N is provided with a through-hole H that penetrates the organic EL display panel 50a in the thickness direction, and the first slit Sa, the second slit Sb, and the third slit Sc are provided in an annular shape surrounding the through-hole H. Here, the first slit Sa, the second slit Sb, and the third slit Sc are each provided so as to split into two at the panel edge E side, which slows down the penetration of moisture into the organic EL layer 33 on the panel edge E side of the through-hole H, thereby suppressing deterioration of the organic EL layer 33 on the panel edge E side of the through-hole H and improving the reliability of the organic EL display device 70.

[0091] Furthermore, in the organic EL display device 70 of this embodiment, the tops of the blocking walls Wc provided between the first slit Sa, the second slit Sb, and the third slit Sc and the outer slit St are uneven, which improves adhesion between the blocking walls Wc and the first inorganic sealing film 41. This makes it possible to suppress film rupture of the first inorganic sealing film 41, thereby further suppressing the intrusion of moisture into the organic EL layer 33 and further improving the reliability of the organic EL display device 70.

[0092] Other Embodiments In the above embodiment, the organic EL layer has been exemplified as having a five-layer laminate structure of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. However, the organic EL layer may have a three-layer laminate structure of, for example, a hole injection layer / hole transport layer, a light-emitting layer, and an electron transport layer / electron injection layer.

[0093] Furthermore, in the above embodiment, an organic EL display device in which the first electrode is an anode and the second electrode is a cathode is exemplified. However, the present invention can also be applied to an organic EL display device in which the layered structure of the organic EL layer is reversed, and the first electrode is a cathode and the second electrode is an anode.

[0094] Furthermore, in the above embodiment, an organic EL display device is exemplified in which the electrode of the TFT connected to the first electrode is used as the drain electrode, but the present invention can also be applied to an organic EL display device in which the electrode of the TFT connected to the first electrode is called the source electrode.

[0095] Furthermore, in the above embodiment, an organic EL display device has been described as an example of a display device, but the present invention can be applied to a display device having a plurality of light-emitting elements driven by current, and for example, can be applied to a display device having a QLED, which is a light-emitting element that uses a quantum dot-containing layer.

[0096] As described above, the present invention is useful for flexible display devices.

[0097] D display area H through hole N non-display area P sub-pixel Wc inner dam wall Sa first slit Saa first slit inner periphery Sab first slit outer periphery Sb second slit Sba second slit inner periphery Sbb second slit outer periphery Sc third slit Sca third slit inner periphery, third slit inner periphery Scb third slit outer periphery, third slit middle periphery Scc third slit outer periphery St outer slit 6 first resin substrate layer 7 intra-substrate inorganic insulating film 8 second resin substrate layer 8a resin layer 10 resin substrate layer 11 base coat film (inorganic insulating film) 11a first inorganic insulating layer 13 gate insulating film (inorganic insulating film) 13a second inorganic insulating layer 15 first interlayer insulating film (inorganic insulating film) 15a third inorganic insulating layer 17 second interlayer insulating film (inorganic insulating film) 17a Fourth inorganic insulating layer 30 TFT layer (thin film transistor layer) 31a First electrode 33 Organic EL layer (organic electroluminescence layer, light-emitting functional layer) 34 Second electrode 40 Organic EL element layer (light-emitting element layer) 41 First inorganic sealing film 42 Organic sealing film 43 Second inorganic sealing film 50a, 50b Organic EL display panel 60 Imaging element (electronic component) 70 Organic EL display device

Claims

1. a resin substrate layer; a thin film transistor layer including an inorganic insulating film provided on the resin substrate layer; a light emitting element layer provided on the thin film transistor layer, the light emitting element layer including a plurality of first electrodes, a light emitting functional layer, and a second electrode stacked in this order corresponding to a plurality of sub-pixels constituting a display area; a display panel including a first inorganic sealing film provided on the light-emitting element layer, a non-display area is provided in an island shape within the display area along a panel edge of the display panel, a through-hole penetrating the display panel in a thickness direction is provided in the non-display area; In the non-display region, a plurality of slits are provided in an annular shape in the thin film transistor layer side of the resin substrate layer and in the inorganic insulating film so as to surround the through hole; an inorganic insulating layer formed by separating the inorganic insulating film by the plurality of slits is provided so as to protrude toward at least one of the display area side and the through-hole side beyond a resin layer formed by separating the thin film transistor layer side of the resin substrate layer by the plurality of slits, a display device in which the first inorganic sealing film is provided so as to cover the plurality of slits, The display device according to claim 1, wherein at least one of the plurality of slits is provided so as to be divided into a plurality of slits on an edge side of the panel.

2. 2. The display device according to claim 1, The display device is characterized in that the light-emitting functional layer and the second electrode are laminated on the inorganic insulating layer.

3. 2. The display device according to claim 1, The display device is characterized in that the plurality of slits are provided in an arc shape on the panel edge side and on the opposite side to the panel edge side.

4. 2. The display device according to claim 1, The display device is characterized in that the plurality of slits are provided in a U-shape on the panel edge side and on the opposite side to the panel edge side.

5. The display device according to any one of claims 1 to 4, an organic sealing film is provided on the first inorganic sealing film; an outer slit is provided on a surface of the resin substrate layer facing the thin film transistor layer in the non-display area so as to surround the plurality of slits; the inorganic insulating film is separated by the outer slit and is provided so as to protrude inward of the outer slit, The display device is characterized in that the inside of the outer slit is filled with the organic sealing film via the first inorganic sealing film.

6. 6. The display device according to claim 5, The display device further comprises a blocking wall provided between the plurality of slits and the outer slit so as to contact a peripheral edge of the organic sealing film via the first inorganic sealing film.

7. 6. The display device according to claim 5, a second inorganic sealing film is provided on the first inorganic sealing film so as to cover the organic sealing film; The display device is characterized in that a laminated film of the first inorganic sealing film and the second inorganic sealing film is provided so as to cover the plurality of slits.

8. 7. The display device according to claim 6, The display device is characterized in that the top of the blocking wall is provided in an uneven shape.

9. The display device according to any one of claims 1 to 4, the resin substrate layer includes a first resin substrate layer provided on the opposite side to the thin film transistor layer, a second resin substrate layer provided on the thin film transistor layer side, and an intra-substrate inorganic insulating film provided between the first resin substrate layer and the second resin substrate layer; The display device is characterized in that the plurality of slits are provided on the surface of the second resin substrate layer on the side of the thin film transistor layer.

10. The display device according to any one of claims 1 to 4, The display device is characterized in that an electronic component is installed in the through hole.

11. 11. The display device according to claim 10, The display device is characterized in that the electronic component is an imaging element.

12. The display device according to any one of claims 1 to 4, The display device is characterized in that the light-emitting functional layer is an organic electroluminescence layer.