Filter Circuit

JPWO2024202046A5Active Publication Date: 2025-03-06MITSUBISHI ELECTRIC CORP
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
JP2024566893
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-03-31
Publication Date
2025-03-06
Estimated Expiration
2043-03-31

AI Technical Summary

Technical Problem

Existing methods for reducing quantization noise in digital sigma DACs face inefficiencies, as they may discard the overall optimal output sequence candidate with the smallest quantization noise, leading to increased calculation loads.

Method used

A filter circuit employing a tree-structured depth-first search within a set threshold to minimize total quantization noise by selecting output signal sequences based on the sum of quantization noise, aborting searches when the threshold is exceeded, and updating the threshold with each candidate's quantization noise sum.

Benefits of technology

This approach effectively reduces calculation load while ensuring the selection of an output signal sequence that minimizes total quantization noise, thereby stabilizing the filter circuit.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000008_0000
    Figure 00000008_0000
  • Figure 00000008_0001
    Figure 00000008_0001
  • Figure 00000008_0002
    Figure 00000008_0002
Patent Text Reader

Abstract

The total quantization noise C that occurs when quantizing the filter output for the input signal i (j) A filter circuit that searches for a candidate for a quantized output signal sequence based on the sum of quantization noise C i (j) Within the range of a threshold C set for , candidates for the output signal sequence are searched for by depth-first search of a tree structure.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present disclosure relates to a filter circuit. [Background technology]

[0002] The noise that occurs when a signal is quantized is called quantization noise. For example, in a digital sigma DAC (Digital Analog Converter), the filter output is quantized by a quantizer and output, so the quantizer generates quantization noise. In a digital sigma DAC, the output is fed back and used to calculate the next signal. For this reason, if the filter output becomes larger than the output limit of the quantizer due to quantization noise, the value of the buffer in the filter circuit may diverge and become unstable.

[0003] For this reason, Patent Document 1 discloses a method for improving stability by calculating the quantization noise for multiple output sequence candidates and selecting the output sequence candidate with the smallest quantization noise. In this case, it is desirable to calculate the quantization noise for all output sequence candidates and select the output sequence candidate with the smallest quantization noise, but this results in a large amount of calculation. For this reason, Patent Document 1 also discloses a method for reducing the amount of calculation by narrowing down the signal sequences to be searched by the Viterbi algorithm. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2003-124812 A Summary of the Invention [Problem to be solved by the invention]

[0005] However, the method described in Patent Document 1 has a problem in that the globally optimal output sequence candidate with the smallest quantization noise may be discarded. Specifically, the method disclosed in Patent Document 1 calculates the quantization noise every time a signal is input, and leaves a certain number of output sequence candidates with the smallest total quantization noise without calculating the quantization noise for all samples included in the sequence. However, the output sequence candidate with the smallest quantization noise during the search is not necessarily the sequence with the smallest quantization noise among all sequences.

[0006] The present disclosure has been made in consideration of the above, and aims to provide a filter circuit capable of searching for a candidate output signal sequence that minimizes the total amount of quantization noise generated when quantizing the filter output, while reducing the amount of calculation. [Means for solving the problem]

[0007] In order to solve the above-mentioned problems and achieve the object, the filter circuit according to the present disclosure is a filter circuit that searches for a candidate output signal sequence after quantization based on a sum of quantization noise generated when quantizing a filter output for an input signal, and searches for a candidate output signal sequence by a depth-first search of a tree structure within a range of a threshold value set for the sum of quantization noise. Each of a plurality of candidates for an output signal for each input signal included in the input signal sequence is treated as a branch of a tree structure, and the sum of quantization noise when a branch on the path is selected is treated as a node. If the sum of quantization noise when a candidate for an output signal corresponding to a branch branching from a node is selected exceeds a threshold, the search for that branch is terminated. It is characterized by: Effect of the Invention

[0008] The filter circuit according to the present disclosure has an advantage in that it is possible to search for a candidate output signal sequence that minimizes the total amount of quantization noise generated when quantizing the filter output, while reducing the amount of calculation. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram conceptually illustrating a process of searching for candidates for an output signal sequence of the filter circuit according to the first embodiment. [Diagram 2] FIG. 1 is a diagram showing an overall configuration of a filter circuit according to a first embodiment; [Diagram 3]A flowchart for explaining the internal processing of the path selector shown in FIG. [Figure 4] FIG. 4 is an explanatory diagram of the processing content of step S108 in FIG. 3; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, a filter circuit according to an embodiment of the present disclosure will be described in detail with reference to the drawings.

[0011] Embodiment 1 1 is a diagram conceptually illustrating a process of searching for candidates for an output signal sequence of a filter circuit according to the first embodiment. Although not illustrated here, the digital sigma DAC according to the first embodiment is referred to as a filter circuit 10. In FIG. 1, in order to suppress the quantization noise of the digital sigma DAC, a candidate with the minimum quantization noise is searched for among all the candidates for the output signal sequence using a tree-structured depth-first search. The tree structure illustrated in FIG. 1 is conceptual, and a tree-structured circuit is not implemented in the actual filter circuit 10, but the actual filter circuit 10 implements an algorithm for performing the search described here.

[0012] The filter circuit 10 calculates the filter output of the digital sigma DAC each time an input signal included in the input signal sequence is input. In a conventional digital sigma DAC, the filter output is passed through a quantizer and quantized, and the quantized output is the output of the digital sigma DAC. In this case, the error between the filter output and the candidate output signal for each of all output patterns of the quantizer is calculated as the quantization noise. The sum of the quantization noises calculated for each of the multiple input signals included in the input signal sequence is called the sum of the quantization noises.

[0013] The tree structure shown in Figure 1 is composed of "nodes" represented by circles, and "branches" that connect the nodes. Each branch corresponds to one of multiple output signal candidates, and the sum of quantization noise when the output signal candidate for each branch is selected is calculated for each node. Here, it is assumed that a 1-bit quantizer is used, and output signal "+1" is assigned to the left branch, and output signal "-1" to the right branch. If the number of each layer when the root node is the "0" layer is i, and the number of the node in each layer is j, then the sum of the quantization noise at each node, C i (j) is expressed by the following formula (1) when j is an odd number, and by the following formula (2) when j is an even number. Note that, since the number of samples included in the input signal sequence is 3, i is an integer between 0 and 3. Also, j is an integer between 1 and 2. i The sum of the quantization noise, C, is an integer. i (j) is the sum of quantization noise when output signal candidates corresponding to each branch on the path from the root node to the jth target node in the i-th layer are selected.

[0014]

number

[0015] The filter circuit 10 searches for candidates for the output signal sequence after quantization based on the sum of quantization noise generated when quantizing the filter output for the input signal. At this time, the filter circuit 10 searches for candidates for the output signal sequence after quantization based on the sum of quantization noise C i (j) Within the range of a threshold C set for , candidates for the output signal sequence are searched for by depth-first search of a tree structure.

[0016] Specifically, the filter circuit 10 first selects a root node C0 (1) Start the search from C1 for the first input signal c(0). (1) and C1 (2) Calculate the sum of quantization noise and select the branch with the smaller sum of quantization noise. For example, if the first input signal c(0) is "0.5", the sum of quantization noise C1 (1)Using formula (1), C1 (1) =C0 (1) +|0.5-(+1)| 2 = 0.25. Also, the total quantization noise C1 (2) Using formula (2), C1 (2) =C0 (1) +|0.5-(-1)| 2 = 2.25. In this case, the left branch is selected as the path. When the path is determined, the filter circuit 10 calculates the total sum of quantization noise C1 (1) is compared with the threshold C. Here, the total quantization noise C1 (1) is less than or equal to threshold C, and proceed to node i=1,j=1.

[0017] The filter circuit 10 then calculates the sum C2 of quantization noise when the output signal is “+1” for the next input signal c(1). (1) and the sum of quantization noise when the output signal is "-1" C2 (2) Then, select the branch with the smaller sum of quantization noise. Here, the sum of quantization noise when the output signal is "-1" is C2 (2) The sum of quantization noise when the output signal is "+1" is C2 (1) is smaller than the total quantization noise C2 (2) If is less than or equal to the threshold C, then we can proceed to node i=2,j=2.

[0018] The filter circuit 10 calculates the sum of quantization noise C3 when the output signal is “+1” for the next input signal c(2). (3) and the sum of quantization noise when the output signal is "-1" C3 (4) Then, select the branch with the smaller sum of quantization noise. Here, the sum of quantization noise when the output signal is "-1" is C3 (4) The sum of quantization noise when the output signal is "+1" is C3 (3) is smaller than the total quantization noise C3 (4) If is less than or equal to the threshold C, then we can proceed to node i=3,j=4.

[0019] Here, for simplicity, the number of samples in the input signal sequence is "3", so we reach the third layer and the total quantization noise C i (j) If does not exceed the threshold C, C3 (4) The output signal corresponding to the branch selected before reaching the node corresponding to is saved as a candidate for the output signal sequence. In this case, the candidate for the output signal sequence {+1, -1, -1} has been found. Note that the total quantization noise C i (j) When a candidate for an output signal sequence is found for which the sum of quantization noises of the found candidate is equal to or smaller than the threshold C, the filter circuit 10 i (j) Update the threshold C with the value of

[0020] Total quantization noise C i (j) When a candidate for an output signal sequence is found for which the sum of the quantization noises of the nodes of the route, C, is updated, the search continues within the range of the updated threshold C. i (j) If exceeds the threshold C, the search for the branch connected to that node is terminated. Also, if there is no branch that can proceed to the next layer during the search, the search returns to the layer above and continues searching for branches that have not yet been searched.

[0021] Here, the total quantization noise C3 (3) is compared with the updated threshold C, and the total quantization noise C3 (3) exceeds the updated threshold C, so the filter circuit 10 does not proceed to the node i=3, j=3. In this case, the filter circuit 10 returns to the next layer i=1 because there is no branch to proceed to, and the sum of the quantization noise C2 (1) is compared with the updated threshold C. Here, the total quantization noise C2 (1) If exceeds the updated threshold C, the search for the branch connected to i=2,j=1 is discontinued. Note that from the node i=2,j=1, a branch connected to the node i=3,j=1 and a branch connected to the node i=3,j=2 extend, but the total quantization noise C2 (1) If exceeds the threshold C, the total quantization noise C3 (1)and the total quantization noise C3 (2) is the total quantization noise C2 (1) This is obtained by adding the quantization noise of each branch to the above, and naturally exceeds the threshold C, so even if the search is terminated, it will not affect the final search result.

[0022] The search continues in the same way, and each time a candidate output signal sequence is found, the sum of the quantization noise of the found output signal sequence candidate C i (j) By updating the threshold C with the value of i (j) Here, we can search for a small quantization noise C i (j) If exceeds a threshold C, the search for that branch is terminated, making it possible to reduce the amount of calculation.

[0023] In the example of Figure 1, C3 (4) The sum of quantization noise C3 (6) The candidate output signal sequence with the smallest value {-1, +1, -1} is found, and C3 (6) After the threshold C is updated with the value of C3 (6) The sum of quantization noise C3 (7) The candidate output signal sequence with the smallest value {-1,-1,+1} is found, and C3 (7) The threshold C is updated with the value of C3. (7) The sum of quantization noise C3 (8) In this case, the last found output signal sequence candidate {-1,-1,-1} is the output signal sequence candidate with the smallest sum of quantization noise, and is therefore output as the search result.

[0024] As described above, the filter circuit 10 according to the first embodiment calculates the quantization noise for each input signal, compares it with the threshold C, and searches for candidates for the output signal sequence within the range of the threshold C. The filter of the digital sigma DAC stores not only the current input but also past inputs and outputs in an internal buffer, and calculates the filter output based on the stored values. Therefore, the total sum of the quantization noise C i (j) To search for a candidate output signal sequence with a smaller quantization noise, it is necessary to search among all the candidates for the output signal sequence. Even if the left branch of the output signal "+1" extending from the root node in Figure 1 has smaller quantization noise than the right branch of the output signal "-1", it does not necessarily mean that a globally optimal node exists among the nodes connected to the left branch. In the above method, it is possible to find a candidate that does not need to be searched among all the candidates for the output signal sequence, that is, a candidate with a smaller quantization noise than the right branch of the output signal "-1". i (j) For candidates whose quantization noise exceeds the threshold C, the search is stopped and the calculation is omitted. i (j) It is possible to search for an output signal sequence that minimizes

[0025] 2 is a diagram showing an overall configuration of a filter circuit 10 according to the first embodiment. The filter circuit 10 includes an input sequence memory 11, an FIR (Finite Impulse Response) filter 12, an FIR memory 13, an IIR (Infinite Impulse Response) filter 14, an IIR memory 15, a metric calculation unit 16, a metric memory 17, a path selector 18, an output sequence memory 19, and difference calculation units 20-1 and 20-2.

[0026] The input sequence memory 11 stores an input signal. The FIR filter 12 and the IIR filter 14 are circuits that perform convolution processing to output an inner product of the past few samples of input signals and a predetermined coefficient value. The FIR filter 12 has a finite impulse response, and the output is calculated only by the convolution sum of the input. The difference between the input signal stored in the input sequence memory 11 and the output signal stored in the output sequence memory 19 is input to the FIR filter 12 via the difference calculation unit 20-1. The IIR filter 14 has an infinite impulse response, and the output is calculated using not only the convolution sum of the input but also the convolution sum of the past output. The difference between the output of the FIR filter 12 and the output of the IIR filter 14 is input to the IIR filter 14. The FIR memory 13 is a memory that stores the value of the buffer in the FIR filter 12. The IIR memory 15 is a memory that stores the value of the buffer in the IIR filter 14.

[0027] The metric calculation unit 16 calculates the sum of the quantization noise. Here, the sum of the quantization noise is expressed as an array v[N count The difference between the output of the FIR filter 12 and the output of the IIR filter 14 is input to the metric calculation unit 16 via the difference calculation unit 20-2. The metric calculation unit 16 calculates the input difference by multiplying it by the array v[N count ] and calculate the result v[N count +1].

[0028] The path selector 18 selects an array v[N count +1] and threshold C, and the counter N count A search path is selected based on the values ​​of A, B, C, and D. The output sequence memory 19 stores candidates for the output signal sequence.

[0029] Here, the overall operation of the filter circuit 10 will be described. If there is an input signal, the filter circuit 10 stores it in the input sequence memory 11. The filter circuit 10 stores the input signal in the counter N count The counter N of the output sequence memory 19count The difference between the 1st output signal and the 2nd output signal is input to the FIR filter 12. The input value is written to a buffer in the FIR filter 12. At this time, the filter circuit 10 stores in the FIR memory 13 the value that was originally written to the buffer.

[0030] The filter circuit 10 calculates the output of the FIR filter 12 and the output of the IIR filter 14, and the calculation result obtained by subtracting the output of the IIR filter 14 from the output of the FIR filter 12 is input to the metric calculation unit 16. The calculation result is stored in a buffer in the IIR filter 14. At this time, the filter circuit 10 stores the value originally written in the buffer in the IIR memory 15. The metric calculation unit 16 also calculates the calculation result in the array v[N count ] is added to v[N count +1].

[0031] The path selector 18 selects an array v[N count +1] and the array v[N count +1] is less than or equal to threshold C, counter N count Increment the counter N by 1. count If the value of is smaller than the total number of input samples N, the same process is repeated from the process of storing the next input signal in the input sequence memory 11 to the path selector 18.

[0032] Counter N count When the value of reaches the total number of input samples N, the value of the output sequence memory 19 is output and the process ends. count ], and the same process is repeated from the process of storing the next input signal in the input sequence memory 11 to the path selector 18.

[0033] The sum of the quantization noise is stored in the array v[N count +1] exceeds the threshold C, the filter circuit 10 refers to the output sequence memory 19 and increments the counter N count The th value y[N count]∈{s0,s1,...,s M-1}, if there are other candidates, y[N count ] is updated, and the same process is repeated from the process of storing the input signal in the input sequence memory 11 to the process of the path selector 18. Here, s i is a candidate for the output signal. If there are no other candidates for the output signal, the counter N count The internal variables of the FIR filter 12 and the IIR filter 14 are decremented by 1 and the counters N count th value, and the same process from the process of storing the input signal in the input sequence memory 11 to the path selector 18 is repeated.

[0034] 3 is a flowchart for explaining the internal processing of the path selector 18 shown in FIG. 2. The path selector 18 selects an array v[N count +1], compare it with threshold C, and use array v[N count It is determined whether or not the array v[N count If [+1] is less than the threshold C (step S100: Yes), the path selector 18 increments the counter N count =N count Then, the path selector 18 increments the counter value N count It is determined whether the value of the counter N is less than the total number of input samples N (step S102). count If the value of counter N is less than the total number of input samples N (step S102: Yes), the process shown in FIG. 3 is terminated. count If the value of is not less than the total number of input samples N (step S102: No), the path selector 18 selects i=0 to N count For -1, the output signal y[i] is s M-1 It is determined whether the output signal y[i] is s (step S103). M-1 If not (step S103: No), the threshold C=v[N count ], the value of the threshold C is updated (step S104), and the process shown in FIG. 3 ends.

[0035] The output signal y[i] is M-1 If so (step S103: Yes), all output signal sequences stored in the output sequence memory 19 are output (step S109), all internal variables are reset (step S110), and the process shown in FIG. 3 is terminated.

[0036] Array v[N count If the threshold value C is not less than the threshold value C (step S100: No), the path selector 18 selects the output signal y[N count ] is s M-1 It is determined whether the output signal y[N count ] is s M-1 If not (step S105: No), the path selector 18 selects the output signal y[N count ] to s i+1 (step S106), and the process shown in FIG. 3 ends.

[0037] Output signal y[N count ] is s M-1 If so (step S105: Yes), the path selector 18 increments the counter N count =N count The value is decremented by 1 to -1 (step S107), the internal variables of the FIR filter 12 and the IIR filter 14 are obtained from the FIR memory 13 and the IIR memory 15 (step S108), the buffer values ​​of the FIR filter 12 and the IIR filter 14 are updated, and the process shown in FIG. 3 is terminated.

[0038] Fig. 4 is an explanatory diagram of the processing content of step S108 in Fig. 3. The FIR memory 13 stores the values ​​that existed before the buffer of the FIR filter 12 was overwritten. Also, the IIR memory 15 stores the values ​​that existed before the buffer of the IIR filter 14 was overwritten. In step S108 in Fig. 3, in order to return the buffers of the FIR filter 12 and the IIR filter 14 to their previous states, the path selector 18 retrieves the values ​​stored in the FIR memory 13 and writes them into the buffer of the FIR filter 12, and retrieves the values ​​stored in the IIR memory 15 and writes them into the buffer of the IIR filter 14.

[0039] As described above, the filter circuit 10 according to the first embodiment reduces the sum C of quantization noise that occurs when quantizing the filter output for the input signal. i (j) A filter circuit that searches for a candidate for a quantized output signal sequence based on the sum of quantization noise C i (j) Within the range of the threshold C set for , a candidate output signal sequence is searched for by depth-first search of a tree structure. i (j) It is possible to perform a search for all candidates of the output signal sequence for which the sum of the quantization noise generated when the filter output is quantized is minimized while reducing the amount of calculations, since calculations are omitted for candidates outside the range of the threshold C.

[0040] Specifically, the filter circuit 10 sets each of a plurality of candidates for the output signal for each input signal included in the input signal sequence as a branch of a tree structure, and calculates the sum of quantization noise C i (j) Let be a node, and the total quantization noise C i (j) If exceeds the threshold, the search for that branch is terminated. This causes the total quantization noise C i (j)For candidates of output signal sequences for which exceeds the threshold C, the search is terminated and calculations are omitted, so that it is possible to reliably reduce the amount of calculations.

[0041] The filter circuit 10 updates the threshold C every time a candidate for the output signal sequence is found within the range of the set threshold C, and continues searching for a candidate for the output signal sequence within the range of the updated threshold. At this time, the filter circuit 10 updates the threshold with the value of the sum of quantization noise for the found candidate for the output signal sequence every time a candidate for the output signal sequence is found within the range of the set threshold. As a result, during the search, the minimum sum of quantization noise C among the candidates for the output signal sequence found at that time is updated. i (j) Since the value of is set as the threshold C, it is possible to reliably reduce the amount of calculations, and the value set as the threshold C at the time when the search is completed becomes the minimum value of the sum of quantization noise, and the candidate for the output signal sequence corresponding to this value becomes the candidate for the output signal sequence with the minimum sum of quantization noise.

[0042] The filter circuit 10 also stores in memory the candidates for the output signal sequence found during the search. The filter circuit 10 also stores in memory the filter output calculated during the search and the sum of the quantization noise calculated during the search.

[0043] Each function of the filter circuit 10 is realized by a processing circuit. These processing circuits may be realized by dedicated hardware or may be a control circuit using a CPU (Central Processing Unit). The dedicated hardware may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination of these. The control circuit using a CPU includes, for example, a CPU and a memory. The memory may be, for example, a non-volatile or volatile semiconductor memory such as a RAM (Random Access Memory), a ROM (Read Only Memory), a flash memory, an EPROM (Erasable Programmable ROM), or an EEPROM (Electrically EPROM), a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, or a DVD (Digital Versatile Disk).

[0044] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies. Parts of the configurations may be omitted or modified without departing from the spirit of the invention. [Explanation of symbols]

[0045] 10 filter circuit, 11 input sequence memory, 12 FIR filter, 13 FIR memory, 14 IIR filter, 15 IIR memory, 16 metric calculation unit, 17 metric memory, 18 path selector, 19 output sequence memory, 20-1, 20-2 difference calculation unit.

Claims

1. A filter circuit that searches for a candidate output signal sequence after quantization based on a sum of quantization noise generated when a filter output for an input signal is quantized, searching for candidates for the output signal sequence by depth-first search of a tree structure within a range of a threshold value set for the sum of the quantization noise; a plurality of candidates for an output signal corresponding to each input signal included in the input signal sequence is set as a branch of the tree structure; The sum of the quantization noise when the branch on the path is selected is defined as a node, If the sum of the quantization noises when the candidate for the output signal corresponding to the branch branching from the node is selected exceeds the threshold, the search for the branch is terminated.

1. A filter circuit comprising:

2. 2. The filter circuit according to claim 1, wherein the threshold is updated each time a candidate for the output signal sequence is found within a set range of the threshold, and a search for the candidate for the output signal sequence is continued within the range of the updated threshold.

3. 3. The filter circuit according to claim 2, wherein each time a candidate for the output signal sequence is found within a range of the set threshold, the threshold is updated with a value of the sum of the quantization noise for the found candidate for the output signal sequence.

4. 2. The filter circuit according to claim 1, wherein candidates for the output signal sequence found during the search are stored in a memory.

5. 2. The filter circuit according to claim 1, further comprising a memory for storing the filter output calculated during the search and the sum of the quantization noise calculated during the search.