Wafer treatment method

Abstract

The purpose of the present invention is to provide a method for solving a taper phenomenon in vertical processing on a high aspect ratio feature.　A wafer treatment method according to one aspect of the present invention is for treating a wafer that comprises a treatment target film on a surface thereof and that is disposed in a treatment chamber. The wafer treatment method involves repeating, a plurality of times, one cycle which is composed of a plurality of steps, including a step for forming a protection film that covers a portion from the upper end of a side wall of a recessed part formed in advance in the treatment target film to a location midway to the bottom surface of said recessed part, and a step for etching a portion of the side wall of the recessed part in the treatment target film that is below the protection film and is not covered by the protection film.

Description

Wafer processing method

[0001] The present invention relates to a wafer processing method.

[0002] In semiconductor devices, in order to meet the demands for lower power consumption and increased memory capacity, integration in the vertical direction is progressing in addition to horizontal integration. Accordingly, the aspect ratio of patterns formed in the manufacturing process of semiconductor devices is increasing. For example, in the channel hole formation process in 3D NAND manufacturing, SiO ２ and Si ３ N ４ It is necessary to process hole patterns in highly stacked films of 100 layers or more. For memory cells with more than 100 layers, the aspect ratio exceeds 40. In addition, vertical processing is required to ensure that the hole diameter is uniform in the vertical direction from the top to the bottom.

[0003] Generally, plasma etching is used for vertical processing. However, when the aspect ratio of the pattern is high, it is difficult to form a vertical shape. For example, in the channel hole processing of the aforementioned 3D NAND, a phenomenon called bowing, in which the hole diameter increases near the vertical center, and a tapering phenomenon, in which the hole diameter gradually decreases from the vertical center toward the bottom, are known.

[0004] To solve the bowing problem, a sidewall protection film has been formed during plasma etching. Most commonly, a fluorocarbon (C) is used in plasma etching. ｘ F ｙ ) gas, or hydrofluorocarbon (C ｘ H ｙ F ｚ ) A fluorocarbon polymer (or hydrofluorocarbon polymer) film formed on the sidewall by plasma dissociation of the gas is used as a protective film. ｘ F ｙ Or C ｘ H ｙ F ｚ The plasma dissociated products have a high sticking coefficient and cannot diffuse deep into the pattern. Therefore, when the aspect ratio of the pattern is high, there is a problem that a protective film cannot be formed deep enough to cause bowing.

[0005] Therefore, another method is to remove the wafer from the plasma etching apparatus during hole processing, form a conformal sidewall protective film using a CVD apparatus, plasma CVD apparatus, or ALD apparatus, and then perform hole processing again using the plasma etching apparatus. In this case, by appropriately setting the film formation conditions, including the precursor, it is possible to form a uniform sidewall protective film even with an aspect ratio of 40 or more. However, the need to go back and forth between the plasma etching apparatus and the film formation apparatus results in a problem of reduced throughput.

[0006] To solve this problem, Patent Document 1 describes connecting a plasma etching device and a film forming device to the same vacuum frame, while Patent Documents 2 and 3 describe connecting a gas that serves as an ALD precursor to a plasma etching device, and performing hole processing and sidewall protective film formation in the same chamber.

[0007] Specifically, Patent Document 1 discloses the following. "The method of forming an etched feature in a substrate having a dielectric material of the present invention includes: (a) generating a first plasma having an etching reactant; and exposing the substrate to the first plasma to partially etch the feature in the substrate; (b) after (a), depositing a protective film on the sidewalls of the feature, wherein the protective film is deposited by a plasma-assisted atomic layer deposition reaction including: (i) exposing the substrate to a first deposition reactant to adsorb the first deposition reactant on the sidewalls of the feature; and (ii) after (i), exposing the substrate to a second plasma having a second deposition reactant, wherein exposing the substrate to the second plasma promotes a surface reaction between the first deposition reactant and the second deposition reactant, thereby forming a protective film on the sidewalls of the feature; and (c) repeating (a)-(b) until a final etching depth is reached, wherein the protective film deposited in (b) substantially prevents lateral etching of the feature during (a), wherein the feature has an aspect ratio of about 5 or greater at the final depth." Furthermore, Patent Document 2 aims to suppress shape abnormalities and blockage of openings in a pattern formed by etching, and discloses the following content as an etching method and etching apparatus: "The etching method includes steps a), b), c), and d). In step a), a substrate having a mask formed on a film to be etched is etched to form a recess reaching the film to be etched. In step b), a protective film having a thickness corresponding to one molecular layer is formed on the surface of the recess using only a first gas. In step c), the film to be etched is etched using plasma of a second gas while leaving the protective film on the sidewall of the recess. In step d), steps b) and c) are repeated." In addition, Patent Document 3 aims to form a recess in a layer to be processed with high processing accuracy when manufacturing a semiconductor device, and discloses the following content as a method for manufacturing a semiconductor device."The method for manufacturing a semiconductor device according to the embodiment includes: performing a first etching step using a reactive ion etching method to form a recess in a layer to be processed; performing a first process after the first etching step to supply a silylation agent to the recess; and performing a second etching step after the first process to etch at least the bottom surface of the recess using a reactive ion etching method."

[0008] However, all of these methods only solve the bowing problem, and no method has been proposed to solve the taper problem.

[0009] US Patent Application Publication No. 2017 / 178920 JP 2021-132189 A JP 2022-115656 A

[0010] Conventional high aspect ratio vertical processing has two major problems: bowing and tapering. To solve the bowing problem, a method has been proposed in which a sidewall protective film is formed during plasma etching and then plasma etching is performed again, as described in the Background Art section. However, no method has been proposed to solve the tapering problem. Therefore, an object of the present invention is to provide a method for solving the tapering problem in high aspect ratio vertical processing.

[0011] A wafer processing method according to one aspect of the present invention is a wafer processing method for processing a wafer placed in a processing chamber and having a film to be processed on its surface, wherein the method comprises forming a protective film that covers the sidewall of a recess formed in advance in the film to be processed from the upper end of the recess to a point halfway between the bottom surface of the recess, and etching the sidewall of the film to be processed in the recess below the protective film and not covered by the protective film, and the cycle is repeated multiple times.

[0012] According to the present invention, it is possible to solve the taper phenomenon that occurs in vertical processing of high aspect ratios. Problems, configurations, and effects other than those described above will become apparent from the following description of the preferred embodiments of the present invention.

[0013] FIG. 1 is a cross-sectional view showing an outline of an etching apparatus according to a first embodiment of the present invention. FIG. 2 is a flow chart showing an example of the flow (process flow) of an etching method according to a first embodiment of the present invention. FIG. 3 is a time chart showing a schematic flow of operations over time in a process treatment according to a first embodiment of the present invention. FIG. 4 is a diagram showing an example of a state of a substrate in each step of the etching method according to a first embodiment of the present invention. FIG. 5 is a diagram explaining in detail the step of forming a protective film on a processed film according to a first embodiment of the present invention. FIG. 6 is a diagram showing the state of a substrate in a process treatment according to a first embodiment of the present invention. ２ Film and SiO without HMDS treatment ２ FIG. 7 is a graph summarizing the etching time and etching amount for a film when the HF gas partial pressure is 900 Pa. FIG. 7 is a table showing incubation times during HF gas etching of a silicon oxide film formed by plasma deposition using different types of first gases according to a first embodiment of the present invention. FIG. 8 is a graph showing the sidewall protection depth of a hole pattern (top hole diameter 100 nm) versus the treatment time at atmospheric pressure with TMSDMA according to a first embodiment of the present invention. FIG. 9 is a graph showing the side etching amount versus the depth of a hole pattern (top hole diameter 100 nm) for each TMSDMA treatment time at atmospheric pressure according to a first embodiment of the present invention. FIG. 10 is a cross-sectional view showing an outline of an etching apparatus according to a second embodiment of the present invention. FIG. 11 is a flow chart showing an example of the flow (process flow) of an etching method according to a second embodiment of the present invention. FIG. 12 is a time chart showing a schematic flow of operations over time in a process according to a second embodiment of the present invention. FIG. 13 is a diagram showing an example of the state of a substrate in each step of an etching method according to a second embodiment of the present invention. 14A to 14C are diagrams illustrating in detail the process of forming a protective film on a processed film according to Example 2 of the present invention. FIG. 15A to 15C are diagrams illustrating an example of the state of a substrate in each step of an etching method according to Modification 1 of the present invention.

[0014] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to these embodiments. In addition, in the description of the drawings, identical parts are denoted by the same reference numerals. When there are multiple components having the same or similar functions, they may be described by using the same reference numerals with different subscripts. Furthermore, when it is not necessary to distinguish between these multiple components, the subscripts may be omitted. The position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc., in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0015] In this disclosure, the term "surface" may refer not only to the surface of a plate-shaped member but also to the interface of a layer contained in the plate-shaped member that is approximately parallel to the surface of the plate-shaped member. Furthermore, the terms "upper surface" and "lower surface" refer to the surface shown at the top or bottom of a drawing of a plate-shaped member or a layer contained in the plate-shaped member.

[0016] Furthermore, "side" refers to the surface or thickness of a layer of a plate-like member or a layer contained in a plate-like member. Furthermore, a portion of a surface and a side surface may be collectively referred to as an "edge." Furthermore, "side wall" refers to the part of an object that faces a void, such as a hole, when formed in the object. Furthermore, "upper" refers to the direction vertically upward when a plate-like member or layer is placed horizontally. Furthermore, "upper" and its opposite, "lower," are sometimes referred to as the "positive z-axis direction" and the "negative z-axis direction," and the horizontal direction is sometimes referred to as the "x-axis direction" and the "y-axis direction."

[0017] Furthermore, with regard to the distance in the z-axis direction, the vertically upward distance is referred to as "height" and the vertically downward distance is referred to as "depth."

[0018] [Example 1] (Wafer Processing Apparatus) First, an outline of an etching processing apparatus according to Example 1 of the present invention will be described, including the overall configuration, with reference to Figure 1. Figure 1 is a cross-sectional view showing an outline of the etching apparatus according to Example 1 of the present invention. A processing chamber 1 is composed of a base chamber 11, in which a wafer stage 3 for placing a wafer 2 is installed. A shower plate 23 is installed in the center of the upper side of the processing chamber 1, and processing gas is supplied to the processing chamber 1 via the shower plate 23.

[0019] The supply flow rate of the process gas is adjusted by a mass flow controller 50 installed for each gas type. The gas used for sidewall protection (hereinafter also referred to as the "first gas"), which will be described later, may generate foreign matter when mixed with other reactive process gases. Therefore, the supply flow rate is adjusted by a mass flow controller 52 separate from the mass flow controller 50. Furthermore, the piping before and after the gas leading to the shower plate 23 is independent. The piping for the first gas then merges with the gas lines (pipes) for the other process gases and is connected to a gas distributor 51 downstream of the mass flow controller. The gas distributor 51 allows the flow rates and compositions of the gas supplied near the center of the process chamber 1 and the gas supplied near the periphery to be independently controlled and supplied, thereby enabling detailed control of the spatial distribution of the process gas partial pressure. In FIG. 1, Ar, N ２ Although , He, and HF are shown in the figure, other types of gases can also be supplied as the process gas. Furthermore, although TMSDMA (Trimethylsilyldimethylamine) is shown as the first gas, other aminosilane-based silane coupling material gases can also be supplied as the first gas.

[0020] An exhaust means 15 is connected to the bottom of the processing chamber 1 via a vacuum exhaust pipe 16 in order to reduce the pressure in the processing chamber 1. The exhaust means 15 includes, for example, a turbo molecular pump, a mechanical booster pump, or a dry pump. In addition, a pressure adjusting means 14 is installed upstream of the exhaust means 15 in order to adjust the pressure in the processing chamber 1.

[0021] An IR lamp unit for heating the wafer 2 is installed above the wafer stage 3. The IR lamp unit mainly includes an IR lamp 60, a reflector 61, and an IR light-transmitting window 72. A circular lamp is used as the IR lamp 60. Note that the light emitted from the IR lamp 60 is assumed to be primarily light ranging from visible light to infrared light (herein referred to as IR light). In this embodiment, three lamps 60-1, 60-2, and 60-3 are installed, but two or four lamps may be installed. A reflector 61 is installed above the IR lamp 60 to reflect the IR light downward (toward the placement of the wafer 2). The IR light-transmitting window 72 is preferably made of a material that does not contain alkali metal ions, transmits light in the infrared region, and is heat-resistant; specifically, quartz is a preferred material.

[0022] An IR lamp power supply 73 is connected to the IR lamp 60, and a high frequency cut filter 74 is installed midway to prevent high frequency power noise from entering the IR lamp power supply 73. The IR lamp power supply 73 also has a function that allows the power supplied to the IR lamps 60-1, 60-2, and 60-3 to be controlled independently of one another, making it possible to adjust the radial distribution of the amount of heat applied to the wafer 2 (some of the wiring is not shown). A space is formed in the center of the IR lamp unit for installing a shower plate 23 for introducing process gases.

[0023] The wafer stage 3 has a coolant flow path 39 formed inside it for cooling the wafer stage 3, and the coolant is circulated and supplied by a chiller 38. In this disclosure, the chiller 38 used is capable of temperature control from 20° C. to −60° C. The wafer stage 3 used here is a proximity cooling type.

[0024] Protrusions 56 are provided on the surface of the wafer stage 3, and the wafer 2 is mounted in a manner that supports it at these points. The height of the protrusions 56 is preferably approximately 0.1 mm to 1.0 mm, and the number of support points is preferably three or more. Specifically, six 0.25 mm protrusions were used here. The wafer stage 3 can be made of a corrosion-resistant metal or metal compound with high thermal conductivity.

[0025] Because there is a gap between the wafer stage 3 and the wafer 2 due to the protrusion 56, the entire base chamber 11 is filled with He, Ar, N ２ By flowing such an inert gas, the inert gas flows through the gap, causing thermal conduction and cooling the wafer 2. Note that the wafer can also be cooled by an electrostatic adsorption method as described in Example 2 below.

[0026] A thermocouple 70 for measuring the temperature of the stage is installed inside the wafer stage 3, and this thermocouple 70 is connected to a thermocouple thermometer 71. The temperature of the wafer stage 3 measured by the thermocouple thermometer 71 using the thermocouple 70 can be maintained within a range of ±1°C relative to the set temperature of the chiller 38.

[0027] The proximity-cooled wafer stage 3 described above has the advantage of being simple in structure and therefore low cost. However, when the base chamber 11 is idle and in a vacuum state, the wafer 2 is insulated, so it takes a certain amount of time for inert gas to flow and cooling to begin. Furthermore, because the distance between the coolant from the chiller 38 and the wafer 2 is relatively long, the actual wafer temperature tends to be higher than the set temperature of the chiller 38. When the temperature of the wafer 2 attached with a thermocouple was measured during cooling and processing, it was found that the actual wafer temperature was approximately 10°C higher than the set temperature of the chiller 38.

[0028] As a mechanism for cooling the wafer stage 3 used in the etching processing apparatus of the present invention, in addition to a mechanism for circulating a refrigerant, a Peltier element, which is a thermoelectric conversion device, or the like can also be used.

[0029] The etching processing apparatus used in the present invention can heat the inside of the base chamber 11 except for the wafer stage 3, which is exposed to hydrogen fluoride gas, such as the processing chamber 1. For example, a temperature in the range of about 40° C. to 120° C. can be used. This makes it possible to prevent hydrogen fluoride (HF) gas and the like from being adsorbed inside the base chamber 11, and to minimize corrosion inside the base chamber 11.

[0030] In the present invention, HF at a pressure of 50 Pa to 1000 Pa is used at a low temperature of -10°C to -60°C. This is because there is a concern that HF ​​may aggregate on the silicon oxide film, liquefy, or even solidify. Therefore, when using an electrostatic chuck, if solidification or liquefaction occurs on the backside of the wafer 2, the seal band for the backside cooling gas may break, causing leakage of cooling gas such as He, which may result in an electrostatic chuck error. In contrast, a wafer stage 3 using a proximity cooling method has an inherent gap, so even if HF solidifies or liquefies, no error occurs in the wafer stage 3, allowing for stable processing.

[0031] (Wafer Processing Method) Next, the wafer processing method will be described with reference to FIGS. 2 to 4. FIG. 2 is a flow chart showing an example of the flow (process flow) of the etching method according to Example 1 of the present invention. FIG. 3 is a time chart showing a schematic flow of operations over time in the process according to Example 1 of the present invention. FIG. 4 is a diagram showing an example of the state of the substrate in each step of the etching method according to Example 1 of the present invention. FIG. 4 shows that the state changes from (A), (B), (C), to (D) in the first and second cycles, and that from the third cycle onwards, treatments equivalent to (C) and (D) are repeated a predetermined number of times, eventually reaching (E). The wafer processing method of the present disclosure is a wafer processing method for processing a wafer 2 that is placed in a processing chamber 1 and has a film to be processed on its surface, and includes a step (step S102) of forming a protective film 200 that covers a portion of a sidewall of a recess (concave portion) 104 that has been previously formed in the film to be processed, from the upper end of the sidewall to a part of the bottom surface (bottom bp) of the recess 104, and a step (step S103) of etching the sidewall of the film to be processed in the recess 104 that is below the protective film 200 and is not covered by the protective film 200, and the cycle is repeated multiple times. Specific steps will be described below.

[0032] First, as shown in step S101 of Fig. 2, a wafer 2 having a recessed portion 104 formed therein is provided. Fig. 4A shows the provided wafer 2. The wafer 2 is provided with a laminated film 105 including a base film 101, a processing target film 102 which is a film to be processed, and a mask film 103.

[0033] The layer to be etched is a film 102 to be processed. A recess 104 is formed in the film 102 by etching. The film 102 to be processed is a film made of a material containing oxygen. Examples of the material of the film 102 to be processed include SiO. ２ , TiO ２ , Al ２ O ３ , an oxide film such as SiOC, or an oxygen-containing film can be applied.

[0034] The recess 104 can be formed, for example, by using plasma etching. The recess 104 has a shape that expands isotropically in the xy plane direction, and its diameter increases from the boundary between the workpiece film 102 and the mask film 103 toward the negative z-axis direction (bowing phenomenon), and gradually decreases toward the base film 101 (tapering phenomenon). The diameter at the point where it expands most due to bowing is defined as W0. The maximum diameter W0 of the recess 104 is formed at the middle part in the z-axis direction.

[0035] The layers other than the layer to be etched (layers not to be etched) are a base film 101 and a mask film 103. The mask film 103 has a recessed portion 104 disposed on the film to be processed 102. The base film 101 and the mask film 103 are films not to be processed (films not to be processed) made of a material that does not contain oxygen. Oxygen-free films such as Si, SiGe, W, SiN, TiN, and C can be used as materials for the base film 101 and the mask film 103, respectively. A typical example of the stacked film 105 is a silicon substrate for the base film 101, a silicon oxide film for the film to be processed 102, and an amorphous carbon film for the mask film 103. The present disclosure can also be applied to other combinations of materials.

[0036] 3, first, the wafer 2 is transferred into the processing chamber 1 through a transfer port (not shown) provided in the processing chamber 1, and then the wafer 2 is placed on the protrusion 56 on the wafer stage 3.

[0037] 2, a protective film 200 is formed to a desired depth in the recess 104. Step S102 is a process of forming the protective film 200 that covers the sidewall of the recess 104 formed in advance in the film to be processed 102 from the upper end to a point midway between the bottom surface of the recess 104. As shown in the time chart of FIG. 3, the wafer is heated by an IR lamp and the sidewall of the recess 104 is protected.

[0038] Specifically, the wafer 2 is irradiated with IR light by the IR lamp 60 to heat the wafer 2. Here, IR light refers to light that is emitted from the IR lamp 60 and is mainly light in the visible to infrared region. Next, when the wafer temperature, which is the temperature of the wafer 2, reaches a predetermined temperature, a first gas (TMSDMA (Trimethylsilyldimethylamine) will be described below) is supplied. In FIG. 3, after the wafer temperature reaches the predetermined temperature and is maintained for a certain period of time, TMSDMA gas is supplied.

[0039] As a result, as shown in FIG. 4B , a protective film 200 equivalent to one molecular layer is formed on the side surface of the recess 104 previously formed on the wafer 2. The protective film 200 is also formed on the upper and side surfaces of the mask film 103. At this time, the supply time of the first gas is controlled to control the depth D1 at which the protective film 200 is formed (hereinafter also referred to as the "formation depth") to be halfway up the recess 104. The formation depth D1 refers to the length from the top of the workpiece film 102 (the upper end of the workpiece film 102 in the positive z-axis direction, which can also be referred to as the boundary between the workpiece film 102 and the mask film 103) to the position where the protective film 200 reaches in the negative z-axis direction. The formation depth D1 of the protective film is a position midway between the top of the recess 104 and the bottom surface bp of the recess 104 (where the base film 101 is exposed).

[0040] The protective film 200 is, for example, a carbon film. The first gas used to form the protective film 200 may be, for example, an aminosilane-based silane coupling material. For example, one or more gases selected from HMDS (Hexamethyldisilazane), TMSDMA (Trimethylsilyldimethylamine), TMSDEA (Trimethylsilyldiethylamine), TMDS (Tetramethyldisilazane), and DMSDMA (Dimethylaminodimethylsilane) may be used. Furthermore, in addition to the above gases, the first gas may also be dimethylaminosilane (3R-Si-N-2CH ３ ), bisdimethylaminosilane (2R-Si-(N-(CH ３ )2)2), trisdimethylaminosilane (R—Si—(N—(CH ３ ) 2) 3), diethylaminosilane (3R-Si-N-2C ２ H ５ ), chlorosilane (3R—Si—Cl), or the like. These gases are supplied into the processing chamber 1 to form the protective film 200. In the present disclosure, the wafer temperature during the formation of the protective film 200 is preferably 30° C. or higher and 80° C. or lower.

[0041] Subsequently, isotropic etching is performed as shown in step S103 of Fig. 2. As shown in the time chart of Fig. 3, the wafer 2 is cooled, and at the same time, TMSDMA is exhausted and the film 102 to be processed is etched.

[0042] Specifically, when the formation of the protective film 200 is completed, the irradiation of the IR lamp 60 is stopped. Then, the wafer 2 is cooled by supplying a wafer cooling gas to the wafer 2 via the mass flow controller 50, the gas distributor 51, and further the shower plate 23. The wafer cooling gas may be an inert gas. For example, H ２ , N ２One or more gases selected from He, Ne, Ar, Kr, and Xe are used. In Example 1, a case where Ar gas is used will be described. When the wafer temperature reaches a predetermined temperature, the cooling gas is stopped. Then, HF gas is supplied to the processing chamber 1 in a predetermined amount for a predetermined time to perform gas etching. As a result, as shown in FIG. 4C, a side etching portion 300, which is a side etching portion of the first cycle, is formed on the side wall of the recessed portion 104 where the protective film 200 is not formed. １ In the following description, the cycles formed in the side etching portion are indicated by subscripts. When the cycles formed are not particularly distinguished, they are collectively referred to as the side etching portion 300. The same applies to the other components.

[0043] Here, as shown in step S104 of FIG. 2, etching with HF gas is performed to reduce the maximum diameter W1 of the region to be etched (side etching portion 300 in FIG. 4C). １ The difference between the diameter W0 of the recess 104 (the diameter of the upper portion in FIG. 4A) and the maximum diameter W0 of the recess 104 (the diameter of the middle portion in FIG. 4A) is controlled to be equal to or less than a predetermined value. Note that the etching time with HF gas can also be controlled so that it is equal to or less than an incubation time set based on the etching resistance of the protective film 200, which will be described later. If the determination condition is not met (No in S104 in FIG. 1), the formation of the protective film and the isotropic etching are continued (S102 and S103 in FIG. 1).

[0044] (Details of the Protective Film Forming Process) Here, the protective film 200 forming process (FIG. 4B) will be described in detail with reference to FIG. 5. FIG. 5 is a diagram for explaining in detail the protective film forming process for the processed film according to the first embodiment of the present invention. Note that the protective film 200 is formed on the sidewall of the recessed portion 104 of the processed film 102, and in FIG. 5 the positional relationship between the processed film 102 and the first gas is omitted, and the forming process is shown from the perspective of a chemical reaction.

[0045] As shown in FIG. 5A, when an aminosilane-based silane coupling gas (TMSDMA is shown here) is supplied to the wafer 2 as the first gas, a substitution reaction occurs between the hydroxyl groups (-OH groups) present on the surface of the recessed portion 104 of the workpiece film 102 and the molecules of the aminosilane-based silane coupling gas. That is, as shown in FIG. 5B, a substitution reaction occurs between the amine groups of the silyl groups and amine groups that form the molecules of the aminosilane-based silane coupling gas and the -OH groups present on the surface of the recessed portion 104. Then, as shown in FIG. 5C, the trimethylsilyl groups bond with the oxygen atoms of the -OH groups on the recessed portion 104, resulting in chemisorption of methyl silicon oxide to the surface of the recessed portion 104. As a result, a protective film 200 having a thickness corresponding to one molecular layer of methyl groups is formed on the surface of the recessed portion 104. Note that no substitution reaction occurs with other molecules of the aminosilane-based silane coupling gas at the methyl group termination.

[0046] (Etching Resistance of Protective Film) Here, the etching resistance of the protective film 200 will be described in detail with reference to FIGS. 6 and 7. As shown in FIGS. 6 and 7, the HF gas processing time that the protective film 200 can withstand varies depending on the type of film to be etched and the type of first gas. The processing time that the protective film 200 can withstand also varies depending on the partial pressure of the HF gas. This will be described in detail below.

[0047] FIG. 6 shows the HMDS-treated SiO ２ Film and SiO without HMDS treatment ２ 1 is a graph showing the etching time and etching amount of a SiO 2 film when the HF gas partial pressure is 900 Pa. Here, HMDS treatment is a process in which HMDS is used to etch SiO 2 film. ２ This is a process for forming a protective film on the film. ２ ) is shown in FIG. 6B for the plasma-deposited SiO ２ film (hereinafter referred to as plasma SiO ２ In both cases, the temperature of the wafer stage 3 was set to -40°C. Etching started a few seconds after the gas etching process using HF gas was performed (i.e., the point in time when HF gas was introduced).２ (Hereinafter, the time until etching begins is referred to as the incubation time.) ２ The incubation time of the thermal oxide film without HDMS treatment was 14.3 seconds, and that of the thermal oxide film with HDMS treatment was 52.6 seconds, as shown in FIG. 6(A). Furthermore, as shown in FIG. 6(B), the incubation time of the thermal oxide film without HDMS treatment was 14.3 seconds, and that of the thermal oxide film with HDMS treatment was 52.6 seconds. ２ The incubation time of the film was 3.3 s, and the plasma SiO ２ The incubation time of the film was 7.4 seconds. The difference in incubation time between with and without HMDS treatment is considered to represent the etching resistance of the protective film 200.

[0048] 7 is a table showing the incubation time of the plasma-deposited silicon oxide film depending on the type of first gas according to the first embodiment of the present invention. HF gas etching is performed at an HF gas etching pressure of 900 Pa and a wafer stage 3 temperature of -40°C. For example, since the incubation time for TMSDMA is 18.6 seconds, the etching time shown in FIG. 3C must be less than 18.6 seconds.

[0049] The incubation time can also be considered as the time required for the protective film 200 to be removed by the gas etching process. The maximum diameter of the side-etched portion 300 tends to occur near the formation depth of the protective film 200. In order to etch the tapered portion located deep in the recessed portion 104, it is preferable that the processing time for etching with HF gas be shorter than the incubation time.

[0050] (Repetition of the cycle) Returning to the explanation of FIG. 2 to FIG. 4, the side etching portion 300 in the first cycle １After the formation of the protective film 200 (Yes in step S104 in FIG. 2), the HF gas is exhausted. Subsequently, the wafer 2 is heated by irradiating it with IR light in a second cycle (corresponding to S102 in FIG. 1). In the second cycle, the supply time of the first gas is lengthened, so that the depth at which the protective film 200 is formed is deeper than in the first cycle (FIG. 4D). Thereafter, by performing HF gas etching in the same manner as in the first cycle (by repeating steps S102 to S104 in FIG. 2), the side etching portion 300 in the second cycle is formed in the portion D2 deeper than in the first cycle. ２ The side etching portion 300 can be formed. ２ The side etching portion 300 ２ The difference between the maximum diameter W2 and W0 is set to a predetermined value or less.

[0051] Furthermore, by repeating the cycle an arbitrary number of times and deepening the formation depth of the protective film 200 each time, the amount of side etching can be increased as the depth of the recessed portion 104 becomes deeper, and the taper extending toward the bottom of the recessed portion 104 can be corrected to be vertical (FIG. 5E). For example, if the arbitrary number of times is N and n is an integer equal to or less than N, the side-etched portion 300 ｎ The difference between the maximum diameter Wn and W0 of the protective film 200 becomes equal to or less than a predetermined value. The arbitrary number of times N can be set appropriately taking into consideration the materials of the protective film 200 and the workpiece film 102, the supply time of the first gas described below, and the like. The method for removing the protective film 200 can also be set appropriately, just like the arbitrary number of times N.

[0052] (Details of Protective Film Formation) Here, the formation depth of the protective film 200 will be described in more detail with reference to FIGS. 8 and 9. FIG. 8 is a graph showing the sidewall protection depth of a hole pattern (top hole diameter 100 nm) versus the processing time of TMSDMA at atmospheric pressure according to a first embodiment of the present invention. FIG. 8 shows the relationship between the first gas supply time and the formation depth of the protective film 200 when, for example, TMSDMA is supplied to a wafer as the first gas in the atmosphere. TMSDMA placed in a beaker and the wafer are enclosed in a locally evacuated enclosure with a differential pressure of 35 Pa. The wafer is heated to 40° C. on a hot plate. TMSDMA is supplied to the wafer at vapor pressure (25° C., 548 Pa). The recessed portion on the wafer is formed by plasma SiO ２ The hole pattern is a cylindrical cavity with a diameter of 100 nm formed in the film. The depth of the protective film formed on the sidewall of the hole pattern was measured by changing the supply time of TMSDMA. As a result, the depth of the protective film formed and the supply time of TMSDMA had the following relationship: TMSDMA diffuses within the hole pattern, and the diffusion flux is generally proportional to the concentration gradient. Since the TMSDMA concentration corresponds to the pressure of TMSDMA relative to atmospheric pressure, it is expected that the TMSDMA concentration will be relatively high under vacuum, resulting in faster formation of the protective film.

[0053] Next, Fig. 9 is a graph showing the amount of side etching relative to the depth of a hole pattern (top hole diameter 100 nm) for each TMSDMA treatment time at atmospheric pressure according to the first embodiment of the present invention. Fig. 9 shows the results of the plasma SiO ２ The vertical axis shows the hole pattern depth (nm) at the top of the hole pattern (plasma SiO ２ the opening at the surface of the film) ２The hole pattern measured in the direction of the film thickness is shown. Hole patterns with sufficient depth were used. When a protective film was not formed ("No treatment" in Figure 9), side etching of 2 nm to 5 nm was formed at all depths of the hole pattern. When the TMSDMA supply time was set to 20 minutes ("◇TMSDMA treatment for 20 minutes" in Figure 9), side etching did not occur at a hole pattern depth of 2000 nm, but side etching of 2 nm to 5 nm occurred deeper. Therefore, it is believed that a protective film was formed up to the 2000 nm position. Furthermore, when the TMSDMA supply time was set to 50 minutes ("×TMSDMA treatment for 50 minutes" in Figure 9), side etching did not occur up to a hole depth of 5500 nm, but side etching of 3.5 nm occurred deeper. Therefore, it is believed that a protective film was formed up to the 5500 nm position.

[0054] In this way, by controlling the supply time of the first gas, it is possible to control the depth to which the protective film 200 is formed, and therefore the depth to which side etching occurs.

[0055] In this embodiment, the IR lamp 60 is used to heat the wafer, but the heating method is not limited to this. For example, a method of heating the wafer stage or a method of transferring the wafer to a device that only performs heating and then performing heat treatment thereon may be used. Furthermore, Ar gas or nitrogen gas may be introduced during irradiation with the IR lamp.

[0056] Example 2 Example 2 differs from Example 1 in that it includes a step of oxidizing the surface of the film to be processed (film to be processed 102) that forms the sidewall of the recessed portion 104 before the step of forming the protective film (step S102). In the following description, components that are the same as or equivalent to those in Example 1 described above are denoted by the same reference numerals, and their description may be simplified or omitted.

[0057] Second Embodiment An outline of an etching processing apparatus according to a second embodiment of the present invention, including its overall configuration, will be described with reference to Fig. 10. Fig. 10 is a cross-sectional view showing an outline of an etching apparatus according to a second embodiment of the present invention.

[0058] The processing chamber 1 is composed of a base chamber 11, which contains a wafer stage 3 for placing a wafer 2 thereon. A plasma source is installed above the processing chamber 1 and uses an ICP discharge method. The ICP plasma source can be used to clean the inner walls of the base chamber 11 using plasma or to generate reactive gases using plasma. A cylindrical quartz chamber 12 constituting the ICP plasma source is installed above the processing chamber 1, and an ICP coil 20 is installed outside the quartz chamber 12. A high-frequency power source 21 for plasma generation is connected to the ICP coil 20 via a matching device 22. The high-frequency power uses a frequency band of several tens of megahertz, such as 13.56 MHz. A top plate 25 is installed above the quartz chamber 12. A gas dispersion plate 24 and a shower plate 23 are installed below the top plate 25, and processing gas is introduced into the quartz chamber 12 via the gas dispersion plate 24 and the shower plate 23.

[0059] The supply flow rate of the process gas is adjusted by a mass flow controller 50 installed for each gas type. Furthermore, since the gas used for sidewall protection (hereinafter also referred to as the "first gas"), which will be described later, may generate foreign matter when mixed with other reactive process gases, the supply flow rate is adjusted by a mass flow controller 52 separate from the mass flow controller 50, and the piping before and after connecting to the shower plate 23 is independent. The piping for the first gas then merges with other gas lines (pipes) and is connected to a gas distributor 51 downstream of the mass flow controller. The gas distributor 51 allows the flow rates and compositions of the gas supplied near the center of the quartz chamber 12 and the gas supplied near the periphery to be independently controlled and supplied, thereby enabling detailed control of the spatial distribution of the partial pressure of the process gas. In FIG. 10 , Ar, N ２ , H.F., O. ２ Although TMSDMA is shown as the first gas in the figure, other gases can be supplied as needed. Furthermore, although TMSDMA is shown as the first gas, other aminosilane-based silane coupling material gases can also be supplied as the first gas.

[0060] The lower part of the processing chamber 1 is connected to an exhaust means 15 by a vacuum exhaust pipe 16 in order to reduce the pressure in the processing chamber 1. The exhaust means 15 includes, for example, a turbo molecular pump, a mechanical booster pump, or a dry pump. In addition, a pressure adjusting means 14 is installed upstream of the exhaust means 15 in order to adjust the pressure in the processing chamber 13.

[0061] An IR lamp unit for heating the wafer 2 is installed above the wafer stage 3. The IR lamp unit mainly includes an IR lamp 60, a reflector 61, and an IR light-transmitting window 72. A circular lamp is used as the IR lamp 60. The light emitted from the IR lamp 60 is assumed to be primarily light ranging from visible light to infrared light (herein referred to as IR light). In this embodiment, three lamps 60-1, 60-2, and 60-3 are installed, but two or four lamps may be installed. A reflector 61 is installed above the IR lamp 60 to reflect the IR light downward (toward the placement of the wafer 2). The IR light-transmitting window 72 is preferably made of a material that does not contain alkali metal ions, transmits light in the infrared region, and is heat-resistant. Specifically, quartz is a desirable material.

[0062] An IR lamp power supply 73 is connected to the IR lamp 60, and a high frequency cut filter 74 is installed midway between the IR lamps 60 and the power supply 73 to prevent high frequency power noise from entering the IR lamp power supply 73. The IR lamp power supply 73 also has a function that enables the power supplied to the IR lamps 60-1, 60-2, and 60-3 to be controlled independently of one another, making it possible to adjust the radial distribution of the amount of heat applied to the wafer 2 (some of the wiring is not shown).

[0063] A flow path 27 is formed in the center of the IR lamp unit. A slit plate 26 with a plurality of holes is installed in this flow path 27 to block ions and electrons generated in the plasma and allow only neutral gases and neutral radicals to pass through and irradiate the wafer. The slit plate 26 is preferably heat-resistant and does not contain alkali metal ions, and specific examples of the material that can be used include alumina and quartz.

[0064] The wafer stage 3 has a coolant flow path 39 formed therein for cooling the wafer stage 3, and the coolant is circulated and supplied by a chiller 38. In the present disclosure, a chiller 38 capable of cooling to temperatures between 20°C and -60°C is used. Furthermore, to fix the wafer 2 by electrostatic adsorption, plate-shaped electrodes 30 are embedded in the stage, each connected to a DC power supply 31. Furthermore, to efficiently cool the wafer 2, He gas can be supplied between the backside of the wafer 2 and the wafer stage 3. Furthermore, to prevent scratches on the backside of the wafer 2 even when heating and cooling are performed while the wafer is adsorbed, the surface (wafer-mounting surface) of the wafer stage 3 is coated with a resin such as polyimide. Furthermore, a thermocouple 70 for measuring the stage temperature is installed inside the wafer stage 3, and this thermocouple 70 is connected to a thermocouple thermometer 71.

[0065] The stage temperature measured by thermocouple thermometer 71 using thermocouple 70 differed by within ±1°C from the set temperature of chiller 38, and the wafer temperature measured separately using a thermocouple differed by within ±3°C (within ±2°C from the stage temperature).

[0066] As a mechanism for cooling the wafer stage 3 used in the etching processing apparatus of the present invention, in addition to a mechanism for circulating a refrigerant, a Peltier element, which is a thermoelectric conversion device, or the like can also be used.

[0067] Furthermore, the etching processing apparatus used in the present invention can heat the inside of the base chamber 11 except for the wafer stage 3, which is exposed to hydrogen fluoride gas, such as the processing chamber 1. For example, a temperature of about 40° C. to 120° C. can be used. This makes it possible to prevent hydrogen fluoride gas from being adsorbed inside the base chamber 11, and to minimize corrosion inside the base chamber 11.

[0068] Next, a wafer processing method will be described with reference to FIGS. 11 to 13. FIG. 11 is a flow chart showing an example of the flow (process flow) of an etching method according to Example 2 of the present invention. FIG. 12 is a time chart showing a schematic flow of operations over time in a process according to Example 2 of the present invention. FIG. 13 is a diagram showing an example of the state of a substrate in each step of the etching method according to Example 2 of the present invention. FIG. 13 shows that the state changes from (A), (B), (C), (D), to (E) in the first and second cycles, and that processes equivalent to (C), (D), and (E) are repeated a predetermined number of times from the third cycle onwards, eventually reaching (F). Note that, for example, the protective film formed in the nth cycle (n is a positive integer) is a protective film 200. ｎ The same applies to the side etching portion. In addition, when there is no particular need to distinguish the number of cycles, the number of cycles may be omitted, as in the case of the protective film 200.

[0069] First, as shown in step S101 of Fig. 11, a wafer 2 having a recess 104 formed therein is provided. Fig. 13A shows the provided wafer 2. A laminated film 105 including a base film 101, a film to be processed 102, and a mask film 103 is formed on the wafer 2.

[0070] The layer to be etched is a film to be processed 102. A recess 104 is formed in the film to be processed 102 by etching. The film to be processed 102 is a film made of a material that does not contain oxygen. Examples of materials that can be used for the film to be processed 102 include semimetals and metals such as Si, Ge, Ti, W, Mo, and Ta, as well as Si with the above elements added, such as SiGe and TaSi, and nitrides and carbides of the above materials, such as SiN, SiC, and TiN.

[0071] The recess 104 can be formed, for example, by using plasma etching. The recess 104 has a shape that expands isotropically in the xy plane direction, and its diameter increases from the boundary between the workpiece film 102 and the mask film 103 toward the negative z-axis direction (bowing phenomenon), and gradually decreases toward the base film 101 (tapering phenomenon). The diameter at the point where it expands most due to bowing is defined as W0. The maximum diameter W0 of the recess 104 is formed at the middle part in the z-axis direction.

[0072] The layers other than the layer to be etched (layers not to be etched) are a base film 101 and a mask film 103. The mask film 103 has a recessed portion 104 disposed on the film to be processed 102. The base film 101 and the mask film 103 are films not to be processed (films not to be processed) made of a material that does not contain oxygen. The materials for the base film 101 and the mask film 103 may be semimetallic, metallic, or Si with a semimetallic or metallic element added, or nitrides, carbides, or oxides thereof, and may also be materials not used in the film to be processed 102.

[0073] 12, first, the wafer 2 is transferred in step S101. Specifically, the wafer 2 is transferred into the processing chamber 1 through a transfer port (not shown) provided in the processing chamber 1, and then the wafer 2 is fixed to the wafer stage 3 by the DC power supply 31 for electrostatic adsorption. Electrostatic adsorption continues while the wafer is being processed, and the DC power supply 31 continues to supply power.

[0074] 11, the side surface is oxidized down to the bottom of the recessed portion 104. Step S105 is a step of oxidizing the surface of the film to be processed (film to be processed 102) that constitutes the side wall of the recessed portion 104 before the step of forming a protective film (step S102). In step S105, the surface of the film to be processed (film to be processed 102) is oxidized using plasma using a gas containing at least one of oxygen, hydrogen, and nitrogen in the processing chamber 1. As shown in the time chart of FIG. 12, the oxidation process is performed while performing lamp heating.

[0075] Specifically, the wafer 2 is irradiated with IR light by the IR lamp 60 to heat the wafer 2. Next, when the wafer temperature reaches a predetermined temperature, O ２ The side surface of the recess 104 is oxidized by plasma treatment or the like. As a result, an oxide film 106 is formed on the side surface of the recess 104. １ The oxidation process involves the formation of O ２ Instead of plasma treatment, H ２ O plasma treatment and O ３ or an oxidizing gas treatment such as NO.

[0076] 11, a protective film is formed to a desired depth in the recessed portion 104. As shown in the time chart of FIG. 12, the gas used in the oxidation process is exhausted, and then the sidewall of the recessed portion 104 is protected.

[0077] Specifically, the first gas is supplied in the same manner as in Example 1, and a protective film 200 of one molecular layer is formed on the side surface of the recess 104 preliminarily provided on the wafer 2. The wafer temperature is the same as the temperature when the oxidation process in step S105 is performed.

[0078] As a result, as shown in FIG. 13B, a protective film 200 is formed on the side surface of the recessed portion 104. １ At this time, by controlling the supply time of the first gas, the protective film 200 １ The depth at which the protective film 200 is formed is controlled to the middle of the recessed portion 104. １ and the protective film 200 １ The type of the first gas used to form the protective film 200 is the same as that described in Example 1. １ The wafer temperature during the formation of the protective film 200 is preferably 30° C. or higher and 80° C. or lower, as in Example 1. １ The same formation conditions as those in the above can be applied.

[0079] Subsequently, isotropic etching is performed as shown in step S103 of Fig. 11. As shown in the time chart of Fig. 12, the wafer 2 is cooled, and at the same time, TMSDMA is exhausted and the film 102 to be processed is etched.

[0080] Specifically, the protective film 200 １ When the formation of the IR light is completed, the irradiation of the IR lamp 60 is stopped, and He gas for cooling the wafer 2 is supplied to the rear surface of the wafer 2 to cool the wafer 2. In addition to He gas, H ２ , N ２ Alternatively, an inert gas such as Ne, Ar, Kr, or Xe may be used. When the wafer temperature reaches a predetermined temperature, the cooling gas is stopped. Then, a predetermined amount of HF gas is supplied to the processing chamber 1 for a predetermined time to perform gas etching. As a result, as shown in FIG. 13C, the sidewall of the recessed portion 104 where the protective film 200 is not formed and the oxide film 106 are etched. １ is removed, and a side etching portion 300 is formed on the side wall of the recessed portion 104. １ is formed.

[0081] Here, as shown in step S104 of FIG. 11, etching with HF gas is performed to reduce the maximum diameter W1 of the region to be etched (side etching portion 300 in FIG. 13C). １ The difference between the diameter of the upper portion of the recess 104 (diameter of the upper portion in FIG. 13A) and the maximum diameter W0 of the recess 104 (diameter of the middle portion of the recess 104 in FIG. 13A) is controlled to be equal to or less than a predetermined value. １ It is also possible to control the incubation time so that it is equal to or shorter than the incubation time set based on the etching resistance of the film. If the determination condition is not satisfied (No in S104 in FIG. 1), a protective film is formed and isotropic etching is performed (S102 and S103 in FIG. 1).

[0082] (Details of the Protective Film Forming Process) Here, the protective film 200 forming process (FIG. 12B) will be described in detail with reference to FIG. 14. FIG. 14 is a diagram for explaining in detail the protective film forming process for a processed film according to Example 2 of the present invention. As the processed film, FIG. 11A shows the case of a silicon (Si) film, and FIG. 11B shows the case of a silicon nitride (SiN) film.

[0083] As shown in FIGS. 14A and 14B, a Si film is generally terminated with hydrogen (-H), and a SiN film is generally terminated with amine groups (-NH ２ ) are terminated. The aminosilane-based silane coupling gas shown in Example 1 does not undergo a substitution reaction with these terminal groups. Therefore, as shown in Figures 14(A)(b) and 14(B)(b), the terminal groups are converted to hydroxyl groups (-OH) by oxidation treatment. The oxidation treatment is carried out by O ２ Plasma treatment, H ２ O plasma treatment, O ３ Examples of suitable methods include flow treatment and NO flow treatment. A substitution reaction occurs between the hydroxylated surface and the molecules of the aminosilane-based silane coupling gas shown in Example 1, and as shown in Figures 14(A)(c) and 14(B)(c), methyl silicon oxide is chemically adsorbed onto the surface of the recess 104 by the same method as in Example 1. As a result, a protective film 200 having a thickness corresponding to one molecular layer of methyl groups is formed on the surface of the recess 104, as shown in Figures 14(A)(d) and 14(B)(d).

[0084] (Repetition of the cycle) Returning to the explanation of Fig. 11 to Fig. 13, the side etching portion 300 in the first cycle １ After the wafer temperature reaches a predetermined temperature (Yes in step S104 in FIG. 11), the HF gas is exhausted. Then, as shown in FIG. 12, the wafer backside cooling gas is stopped, and the wafer 2 is heated by irradiating it with IR light for the second cycle (corresponding to step S105 in FIG. 11). When the wafer temperature reaches a predetermined temperature, O ２ The protective film 200 formed in the first cycle is removed by plasma processing or the like, and further the side surface of the recessed portion 104 of the processed film 102 is oxidized. In the second cycle and thereafter, step S105 is an oxidation process, and also functions as a process for removing the protective film 200 between the process of etching the film to be processed (the processed film 102) in one cycle and the process of forming the protective film 200 in the next cycle. As a result, as shown in FIG. 13(D), the oxide film 106 in the second cycle is removed. ２ is formed.

[0085] Thereafter, as shown in FIG. 13(E), the protective film 200 in the second cycle is ２ Here, as in Example 1, the supply time of the first gas is extended to form the protective film 200. ２ The depth of the formation is made deeper than that in the first cycle.

[0086] Thereafter, HF gas etching is performed in the same manner as in the first cycle, thereby forming a side etching portion 300 in a deeper portion than in the first cycle. ２ The side etching portion 300 can be formed. ２ The side etching portion 300 ２ The difference between the maximum diameter W2 and W0 is set to a predetermined value or less.

[0087] Furthermore, by repeating the cycle an arbitrary number of times and deepening the formation depth of the protective film 200 each time, the amount of side etching can be increased as the depth of the recessed portion 104 becomes deeper, and the taper extending toward the bottom of the recessed portion 104 can be corrected to be vertical (FIG. 13(F)). For example, if the arbitrary number of times is N and n is an integer equal to or less than N, the side-etched portion 300 ｎ The difference between the maximum diameter Wn and W0 of the protective film 200 becomes equal to or smaller than a predetermined value. The method for removing the protective film 200 can be appropriately set in consideration of the materials of the protective film 200 and the film 102 to be processed, etc.

[0088] In this embodiment, the protective film 200 formed in the previous cycle is removed at the beginning of the cycle. １ The taper extending toward the bottom of the recess 104 can also be corrected to be perpendicular by forming the protective film 200 to a depth that is gradually shallower with each cycle.

[0089] [Modification 1] Modification 1 differs from Example 1 in that a step of etching the sidewall of the film to be processed (processed film 102) is carried out after a step of removing the protective film 200 covering the upper part of the sidewall of the recessed portion 104 while leaving the underlying protective film 200. In the following description, components that are the same as or equivalent to those in Example 1 described above are given the same reference numerals, and their description may be simplified or omitted.

[0090] 15 is a diagram showing an example of the state of a substrate in each step of the etching method according to Modification 1 of the present invention. Fig. 15 shows that the state changes from (A) to (B) to (C) to (D), and that processes equivalent to (A), (B), (C), and (D) are repeated a predetermined number of times to eventually reach (E).

[0091] As shown in Figure 15, after forming the protective film 200 (Figure 15(B)), an oxidation process is added and the processing time is controlled, thereby partially removing the top of the protective film 200 (Figure 15(C)). Subsequently, etching is performed to enlarge the hole diameter at both the bottom and top of the recess 104 (Figure 15(D)). By repeating this process, not only the taper but also the entire shape of the recess 104 can be corrected to be vertical (Figure 15(E)).

[0092] In this embodiment, the wafer heating method is not limited to IR lamp light irradiation, and may be, for example, a method of heating the wafer stage, or a method of transferring the wafer to a heating-only device and performing heat treatment thereon. Furthermore, Ar gas or nitrogen gas may be introduced during the IR lamp irradiation.

[0093] (Operations and Effects) According to the present disclosure, it is possible to solve the taper phenomenon that occurs in vertical processing of high aspect ratios.

[0094] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the present invention.

[0095] The following are some non-limiting aspects of the present invention. (Aspect 1) A wafer processing method for processing a wafer placed in a processing chamber and having a film to be processed on its surface, the method comprising: forming a protective film that covers the sidewall of a recess previously formed in the film to be processed from the top to a point halfway between the bottom of the recess; and etching the sidewall of the film to be processed below the protective film in the recess that is not covered by the protective film, the method comprising repeating the cycle multiple times. (Aspect 2) The wafer processing method according to Aspect 1, wherein one or more gases selected from HMDS, TMSDMA, TMSDEA, TMDS, and DMSDMA are supplied into the processing chamber to form the protective film. (Aspect 3) The wafer processing method according to Aspect 1 or 2, wherein the film to be processed is made of a material containing oxygen, and the wafer further comprises a film that is not to be processed and is made of a material that does not contain oxygen. (Aspect 4) The wafer processing method according to any one of Aspects 1 to 3, comprising a step of removing the protective film between the step of etching the film to be processed in one cycle and the step of forming the protective film in the next cycle. (Aspect 5) The wafer processing method according to any one of Aspects 1 to 4, comprising a step of oxidizing the surface of the film to be processed that constitutes the sidewall of the recessed portion before the step of forming the protective film. (Aspect 6) The wafer processing method according to any one of Aspects 1 to 5, comprising a step of etching the sidewall of the film to be processed after a step of removing the protective film covering the upper part of the sidewall of the recessed portion while leaving the underlying protective film. (Aspect 7) The wafer processing method according to any one of Aspects 1 to 6, comprising a step of oxidizing the surface of the film to be processed by using plasma using a gas containing at least one of oxygen, hydrogen, and nitrogen in the processing chamber.(Aspect 11) A semiconductor device manufacturing method comprising the steps of: a) controlling a supply time of a first gas to form a protective film having a thickness equivalent to one molecular layer on a surface of a pre-formed pattern recess that reaches a film to be etched that is pre-formed on a wafer placed in a processing chamber, b) etching the film to be etched with a second gas while leaving the protective film on a sidewall of the recess, and c) repeating steps a) and b). (Aspect 12) The film to be etched is SiO. ２ , TiO ２ , Al ２ O ３ a) oxidizing a surface of the pattern recess by an oxidation process to terminate with hydroxyl groups (-OH), b) controlling a supply time of a first gas to form a protective film having a thickness corresponding to one molecular layer on the surface of the pattern recess, c) etching the film to be etched with a second gas while leaving the protective film on the sidewall of the recess, and d) repeating steps a) to c). (Aspect 14) A semiconductor device manufacturing method comprising the steps of: a) oxidizing the surface of a pattern recess that is formed on a wafer placed in a processing chamber and reaches a film to be etched, by an oxidation process, to terminate the surface with hydroxyl groups (-OH), b) controlling the supply time of a first gas to form a protective film having a thickness equivalent to one molecular layer on the surface of the pattern recess, while controlling the depth, c) controlling the oxidation process time to partially remove the protective film above the pattern recess, d) etching the film to be etched with a second gas while leaving the protective film on the sidewall of the recess, and e) repeating steps a) to d). (Aspect 15) The film to be etched is SiO ２ , TiO２ , Al ２ O ３ 15. The method for manufacturing a semiconductor device according to claim 11, wherein the material is an oxide film such as SiOC, or an oxygen-containing film, a semimetal or metal such as Si, Ge, Ti, W, Mo, or Ta, or a material in which the element is added to Si such as SiGe or TaSi, or a nitride or carbide of the material such as SiN, SiC, or TiN. (Aspect 16) The semiconductor device manufacturing method according to Aspects 11 to 15, wherein the first gas is one or more of dimethylaminosilane (3R—Si—N-2CH3), bisdimethylaminosilane (2R—Si—(N—(CH3)2)2), trisdimethylaminosilane (R—Si—(N—(CH3)2)3), diethylaminosilane (3R—Si—N-2C2H5), chlorosilane (3R—Si—Cl), hexamethyldisilazane (HMDS), tetramethyldisilazane (TMDS), and bisdimethylaminodimethylsilane (DMADMS). (Aspect 17) The oxidation treatment is carried out by using O ２ Plasma treatment, O ２ Plasma downflow treatment, H ２ O plasma treatment, O ３ gassing, NO gassing, or H ２ O ２ Aspect 17. The method for manufacturing a semiconductor device according to any one of aspects 11 to 16, wherein the method is a gas treatment.

[0096] 1: Processing chamber, 2: Wafer, 3: Wafer stage, 11: Base chamber, 12: Quartz chamber, 13: Discharge area, 14: Pressure adjusting means, 15: Exhaust means, 16: Vacuum exhaust piping, 20: ICP coil, 21: High frequency power supply, 22: Matching machine, 23: Shower plate, 24: High gas dispersion plate, 25: Top plate, 26: Slit plate, 27: Flow path, 30: Electrostatic adsorption electrode, 31: DC power supply for electrostatic adsorption, 38: Chiller, 39: Coolant flow path, 50: Mass flow controller, 51: Gas distributor, 52: aminosilane-based gas supply line, 54: valve, 55: He gas, 56: protrusion for proximity cooling, 60-1, 60-2, 60-3: IR lamp, 61: reflector, 64: power supply for IR lamp, 70: thermocouple, 71: thermocouple thermometer, 72: IR light transmission window, 73: power supply for IR lamp, 74: high frequency cut filter, 101: base film, 102: film to be processed, 103: mask film, 104: recessed portion, 105: laminated film, 200: protective film, 300: side etching portion

Claims

1. A wafer processing method for processing a wafer placed in a processing chamber and having a film to be processed on its surface, the method comprising: forming a protective film that covers the sidewall of a recess formed in advance in the film to be processed from the top to a point midway between the bottom of the recess; and etching the sidewall of the film to be processed in the recess below the protective film and not covered by the protective film, the method comprising repeating the cycle multiple times.

2. A wafer processing method according to claim 1, wherein the protective film is formed by supplying one or more gases selected from HMDS, TMSDMA, TMSDEA, TMDS and DMSDMA into the processing chamber.

3. A wafer processing method according to claim 1 or 2, wherein the film to be processed is a film made of a material containing oxygen, and the wafer further comprises a film not to be processed made of a material not containing oxygen.

4. A wafer processing method according to claim 1 or 2, comprising a step of removing the protective film between the step of etching the film to be processed in one cycle and the step of forming the protective film in the next cycle.

5. A wafer processing method according to claim 1 or 2, comprising a step of oxidizing the surface of the film to be processed that constitutes the sidewall of the recessed portion before the step of forming the protective film.

6. A wafer processing method according to claim 1 or 2, comprising the step of etching the sidewall of the film to be processed after the step of removing the protective film covering the upper part of the sidewall of the recessed portion, leaving the underlying protective film.

7. A wafer processing method according to claim 5, comprising a step of oxidizing the surface of the film to be processed by using plasma in the processing chamber using a gas containing at least one of oxygen, hydrogen, and nitrogen.

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