Semiconductor device manufacturing system, and manufacturing method

Abstract

The purpose of the present invention is to provide a technique capable of improving the yield of processing.　One of the semiconductor device manufacturing systems of the present invention includes a semiconductor manufacturing apparatus and a wafer temperature calculation system. The semiconductor manufacturing apparatus is provided with: N heaters disposed in N zones disposed inside a stage in a processing chamber; and P temperature sensors disposed at predetermined measurement locations inside the stage. The wafer temperature calculation system has a storage apparatus that stores, for each of a plurality of temperature distribution conditions obtained in advance: a plurality of first correlation data that indicate correlation functions between operation states of the N heaters and temperatures at L locations on a wafer on the stage; and a plurality of second correlation data that indicate correlation functions between the operation states of the N heaters and temperatures at P locations measured by the P temperature sensors, and that are respectively paired with the plurality of first correlation data.

Description

Semiconductor device manufacturing system and manufacturing method

[0001] The present invention relates to a manufacturing system and method for semiconductor devices.

[0002] As semiconductor device structures become more three-dimensional, there is a growing demand for manufacturing technologies that can uniformly fabricate complex device structures across a wafer. In semiconductor device manufacturing, the desired pattern is formed across the entire wafer surface by repeating processes using multiple semiconductor manufacturing equipment, such as exposure equipment, heat treatment equipment, dry etching equipment, wet cleaning equipment, film deposition equipment, and CMP (Chemical Mechanical Polishing) equipment, to create chips.

[0003] Furthermore, in order to confirm that the fabricated chips are good chips that meet the desired requirements, predetermined physical quantities such as the dimensions and film thickness of the patterns of the multiple layers of films formed on the surface of the wafer are measured using semiconductor inspection equipment such as a CD-SEM (Critical Dimension Scanning Electron Microscope), an OCD (Optical Critical Dimension), a STEM (Scanning Transmission Electron Microscope), a TEM (Transmission Electron Microscope), an optical film thickness meter, or an ellipsometer.

[0004] In measurements using these semiconductor inspection devices, measurements are typically taken at multiple locations on the wafer surface rather than just one location, in order to determine the number of acceptable chips that can be obtained from the wafer surface. Furthermore, the measurement results, such as dimensions and film thickness, obtained in this manner are fed back or fed forward to each semiconductor manufacturing device to reflect the wafer processing conditions (process conditions). For example, the operation of the semiconductor manufacturing device is adjusted to achieve processing conditions that can obtain a desired wafer surface shape, thereby increasing the number of acceptable chips that can be obtained from one wafer surface and improving processing yield. In this way, each semiconductor manufacturing device is equipped with a device control method that performs feedback or feedforward control based on data measured by the semiconductor inspection device, thereby achieving the desired uniformity in the distribution of a predetermined physical quantity across the wafer surface.

[0005] One method for controlling the in-plane distribution of a predetermined physical quantity, such as pattern dimension or film thickness, within a wafer has been known to control the in-plane temperature distribution of the wafer when processed in a semiconductor manufacturing device. Patent Document 1, for example, aims to set the temperature of a heating plate so that the linewidth of a resist pattern is uniform within the wafer. It discloses the following as a temperature setting method for a heating plate, a temperature setting device for a heating plate, a program, and a computer-readable recording medium storing the program: "The heating plate of the post-exposure baking device is divided into multiple heating plate regions, and a temperature can be set for each heating plate region. Each heating plate region is assigned a temperature correction value for adjusting the temperature within the wafer placed on the heating plate. The temperature correction value for each heating plate region is calculated and set using a calculation model created from the correlation between the linewidth of the resist pattern formed by heat treatment on the heating plate and the temperature correction value. The calculation model calculates a temperature correction value that will uniform the linewidth within the wafer based on the measured linewidth of the resist pattern." Patent Literature 1 discloses a method for controlling the in-plane temperature of a thermal processing plate, which is divided into multiple regions and heated separately, to control the in-plane pattern dimensions of a wafer held above the thermal processing plate during a post-exposure baking process that promotes chemical reactions in a resist film after exposing a resist pattern with an exposure tool. It also discloses a method for calculating a target in-plane temperature distribution for forming a uniform pattern in the wafer plane from a previously acquired relationship between the temperature of the thermal processing plate and the pattern dimensions, and setting the temperature of each region of the thermal processing plate to achieve this temperature distribution. Patent Literature 2 also discloses the following regarding substrate temperature adjustment for improving CD uniformity: "A plasma etching system includes a substrate support assembly having multiple independently controllable heater regions. The plasma etching system is configured to control the etching temperature at a predetermined position to compensate for nonuniformity in pre-etching and / or post-etching critical device parameters."Patent Document 2 discloses a technology for calculating an in-plane temperature distribution in a plasma etching apparatus that will form a uniform pattern on the wafer surface from a relational expression between a previously acquired wafer temperature and pattern dimension, and controlling the output of heater power to achieve a target in-plane temperature distribution. Patent Document 3 also discloses the following content regarding dynamic temperature control of a substrate support in a substrate processing system: "A temperature-controlled substrate support for a substrate processing system includes a substrate support installed in a processing chamber. The substrate support includes N zones and N resistive heating elements, where N is an integer greater than 1. A temperature sensor is installed in one of the N zones. The controller is configured to calculate N resistances of the N resistive heating elements during operation, and to adjust power to N-1 of the N resistive heating elements during operation of the substrate processing system in response to the temperature in one of the N zones measured by the temperature sensor, the N resistances of the N resistive heating elements, and a resistance ratio of N-1." Patent Document 3 discloses a means for calculating the heater resistance value of one temperature sensor and one zone, calculating the relative temperature relationship between this one zone and the other (N-1) zones from the ratio of the heater resistance values ​​of the zones, and controlling the heater of the N zone using the detected value of the one temperature sensor as an index. Furthermore, Patent Document 4 discloses the following as a plasma processing apparatus and a plasma processing method."To provide a plasma processing apparatus or plasma processing method that improves wafer processing yield, the apparatus comprises: a processing chamber that is disposed within a vacuum vessel, inside which a wafer to be processed is placed and in which plasma is generated; a cylindrical sample stage that is disposed within the processing chamber and on whose upper surface the wafer is placed; a plurality of heaters that are disposed within the sample stage and that are disposed in three or more radial regions including circular regions that are concentrically disposed around the center on a plurality of radii in a radial direction from the center to the outer periphery and a ring-shaped region that surrounds the outer periphery of the circular region, the plurality of heaters including heaters that are disposed in each of a plurality of arc-shaped regions that are divided in a circumferential direction around the center of at least one of the ring-shaped regions; a plurality of temperature sensors that are disposed within the sample stage below each of the plurality of radial regions, the number of which is less than the number of the plurality of heaters; and a control unit that adjusts the output of the plurality of heaters in accordance with the output from the temperature sensors so as to bring the temperature of the sample stage close to a target value, and then adjusts the output of each of the plurality of heaters to a predetermined value." Patent Document 4 discloses a means for achieving both improved wafer processing yield and rapid temperature distribution change in a plasma etching apparatus by using a plurality of temperature sensors arranged in a plurality of radial regions, the number of which is less than the number of heaters, and adjusting the output of the plurality of heaters according to the output from the temperature sensors so as to bring the temperature of the sample stage closer to a target value, and then adjusting the output of each of the plurality of heaters to a predetermined value.

[0006] Japanese Patent Application Publication No. 2006-228816 Japanese Patent Application Publication No. 2013-513967 Japanese Patent Application Publication No. 2021-530109 International Publication No. 2021 / 214854

[0007] With the advancement of semiconductor technology, the above-mentioned conventional techniques have encountered new problems. Specifically, when applying the technique to calculate a target in-plane temperature distribution for forming a desired semiconductor device circuit pattern on a wafer surface from a relationship between a previously acquired wafer temperature and pattern dimension values, such as CD (Critical Dimension) values, and then adjusting the heater power output to achieve the target in-plane temperature distribution, more detailed division of the wafer surface and more precise temperature control are required. However, as the number of heater regions increases, the number of temperature sensors also increases, resulting in issues such as increased costs and difficulty in securing space for temperature sensors. As a solution to this problem, Patent Document 3 discloses a method that uses heater resistance values ​​for each zone instead of temperature sensors. While this technique is effective in controlling the uniformity of the wafer temperature, it has been revealed that the accuracy of temperature control decreases when actively imposing a temperature gradient on the wafer surface. This is due to the difference in temperature gradient between the heater and the wafer surface due to thermal diffusion within the wafer surface. While it is possible to estimate the temperature of the heater using resistance values, the temperature of the wafer portion corresponding to the heater position is affected by the ambient temperature. Meanwhile, Patent Document 4 discloses a method for controlling the in-plane temperature distribution using a thermal interference matrix that takes into account thermal crosstalk between zones. This method is divided into two steps: a feedback control step to minimize the error between the output from temperature sensors (number of which is less than the number of heaters) and the target temperature, and a heater output control step using a thermal interference matrix that indicates the temperature correlation between predetermined zones near the target temperature. While this is effective when controlling a predetermined temperature distribution before equipment operation, it has been revealed that the accuracy of temperature control decreases when the temperature distribution is changed depending on the product type or when the temperature distribution is flexibly changed depending on the physical quantities of the wafer before etching. This is also due to the fact that the correlation between zones in wafer temperature fluctuates depending on the temperature distribution conditions. As a result, deviations from the target temperature occur, resulting in circuit patterns that do not achieve the desired performance, thereby reducing processing yield.

[0008] As described above, in conventional techniques, consideration has been given to reducing the temperature difference between wafers during processing, but the yield of wafer processing when precise temperature control is required under conditions of large temperature differences has not been fully considered. An object of the present invention is to provide a technique that makes it possible to improve processing yield.

[0009] In order to solve the above-mentioned problems, one representative semiconductor device manufacturing system of the present invention is a semiconductor device manufacturing system including a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus includes N heaters arranged in N (N is a positive integer of 1 or more) zones arranged inside a stage in a processing chamber, and P (P is a positive integer equal to or less than N) temperature sensors arranged at predetermined measurement locations inside the stage, and the wafer temperature calculation system includes: a plurality of first correlation data indicating a correlation function between operating states of the N heaters and temperatures at L (L is a positive integer of 1 or more) locations on the wafer on the stage for each of a plurality of temperature distribution conditions obtained in advance; and a plurality of second correlation data indicating a correlation function between operating states of the N heaters and temperatures at P locations measured by the P temperature sensors for each of the temperature distribution conditions, and each pairing with the plurality of first correlation data; and a storage device that stores therein the data, wherein the wafer temperature calculation system adjusts the temperature of the wafer so that, in a state in which the operating states of the N heaters are controlled using the plurality of first correlation data so that the temperature of the L location on the wafer becomes a target temperature distribution, a difference between the measurement values ​​of the P temperature sensors corresponding to the temperature distribution condition and the predicted values ​​of the P temperature sensors calculated using any one of the plurality of second correlation data is minimized or becomes less than a predetermined value, or selects first correlation data from the plurality of first correlation data that pairs with the second correlation data so that a variation in the difference between the measurement values ​​of the P temperature sensors calculated at the predetermined measurement location and the predicted value calculated using the second correlation data is minimized or becomes less than a predetermined value, and adjusts the temperature of the wafer.

[0010] According to the present invention, the process yield is improved. Problems, configurations, and effects other than those described above will become apparent from the following description of the preferred embodiment of the invention.

[0011] FIG. 1 is a schematic diagram showing the configuration of a semiconductor device manufacturing system according to a first embodiment of the present invention. FIG. 2 is a vertical cross-sectional view showing the configuration of a wafer stage included in the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 3 is a plan view showing an example of the arrangement of zones on the upper surface of the wafer stage. FIG. 4 is a diagram showing the relationship between heater temperature and heater resistance. FIG. 5 is a diagram showing the correlation of temperatures for which data is acquired in advance. FIG. 6 is a flowchart for setting a temperature target value to be input to a recipe. FIG. 7 is a diagram showing pre-acquired data for calculating a temperature target value to be input to a recipe. FIG. 8 is a flowchart showing the operation of wafer temperature control according to a first embodiment. FIG. 9 is a flowchart showing the operation of wafer temperature control according to a second embodiment. FIG. 10 is a flowchart showing the operation of temperature distribution determination according to the second embodiment. FIG. 11 is a diagram showing an example of a method for selecting a thermal interference matrix according to a third embodiment. FIG. 12 is a diagram showing the correlation of temperatures for which data is acquired in advance according to a fourth embodiment. FIG. 13 is a flowchart showing the operation of wafer temperature control according to the fourth embodiment. FIG. 14 is a diagram comparing the effects of the present invention with those of the prior art.

[0012] Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to these embodiments. In addition, in the description of the drawings, identical parts are denoted by the same reference numerals. When there are multiple components having the same or similar functions, they may be described by using the same reference numerals with different subscripts. Furthermore, when it is not necessary to distinguish between these multiple components, the subscripts may be omitted. The position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc., in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0013] In this disclosure, the term "surface" may refer not only to the surface of a plate-shaped member, but also to the interface of a layer contained in the plate-shaped member that is approximately parallel to the surface of the plate-shaped member. Furthermore, the terms "upper surface" and "lower surface" refer to the surface shown at the top or bottom of a drawing of a plate-shaped member or a layer contained in the plate-shaped member. The terms "upper surface" and "lower surface" may also be referred to as "first surface" and "second surface." Furthermore, "upper" refers to the direction vertically upward when the plate-shaped member or layer is placed horizontally. The opposite direction to "upper" is referred to as "lower." Furthermore, "in-plane distribution" refers to distribution in the in-plane direction. It is also referred to as "in-plane distribution." For example, the in-plane direction (wafer in-plane direction) of a wafer (hereinafter also referred to as "wafer") refers to the position in the direction parallel to the main surface of the wafer when the wafer is placed.

[0014] [Example 1] (Configuration of manufacturing system) Figure 1 is a schematic diagram showing the configuration of a semiconductor device manufacturing system according to Example 1 of the present invention. Figure 1 shows the overall configuration of the semiconductor device manufacturing system, and shows a semiconductor wafer processing apparatus such as an etching processing apparatus that processes semiconductor wafers to achieve a distribution of a predetermined physical quantity (for example, the shape or dimensions of a circuit pattern formed on the wafer surface) in an in-plane direction of the wafer.

[0015] The semiconductor device manufacturing system of this embodiment includes a processing chamber 1010 (1010a, 1010b, ...) inside a container, a plurality of semiconductor device manufacturing apparatuses 101 (101a, 101b, ... shown in this figure) such as etching processing apparatuses, each having a wafer placed on its upper surface and a sample stage (wafer stage) capable of variably adjusting the temperature distribution in the in-plane direction of the wafer, a plurality of wafer measuring apparatuses 102 (102a to 102z) capable of measuring the distribution of a predetermined physical quantity in the wafer's plane, and a wafer temperature calculation system 100 that calculates the temperature distribution in the in-plane direction of the wafer processed in the semiconductor device manufacturing apparatus 101. In the following description, unless there is a need to distinguish between them, they will be referred to as the semiconductor device manufacturing apparatus 101 and the wafer measuring apparatus 102. Furthermore, the wafer temperature calculation system 100, the plurality of semiconductor device manufacturing apparatuses 101, and the wafer measuring apparatus 102 are communicatively connected by wired or wireless communication means so as to be able to transmit and receive signals to and from each other. For transmitting and receiving data, it is desirable that the wafer temperature calculation system 100, each semiconductor device manufacturing apparatus 101, and each wafer measurement apparatus 102 are connected to a so-called network such as Ethernet and configured to be able to communicate via the network, but any other form that allows mutual transmission and reception of data is acceptable. For example, data may be transmitted and received using recording media such as floppy disks, flash memories such as USB memory and SD cards, CDs, DVDs, and Blu-ray Discs (registered trademark).

[0016] The wafer temperature calculation system 100 also includes a computing unit 103 such as a microprocessor, a storage device 104 in which wafer-related data and software running the computing unit 103 are stored in a readable and writable manner, and an interface 105 that is communicatively connected to a network and transmits and receives signals including data, all of which are configured to be communicative. The wafer temperature calculation system 100 may be configured such that the computing unit 103, storage device 104, and interface 105 are built into a so-called computer such as a PC or server, or the storage device 104 may be located in a remote location that is communicatively connected. The semiconductor device manufacturing tools 101 and the wafer measurement tools 102 do not need to be located in the same building, but may be located in separate buildings or separate locations so as to be communicatively connected.

[0017] A wafer 205 (the wafer 205 will be described later) processed in each semiconductor device manufacturing apparatus 101 is transferred to one of the plurality of wafer measuring apparatuses 102 (102a to 102z), where a distribution of a predetermined physical quantity to be detected or evaluated is detected in an in-plane direction of the wafer 205. If necessary, the distribution of the predetermined physical quantity before processing in each semiconductor device manufacturing apparatus 101 can also be detected by one of the wafer measuring apparatuses 102. However, this is not necessarily limited to detecting the predetermined physical quantity of the processed wafer 205 immediately after processing in each semiconductor device manufacturing apparatus 101; the wafer 205 after processing in each semiconductor device manufacturing apparatus 101 may be transferred to the wafer measuring apparatus 102, where the distribution of the predetermined physical quantity in an in-plane direction of the wafer 205 is detected.

[0018] Furthermore, the surface of a wafer 205 processed in one semiconductor device manufacturing apparatus 101 can be measured using a plurality of wafer measuring apparatuses 102. That is, a wafer 205 processed in semiconductor device manufacturing apparatus 101a can be transferred to wafer measuring apparatus 102a and then to wafer measuring apparatus 102b, and the distribution of a predetermined physical quantity on the surface of the wafer 205 can be detected in each of the wafer measuring apparatuses.

[0019] (Configuration of Wafer Stage) FIG. 2 is a vertical cross-sectional view schematically illustrating the configuration of a wafer stage 200 included in a semiconductor device manufacturing apparatus according to Example 1. The wafer stage (hereinafter also referred to simply as the "stage") 200 has a disk shape passing through a central axis cl in a plan view, as described below. Because the internal structure of the wafer stage 200 is roughly symmetrical about the central axis cl, one side of the structure around the central axis cl is omitted in the illustration. The semiconductor device manufacturing apparatus (hereinafter also referred to as the "semiconductor manufacturing apparatus") 101 includes N heaters 201 arranged in N (N is a positive integer equal to or greater than 1) zones within the stage 200 in the processing chamber 1010, and P (P is a positive integer equal to or less than N) temperature sensors 206a and 206d arranged at predetermined measurement locations within the wafer stage 200. Specifically, Example 1 will be described with four heaters 201 and two temperature sensors 206a and 206d.

[0020] 2 is provided in a process chamber 1010 inside the vessel. The wafer stage 200 has a disk or cylindrical shape that shares a central axis with the central axis cl of the cylindrical process chamber 1010, and is equipped with a plurality of heaters 201 (201a to 201d) arranged inside along the upper surface of the metal base, and coolant flow paths 204 that are arranged concentrically or spirally within the base below the heaters 201 and through which a coolant for cooling the wafer flows.

[0021] By adjusting the heat generation amounts of the multiple heaters 201 and the temperature of the coolant flowing through the coolant flow passages 204, the temperature distribution in the in-plane direction of the wafer 205 is adjusted while the wafer 205 is placed and held on the upper surface of the wafer stage 200. The upper surface of the wafer stage 200 may be covered with, for example, a dielectric film. In the wafer stage 200 of this embodiment, the heaters 201 are arranged in four heater zones (four annular regions formed between concentric circles; also simply referred to as "zones") in the radial direction of the upper surface of the wafer stage 200 on which the wafer 205 is placed. For example, a concentric annular heater may be used as the heater 201. This example is not limiting, and multiple zones divided in multiple radial and circumferential directions may also be arranged. Heater power supplies 202 (202a to 202d) electrically connected to each heater 201 receive command signals from a heater control unit 203 communicatively connected thereto, and the value of the power (current, voltage) output based on the command signals is adjusted to adjust the heat generation amount and temperature of each of zones 1 to 4, and ultimately the temperature of the area of ​​the wafer 205 placed on the wafer stage 200 corresponding to zones 1 to 4. Here, if there are N heaters 201, each heater power supply 202 is assigned a number ranging from 1 to the number N of heater power supplies as a heater power supply name, so that it can be determined which zone the heater is connected to based on this number. Note that the heater power supplies may be named in any way as long as they can be distinguished from one another, but in this embodiment, positive integers ranging from 1 to N (N=4) are assigned.

[0022] In this embodiment, the wafer stage 200 is divided into zones 1 to 4. Zone 1 is a circular area located in the center of the wafer stage 200 and is a region that is mainly heated by heater 201a. The heater power supply 202a that supplies power to heater 201a is designated "1." Zone 2 is an annular area located outside of zone 1 and is a region that is mainly heated by heater 201b. The heater power supply 202b that supplies power to heater 201b is designated "2." Zone 3 is an annular area located outside of zone 2 and is a region that is mainly heated by heater 201c. The heater power supply 202c that supplies power to heater 201c is designated "3." Zone 4 is an annular area located outside of zone 2 and is a region that is mainly heated by heater 201d. The heater power supply 202d that supplies power to heater 201d is designated "4."

[0023] The predetermined measurement locations where the temperature sensors are disposed are at different positions in the radial direction of the wafer stage 200. The predetermined measurement locations are divided into at least two locations, one toward the center and one toward the end of the point 1 / 2R in the radial direction of the radius R of the wafer stage 200. The predetermined measurement locations are locations that overlap with the downward projection plane of the region of the wafer stage 200 where the heater 201 is disposed. In this embodiment, temperature sensors 206a and 206d that detect the temperature of the substrate 207 of the wafer stage 200 are disposed inside the substrate 207 below the zone. In this embodiment, two temperature sensors, 206a and 206d, are disposed at the center (corresponding to the vicinity of zone 1) and the end (corresponding to the vicinity of zone 4), respectively. In the radial direction, the center is closer to the center than the 1 / 2R position, and the end is outside the 1 / 2R position. The measurement location of the temperature sensor 206a overlaps with the downward projection plane of zone 1, and the measurement location of the temperature sensor 206d overlaps with the downward projection plane of zone 4. Furthermore, the measurement values ​​of the temperature sensors 206a and 206d are transmitted to the heater control unit 203 or the wafer temperature calculation system 100, and the measured temperature information is linked (associated) with data for setting the output of the heater power supply 202.

[0024] The coolant circulates between the coolant flow path 204 and a coolant temperature controller connected via a conduit (not shown), and is adjusted to a temperature within a predetermined range by the coolant temperature controller. If necessary, coolants set to different temperatures may be supplied to each of the multiple coolant flow paths 204. Furthermore, the wafer stage 200 can be configured without the coolant flow path 204 if sufficient temperature controllability within the wafer plane is achieved.

[0025] 2, the coolant flow path 204 through which the coolant flows is disposed below the heater 201, but the coolant flow path 204 may also be disposed above the heater. Furthermore, although not shown in FIG. 2, the wafer stage 200 may be provided with a holding mechanism such as a mechanical chuck, vacuum chuck, or electrostatic chuck that can hold the wafer 205 placed on the upper surface and prevent it from shifting.

[0026] FIG. 3 shows an example of zones on the top surface of the wafer stage 200 as viewed from above the wafer stage 200. FIG. 3 is a plan view schematically illustrating an example of the arrangement of zones on the top surface of the wafer stage. FIG. 3( a) shows an example of a pattern divided into four concentric circles in the radial direction, as in this embodiment, in which the wafer stage 200 is divided into zones 1 to 4 from the center toward the radial direction. FIG. 3( b) shows an example of a concentric pattern divided also in the circumferential direction, and FIG. 3( c) shows an example of a pattern in which the zones are divided into a grid pattern. In the example of FIG. 3( b), in addition to being divided into four concentric circles in the radial direction, the wafer stage 200 is divided into eight circumferential regions, resulting in 32 divisions. In the example of FIG. 3( c), the wafer stage 200 is divided into rectangular regions.

[0027] In this embodiment, as long as a desired temperature distribution in the in-plane direction of the wafer 205 can be achieved by appropriately selecting the shape and position of the heater 201 or the output of the heater power supply 202, the size, arrangement, and number of zones are not limited to those illustrated in Fig. 3. Similarly, the number of temperature sensors is not limited to two, and any configuration is acceptable as long as it is capable of measuring the temperature distribution in the plane direction.

[0028] (Wafer Temperature Control) In each semiconductor device manufacturing apparatus 101, a specific correlation is established between the output (heat generation amount) of each of the multiple heaters 201 or the output from the heater power supply 202, the coolant temperature value, and the temperature corresponding to each zone of the wafer 205 placed on the wafer stage 200 (hereinafter also referred to as "wafer temperature"). A specific example will be described later, but this correlation between the heater 201 and the wafer temperature is referred to as a first correlation. A specific correlation is also established between the output from the heater power supply 202, the coolant temperature value, and the measurement values ​​(detection values) of the multiple temperature sensors 206 a and 206 d placed in the wafer stage 200. This correlation is referred to as a second correlation. It is preferable to maintain multiple correlations according to previously acquired wafer temperature distribution conditions (hereinafter also referred to as "temperature distribution conditions" or simply "conditions"). For example, the first and second correlations are stored as linked data including the in-plane distribution conditions, such as a pair of first and second correlations regarding in-plane distribution condition 1, a pair of first and second correlations regarding in-plane distribution condition 2, and a pair of first and second correlations regarding in-plane distribution condition 3.

[0029] In this embodiment, such a correlation is defined as a first correlation, and data indicating the first correlation calculated or acquired in advance, and the set values ​​of the output of the heater power supply 202 and the temperature of the coolant can be used to predict the temperature distribution in the in-plane direction of the wafer 205. Alternatively, the output value of the heater power supply 202 can be estimated by setting the temperature distribution in the in-plane direction of the wafer 205 and using the first correlation.

[0030] Furthermore, multiple temperature sensors 206 a and 206 d can be arranged to detect temperatures and obtain data on the temperature gradient of the zone during processing. Furthermore, by comparing the predicted values ​​of the temperature sensors 206 a and 206 d predicted from the second correlation with the measured values ​​of the temperature sensors 206 a and 206 d during processing, the accuracy of the data on the temperature gradient of the zone can be evaluated. The evaluation of accuracy involves selecting the correlation with the smallest prediction error of the temperature sensor output from among the second correlations held as the in-plane distribution condition 1, in-plane distribution condition 2, and in-plane distribution condition 3.

[0031] (Preliminary Data Acquisition) In the present invention, the preliminary data (correlation data) used to adjust the temperature of the wafer 205 is acquired in two steps. The preliminary data includes a plurality of first correlation data (W ａ ｋ ) and a plurality of second correlation data (W ｂ ｋ ) is acquired. ａ ｋ ) and a plurality of second correlation data (W ｂ ｋ ) includes data corresponding to at least three temperature distributions of the wafer, namely, a temperature distribution in which the center is higher than the edge, a temperature distribution in which the edge is higher than the center, and a uniform temperature distribution within the wafer surface. First, the first step will be described.

[0032] The operating state of the heater 201 can be calculated using at least one of the heater temperature, heater power, and heater current. In this embodiment, the resistance value of the heater 201 (hereinafter also referred to as "heater resistance value") is used as a parameter for controlling the output of the heater 201. The heater resistance value is calculated from the heater current and heater voltage attached to the heater power supply 202. However, any means capable of measuring or calculating the heater resistance value, such as the heater current and heater voltage, may be applied to this embodiment. Generally, the electrical resistance of a material changes with temperature, and the resistance of many metal conductors increases with increasing temperature. To utilize the correlation between the resistance value of the heater 201 and the temperature of the heater 201, a conversion table between the resistance value and temperature of the heater 201 is prepared in advance. The temperature when creating the conversion table was measured using a sensor wafer for temperature measurement. The sensor wafer is, for example, a device including a substrate body having a shape similar to that of the wafer 205 and temperature sensors that measure the temperature of multiple locations on the substrate body. The relationship (conversion table) between each heater temperature of the heater 201 and each corresponding heater resistance value is calculated under conditions where a uniform temperature distribution is achieved across the wafer surface. Specifically, the measurement conditions are preferably such that there is no temperature distribution across the wafer surface on the wafer stage 200 (i.e., a condition where the temperature measured by the sensor wafer is within a predetermined temperature range (e.g., ±1°C) at every measurement point on the wafer stage 200). In this embodiment, the heater power is controlled so that the temperatures output from the sensor wafer at 30 points are uniform, and the heater resistance values ​​and the measurement values ​​of the sensor wafer at this time are obtained. The temperatures measured by the temperature sensors 206a and 206d arranged on the wafer stage 200 are also simultaneously obtained.

[0033] The reason for maintaining a uniform temperature (no temperature distribution) across the wafer surface on the wafer stage 200 is to reduce the effects of thermal diffusion in the wafer plane. When the temperature is uniform across the wafer surface, the temperatures of the heaters 201a to 201d and the temperature of the sensor wafer are approximately the same. In this embodiment, the coordinates of the center of each heater are used as representative values ​​for the heater 201. The coordinates of the heater center are the positions corresponding to the center of the heater's length (width) in the radial direction. It is preferable that the measurement points on the sensor wafer and the centers of each heater roughly coincide. However, if they do not coincide, the temperature distribution of the wafer sensor may be interpolated from the measurement values ​​of 30 points on the sensor wafer to approximate the temperature at the center of each heater.

[0034] The wafer temperature and the resistance value of heater 201 were measured using the above-mentioned procedure. Fig. 4 is a diagram showing the relationship between the sensor wafer temperature and the heater resistance value. The horizontal axis "sensor wafer temperature" indicates the temperature (measured value) of the sensor wafer, and the vertical axis "heater resistance" indicates the heater resistance value of heater 201. Fig. 4(a) shows the relationship between the temperature of the sensor wafer in zone 1 and the heater resistance value R of heater 201a calculated from heater power supply 202a. １ 4B shows the relationship between the temperature of the sensor wafer in zone 2 and the heater resistance R of the heater 201b calculated from the heater power supply 202b. ２ 4(c) shows the relationship between the temperature of the sensor wafer in zone 3 and the heater resistance R of the heater 201c calculated from the heater power supply 202c. ３ 4(d) shows the relationship between the temperature of the sensor wafer in zone 4 and the heater resistance R of the heater 201d calculated from the heater power supply 202d. ４ As shown in Figures 4(a) to (d), the resistance value of the heater 201 was obtained under the conditions that the temperature of the sensor wafer was uniform at each measurement point and the temperatures were 10°C, 30°C, and 50°C, respectively. In this example, the resistance value of each heater and the corresponding temperature of the sensor wafer showed an almost linear relationship. Therefore, a linear approximation was performed for each relationship in zones 1 to 4 (Equation (1)), and the conversion coefficients a and b shown in Figure 4(e) were calculated. Figure 4(e) corresponds to a conversion table between the heater resistance value and temperature. Rｎ indicates the resistance value of the heater (heater resistance value) in zone n (in this embodiment, n is an integer from 1 to 4). ｈ＿ｎ indicates the heater temperature in zone n. ｎ is the heater resistance R ｎ and heater temperature T ｈ＿ｎ The equation (2) shows the intercept of the relationship between the temperature T ｓｗ is uniform across the wafer surface, and the temperature T ｓｗ is the heater temperature T in zone n ｈ＿ｎ This indicates the condition that it is equal to.

[0035] The number of measurement points on the sensor wafer does not need to be limited to three, but may be at least two. When data is acquired from three or more points, a polynomial of second or higher order may be used instead of a linear one, and it is possible to select the appropriate one depending on the material property values ​​of the heater electrode and the characteristics of the acquired data.

[0036] Next, the second step of the pre-data acquisition will be described. Next, the pre-data acquisition under the condition of a temperature distribution in the wafer in-plane direction will be described. FIG. 5 is a diagram showing the correlation of the temperature for which data is acquired in advance. As in the case of creating the conversion table between the resistance value and temperature of the heater 201 shown in FIG. 4(e), the temperature T of the sensor wafer ｓｗ , heater resistance value R ｎ and the temperatures (measured values) of the temperature sensors 206a and 206d are acquired, and a table like that shown in FIG. 5 is created. In FIG. 5, four zones are used to match the number of heaters, but the number of zones on the sensor wafer may be four to match the heaters, or may be other than four to match the measurement locations on the sensor wafer. The temperatures of the temperature sensors 206a and 206d are entered in the corresponding zone columns in the table. In this embodiment, the temperature sensor measurement values ​​are entered in zone 1 and zone 4, while zone 2 and zone 3 are left blank and have no data. When entering data into the table, it is preferable to enter an average value over a certain time period to reduce the influence of noise.

[0037] At this time, data on both temperature distributions is acquired: one in which the temperature at the center of wafer stage 200 is higher than at the edges, and the other in which the temperature at the center of wafer stage 200 is lower than at the edges. For example, if the heater has a concentric structure, the heater resistance value, the temperature of the sensor wafer, and the measurement values ​​of temperature sensors 206 a and 206 d below the heater are recorded for a temperature distribution in which the temperature at the corresponding point on the sensor wafer is higher on the inside, such as (50° C. (temperature in zone 1), 40° C. (temperature in zone 2), 30° C. (temperature in zone 3), 20° C. (temperature in zone 4)), (45° C., 40° C., 35° C., 30° C.) from the center, and for another example, a temperature distribution in which the temperature is higher on the outside, such as (10° C., 20° C., 35° C., 45° C.) from the center, respectively.

[0038] In this example, as shown in FIG. 5( a), three temperature distribution patterns were generated and data was acquired under condition 1, where the temperature at the center of the sensor wafer was 25°C or more higher than the temperature at the edge. These temperature distributions were designated temperature distributions 1-1, 1-2, and 1-3. Specifically, they were (50°C, 40°C, 30°C, 20°C) (temperature distribution 1-1)) and (50°C, 40°C, 25°C, 10°C) (temperature distribution 1-2). Furthermore, as shown in FIG. 5( b), three temperature distribution patterns were generated and data was acquired under condition 2, where the temperature at the center of the sensor wafer was between 10°C and 25°C higher than the temperature at the edge. These temperature distributions were designated temperature distributions 2-1, 2-2, and 2-3. Specifically, they were (45°C, 40°C, 35°C, 30°C) (temperature distribution 2-1) and (50°C, 50°C, 45°C, 40°C) (temperature distribution 2-2). Similarly, as shown in FIG. 5( c), three patterns of temperature distributions (5-1, 5-2, 5-3) ((10°C, 20°C, 35°C, 45°C) (temperature distribution 5-1), (15°C, 30°C, 45°C, 60°C) (temperature distribution 5-2)) were generated under condition 5, where the temperature at the center of the sensor wafer was 25°C or more lower than the temperature at the edge. As shown in FIG. 5( d), three patterns of temperature distributions (4-1, 4-2, 4-3) ((10°C, 15°C, 20°C, 25°C) (temperature distribution 4-1), (15°C, 18°C, 22°C, 24°C) (temperature distribution 4-2)) were generated under condition 4, where the temperature at the center was 10°C to 25°C lower than the temperature at the edge, and data was acquired. 5(e), three patterns of temperature distribution (3-1, 3-2, 3-3) were generated under condition 3, where the temperature was uniform and there was no temperature distribution within the wafer surface: (10°C, 10°C, 10°C, 10°C) (temperature distribution 3-1), (30°C, 30°C, 30°C, 30°C) (temperature distribution 3-2), and (50°C, 50°C, 50°C, 50°C) (temperature distribution 3-3). In this way, three patterns of temperature distribution were generated under five conditions, and the data was acquired in advance.

[0039] Although not used in this example, data on discontinuous gradient conditions, such as temperatures of zones 1 to 4 being (50°C, 50°C, 50°C, 30°C), may be acquired and used as a sixth or subsequent condition in addition to the five conditions described above. This is to consider thermal diffusion in a portion of the wafer, rather than the entire wafer.

[0040] Through the above-described preliminary data acquisition process, the temperature of the sensor wafer, heater resistance values, and data of the temperature sensors 206a and 206d were acquired for five conditions: when the temperature of the sensor wafer is uniform (condition 3, temperature distributions 3-1 to 3-3); when the temperature in the center is high and the temperature difference is large (condition 1, (temperature distributions 1-1 to 1-3) and small (condition 2, temperature distributions 2-1 to 2-3); and when the temperature in the center is low and the temperature difference is large (condition 5, temperature distributions 5-1 to 5-3) and small (condition 4, temperature distributions 4-1 to 4-3).

[0041] Here, the heater resistance value was converted to the heater temperature using equation (1), and temperature data for the three elements of the sensor wafer temperature, heater temperature, and temperature sensor was obtained. Note that, in order to take into account thermal diffusion within the wafer surface, the temperature T of the sensor wafer in zone n was calculated using equation (3). ｓｗ and the heater temperature T in zone n ｈ＿ｎ Therefore, the temperature of the sensor wafer in zone 3 in temperature distribution 1-1 and zone 3 in temperature distribution 3-2 is the same at 30°C, but the heater resistance value at this time may be different, and as a result, the heater temperature T ｈ＿３ Consider that the

[0042] Next, the temperature T ｓｗ and heater temperature T ｈ The matrix showing this relationship is called W ａ The matrix W ａ is the temperature T of the sensor wafer ｓｗ and heater temperature T ｈ It is sometimes expressed as a thermal interference matrix that shows the correlation between W ａ The number of rows is equal to the number of measurement points on the sensor wafer or the number of temperature estimation points on the wafer stage 200 interpolated from the sensor wafer, and the number of columns is equal to the number of heaters arranged on the wafer stage 200. In the following description, if it is not necessary to specify a zone, the subscript n indicating the zone will be omitted.

[0043] Matrix Wａ The elements of were calculated by the following two-stage process. ａ The elements in the first row of the matrix W will be described. The first correlation data (Wak) and the second correlation data (Wbk) are calculated as a linear combination using a matrix. Specifically, the matrix W ａ Element W in the first row of ａ＿１１ is the temperature of the portion of the wafer 205 corresponding to zone 1 when heated using only the heater 201a, and element W ａ＿１２ corresponds to the temperature of the portion of the wafer 205 corresponding to zone 1 when heated using only the heater 201b. ａ The element (1) can be found by performing the procedure of measuring the temperature of the sensor wafer while operating each heater individually as described above for all heaters. Alternatively, it may be calculated by thermal simulation. Alternatively, it may be calculated by measuring the W of another device having a similar configuration to the heater 201. ａ may be used as an approximate value.

[0044] In the second process, the values ​​acquired in the first process are adjusted to the correlation when a plurality of heaters 201 are simultaneously operated in the semiconductor device manufacturing apparatus 101. The temperature data of the temperature distributions 1-1, 1-2, and 1-3 under condition 1, in which the temperature at the center is 25° C. or more higher than the temperature at the end, and the W obtained in the first process are adjusted to the correlation when a plurality of heaters 201 are simultaneously operated in the semiconductor device manufacturing apparatus 101. ａ is set as the initial value, and the matrix W is calculated so that the difference between the left and right sides of equation (5) becomes small. ａ As an example, we used the gradient descent method to fine-tune the elements of the matrix W ａ Each element of the above was corrected. m is the number of patterns of pre-acquired data, and when optimization was performed using three temperature distribution patterns under condition 1, m = 3. η is the learning rate, and W ａ new Equation (6) is repeated until convergence occurs. The converged and corrected matrix is ​​used as the matrix W for condition 1. ａ １ Let's say.

[0045] Similarly, using the data of temperature distributions 2-1, 2-2, and 2-3 under condition 2, W ａ The matrix corrected by W ａ ２By correcting the temperature distribution for each of the five conditions, the heater temperature T ｈ The matrix W estimating the wafer temperature of the wafer 205 from ａ １ ~W ａ ５ In the following description, the conditions 1 to 5 of the first correlation are indicated by superscripts, but when no distinction is made between the conditions, the superscripts are omitted.

[0046] As shown in the tables of FIGS. 5(a) to 5(e), the matrix W ａ While acquiring data to determine the elements of W, the measured values ​​of the temperature sensors 206a and 206d are also held. ａ The heater temperature T ｈ and the measured values ​​T of the temperature sensors 206a and 206d. ｓ The matrix W that shows the relationship between ｂ Find the matrix W ｂ is the measured value T of the temperature sensors 206a and 206d. ｓ and temperature T ｈ The expression "thermal interference matrix" is sometimes used to show the correlation between the matrix W ｂ The number of rows is the number of temperature sensors 206a and 206d, which is 2 in this embodiment. The number of columns is the number of heaters 201, which is 4 in this embodiment. ｈ The measured values ​​T of the temperature sensors 206a and 206d are calculated from ｓ Matrix W to estimate ｂ For each of the five temperature distribution conditions, ｂ １ ~W ｂ ５ is calculated.

[0047] The calculated W ａ １ ~W ａ ５ and W ｂ １ ~W ｂ ５ As shown in FIG. 5(f), for condition k (k is an integer between 1 and 5), the thermal interference matrix Wａ ｋ and W ｂ ｋ In this case, the thermal interference matrix W ａ ｋ and W ｂ ｋ The advance data acquisition DB may be included in a storage unit (not shown) of the semiconductor device manufacturing apparatus 101, or may be included in the storage device 104 of the wafer temperature calculation system 100. For example, the wafer temperature calculation system 100 generates a plurality of first correlation data (W ａ ｋ , (k=1, 2, ...)), and a plurality of second correlation data (W ｂ ｋ ) and a storage device 104 for storing the data. The pre-data acquisition DB is not limited to hardware, but may be configured by the cloud. This completes the pre-data acquisition process.

[0048] (Method of Calculating Wafer Temperature) Next, a method of calculating a recipe setting value for wafer temperature to be actually processed will be described with reference to Fig. 6. Fig. 6 is a flowchart for setting a target temperature value to be input into a recipe.

[0049] Here, an explanation will be given of an operation for calculating a target temperature distribution in an in-plane direction of a wafer 205 in one of semiconductor device manufacturing tools 101 using wafer temperature calculation system 100. Note that the following explanation will be given as an example of a case where semiconductor device manufacturing tool 101a is used as the target for calculating the target temperature distribution and wafer measuring tool 102a is used as the tool for detecting a predetermined physical quantity, but in the embodiments of the present invention, similar operations can be performed when other semiconductor device manufacturing tools or wafer measuring tools are used.

[0050] The wafer temperature calculation system 100 calculates the matrix W ａ and matrix W ｂ The wafer temperature calculation system 100 has a function of storing the correlation expressed by the following in a readable and writable manner in each semiconductor device manufacturing apparatus 101 and updating each data as necessary. These data are periodically transmitted and received between the wafer temperature calculation system 100 and the semiconductor device manufacturing apparatus 101, and the same data is maintained in both apparatuses. If the structure of the wafer stage 200, including the heater 201 and heater power supply 202, or the temperature of the coolant of the wafer stage 200, is changed, information related to the change is stored and memorized in the wafer temperature calculation system 100 during the periodic data transmission and reception and is reflected in its operation. This allows the shared data for any wafer 205 to be used to achieve a target temperature distribution and perform highly accurate wafer 205 processing.

[0051] First, in step 601, the wafer temperature calculation system 100 has a function of associating a process recipe used to process the wafer 205 in the semiconductor device manufacturing equipment 101a with data obtained by measuring the distribution of a predetermined physical quantity in an in-plane direction of the processed wafer 205 in the wafer measuring equipment 102a. Here, the process recipe includes data on the target in-plane temperature distribution of the wafer 205 set by the wafer stage 200 or the output values ​​and resistance values ​​of each heater power supply 202. This makes it possible to associate the temperature distribution of the wafer 205 in the semiconductor device manufacturing equipment 101a with the distribution of the predetermined physical quantity in the in-plane direction of the wafer 205 measured by the wafer measuring equipment 102.

[0052] Furthermore, if a distribution of a predetermined physical quantity in an in-plane direction of wafer 205 is detected before wafer 205 is processed in semiconductor device manufacturing equipment 101a, wafer temperature calculation system 100 also has a function of associating the data with the processing recipe of semiconductor device manufacturing equipment 101a. With this configuration, it is possible to associate the distribution of the predetermined physical quantity in the in-plane direction of wafer 205 before and after processing in semiconductor device manufacturing equipment 101a, and from the difference between the distributions of the physical quantity before and after processing, it is possible to associate the temperature distribution in the in-plane direction of the wafer set in semiconductor device manufacturing equipment 101a with the distribution of the change in the predetermined physical quantity before and after processing.

[0053] Furthermore, in step 602, the wafer temperature calculation system 100 has a function of calculating a correlation between a set value of the temperature distribution in an in-plane direction of the wafer 205 in the semiconductor device manufacturing equipment 101a and a distribution of a predetermined physical quantity in the in-plane direction of the wafer 205, and storing and memorizing this correlation as data related to the semiconductor device manufacturing equipment 101a. This correlation is referred to as a third correlation in the present disclosure. For example, prior to processing the wafer 205 to manufacture a semiconductor device, the semiconductor device manufacturing equipment 101a processes two or more wafers 205 using different temperature distribution settings, and then transfers each wafer 205 to the wafer measuring equipment 102a to detect the predetermined physical quantity, and the third correlation can be calculated using data obtained by measuring the predetermined physical quantity.

[0054] That is, the third correlation is calculated using the results of associating different temperature distribution conditions set for two or more wafers 205 with detection result data of the distribution of a predetermined physical quantity in an in-plane direction for each wafer 205. Figure 7 is a diagram related to pre-acquired data for calculating a target temperature value to be input to a recipe. Figure 7 shows measurement results for calculating the third correlation using the CD value as the physical quantity. The method of least squares using linear or polynomial approximation can be used to calculate the third correlation, but other methods may also be used.

[0055] Figure 7(a) shows the CD value in zone 1 (CD １ ) and wafer temperature TＷ＿１ The wafer temperature T Ｗ＿１ is the temperature set for Zone 1 specified in the process recipe used in the semiconductor device manufacturing equipment 101a, and CD １ is the CD value detected when the wafer 205 that has undergone the processing specified in the processing recipe is measured by the wafer measurement device 102a. Here, the three processing recipes each have a different wafer temperature T Ｗ＿１ The CD values ​​of the wafers are measured. Ｗ＿１ The line is a linear interpolation between the CD value and the desired CD value. The dotted line corresponds to the CD value to be formed in Zone 1, and a vertical dashed line is drawn to show the wafer temperature corresponding to the linearly interpolated line and the desired CD value. Also, dashed lines parallel to the horizontal axis are drawn at the upper and lower limits of the target range for CD value control.

[0056] Similarly, FIG. 7(b) shows the CD value in zone 2 (CD ２ ) and wafer set temperature T Ｗ＿２ 7(c) shows the CD value in zone 3 (CD ３ ) and wafer temperature T Ｗ＿３ 7(d) shows the CD value in zone 4 (CD ４ ) and wafer temperature T Ｗ＿４ In each case, CD values ​​are measured for three different wafer set temperatures.

[0057] FIG. 7(e) shows the relationship between the CD value and the wafer temperature T Ｗ＿１ When linearly interpolating, the slope a ｎ and intercept b ｎ The relationship shown in Fig. 7E corresponds to the third relative relationship when the predetermined physical quantity is the CD value.

[0058] Next, in step 603, wafer temperature calculation system 100 has a function of using the stored third correlation to calculate a target temperature distribution on wafer stage 200 of semiconductor device manufacturing apparatus 101a that minimizes an objective function using a predetermined physical quantity. An example of the objective function in this embodiment is one that sets target values ​​of the predetermined physical quantity on a plurality of coordinates in an in-plane direction of wafer 205, calculates the square of the difference between the target value at a specified coordinate on the surface of wafer 205 and a predicted value at that specified coordinate calculated based on the third correlation, and sums up the squared values ​​for the plurality of specified coordinates.

[0059] The target values ​​of the predetermined physical quantities used in calculating such an objective function do not necessarily have to be set to the same value in the in-plane direction of the wafer 205. Different target values ​​may be set for each coordinate in the in-plane direction of the wafer 205, for example, so that a post-processing shape can be obtained as a result of the processing. Furthermore, even if the same coordinate is set on the wafer 205, the target values ​​in the processing steps may differ depending on the type, content, and conditions of the preceding and following processes. In this manner, in this embodiment, an appropriate objective function is set, and a temperature distribution in the in-plane direction of the wafer 205 that minimizes the set objective function is calculated. A target temperature distribution during processing of the wafer 205 is calculated so that a desired distribution of physical quantities is achieved after processing.

[0060] (Processing in Wafer Temperature Calculation System) With reference to FIG. 8, a flow of processing performed in semiconductor device manufacturing apparatus 101a based on the conditions calculated in step 603 of FIG. 6 will be described. FIG. 8 is a flowchart showing the operation of wafer temperature control according to the first embodiment. Wafer temperature calculation system 100 calculates the temperature of location L of wafer 205 based on the plurality of first correlation data (W ａ ) in a state where the operating states of the N heaters 201 are controlled using the P temperature sensors 206 a and 206 d corresponding to the temperature distribution conditions, and the plurality of second correlation data (W ｂThe wafer temperature is adjusted so that the difference between the predicted values ​​of the P temperature sensors calculated using the second correlation data of any one of the above is minimized or is less than a predetermined value. ｗ A case where the temperatures are set to (50° C., 42° C., 35° C., 30° C.) will be described.

[0061] Step 801 is the wafer temperature T ｗ For example, the target value of the wafer temperature T calculated in step 603 of FIG. ｗ is input to the wafer temperature calculation system 100. When the wafer temperature is set for each zone, the wafer temperature T ｗ＿ｎ is entered.

[0062] Next, in step 802, the heater temperature T ｈ and heater resistance value R ｎ Specifically, the wafer temperature calculation system 100 calculates a target value of the matrix W ａ The equation (9) calculates the heater temperature T from the wafer temperature distribution. ｈ This is an example of calculating the wafer temperature T ｗ and a matrix W representing the first correlation ａ The heater temperature T ｈ Here, the temperature at the center (50°C in zone 1) is higher than the temperature at the edge (30°C in zone 4), with a difference of 20°C. From this, the temperature T of the sensor wafer at the time of acquiring the preliminary data can be calculated. ｓｗ and heater temperature T ｈ A matrix W indicating the relationship (first correlation) ａ Among them, W that meets condition 2 ａ ２ Using W ａ =W ａ ２ as the heater temperature T ｈ In the following description, the temperature T of the sensor wafer in equation (4) is calculated. ｓｗis closest to the temperature of the wafer 205 itself, so in equation (9) the temperature of the sensor wafer T ｓｗ is the wafer temperature T Ｗ The temperature distribution is calculated assuming this.

[0063] Subsequently, in steps 802 to 809, the operating state of the heater 201 is determined by the heater resistance value R ｎ The heater resistance value R of the heater 201 during processing is set by ｎ and extracting a plurality of first correlation data (W ａ ｋ ) the heater resistance value R calculated from any one of the first correlation data ｎ The control target R0 ｎ is set by feedback control.

[0064] First, in step 802, the heater temperature T ｈ The corresponding heater resistance value R ｎ is calculated and this value is set as the control target value.

[0065] Next, in step 803, the predicted value of the temperature sensor is calculated. As shown in equation (8), the matrix W ｂ２ , the predicted value T of the temperature detected by the temperature sensors 206a and 206d arranged below is calculated. ｓｐ Here, the predicted values ​​T ｓｐ and the measured values ​​T of the temperature sensors 206a and 206d. ｓｍ The measured values ​​T ｓｍ means the time average value of the measurement value. For example, in equation (7), the measurement value T ｓ However, since the measured value is affected by the response speed of the temperature change, the time average value is used in the following explanation. ｂ is the W used in step 802 ａ ２ To match W ｂ ２ In this embodiment, there are two temperature sensors, and the matrix W ｂ ２The predicted values ​​of the temperature sensors 206a and 206d using ｓｐ ２ ，１ , T ｓｐ ２ ，２ ) For the time average value, if the temperature is measured every 0.1 seconds, for example, it is possible to use the average value of the temperatures measured at 10 points in 1 second. The method for calculating the time average value can be set as appropriate.

[0066] The processing of the device starts, and the heater 201 of each zone is controlled in step 804. For example, the wafer temperature calculation system 100 notifies the heater control unit 203 of the target value of the heater resistance, and the heater control unit 203 controls the heater power supply 202 based on the heater resistance value. When the heater 201 is heated, the heater control unit 203 calculates the heater resistance value R of each heater. ｎ In this embodiment, the power P of the heater 201 in the zone n is calculated. ｎ and voltage V ｎ is constantly acquired, and the heater resistance value R ｎ was calculated from equation (10). However, before heating by the heater, the resistance value R ｎ Since it is not possible to calculate the measured values ​​T ｓｍ and the resistance value R ｎ Calculate.

[0067] Next, in step 805, the heater resistance value R ｎ If it is not within the target range (No), the heater resistance value R ｎ is fed back to the wafer temperature calculation system 100, and the calculator 103 that receives it calculates the heater resistance value R ｎ The calculator 103 adjusts the amount of heat generated by the heater electrode of the heater power supply 202. For example, the heater resistance value R of the zone n at time t is ｎ The calculated value of R ｎ (t), the target value is R0 ｎThen, the current I(t) supplied to the heater electrode of each heater 201 is calculated as shown in equation (11). Although equation (11) is an example of PI (Proportional-Integral) control, other control such as PID (Proportional-Integral-Differential) control may be used depending on the application. ｐ and K. ｉ is a predetermined constant.

[0068] The heater resistance value R of each heater 201 ｎ The calculated value R ｎ (t) includes two elements: the change in the temperature and resistance of the heater itself due to the change in the heater current I(t), and the change in the heater resistance affected by the wafer temperature, and these two elements cause a difference in response speed. The change in resistance affected by the wafer temperature is a relatively slow change due to heat conduction. When used for feedback control, it is desirable to include the effect of the wafer temperature, so the heater resistance value R ｎ The calculated value R ｎ In other words, the heater resistance value R ｎ has a delay time, and at time t, the heater resistance R at time (t−u) before the delay time u ｎ For example, the heater resistance value R at the current time t seconds is calculated using the error from the control target. ｎ Target value R0 of (t) ｎ The error ΔR(t) between ΔR(t) and R0 ｎ -R ｎ It is possible to set a delay of 10 seconds, such as (t-10). ｎ The calculated value R ｎ In order to reduce noise in (t), for example, the moving average value of multiple data from (t-10) seconds to (t-8) seconds is calculated as the heater resistance value R ｎ The calculated value R ｎ It may also be (t).

[0069] In the temperature control process of steps 804 and 805, the heater resistance value R ｎThe transient progress of the wafer temperature estimated using the formulas (1) and (4) may be displayed. ｎ The calculated value R ｎ (t) using equation (1), the heater temperature T ｈ It is also possible to calculate the heater resistance R ｎ is the target value R0 ｎ When the matrix W ｂ １ ~W ｂ ５ Using the above, the predicted value of each temperature sensor (T ｓｐ １ ，１ , T ｓｐ １ ，２ ), (T ｓｐ ２ ，１ , T ｓｐ ２ ，２ ), (T ｓｐ ３ ，１ , T ｓｐ ３ ，２ ), (T ｓｐ ４ ，１ , T ｓｐ ４ ，２ ), (T ｓｐ ５ ，１ , T ｓｐ ５ ，２ ) can be calculated. These predicted values ​​can also be displayed on the user interface.

[0070] Heater resistance value R ｎ If the measured values ​​T are within the target range (Yes in step 805), the process proceeds to step 806. Any two of the predetermined measurement locations are selected, and the measured values ​​and predicted values ​​of the temperature sensors are the measured values ​​and predicted values ​​corresponding to the two locations. Specifically, in step 806, the measured values ​​T of the two temperature sensors 206a and 206d are calculated. ｓｍ (T ｓｍ,１ , T ｓｍ,２The data from the temperature sensors 206a and 206d is used to estimate the in-plane gradient of the wafer temperature.

[0071] Next, in step 807, the predicted values ​​T ｓｐ and the detected value T ｓｍ As an example, the predicted values ​​of the temperatures measured by the temperature sensors 206a and 206d shown in equations (7) and (8), T ｓｌｐ ｋ (=T ｓｐ ｋ ，１ -T ｓｐ ｋ ，２ , k is the matrix W ｂ ｋ (an integer from 1 to 5 indicating the type of temperature) and a differential measurement value T ｓｌ，ｍ (=T ｓｍ，１ -T ｓｍ，２ ) and the difference ΔT ｓｌ ｋ Select the k that is the smallest, and ｂ ２ If they match (Yes in step 807), the process proceeds to the next processing step (processing step) (step 810). ｓｌ ｋ Instead of selecting k such that ｓｌ ｋ It is also possible to select k such that is less than a predetermined value.

[0072] If they do not match (No in step 807), in step 808, the difference ΔT ｓｌ ｋ The matrix W that minimizes ｂ ｋ k is displayed as a recommended value for matrix modification. ｓｌ ｋIf the temperature distribution is outside the appropriate range, an alert or the like may be displayed in step 808 to notify that the temperature distribution deviates from the setting, and a policy for improving the control may be presented, as described below. Alternatively, a first wafer may be used to select one of the first correlation data and second correlation data corresponding to the conditions, and a second wafer may be processed while being heated using the selected first correlation data and second correlation data. Specifically, in step 808, only an alert may be displayed, and the wafer may be treated as a dummy wafer and the process may proceed to the next step 810. Alternatively, in step 809, the target value of the temperature control may be updated (step 802) using a method described below, and the temperature control of step 804 may be performed again.

[0073] Next, in step 809, the target value of the temperature control is updated in accordance with the recommended value shown in step 808. The temperature of the wafer 205 is adjusted by using the plurality of first correlation data (W ａ ｋ Specifically, if k=1 is larger than k=2 in step 808, then ΔT ｓｌ ｋ If it is determined that is small, the matrix to be applied is W ａ １ and W ｂ １ Then, the process returns to step 802, and the heater resistance value R is updated using equation (9). ｎ Target value R0 ｎ (t) is updated, and the processing from step 803 onwards is carried out. Note that although Wa is expressed in matrix form, it is shown in heat map form in step 809 of Fig. 8 for ease of understanding.

[0074] (Actions and Effects) According to the above embodiment, in semiconductor device manufacturing apparatus 101 and wafer temperature calculation system 100, which use multiple heaters 201 inside wafer stage 200 to adjust the temperature and distribution of wafer 205 placed on wafer stage 200, it is determined whether the target in-plane distribution of wafer temperature is achieved using temperature sensors 206a and 206d, which are fewer than the multiple heaters 201a to 201d, and a thermal interference matrix that is more suitable for achieving the target temperature distribution is selected from the thermal interference matrices held by semiconductor device manufacturing apparatus 101 and wafer temperature calculation system 100, thereby improving processing yield.

[0075] Furthermore, using the relationship between the wafer temperature and a predetermined physical quantity acquired in advance, a target temperature distribution that will enable the formation of a desired shape in the in-plane direction of the wafer is calculated, and then the amount of power supplied to the multiple heaters that will enable the target temperature distribution is calculated. During temperature control, it is possible to detect a state in which the wafer temperature distribution deviates from the target using a small number of temperature sensors relative to the number of zones, thereby providing a means for reducing the error from the target temperature distribution and solving both the cost and installation space issues that accompany an increased number of sensors. This also prevents the temperature during wafer processing from deviating from the desired one.

[0076] [Example 2] Example 2 is a case where the predicted values ​​T ｓｐ and the detected value T ｓｍ In other words, the wafer temperature calculation system 100 uses the measurement values ​​of the P temperature sensors 206a and 206d calculated at predetermined measurement points and the second correlation data (W ｂ ｋ The second correlation data (W ) is calculated so that the variation of the difference between the predicted value calculated using the second correlation data (W ) and the predicted value calculated using the second correlation data (W ) is minimized or is less than a predetermined value. ｂ ｋ ) and the first correlation data (W ａ ｋ) is selected from the plurality of first correlation data to adjust the temperature of the wafer 205. In the following description, the same or equivalent components as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be simplified or omitted.

[0077] 9 is a flowchart showing the operation of wafer temperature control according to the second embodiment. Steps 801 to 806 and 810 in the second embodiment are the same as steps 801 to 806 and 810 in the first embodiment. Steps 807a to 809a in the second embodiment correspond to steps 807 to 809 in the first embodiment. In the second embodiment, a method of making a judgment using a temperature distribution judgment threshold (step 811) in step 807a as shown in FIG. 9 will be described. If the temperature distribution is within the allowable range, the processing throughput can be increased by omitting excessive parameter adjustment.

[0078] Fig. 10 is a flowchart showing the operation of determining the temperature distribution according to the second embodiment. Fig. 10(a) is a diagram explaining the details of step 807a, and shows the flow of determining the temperature distribution in step 807a and proceeding to more suitable temperature control in steps 808a and 809a. Fig. 10(b) to Fig. 10(d) show patterns of the magnitude relationship between the predicted values ​​and the measured values ​​of the temperature sensors 206a and 206d.

[0079] First, a judgment threshold value relating to temperature accuracy is set in step 901. Step 901 corresponds to step 811 in Fig. 9. This can also be set as a process recipe, and in this embodiment, it is set to 3°C as an example.

[0080] Next, in step 902, the temperature gradient between the two temperature sensors 206a and 206d is calculated. ｓｌｐ ２ (=T ｓｐ ２ ，１ -T ｓｐ ２ ，２ ) and T ｓｌ，ｍ (=T ｓｍ，１ -T ｓｍ，２) and judge whether the absolute value is greater than the judgment threshold value given in step 901. If it is less than the judgment threshold value (Yes in step 902), it can be judged that there is a high possibility that the in-plane temperature distribution at the temperature sensors 206a and 206d has been accurately predicted. In this case, as shown in FIG. 10(b), for example, the gradient of the temperature in the in-plane direction (temperature for each zone) is almost the same between the predicted value and the judgment value, and the difference between the predicted value and the judgment value is equal to or less than the judgment threshold value. This is the matrix W ｂ ２ This means that the prediction using matrix W ｂ ２ and the matrix W ａ ２ Similarly, it is estimated that the in-plane temperature gradient can be accurately expressed. The above corresponds to the determination in step 807a in FIG.

[0081] If the result of step 902 is greater than the determination threshold value (No in step 902), the process proceeds to step 903, where the magnitude relationship between the predicted value and the measured value is determined. ｓｌｐ ２ (=T ｓｐ ２ ，１ -T ｓｐ ２ ，２ ) and the differential measurement value T ｓｌ，ｍ (=T ｓｍ，１ -T ｓｍ，２ ) is calculated, and the difference measurement value is greater than the decision threshold, i.e., T ｓｌｐ ２ -T ｓｌ，ｍ When the temperature sensor value is less than -3, the temperature at the center is relatively higher than the predicted value. In other words, when the temperature at the center is set to be high, the actual in-plane distribution indicates that the temperature at the center is higher than expected and the gradient is larger (Fig. 10(c)). Alternatively, when the temperature at the center is set to be low, the actual in-plane distribution indicates that the relative temperature at the center is higher than expected and the gradient is smaller (Fig. 10(d)). The difference between the predicted in-plane temperature gradient and the detected sensor value is calculated using the matrix W ｂ This is dependent on the model and indicates potential for improvement.

[0082] In this example, the temperature in the center is set high. ｂ ２ It is assumed that the temperature in the center is higher than predicted using the thermal interference matrix W, and the result of the determination in step 903 is Yes. In this case, it means that the effect of heat diffusion from the center to the edge is underestimated, and the center is overheated. Therefore, as shown in step 903y, the thermal interference matrix W ｂ It is determined that it is appropriate to change the matrix W to the inner height condition. ｂ is a matrix W where the heat diffusion from the center to the edge is larger, i.e., the temperature in the center is relatively higher. ｂ １ This means that the predicted and measured in-plane distributions are more likely to match.

[0083] Conversely, the determination in step 903 is No, and the temperature gradient calculated from the temperature sensor output is smaller than T ｓｌｐ ２ -T ｓｌ，ｍ If the relationship is >3, it means that the effect of heat diffusion from the center to the edge has been overestimated. Therefore, as shown in step 903n, it is determined that it is appropriate to change the thermal interference matrix to the outer height condition. In other words, the matrix W ｂ is the smaller heat diffusion from the center to the edge. ｂ ３ This shows that the error between the predicted and measured in-plane distribution is likely to be smaller. ａ ２ , W ｂ ２ ) for (W ａ ｋ , W ｂ ｋ ) (k is 1, 3, 4, or 5) (steps 903, 903y, and 903n) corresponds to step 808a in FIG.

[0084] From the above process, a suitable thermal interference matrix (W ａ ｋ , W ｂ ｋ ) is selected in step 904. In step 905, the temperature gradient error T ｓｌｐ ｋ -Tｓｌ，ｍ is held and used as an index when repeating the matrix selection process.

[0085] Step 906 is not an essential element of the present invention, but will be described as an additional temperature adjustment flow. It is assumed that, from steps 902 and 903, the magnitude of the temperature distribution gradient within the wafer surface has become approximately the same between the predicted and measured values ​​of the temperature sensors 206a and 206d, but the predicted values ​​have shifted overall to the higher temperature side. In such a case, a process is carried out to correct the heater resistance value, which is the control target, so that the measured and predicted temperature values ​​coincide. Specifically, if the measured values ​​of the temperature sensors 206a and 206d in zone 1 are lower than the predicted values, the output of the heater 201 is increased. The temperature difference between the temperatures detected by the temperature sensors 206a and 206d is ΔT ｓ ｋ ，１ =T ｓｐ ｋ ，１ -T ｓｍ，１ (k represents the type of thermal interference matrix W ａ ｋ , W ｂ ｋ The temperature difference ΔT ｓ ｋ ，１ The temperature difference ΔT of the heater 201 corresponds to ｈ is calculated from the following equation: Note that k, which indicates the type of thermal interference matrix, is omitted in equation (13). Steps 904 to 906 correspond to step 809a in FIG.

[0086] From the correlation shown in Figure 4, this ΔT ｈ The target value of the heater resistance in step 802 is updated from R to R+ΔR, and the process proceeds to step 803 and subsequent steps.

[0087] Example 3 describes an example of determining the temperature distribution when there are three or more temperature sensors. In Example 1, the temperature sensor 206a is arranged in zone 1, and the temperature sensor 206d is arranged in zone 4. In Example 3, a state in which the temperature sensors 206a, 206c, and 206d are arranged in zones 1, 3, and 4 will be described.

[0088] In the flowchart of the wafer temperature control operation in FIG. 8 in Example 1, steps 801 to 806 are common to Example 3, except that the number of temperature sensor predicted values ​​Tp in step 803 and the number of temperature sensor outputs Ts in step 806 increase depending on the number of temperature sensors.

[0089] In the third embodiment, when there are three temperature sensors, in step 803, the predicted value (T ｓｐ １ ，１ , T ｓｐ １ ，２ , T ｓｐ １ ，３ ), (T ｓｐ ２ ，１ , T ｓｐ ２ ，２ , T ｓｐ ２ ，３ ), (T ｓｐ ３ ，１ , T ｓｐ ３ ，２ , T ｓｐ ３ ，３ ), (T ｓｐ ４ ，１ , T ｓｐ ４ ，２ , T ｓｐ ４ ，３ ), (T ｓｐ ５ ，１ , T ｓｐ ５ ，２ , T ｓｐ ５，３ ) is calculated. In step 806, the measured value T ｓｍ As (T ｓｍ，１ , T ｓｍ，２ , T ｓｍ，３ ) to obtain the

[0090] Even with three sensors, it is possible to select a thermal interference matrix that minimizes the difference between the predicted value and the measured value from the temperature gradient within the surface, as in the first embodiment. Figure 11 is a diagram showing an example of a method for selecting a thermal interference matrix according to the third embodiment. Figure 11(a) shows the W ａ ｋ and W ｂ ｋ 11(b) shows a case where the comparison is made for each matrix pair, and FIG. 11(c) shows a case where the variation between the matrix pairs is compared.

[0091] As shown in FIG. 11( a), the wafer center is set as the origin, and predicted and measured values ​​are plotted for the radial position of the temperature sensor. Linear approximation is performed using the least squares method or the like, and the thermal interference matrix pair with the closest slope between the predicted and measured values ​​is selected. In FIG. 11( a), predicted values ​​are indicated by white circles and measured values ​​by black circles. The solid line indicates the approximation curve for the predicted values, and the dashed line indicates the approximation curve for the measured values. While FIG. 11( a) shows a comparison between conditions 1 and 2, matrix pairs under other conditions are also compared in a similar manner. Alternatively, as shown in FIG. 11( b), the error for each zone can be calculated for each matrix, the variation σ (standard deviation) of the errors at the three points can be calculated, and the condition with the smallest σ can be selected.

[0092] [Embodiment 4] In this embodiment, a method of controlling the wafer temperature using heater power will be described. Fig. 12 is a diagram relating to the correlation of the temperature for which data is acquired in advance, which is related to embodiment 4. In this embodiment, the heater resistance value R ｎ Therefore, in the preliminary data acquisition, the temperature T ｓｗ , heater power P ｈ , the measured values ​​T of the temperature sensors 206a and 206d ｓ The correlation between the three parameters is obtained. Furthermore, equations (4) and (7) are replaced by equations (15) and (16).

[0093] matrix (W ａ , Wｂ ) is the same as in Example 1, but the heater power P ｈ and the measured values ​​T of the temperature sensors 206a and 206d. ｓ 13 is a flowchart showing the operation of wafer temperature control according to the fourth embodiment. It is almost the same as FIG. 8, except that step 802 ４ The target value set in is the heater power P ｈ The difference from the first embodiment is that there is no feedback from step 805 to step 804. The acquisition of the measured values ​​Ts of the temperature sensors 206a and 206d in step 806 and the temperature distribution determination in steps 807 and 808 are the same as in the first embodiment.

[0094] This embodiment has the advantage of not having feedback control, which simplifies temperature control in the heater control unit 203. Furthermore, by using the predicted values ​​and measured values ​​of the temperature sensors 206 a and 206 d, as well as gradient information between the multiple temperature sensors, it is possible to obtain more information regarding the in-plane distribution than when the temperature is simply monitored using only the measured values ​​of the temperature sensors 206 a and 206 d, and if there is a large deviation from the desired conditions, it is possible to obtain information that serves as a basis for updating the thermal interference matrix.

[0095] (Application Example) The present disclosure, which uses multiple temperature sensors, is compared with the prior art disclosed in Patent Document 3, which uses a single temperature sensor (when offset correction with respect to the sensor temperature is performed) in order to uniformly control the in-plane distribution of the wafer temperature. The results are shown in FIG. 14. FIG. 14 is a diagram comparing the effects of the present invention and the prior art. ａ １ and W ｂ １8 is applied. Step 1001 plots the predicted and measured temperature values ​​of the temperature sensor in steps 803 and 806 in FIG. 8 on top of each other. Triangular points indicate predicted values, and circular points indicate measured values ​​(detected values, actual values). Measured values ​​for the case where a temperature sensor is present are also shown for zones 2 and 3. In the prior art, a temperature sensor is placed only in zone 4, and the target value for the overall heater resistance is updated based on the temperature error in zone 4. The error between the predicted and measured values ​​of the temperature sensor after correction is minimized in zone 4 as in step 1002, but increases in zone 1. At this time, if the wafer temperature is measured, which is impossible during actual processing, the target value T ｓｗ＿４ The measured value in Zone 1 was approximately 4°C lower than the target value.

[0096] In contrast to this, in the present disclosure, in step 1001, attention is focused on the temperature difference between zone 1 and zone 4, and a thermal interference matrix W ｂ In this embodiment, W ｂ １ From W ｂ ２ When this matrix W was changed to ｂ Based on the correction of the matrix W ａ W ａ １ From W ａ ２ and the wafer temperature is measured, and the results are shown in step 1005. As shown in the graph in step 1005, the target value and the measured value are almost the same.

[0097] The present invention is not limited to the above-described embodiments, but includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations.

[0098] The following are examples of possible embodiments of the present invention, but the present invention is not limited to these. (Aspect 1) A semiconductor device manufacturing system including a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus comprises N heaters arranged in N (N is a positive integer of 1 or more) zones arranged inside a stage in a processing chamber, and P (P is a positive integer equal to or less than N) temperature sensors arranged at predetermined measurement locations inside the stage, the wafer temperature calculation system having a storage device that stores, for each of a plurality of temperature distribution conditions obtained in advance, a plurality of first correlation data indicating a correlation function between operation states of the N heaters and temperatures at L (L is a positive integer of 1 or more) locations on a wafer on the stage, and a plurality of second correlation data indicating a correlation function between operation states of the N heaters and temperatures at P locations measured by the P temperature sensors, and pairing with each of the plurality of first correlation data, and the wafer temperature calculation system having a storage device that stores, for each of a plurality of temperature distribution conditions obtained in advance, a plurality of second correlation data indicating a correlation function between operation states of the N heaters and temperatures at P locations measured by the P temperature sensors, and pairing with each of the plurality of first correlation data, and a temperature sensor for detecting a temperature distribution condition of the P temperature sensors and a temperature sensor temperature change amount of the P temperature sensors calculated using the plurality of second correlation data, the temperature sensor temperature change amount being adjusted to a predetermined value ...(Aspect 3) The semiconductor device manufacturing system according to Aspect 1 or Aspect 2, characterized in that using a first wafer, one piece of first correlation data and one piece of second correlation data corresponding to the temperature distribution condition are selected, and a second wafer is processed while being heated using the selected first correlation data and one piece of second correlation data. (Aspect 4) The semiconductor device manufacturing system according to any one of Aspects 1 to Aspect 3, characterized in that the measured values ​​and predicted values ​​of the P temperature sensors are measured values ​​and predicted values ​​corresponding to any two of the predetermined measurement locations selected from the predetermined measurement locations. (Aspect 5) The semiconductor device manufacturing system according to any one of Aspects 1 to Aspect 4, characterized in that the plurality of first correlation data and the plurality of second correlation data corresponding to the temperature distribution condition include data corresponding to at least three temperature distributions of the wafer: a temperature distribution in which the center is higher than the edge, a temperature distribution in which the edge is higher than the center, and a uniform temperature distribution within the wafer surface. (Aspect 6) The semiconductor device manufacturing system according to any one of Aspects 1 to 5, wherein the operating states of the N heaters are set by heater resistance values, and the heater resistance values ​​of the N heaters are detected during processing, and the heater resistance value calculated from any one of the plurality of first correlation data is set by feedback control using the heater resistance value as a control target. (Aspect 7) The semiconductor device manufacturing system according to any one of Aspects 1 to 6, wherein the relationship between the heater temperature of each of the N heaters and the corresponding heater resistance value is calculated under conditions in which a uniform temperature distribution is achieved across the wafer surface. (Aspect 8) The semiconductor device manufacturing system according to any one of Aspects 1 to 7, wherein the heater resistance value during processing has a delay time, and at time t, the heater resistance value at a time (t - u) before the delay time u is used to calculate an error from the control target, and the feedback control is performed. (Aspect 9) The semiconductor device manufacturing system according to any one of Aspects 1 to 8, wherein the operating states of the heaters are calculated using at least one of heater temperature, heater power, and heater current.(Aspect 10) The semiconductor device manufacturing system according to any one of Aspects 1 to 9, wherein the predetermined measurement locations are locations located at different positions in the radial direction of the stage. (Aspect 11) The semiconductor device manufacturing system according to any one of Aspects 1 to 10, wherein the predetermined measurement locations are divided into at least two locations, one on the center side and one on the end side, from a point 1 / 2R in the radial direction with respect to the radius R of the stage. (Aspect 12) The semiconductor device manufacturing system according to any one of Aspects 1 to 11, wherein the predetermined measurement location is a location that overlaps with a downward projection plane of an area of ​​the stage in which the N heaters are arranged. (Aspect 13) The semiconductor device manufacturing system according to any one of Aspects 1 to 12, wherein each of the plurality of first correlation data and each of the second correlation data is calculated as a linear combination using a matrix.(Aspect 14) A method for manufacturing a semiconductor device including a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus includes N heaters arranged in N (N is a positive integer of 1 or more) zones arranged inside a stage in a processing chamber, and P (P is a positive integer equal to or less than N) temperature sensors arranged at predetermined measurement locations inside the stage, and the wafer temperature calculation system includes a storage device that stores, for each of a plurality of temperature distribution conditions obtained in advance, a plurality of first correlation data indicating a correlation function between operation states of the N heaters and temperatures at L (L is a positive integer of 1 or more) locations on a wafer on the stage, and a plurality of second correlation data indicating a correlation function between operation states of the N heaters and temperatures at P locations measured by the P temperature sensors, and pairing with each of the plurality of first correlation data, and controls the operation states of the N heaters using the plurality of first correlation data so that the temperature at L location on the wafer becomes a target temperature distribution, a method for manufacturing a semiconductor device, comprising: adjusting the temperature of the wafer so that a difference between the measurement values ​​of the P temperature sensors corresponding to the temperature distribution condition and the predicted values ​​of the P temperature sensors calculated using any one of the plurality of second correlation data is minimized or is less than a predetermined value; or selecting first correlation data to be paired with the second correlation data from the plurality of first correlation data, and adjusting the temperature of the wafer so that a variance in the difference between the measurement values ​​of the P temperature sensors calculated at the predetermined measurement location and the predicted value calculated using the second correlation data is minimized or is less than a predetermined value.

[0099] 100: wafer temperature calculation system, 101, 101a, 101b: semiconductor device manufacturing apparatus, 102, 102a to 102z: wafer measurement apparatus, 103: calculator, 104: storage device, 105: interface, 200: wafer stage, 201, 201a to 201d: heater, 202, 202a to 202d: heater power supply, 203: heater control unit, 204: coolant flow path, 205: wafer, 206a, 206c, 206d: temperature sensor, 207: substrate, 1010: processing chamber

Claims

1. A semiconductor device manufacturing system including a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus comprises N heaters arranged in N (N is a positive integer of 1 or more) zones arranged inside a stage in a processing chamber, and P (P is a positive integer equal to or less than N) temperature sensors arranged at predetermined measurement locations inside the stage, the wafer temperature calculation system having a storage device that stores, for each of a plurality of temperature distribution conditions obtained in advance, a plurality of first correlation data indicating a correlation function between the operating states of the N heaters and the temperature at L (L is a positive integer of 1 or more) locations on a wafer on the stage, and a plurality of second correlation data indicating a correlation function between the operating states of the N heaters and the temperature at P locations measured by the P temperature sensors, and that are paired with the plurality of first correlation data, respectively, and the wafer temperature calculation system having a state in which the operating states of the N heaters are controlled using the plurality of first correlation data so that the temperature at L location on the wafer becomes a target temperature distribution, a temperature of the wafer is adjusted so that a difference between the measurement values of the P temperature sensors corresponding to the temperature distribution condition and the predicted values of the P temperature sensors calculated using any one of the plurality of second correlation data is minimized or is less than a predetermined value, or a first correlation data paired with the second correlation data is selected from the plurality of first correlation data to adjust the temperature of the wafer so that a variance in the difference between the measurement values of the P temperature sensors calculated at the predetermined measurement location and the predicted value calculated using the second correlation data is minimized or is less than a predetermined value.

2. The semiconductor device manufacturing system according to claim 1, wherein adjusting the temperature of the wafer includes updating the plurality of first correlation data for the wafer during processing.

3. The semiconductor device manufacturing system of claim 1, wherein a first wafer is used to select one of the first correlation data and second correlation data corresponding to the temperature distribution conditions, and a second wafer is heated and processed using the selected first correlation data and second correlation data.

4. A semiconductor device manufacturing system as described in claim 2 or 3, characterized in that the measured values and predicted values of the P temperature sensors are measured values and predicted values corresponding to any two of the specified measurement locations selected from the two locations.

5. A semiconductor device manufacturing system as described in claim 2 or claim 3, characterized in that the plurality of first correlation data and the plurality of second correlation data corresponding to the temperature distribution conditions include at least data corresponding to three temperature distributions of the wafer temperature: a temperature distribution in which the center is hotter than the edges, a temperature distribution in which the edges are hotter than the center, and a uniform temperature distribution across the wafer surface.

6. A semiconductor device manufacturing system as described in claim 5, characterized in that the operating states of the N heaters are set by heater resistance values, and are set by feedback control in which the heater resistance values of the N heaters during processing are detected and the heater resistance value calculated from any one of the plurality of first correlation data is used as a control target.

7. A semiconductor device manufacturing system according to claim 6, wherein the relationship between the heater temperature of each of the N heaters and the corresponding heater resistance value is calculated under conditions where a uniform temperature distribution is achieved across the wafer surface.

8. A semiconductor device manufacturing system as described in claim 7, characterized in that the heater resistance value during processing has a delay time, and at time t, the heater resistance value at time (t-u) before the delay time u is used to calculate the error from the control target and perform the feedback control.

9. The semiconductor device manufacturing system according to claim 2 or 3, wherein the operating state of the heater is calculated using at least one of heater temperature, heater power, and heater current.

10. A semiconductor device manufacturing system according to claim 2 or 3, wherein the predetermined measurement points are located at different positions in the radial direction of the stage.

11. A semiconductor device manufacturing system according to claim 2 or 3, characterized in that the predetermined measurement points are divided into at least two points, one on the center side and one on the end side, from a point 1 / 2R in the radial direction relative to the radius R of the stage.

12. A semiconductor device manufacturing system according to claim 2 or 3, characterized in that the predetermined measurement location is a location that overlaps with a downward projection plane of the area of the stage in which the N heaters are arranged.

13. The semiconductor device manufacturing system according to claim 5, wherein each of the plurality of first correlation data and each of the second correlation data is calculated as a linear combination using a matrix.

14. A method for manufacturing a semiconductor device including a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus comprises N heaters arranged in N (N is a positive integer of 1 or more) zones arranged inside a stage in a processing chamber, and P (P is a positive integer equal to or less than N) temperature sensors arranged at predetermined measurement points inside the stage, and the wafer temperature calculation system has a storage device that stores, for each of a plurality of temperature distribution conditions obtained in advance, a plurality of first correlation data indicating a correlation function between the operating states of the N heaters and the temperature at L (L is a positive integer of 1 or more) locations on the wafer, and a plurality of second correlation data indicating a correlation function between the operating states of the N heaters and the temperature at P locations measured by the P temperature sensors, and pairing with each of the plurality of first correlation data, and controls the operating states of the N heaters using the plurality of first correlation data so that the temperature at L location on the wafer becomes a target temperature distribution, a method for manufacturing a semiconductor device, comprising: adjusting the temperature of the wafer so that a difference between the measurement values of the P temperature sensors corresponding to the temperature distribution condition and the predicted values of the P temperature sensors calculated using any one of the plurality of second correlation data is minimized or is less than a predetermined value; or selecting first correlation data to be paired with the second correlation data from the plurality of first correlation data, and adjusting the temperature of the wafer so that a variance in the difference between the measurement values of the P temperature sensors calculated at the predetermined measurement location and the predicted value calculated using the second correlation data is minimized or is less than a predetermined value.

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