Semiconductor device and method for manufacturing the same

Abstract

The semiconductor device (100) of the present disclosure comprises a printed circuit board (10) having a plurality of holes (40, 40a) that penetrate the printed circuit board (10) and have circular or rectangular openings (41) arranged in a predetermined pattern on a surface of the printed circuit board (10), and having at least a semiconductor chip (15) and other components arranged on a surface of the printed circuit board (10), and a molded resin layer (20) formed on the surface of the printed circuit board (10) and in the holes (40, 40a).

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]

[0002] In order to ensure the mechanical and thermal stability of semiconductor devices, a packaging technique is generally used in which a printed circuit board is molded with resin or the like. The application of molding improves the reliability, mechanical strength, environmental resistance, etc. of the semiconductor device. In addition, the semiconductor device can be protected from the influence of various external factors.

[0003] In a molded semiconductor device, a semiconductor chip is placed on a printed circuit board made of an insulating material such as epoxy resin, the semiconductor chip and the electrode pattern are electrically connected by wires, and the printed circuit board is molded with molding resin to protect the semiconductor chip. As the molding resin, generally, epoxy resin, plastic materials such as silicone, ceramic materials, etc. are used. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 5971566 Summary of the Invention [Problem to be solved by the invention]

[0005] In a semiconductor device in which a printed circuit board is molded with a mold resin, the printed circuit board and, in turn, the semiconductor device may be warped or bent due to the difference in linear expansion coefficient between the printed circuit board and the mold resin layer. If the semiconductor device is warped or bent, the mold resin layer may peel off from the printed circuit board, which may result in a loss of reliability of the semiconductor device.

[0006] To address the problem of warping in semiconductor devices, for example, Patent Document 1 discloses a wireless module that uses a connection member to reduce warping and bending of the wireless module. However, even with this configuration, there is a risk that warping and bending may not be reduced sufficiently.

[0007] The present disclosure has been made to solve the above-mentioned problems, and has an object to provide a semiconductor device and a method for manufacturing the semiconductor device that are less prone to warping and bending and have excellent reliability. [Means for solving the problem]

[0008] The semiconductor device according to the present disclosure includes: a substrate having a plurality of holes arranged in a surface thereof and having at least a semiconductor chip arranged on a surface thereof; a mold resin layer formed on the surface of the substrate and in the hole; 、 The plurality of holes are characterized in that they have a cylindrical portion penetrating from the front side to the back side of the substrate, and a portion formed obliquely from a side surface of the cylindrical portion toward the front side of the substrate. .

[0009] A method for manufacturing a semiconductor device according to the present disclosure includes: disposing at least a semiconductor chip on a surface of a substrate; a step of pressing the substrate against a curved surface portion made of metal to provide the substrate with a warp having a preset curvature; and a step of integrally molding the warped substrate with a molding resin at a temperature of 140° C. or more and 250° C. or less, The present invention is characterized in that warping of the substrate is suppressed when the substrate is returned to room temperature after integral molding. Effect of the Invention

[0010] According to the semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure, it is possible to obtain a semiconductor device and a method for manufacturing the semiconductor device that are highly reliable and further reduce warping and bending. [Brief description of the drawings]

[0011] [Figure 1]1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Diagram 2] 1A to 1C are schematic diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment. [Diagram 3] 1A to 1C are schematic diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment. [Figure 4] 1A to 1C are schematic diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment. [Diagram 5] 1 is a cross-sectional view illustrating a portion of a semiconductor device according to a first embodiment. [Figure 6] 6A and 6B are schematic diagrams showing an arrangement of holes provided in a substrate of the semiconductor device according to the first embodiment. [Figure 7] 2 is a schematic diagram showing an arrangement of holes provided in a substrate of the semiconductor device according to the first embodiment. FIG. [Figure 8] 8A and 8B are schematic diagrams showing the arrangement of holes provided in a substrate of the semiconductor device according to the first embodiment. [Figure 9] 2 is a schematic diagram showing an arrangement of holes provided in a substrate of the semiconductor device according to the first embodiment. FIG. [Figure 10] 2 is a schematic diagram showing an arrangement of holes provided in a substrate of the semiconductor device according to the first embodiment. FIG. [Figure 11] 11A and 11B are schematic diagrams showing the arrangement of holes provided in a substrate of the semiconductor device according to the first embodiment. [Figure 12] 12A and 12B are schematic diagrams showing the arrangement of holes provided in the substrate of the semiconductor device according to the first embodiment. [Figure 13] 13A, 13B, and 13C are cross-sectional views of a hole provided in a substrate of the semiconductor device according to the first embodiment. [Figure 14] 3 is a cross-sectional view of a hole provided in a substrate of the semiconductor device according to the first embodiment. [Figure 15] 3A to 3C are schematic diagrams showing various shapes of an opening of a hole provided in a substrate of a semiconductor device according to a first embodiment. [Figure 16] 10A to 10C are schematic diagrams illustrating a method for manufacturing a semiconductor device according to a second embodiment. [Figure 17] 11A to 11C are schematic diagrams illustrating a method for manufacturing a semiconductor device according to a third embodiment. [Figure 18] FIG. 11 is a cross-sectional view of a semiconductor device manufactured by a method for manufacturing a semiconductor device according to a third embodiment. [Figure 19] FIG. 11 is a diagram showing an example of the layer thickness of each layer constituting a printed circuit board of a semiconductor device manufactured by a manufacturing method for a semiconductor device according to a third embodiment. [Figure 20] 13A to 13C are diagrams illustrating the results of a simulation of warpage of a substrate caused by the manufacturing method of a semiconductor device according to the third embodiment. [Figure 21] 11A to 11C are diagrams illustrating simulation results of warpage of a substrate according to a comparative example. [Figure 22] 13A to 13C are diagrams illustrating the results of a simulation of warpage of a substrate caused by the manufacturing method of a semiconductor device according to the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Embodiment 1 <Structure of Semiconductor Device> 1 is a cross-sectional view of a semiconductor device 100 according to embodiment 1. The semiconductor device 100 includes a printed circuit board 10 having a hole 40 arranged in its surface, a semiconductor chip 15 arranged on a pattern 11a made of a copper layer on the surface of the printed circuit board 10 via an adhesive member 11c, a wire 12 having one end wire-bonded to the semiconductor chip 15 and the other end wire-bonded to a pattern 11b made of a copper layer, and a molded resin layer 20 formed so as to cover the surface of the printed circuit board 10.

[0013] The printed circuit board 10 has a rectangular shape when viewed from above, that is, in a plan view. However, the shape of the printed circuit board 10 is not limited to a rectangle, and may have a more complicated shape.

[0014] Specific examples of the printed circuit board 10 include a glass epoxy board, a multilayer wiring board, an organic board, a circuit board, and a high-frequency circuit board. A lead frame may be used instead of the printed circuit board 10. The printed circuit boards and lead frames listed above are collectively called a board.

[0015] <Method of Manufacturing Semiconductor Device> An outline of the method for manufacturing the semiconductor device 100 according to the first embodiment will be described below. Figures 2 to 4 are schematic diagrams for explaining the method for manufacturing the semiconductor device 100 according to the first embodiment.

[0016] First, the semiconductor chip 15, matching components, etc. are mounted on the printed circuit board 10. Fig. 2 is a schematic view of the printed circuit board. In Fig. 2, the semiconductor chip 15 and other components are omitted.

[0017] After mounting, a molded resin layer 20 is formed so as to cover the entire surface of the printed circuit board 10. Fig. 3 is a schematic view of the printed circuit board 10 and the molded resin layer 20 after being integrally molded.

[0018] The printed circuit board 10 on which the molded resin layer 20 is formed is separated into individual pieces 100a corresponding to the individual semiconductor devices 100 as shown in Fig. 4, thereby completing the semiconductor devices 100. The above is an overview of the manufacturing method for the semiconductor device 100 according to the first embodiment.

[0019] <Printed circuit board structure> The printed circuit board 10 constituting the semiconductor device 100 according to the first embodiment is provided with a plurality of holes 40 penetrating the printed circuit board 10. When the molded resin layer 20 is formed on the printed circuit board 10, some of the molten molded resin flows into the holes 40 and hardens inside the holes 40. Fig. 5 is a cross-sectional view showing a part of the semiconductor device 100 after the molded resin layer 20 is formed on the printed circuit board 10.

[0020] As the molding resin that flows into the hole 40 hardens inside the hole 40, the adhesion between the printed circuit board 10 and the molding resin layer 20 is strengthened, thereby preventing the molding resin layer 20 from peeling off from the printed circuit board 10.

[0021] <Arrangement of holes in printed circuit board> The arrangement of the holes 40 in the printed circuit board 10 will be described below with reference to FIGS.

[0022] The printed circuit board 10a shown in FIG. 6A is characterized in that the holes 40, each having a circular opening 41 on the front side of the printed circuit board 10a, are arranged in a lattice pattern on the surface of the printed circuit board 10a. By uniformly arranging the holes 40 in the printed circuit board 10a, it is possible to prevent the molded resin layer 20 from peeling off from the printed circuit board 10a throughout the semiconductor device 100. The openings 41 may be elliptical. The holes 40 penetrate the printed circuit board 10a from the front side to the back side while maintaining the shape of the openings 41 as a cross-sectional shape. However, the cross-sectional shape may be partially enlarged, that is, changed, inside the holes 40. The multiple holes 40 may be arranged at equal intervals as shown in FIG. 6A, but they do not necessarily have to be arranged at equal intervals.

[0023] The printed circuit board 10b shown in FIG. 6B is characterized in that a plurality of arrays of a plurality of hole portions 40, each having a circular opening 41 on the front side of the printed circuit board 10b, are arranged in a row parallel to one side of the printed circuit board 10b within the plane of the printed circuit board 10b, and the pitch of the hole portions 40 is shifted by a preset distance between the even-numbered arrays and the odd-numbered arrays from the one side of the printed circuit board 10b.

[0024] 6B, in an even-numbered array from one end of the printed circuit board 10b, a hole 40 in the even-numbered array is located at a position corresponding to the midpoint between two consecutive holes 40 in the adjacent odd-numbered array. In each array, a plurality of holes 40 are arranged in a row at equal intervals, but they do not necessarily have to be arranged at equal intervals. By arranging the holes evenly in the printed circuit board 10b, it is possible to prevent peeling of the molded resin layer 20 from the printed circuit board 10b over the entire semiconductor device 100.

[0025] The printed circuit board 10c shown in Fig. 7 is characterized in that a plurality of holes 40, each having a circular opening 41 on the front side of the printed circuit board 10c, are arranged along each side of the rectangle of the printed circuit board 10c. The plurality of holes 40 may be arranged at equal intervals as shown in Fig. 7, but they do not necessarily have to be arranged at equal intervals. By arranging the holes 40 only on the outer periphery of the printed circuit board 10c, a space for mounting components can be secured in the center of the printed circuit board 10c, which not only prevents peeling of the molded resin layer 20 over the entire semiconductor device 100, but also has a synergistic effect of improving component mounting efficiency.

[0026] The printed circuit board 10d shown in Fig. 8A is characterized in that a plurality of holes 40, each having a circular opening 41 on the front side of the printed circuit board 10d, are arranged along the two long sides of the printed circuit board 10d. The plurality of holes 40 may be arranged at equal intervals as shown in Fig. 8A, but are not necessarily required to be arranged at equal intervals.

[0027] The printed circuit board 10e shown in Fig. 8B is characterized in that a plurality of holes 40, each having a circular opening 41 on the front side of the printed circuit board 10e, are arranged along two short sides of the printed circuit board 10e. The plurality of holes 40 may be arranged at equal intervals as shown in Fig. 8B, but are not necessarily required to be arranged at equal intervals.

[0028] In other words, it can be said that the printed circuit board 10d shown in FIG. 8A and the printed circuit board 10e shown in FIG. 8B have a plurality of holes 40 arranged at equal intervals along two opposing sides of the four rectangular sides of the printed circuit board.

[0029] Arranging multiple holes 40 as in the printed circuit board 10d shown in FIG. 8A or the printed circuit board 10e shown in FIG. 8B not only prevents peeling of the molded resin layer 20 from the printed circuit board 10e throughout the semiconductor device 100, but also produces a synergistic effect of further improving component mounting efficiency.

[0030] 9 is characterized in that the four holes 40 are arranged at the four corners of the rectangle of the printed circuit board 10e. By arranging the holes 40 only at the four corners, in addition to the effect of preventing peeling of the molded resin layer 20 over the entire semiconductor device 100, a synergistic effect of further improving component mounting efficiency is achieved.

[0031] The printed circuit board 10g shown in FIG. 10 is characterized in that a rectangular printed circuit board 10e is virtually divided into two virtual rectangles of the same area, and holes 40 are arranged along each side of the virtually divided virtual rectangle.

[0032] 10, the rectangular printed circuit board 10g is virtually divided into two virtual rectangles of the same area, but the division is not limited to two virtual rectangles, and the printed circuit board may be divided into more than two virtual rectangles. In other words, it is sufficient that the printed circuit board is virtually divided into a plurality of virtual rectangles of the same area, and a plurality of holes are arranged along each side of the virtually divided virtual rectangles.

[0033] Arranging the holes 40 in the printed circuit board 10g as shown in FIG. 10 not only prevents peeling of the molded resin layer 20 from the printed circuit board 10g throughout the semiconductor device 100, but also has the synergistic effect of improving the efficiency of component mounting in the center of the printed circuit board.

[0034] 11A is characterized in that the opening 41a on the front side of the printed circuit board 10h is arranged such that the long sides of the two rectangular holes 40a are aligned along the two long sides of the rectangular printed circuit board 10h. Note that the shape of the opening 41a on the front side does not need to be strictly rectangular, and it may be an elongated shape that follows the long sides of the printed circuit board 10h.

[0035] 11B is characterized in that the opening 41a on the front side of the printed circuit board 10i is arranged such that the long sides of the two rectangular holes 40a are aligned along the two short sides of the rectangular printed circuit board 10i. Note that the shape of the opening 41a on the front side does not need to be strictly rectangular, and it may be an elongated shape that follows the short sides of the printed circuit board 10h.

[0036] In other words, the printed circuit board 10h shown in FIG. 11A and the printed circuit board 10i shown in FIG. 11B can be said to be arranged such that the long sides of each of the two hole portions 40a, each of which has a rectangular opening, are arranged along two opposing sides of the four sides of the printed circuit board.

[0037] By applying the printed circuit board 10h shown in Fig. 11A and the printed circuit board 10i shown in Fig. 11B, the ratio of the molded resin embedded inside the printed circuit board can be increased, so that the linear expansion coefficient of the printed circuit board approaches the linear expansion coefficient of the molded resin. In other words, by arranging the pattern of the hole portion 40a so that the amount of molded resin embedded inside the printed circuit board is increased as much as possible, the effect of reducing the warpage of the semiconductor device is achieved.

[0038] The printed circuit board 10j shown in FIG. 12A is characterized in that the opening 41a on the front side of the printed circuit board 10j is arranged so that the long sides of the two rectangular hole portions 40a run along the two long sides of the rectangular printed circuit board 10j, the opening 41b on the front side of the printed circuit board 10j is arranged so that the long sides of the four rectangular hole portions 40b run along the direction along the two short sides of the printed circuit board 10j, and the distance between the second hole portion 40b and the third hole portion 40b is greater than the distance between the first hole portion 40b and the second hole portion 40b and the distance between the third hole portion 40b and the fourth hole portion 40b.

[0039] In other words, the opening 41a on the front side of the printed circuit board 10j is characterized in that the long sides of the two rectangular hole portions 40a are each arranged along two opposing sides of the four sides of the printed circuit board 10j, and the long sides of the four or more hole portions 40b are each arranged along the other two sides of the printed circuit board 10j, and the spacing between the hole portions 40b in the center of the printed circuit board 10j is greater than the spacing between the hole portions 40b in the peripheral part of the printed circuit board 10j.

[0040] The printed circuit board 10k shown in FIG. 12B is characterized in that the opening 41c on the front side of the four holes 40c each having a rectangular shape is arranged so that the long sides of each of the four holes 40c are aligned along the four sides of the rectangular printed circuit board 10k.

[0041] By applying the printed circuit board 10j shown in Fig. 12A and the printed circuit board 10k shown in Fig. 12B, the ratio of the molded resin embedded inside the printed circuit board can be increased, so that the linear expansion coefficient of the printed circuit board approaches the linear expansion coefficient of the molded resin. In other words, by arranging the pattern of the hole portion 40 so that the amount of molded resin embedded inside the printed circuit board is increased as much as possible, in addition to the effect of reducing the warp of the semiconductor device, a synergistic effect of improving the component mounting efficiency in the center of the printed circuit board is achieved.

[0042] <Cross-sectional shape of hole in printed circuit board> In the above description, the opening 41 of the hole 40 is circular, and the hole 40 is cylindrical in the depth direction of the printed circuit board 10. However, in order to further prevent the molded resin layer 20 from peeling off from the printed circuit board 10, a hole having a cross-sectional shape as described below may be used.

[0043] 13A is characterized in that opening 46 on the back side of printed circuit board 10 has a larger opening area than opening 45 on the front side of printed circuit board 10. In other words, it can be said that opening 46 on the back side of printed circuit board 10 has a larger area than opening 45 on the front side of hole 40d in the direction perpendicular to the front surface of printed circuit board 10.

[0044] By applying the hole 40d having the cross-sectional shape shown in FIG. 13A, the molding resin adheres more closely to the bottom side of the hole 40d, thereby further enhancing the effect of preventing peeling of the molding resin layer 20 from the printed circuit board 10 in the semiconductor device 100.

[0045] Hole 40e shown in FIG. 13B has a portion 47 having a larger cross-sectional area than opening 41b on the front side of printed circuit board 10, which is provided midway through the cylindrical portion extending from opening 45a on the front side of hole 40e to opening 46a on the back side.

[0046] By applying the hole 40e having the cross-sectional shape shown in FIG. 13B, the molding resin adheres more closely at the portion 47 of the hole 40e, thereby further enhancing the effect of preventing peeling of the molding resin layer 20 from the printed circuit board 10 in the semiconductor device 100.

[0047] Hole 40f shown in Fig. 13C is characterized in that, in addition to the structure of hole 40e having the cross-sectional shape shown in Fig. 13B, hole 40f is blocked on the back surface side of printed circuit board 10, i.e., has bottom surface 46b. In other words, hole 40f is characterized in that it has bottom surface 46b at a position that is a preset depth from opening 45a on the front surface side of printed circuit board 10.

[0048] By applying the hole 40f having the cross-sectional shape shown in FIG. 13C, the adhesion between the molded resin and the hole 40f is further improved, thereby further enhancing the effect of preventing peeling of the molded resin layer 20 from the printed circuit board 10 in the semiconductor device 100.

[0049] Hole portion 40g shown in FIG. 14 is characterized by having a cylindrical portion penetrating from the front side to the back side of printed circuit board 10, and portion 47a consisting of a space formed obliquely from the side surface of the cylindrical portion toward the front side of printed circuit board 10.

[0050] By applying the hole 40g having the cross-sectional shape shown in FIG. 14, the molding resin adheres more closely at the portion 47a of the hole 40g, thereby further enhancing the effect of preventing peeling of the molding resin layer 20 from the printed circuit board 10 in the semiconductor device 100.

[0051] <Shape of the hole opening> In the above description, the shape of the opening of the hole is generally circular or rectangular. However, various shapes such as those shown in FIG.

[0052] The shape of the opening of the hole may be, as shown in FIG. 15, a rectangular opening 48a, a triangular opening 48b, a pentagonal opening 48c, a hexagonal opening 48d, an octagonal opening 48e, a crescent-shaped opening 48f, a double ring-shaped opening 48g, a cross-shaped opening 48h, an opening 48i with round trips at the corners of a cross, a star-shaped opening 48j, an opening 48k in the shape of two overlapping circles, an elliptical opening 48l, or the like.

[0053] <Advantages of the First Embodiment> As described above, according to the semiconductor device of embodiment 1, by arranging a plurality of holes within the surface of the substrate, adhesion with the molded resin layer is improved, and peeling of the molded resin layer from the substrate can be prevented, thereby providing an effect of obtaining a semiconductor device with excellent reliability.

[0054] Embodiment 2 16 is a schematic diagram showing a method for manufacturing a semiconductor device according to the second embodiment. The method for manufacturing a semiconductor device according to the second embodiment will be described below.

[0055] First, components required for the semiconductor device 100, such as semiconductor chips and electronic components, are arranged on the surface of the printed circuit board 50.

[0056] The printed circuit board 50 on which the semiconductor chip 15 and the like are arranged is pressed against a curved surface portion made of metal, thereby forming a warp having a preset curvature in the printed circuit board 50. An example of the curved surface portion made of metal is a curved surface portion of a metal mold having a curved portion. As a result of this processing, the printed circuit board 50 is in a warped state at room temperature, i.e., about 25°C.

[0057] The warped printed circuit board 50 is integrally molded with a molding resin at a temperature of 140° C. or more and 250° C. or less.

[0058] After integral molding with the mold resin, the printed circuit board 50 covered with the mold resin layer 20 is returned to room temperature, that is, about 25°C.

[0059] When the temperature is returned to room temperature, that is, about 25° C. after integral molding, the mold resin shrinks, and warping of the printed circuit board 50 before integral molding is suppressed after integral molding. As a result, peeling of the mold resin from the printed circuit board 50 due to warping of the printed circuit board 50 can be prevented.

[0060] <Effects of the Manufacturing Method of the Semiconductor Device According to the Second Preferred Embodiment> As described above, according to the manufacturing method of the semiconductor device of the second embodiment, the substrate before integral molding is processed to have a warp, and then the substrate and the molded resin are integrally molded at high temperature. Therefore, warping of the substrate is suppressed after integral molding, and peeling of the molded resin layer from the substrate can be prevented. As a result, a semiconductor device with excellent reliability can be obtained.

[0061] Embodiment 3 17 is a schematic diagram showing a method for manufacturing a semiconductor device according to embodiment 3. The method for manufacturing a semiconductor device according to embodiment 3 will be described below.

[0062] First, the printed circuit board 51 is made to have a multi-layer structure in which a plurality of materials having different linear expansion coefficients are laminated. In an example of the printed circuit board 51 shown in FIG. 17, the printed circuit board 51 is made to have a multi-layer structure in which a first member 51a, a second member 51b, a third member 51c, and a fourth member 51d made of materials having different linear expansion coefficients are laminated. However, it is not necessary that all the members are made of different materials, and it is sufficient that the printed circuit board 51 is made of members made of at least two kinds of materials having different linear expansion coefficients. By making the printed circuit board 51 to have a multi-layer structure, the printed circuit board 51 is provided with a warp having a preset curvature.

[0063] On the surface of the printed circuit board 51, components required for the semiconductor device, such as semiconductor chips, are arranged.

[0064] The warped printed circuit board 51 is integrally molded with a molding resin at a temperature of 140° C. or more and 250° C. or less.

[0065] After the printed circuit board 51 and the mold resin are integrally molded, the printed circuit board 51 covered with the mold resin layer 20 is returned to room temperature, that is, about 25°C.

[0066] When the temperature is returned to room temperature, that is, about 25° C. after integral molding, the molding resin shrinks, and warping of printed circuit board 51 before integral molding is suppressed after integral molding. As a result, peeling of the molding resin from printed circuit board 51 due to warping of printed circuit board 51 can be prevented.

[0067] FIG. 18 is a cross-sectional view of a semiconductor device 150 having a printed circuit board 51 with a multi-layer structure made of materials with different linear expansion coefficients.

[0068] The semiconductor device 150 comprises a printed circuit board 51, a semiconductor chip 15 arranged on a pattern 11a made of a copper layer on the surface of the printed circuit board 51 via an adhesive material 11c, a wire 12 having one end wire-bonded to the semiconductor chip 15 and the other end wire-bonded to a pattern 11b made of a copper layer, a solder resist 16a formed on the printed circuit board 51, and a molded resin layer 20 formed to cover the surface of the printed circuit board 51.

[0069] As shown in Fig. 18, the printed circuit board 51 has a multi-layer structure including copper layers 31a, 31b, 31c, and 31d, core materials 32a and 32b, and prepregs 33a, 33b, and 33c. A solder resist 16b and a copper layer 31e are formed on the back side of the printed circuit board 51. Fig. 19 shows an example of the thickness of each layer. When viewed from above, that is, in a plan view, the printed circuit board 51 has a rectangular shape. However, the shape of the printed circuit board 51 is not limited to a rectangle, and may have a more complicated shape.

[0070] The linear expansion coefficients of the copper layers 31a, 31b, 31c, and 31d, the core materials 32a and 32b, and the prepregs 33a, 33b, and 33c constituting the printed circuit board 51 are different from each other. Therefore, at room temperature, that is, about 25°C, the printed circuit board 51 warps due to the difference in the linear expansion coefficients of the copper layers, the core materials, and the prepregs constituting the printed circuit board 51. The amount of warping, that is, the curvature, of the printed circuit board 51 can be adjusted by appropriately setting various parameters of the multi-layer structure. In other words, it is possible to manufacture a printed circuit board 51 having a warp with a preset curvature. The core materials and the prepregs are glass fiber cloths impregnated with resin such as epoxy resin. In general, the linear expansion coefficients of the core and the prepregs are smaller than the linear expansion coefficient of copper.

[0071] The results of a simulation of the effect of the manufacturing method of the semiconductor device according to the third embodiment are described below. Fig. 20 shows the results of a simulation that shows that by forming a multi-layer structure for the printed circuit board based on the manufacturing method of the semiconductor device according to the third embodiment, the warping of the printed circuit board that is warped at room temperature before integral molding, i.e., at about 25°C, is suppressed after integral molding with the mold resin. After integral molding, the printed circuit board has an almost flat shape.

[0072] Fig. 21 shows the results of a simulation performed at room temperature, i.e., about 25°C, for a comparative example, in which a flat printed circuit board without warping before integral molding is integrally molded with a mold resin. It can be seen that warping occurs in the printed circuit board after integral molding.

[0073] FIG. 22 shows the results of a simulation confirming that, assuming that the temperature during manufacturing of a printed circuit board is 170°C and the printed circuit board is flat, if the temperature is lowered to room temperature, that is, to about 25°C, a printed circuit board can be produced in which the prepreg side, which is the back side of the printed circuit board, is convexly warped.

[0074] <Effects of the Manufacturing Method of the Semiconductor Device According to the Third Preferred Embodiment> As described above, according to the manufacturing method for a semiconductor device of the third embodiment, the substrate is made of a multi-layer structure made of materials having different linear expansion coefficients, so that the substrate is warped before being integrally molded, and the substrate and molded resin are integrally molded at high temperature. Therefore, warping of the substrate is suppressed after integral molding, and peeling of the molded resin layer from the substrate can be prevented. As a result, a manufacturing method for a semiconductor device with excellent reliability can be obtained.

[0075] Although the present disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations.

[0076] Therefore, countless modifications not illustrated are assumed within the scope of the technology of the present disclosure, including, for example, modifying, adding, or omitting at least one component, and further, extracting at least one component and combining it with a component of another embodiment. [Explanation of symbols]

[0077] 10, 10a, 10b, 10c, 10d, 10e, 10f, 10g, 10h, 10i, 10j, 10k, 50, 51 printed circuit board, 11a, 11b pattern, 11c adhesive material, 12 wire, 15 semiconductor chip, 16a, 16b solder resist, 20 mold resin layer, 31a, 31b, 31c, 31d, 31e copper layer, 32a, 32b core material, 33a, 33b, 33c prepreg, 40, 40a, 40b, 40c, 40d, 40e, 40f, 40g hole, 41, 41a, 41b, 41c opening, 45, 45a opening on the front side, 46, 46a opening on the back side, 46b bottom surface, 47, 47a Part, 48a square opening, 48b triangular opening, 48c pentagonal opening, 48d hexagonal opening, 48e octagonal opening, 48f crescent opening, 48g double ring opening, 48h cross opening, 48i opening with round trip at corner of cross, 48j star opening, 48k opening in the shape of two overlapping circles, 48l elliptical opening, 51a first member, 51b second member, 51c third member, 51d fourth member, 100, 150 semiconductor device, 100a individual piece

Claims

1. a substrate having a plurality of holes arranged in its surface and at least a semiconductor chip arranged on its surface; a mold resin layer formed on the surface of the substrate and in the hole, The semiconductor device is characterized in that the plurality of holes have a cylindrical portion that penetrates from the front side to the back side of the substrate, and a portion that is formed diagonally from the side of the cylindrical portion toward the front side of the substrate.

2. 2. The semiconductor device according to claim 1, wherein the substrate is a printed circuit board.

3. 2. The semiconductor device according to claim 1, wherein the substrate is a lead frame.

4. 4. The semiconductor device according to claim 1, wherein the openings of the plurality of holes on the surface side of the substrate are circular, and the plurality of holes are arranged in a lattice pattern within the surface of the substrate.

5. 4. A semiconductor device according to claim 1, wherein the substrate is rectangular in plan view, the openings of the plurality of holes on the surface side of the substrate are circular, and a plurality of arrays of the holes are arranged in rows parallel to one side of the substrate within the plane of the substrate, and the pitch of the holes is shifted by a predetermined distance between the even-numbered arrays and the odd-numbered arrays from the side of the one side.

6. 4. The semiconductor device according to claim 1, wherein the substrate has a rectangular shape in a plan view, and the plurality of holes are arranged at four corners of the rectangle.

7. 4. The semiconductor device according to claim 1, wherein the substrate is rectangular in plan view, the substrate is virtually divided into a plurality of virtual rectangles of the same area, and the plurality of holes are arranged along each side of the virtually divided virtual rectangles.

8. 4. The semiconductor device according to claim 1, wherein an area of ​​the opening of the hole on the back surface side of the substrate is larger than an area of ​​the opening of the hole on the front surface side of the substrate.

9. 4. The semiconductor device according to claim 1, wherein a portion having a cross-sectional area in a direction perpendicular to the surface of the substrate is provided within the hole portion, the cross-sectional area being larger than the area of ​​the opening on the surface side of the substrate.

10. disposing at least a semiconductor chip on a surface of a substrate; a step of pressing the substrate against a curved surface portion made of metal to provide the substrate with a warp having a predetermined curvature; and a step of integrally molding the warped substrate with a molding resin at a temperature of 140°C or higher and 250°C or lower, A method for manufacturing a semiconductor device, characterized in that warping of the substrate is suppressed when the substrate is returned to room temperature after integral molding.

11. forming a substrate having a warp with a predetermined curvature by forming a multilayer structure using a plurality of materials having different linear expansion coefficients; disposing at least a semiconductor chip on a surface of the substrate; and a step of integrally molding the warped substrate with a molding resin at a temperature of 140°C or higher and 250°C or lower, A method for manufacturing a semiconductor device, characterized in that the warpage is suppressed when the temperature is returned to room temperature after integral molding.

12. 11. The method for manufacturing a semiconductor device according to claim 10, wherein the substrate has a multi-layer structure in which a copper layer, a core material, and a prepreg are laminated.

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