Power supply device

Abstract

The contamination state detection circuit (10) for detecting the contamination state of the first substrate of the power supply unit includes a first voltage dividing circuit (22) that outputs a first divided voltage (V1) to the first node (N11). The first voltage dividing circuit (22) includes a first resistance circuit (24) connected between the first power supply terminal (18) and the first node (N11), and a first resistance element (R1) connected between the first node (N11) and the second power supply terminal (20). The first resistance circuit (24) includes a plurality of second wiring patterns (WP1 to WP4) formed on the second substrate (11) and a plurality of second resistance elements (RA1 to RA4) having different resistance values from each other. The plurality of second wiring patterns (WP1 to WP4) have different wiring widths that are equal to or less than the wiring width of the first wiring pattern formed on the first substrate. The plurality of second resistance elements (RA1 to RA4) are connected in series with the plurality of second wiring patterns (WP1 to WP4) between the first power supply terminal (18) and the first node (N11). The contamination state detection circuit (10) detects the contamination state of the first wiring pattern based on the first divided voltage (V1).

Description

Technical Field

[0001] The present disclosure relates to a power supply device.

Background Art

[0002] In a power supply device that is continuously operated for a long period of time, such as an uninterruptible power supply device, depending on the installation environment, dust may accumulate on the substrate installed in the power supply device. Such dust can be removed during maintenance. However, depending on the maintenance cycle, there is a risk that the circuits on the substrate may be short-circuited or disconnected due to the accumulated dust. In recent years, with the miniaturization of power supply devices, the miniaturization and high density of components mounted on the substrate have progressed, and the influence of dust as a failure factor of the circuits on the substrate has tended to increase.

[0003] As a countermeasure against this, for example, Japanese Unexamined Patent Application Publication No. 2023-3970 (Patent Document 1) discloses an uninterruptible power supply system including a processing unit that detects the contamination state of a substrate installed in an uninterruptible power supply device. In this uninterruptible power supply system, at least one light-emitting sensor is disposed on the substrate, and at least one light-receiving sensor is disposed on a facing member disposed opposite to the substrate. Each of the at least one light-receiving sensors is disposed opposite to the corresponding light-emitting sensor among the at least one light-emitting sensors. The processing unit is configured to detect the contamination state of the substrate based on the detection value of the at least one light-receiving sensor.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In the uninterruptible power supply system described in Patent Document 1, with the increase in the density of the substrate, there is a concern that restrictions may occur in the arrangement of at least one light-emitting sensor on the substrate. In addition, with the miniaturization of the power supply device, there may also be restrictions in the arrangement of the opposing member facing the substrate.

[0006] Further, in the uninterruptible power supply system described in Patent Document 1, the detected value of the light-receiving sensor may be affected by the brightness around the power supply device. Therefore, in an installation environment where the brightness around the power supply device is likely to change, there is a concern that the detection accuracy of the processing unit may decrease.

[0007] The present disclosure has been made to solve such problems, and a first object thereof is to reduce the restrictions on the arrangement of the contamination state detection circuit in the power supply device provided with the contamination state detection circuit for detecting the contamination state of the substrate. A second object is to detect the contamination state of the substrate with high accuracy.

Means for Solving the Problems

[0008] The power supply device according to the present disclosure includes a housing, a power supply unit, and a contamination state detection circuit. The housing has an air flow path formed therein. The power supply unit is provided in the housing and includes a first substrate on which a plurality of electronic components are mounted. The contamination state detection circuit is provided in the housing and detects the contamination state of the first substrate. A first wiring pattern for electrically connecting each electronic component is formed on the first substrate. The contamination state detection circuit includes a first power supply terminal that receives a first power supply voltage, a second power supply terminal that receives a second power supply voltage, and a first voltage dividing circuit. The first voltage dividing circuit is connected between the first power supply terminal and the second power supply terminal and outputs a first divided voltage to a first node.

[0009] The first voltage dividing circuit includes a first resistance circuit connected between a first power supply terminal and a first node, and a first resistance element connected between the first node and a second power supply terminal. The first resistance circuit includes a plurality of second wiring patterns and a plurality of second resistance elements. The plurality of second wiring patterns are formed on a second substrate and have different wiring widths that are equal to or less than the wiring width of the first wiring pattern. The plurality of second resistance elements have different resistance values. The plurality of second resistance elements are connected in series with the plurality of second wiring patterns, respectively, between the first power supply terminal and the first node. The contamination state detection circuit further includes a detector that detects the contamination state of the first wiring pattern based on a first divided voltage output to the first node.

Advantages of the Invention

[0010] According to the present disclosure, in a power supply device including a contamination state detection circuit that detects the contamination state of a substrate, it is possible to reduce the constraints on the arrangement of the contamination state detection circuit within the power supply device. Further, according to the present disclosure, since the contamination state detection circuit can detect the contamination state of the substrate with high accuracy, the power supply reliability of the power supply device can be improved.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Mode for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated in principle.

[0013] <Configuration of the Uninterruptible Power Supply Device> FIG. 1 is a circuit block diagram showing the configuration of an uninterruptible power supply device which is an aspect of the power supply device according to an embodiment of the present disclosure. As shown in FIG. 1, the uninterruptible power supply device includes a housing 1, a dust filter 2, a cooling fan 3, a power supply unit 5, an operation unit 12, a control device 13, and a dirt state detection circuit 10.

[0014] The housing 1 is provided with an air inlet 1a and an air outlet 1b. The dust filter 2 is provided so as to close the air inlet 1a. The cooling fan 3 includes a fan 3a provided at the air outlet 1b and a motor 3b for rotationally driving the fan 3a. The motor 3b is driven by the AC power supplied from the power supply unit 5. The fan 3a may be provided at the air inlet 1a.

[0015] The housing 1 is arranged indoors or outdoors according to the type of the load 53. When the cooling fan 3 is driven, air is sucked into the housing 1 from outside the housing 1 through the dust filter 2, the air flows through the flow path formed in the housing 1 to cool the power supply unit 5 and the like, and is discharged outside the housing 1 by the cooling fan 3.

[0016] The power supply unit 5 includes an input terminal T1, a DC terminal T2, an output terminal T3, switches S1 to S4, current detectors CD1 to CD3, capacitors C1 to C3, reactors L1 to L3, a converter 6, a DC line 7, a bidirectional chopper 8, and an inverter 9.

[0017] The input terminal T1 receives commercial-frequency AC power supplied from the commercial AC power supply 51. The instantaneous value of the AC voltage VI at the input terminal T1 is detected by the control device 13. The control device 13 determines whether a power failure of the commercial AC power supply 51 has occurred based on the AC voltage VI, and controls the power supply unit 5 based on the determination result.

[0018] The DC terminal T2 is connected to a battery 52 (power storage device). The battery 52 stores DC power. A capacitor may be connected instead of the battery 52. The DC voltage VB at the DC terminal T2 is detected by the control device 13.

[0019] The output terminal T3 is connected to a load 53. The load 53 is driven by the AC power supplied from the power supply unit 5. The instantaneous value of the AC voltage VO at the output terminal T3 is detected by the control device 13.

[0020] The switch S1 and the reactor L1 are connected in series between the input terminal T1 and the AC node of the converter 6. The capacitor C1 is connected to the node N1 between the switch S1 and the reactor L1. The switch S1 is controlled by the control device 13, turned on when the commercial AC power supply 51 is normal, and turned off when a power failure of the commercial AC power supply 51 occurs.

[0021] The capacitor C1 and the reactor L2 constitute an AC filter F1. The AC filter F1 is a low-pass filter that allows commercial-frequency AC power to pass from the commercial AC power supply 51 to the converter 6 and prevents signals of the switching frequency generated in the converter 6 from passing to the commercial AC power supply 51. The current detector CD1 detects the current flowing through the switch S1, that is, the current I1 mainly flowing from the commercial AC power supply 51 to the converter 6, and outputs a signal I1f indicating the detected value to the control device 13.

[0022] Converter 6 is controlled by control device 13. When the commercial AC power supply 51 is normal, converter 6 converts the AC power supplied from commercial AC power supply 51 into DC power and outputs it to DC line 7. When a power failure occurs in commercial AC power supply 51, the operation of converter 6 is stopped.

[0023] Capacitor C2 is connected to DC line 7 to smooth the voltage VD of DC line 7. The DC voltage VD appearing on DC line 7 is detected by control device 13. DC line 7 is connected to the high-voltage side node of bidirectional chopper 8, and the low-voltage side node of bidirectional chopper 8 is connected to DC terminal T2 via reactor L2 and switch S2.

[0024] Switch S2 is controlled by control device 13, is turned on when the uninterruptible power supply device is in use, and is turned off during maintenance of components such as battery 52. Current detector CD2 detects the current I2 flowing between bidirectional chopper 8 and battery 52, and outputs a signal I2f indicating the detected value to control device 13.

[0025] Bidirectional chopper 8 is controlled by control device 13. When the commercial AC power supply 51 is normal, bidirectional chopper 8 stores the DC power supplied from converter 6 via DC line 7 in battery 52. When a power failure occurs in commercial AC power supply 51, bidirectional chopper 8 supplies the DC power of battery 52 to inverter 9 via DC line 7.

[0026] Inverter 9 is controlled by control device 13. When the commercial AC power supply 51 is normal, inverter 9 converts the DC power supplied from converter 6 via DC line 7 into AC power. When a power failure occurs in commercial AC power supply 51, inverter 9 converts the DC power supplied from battery 52 via bidirectional chopper 8 into AC power.

[0027] The AC node of the inverter 9 is connected to the first terminal of the reactor L3, and the second terminal (node N2) of the reactor L3 is connected to the output terminal T3 via the switch S3. The capacitor C3 is connected to the node N2. The reactor L3 and the capacitor C3 constitute the AC filter F2.

[0028] The AC filter F2 is a low-pass filter that allows the commercial-frequency AC power generated by the inverter 9 to pass through to the output terminal T3 and prevents the signal of the switching frequency generated by the inverter 9 from passing through to the output terminal T3. The AC filter F2 converts the voltage pulse train output from the AC node of the inverter 9 into a sinusoidal AC voltage VO and outputs it to the node N2.

[0029] The switch S3 is controlled by the control device 13, is turned on when the uninterruptible power supply device is in use, and is turned off during maintenance of the inverter 9 or the like. The current detector CD3 detects the current I3 flowing through the switch S3 and outputs a signal I3f indicating the detected value to the control device 13.

[0030] The switch S4 is connected between the output terminal T3 and the motor 3b of the cooling fan 3. The switch S4 is controlled by the control device 13, is turned on during operation of the power supply unit 5, and is turned off during maintenance of the cooling fan 3 or the like.

[0031] The operation unit 12 includes a plurality of buttons operated by the user of the uninterruptible power supply device, a display for displaying various information, and the like. The user of the uninterruptible power supply device can manually operate or automatically operate the uninterruptible power supply device by operating the operation unit 12.

[0032] The control device 13 controls the entire power supply unit 5 based on signals from the operation unit 12, the AC voltages VI, VO, the DC voltages VB, VD, and the detection signals I1f~I3f of the current detectors CD1~CD3.

[0033] The power supply unit 5 includes a substrate on which a plurality of electronic components such as a converter 6, a bidirectional chopper 8, and an inverter 9 are mounted. Depending on the installation environment of the housing 1, as the operation time of the uninterruptible power supply device increases, the amount of dust deposited on the substrate may increase. There is a risk that the circuits on the substrate may be short-circuited or disconnected due to this deposited dust. When the power supply unit 5 fails, the operation of the power supply unit 5 stops, and the power supply from the power supply unit 5 to the load 53 stops. In this case, the uninterruptible power supply device switches to commercial power supply that supplies AC power from the commercial AC power supply 51 to the load 53 via the bypass circuit. However, if there is a time when the power supply unit 5 stops or the time required for repair occurs, there is a concern that the power supply reliability of the uninterruptible power supply device when an abnormality occurs in the commercial AC power supply 51 may decrease.

[0034] The contamination state detection circuit 10 is provided inside the housing 1 and detects the contamination state of the substrate. The contamination state detection circuit 10 outputs a detection signal DET indicating the detected contamination state of the substrate to the control device 13. Based on the detection signal DET, the control device 13 uses a display on the operation unit 12 or the like to notify the user of the uninterruptible power supply device of the contamination state of the substrate.

[0035] FIG. 2 is a cross-sectional view showing the layout of the uninterruptible power supply device. As shown in FIG. 2, the housing 1 is formed in a vertically long rectangular parallelepiped shape. An air intake 1a is provided at the lower end of the right side surface of the housing 1 in the figure, and an exhaust port 1b is provided at the left end of the ceiling of the housing 1 in the figure. The dust filter 2 is provided so as to close the air intake 1a of the housing 1.

[0036] In the central portion inside the housing 1, a partition plate 14 that partitions the inside of the housing 1 left and right is erected. An opening 14a for allowing air to pass through is provided at the lower end of the partition plate 14. A shelf plate 15 is horizontally provided on the right side surface of the partition plate 14 in the figure, above the opening 14a. As a result, an L-shaped air flow path 16 from the air intake 1a to the exhaust port 1b is formed inside the housing 1.

[0037] When current flows through the electronic components (especially the converter 6, bidirectional chopper 8, inverter 9, and reactors L1 to L3) that make up the power supply unit 5, heat is generated and the temperature of the electronic components rises. If the temperature of the electronic components rises excessively, there is a risk that the electronic components themselves and the surrounding electronic components will malfunction. Therefore, the electronic components are arranged in the flow path 16 and cooled by the air flow.

[0038] In FIG. 2, the converter 6, bidirectional chopper 8, and inverter 9 are arranged in the flow path 16 so as to face the back surface of the dust filter 2, and the reactors L1 to L3 are arranged in the flow path 16 below the cooling fan 3 in the vertical direction in the figure.

[0039] FIG. 3 is a diagram schematically showing a configuration example of the converter 6, bidirectional chopper 8, and inverter 9. As shown in FIG. 3, each of the converter 6, bidirectional chopper 8, and inverter 9 is provided with a substrate 40 on which a plurality of electronic components 42 are mounted, cooling fins (not shown) for dissipating the heat generated by the plurality of electronic components 42, and a contamination state detection circuit 10 for detecting the contamination state of the substrate 40. The substrate 40 corresponds to an embodiment of the "first substrate".

[0040] On the substrate 40, a wiring pattern 44 for electrically connecting each electronic component 42 and a plurality of pads 46 are formed. For example, the wiring pattern 44 and the plurality of pads 46 are copper foils printed on the substrate 40. The wiring width W and thickness of the wiring pattern 44 and the interval D between the plurality of pads 46 are designed based on the magnitude of the current flowing through each electronic component. The wiring pattern 44 corresponds to an embodiment of the "first wiring pattern", and the pad 46 corresponds to an embodiment of the "first pad".

[0041] During the operation of the uninterruptible power supply, dust contained in the air flowing through the flow path 16 may continue to accumulate on the substrate 40, corroding the wiring pattern 44 and potentially causing the wiring pattern 44 to break. If the air contains corrosive gases or the humidity of the air is high, the corrosion of the wiring pattern 44 will progress more rapidly. Also, if the dust contains water-soluble components, dust may adhere between two adjacent pads 46, potentially causing the two pads 46 to short-circuit.

[0042] The contamination state detection circuit 10 is configured to detect the contamination state of the wiring pattern 44 and the plurality of pads 46. In one aspect, the contamination state detection circuit 10 can be formed using a part of the substrate 40. Note that the contamination state detection circuit 10 may be provided on a part of at least one of the substrates 40 of the converter 6, the bidirectional chopper 8, and the inverter 9.

[0043] Returning to FIG. 2, capacitors C1 to C3 are provided on the shelf board 15, and the operation unit 12 and the control device 13 are provided above them. A part of the operation unit 12 is exposed on the surface of the housing 1 so that a plurality of buttons included in the operation unit 12 can be operated from the outside of the housing 1 and an image displayed on the display included in the operation unit 12 can be confirmed from the outside of the housing 1. The image displayed on the display includes information indicating the contamination state of the substrate detected by the contamination state detection circuit 10.

[0044] <Configuration of the Contamination State Detection Circuit> FIG. 4 is a circuit diagram showing a configuration example of the contamination state detection circuit 10. As shown in FIG. 4, the contamination state detection circuit 10 includes a substrate 11, a power supply terminal 18, a ground terminal 20, a voltage dividing circuit 22, a voltage dividing circuit 26, and a detector 30.

[0045] The substrate 11 corresponds to an embodiment of the "second substrate". In the example of FIG. 3, the substrate 11 is a part of the substrate 40. The power supply terminal 18 receives the power supply voltage VDD. The ground terminal 20 receives the ground voltage GND. The power supply voltage VDD corresponds to an embodiment of the "first power supply voltage", and the ground voltage GND corresponds to an embodiment of the "second power supply voltage". The power supply terminal 18 corresponds to an embodiment of the "first power supply terminal", and the ground terminal 20 corresponds to an embodiment of the "second power supply terminal".

[0046] The voltage dividing circuit 22 is connected between the power supply terminal 18 and the ground terminal 20, and outputs a divided voltage V1 to the node N11 (the first node). The voltage dividing circuit 22 includes a resistance circuit 24 and a resistance element R1. The resistance circuit 24 is connected between the power supply terminal 18 and the node N11. The resistance element R1 is connected between the node N1 and the ground terminal 20. The resistance circuit 24 corresponds to an embodiment of the "first resistance circuit", and the resistance element R1 corresponds to an embodiment of the "first resistance element".

[0047] The resistance circuit 24 includes a plurality of wiring patterns WP1 to WP4 formed on the substrate 11 and a plurality of resistance elements RA1 to RA4. In the following description, the plurality of wiring patterns WP1 to WP4 are also collectively referred to as "wiring pattern WP". The plurality of resistance elements RA1 to RA4 are also collectively referred to as "resistance element RA". The wiring pattern WP corresponds to an embodiment of the "second wiring pattern", and the resistance element RA corresponds to an embodiment of the "second resistance element". Note that the number of the wiring patterns WP and the number of the resistance elements RA may be the same, and are not limited to 4. FIG. 5 is a circuit diagram showing a detailed configuration of the voltage dividing circuit 22 shown in FIG. 4.

[0048] As shown in FIG. 5, the plurality of wiring patterns WP1 to WP4 included in the resistance circuit 24 have different wiring widths W1 to W4. Among the wiring widths W1 to W4, the relationship of W1 < W2 < W3 < W4 holds. Note that the wiring widths W1 to W4 are set to be equal to or less than the wiring width W of the wiring pattern 44 formed on the substrate 40. For example, the wiring width W4 of the wiring pattern WP4 is equal to the wiring width W of the wiring pattern 44. The wiring widths W1 to W4 of the wiring patterns WP1 to WP3 are less than the wiring width W of the wiring pattern 44.

[0049] The thicknesses of the wiring patterns WP1 to WP4 are equal to the thickness of the wiring pattern 44. When the substrate 11 is a part of the substrate 40, the wiring patterns WP1 to WP4 and the wiring pattern 44 can be formed in the same process.

[0050] The plurality of resistance elements RA1 to RA4 are connected in series with the plurality of wiring patterns WP1 to WP4, respectively, between the power supply terminal 18 and the node N11. The plurality of resistance elements RA1 to RA4 have different resistance values from each other. The resistance elements RA1 to RA4 are, for example, chip resistors or lead resistors.

[0051] The resistance values of the wiring patterns WP1 to WP4 are negligibly small compared to the resistance values of the resistance elements RA1 to RA4. Therefore, the resistance value of the resistance circuit 24 is equal to the combined resistance of the resistance elements RA1 to RA4 connected in parallel. This combined resistance is obtained by the sum of the reciprocals of the resistance values of the resistance elements RA1 to RA4. Let the resistance value of the resistance circuit 24 be RA0 and the resistance values of the resistance elements RA1 to RA4 be RA1 to RA4. Then, RA0 is expressed by the formula 1 / RA0 = 1 / RA1 + 1 / RA2 + 1 / RA3 + 1 / RA4.

[0052] At the node N11 of the voltage dividing circuit 22, a divided voltage V1 corresponding to the ratio of the resistance value RA0 of the resistance circuit 24 and the resistance value R1 of the resistance element R1 is output from the power supply voltage VDD. The divided voltage V1 is given by the following formula. V1 = VDD·R1 / (RA0 + R1) …(1) Here, as shown in FIG. 6, assume a case where the wiring pattern WP1 having the smallest wiring width among the plurality of wiring patterns WP1 to WP4 is disconnected due to corrosion. In this case, since the resistance element RA1 is electrically disconnected from the node N11, the resistance value RA0 of the resistance circuit 24 becomes equal to the combined resistance of the resistance elements RA2 to RA4 connected in parallel. That is, RA0 is expressed by the formula 1 / RA0 = 1 / RA2 + 1 / RA3 + 1 / RA4.

[0053] Although illustration is omitted, when the wiring pattern WP2 is disconnected due to corrosion, the resistance element RA2 is electrically disconnected from the node N1. Therefore, the resistance value RA0 of the resistance circuit 24 becomes equal to the combined resistance of the resistance elements RA1, RA3, and RA4 connected in parallel. That is, RA0 is represented by the formula 1 / RA0 = 1 / RA1 + 1 / RA3 + 1 / RA4.

[0054] When any one of the plurality of wiring patterns WP1 to WP4 is disconnected in this way, the resistance value RA0 of the resistance circuit 24 changes. When the resistance value RA0 of the resistance circuit 24 changes, the divided voltage V1 output to the node N11 of the voltage dividing circuit 22 also changes. According to this, it is possible to detect which wiring pattern WP among the plurality of wiring patterns WP1 to WP4 is disconnected from the divided voltage V1 output to the node N11.

[0055] In the present embodiment, the plurality of wiring patterns WP1 to WP4 are equal to or less than the wiring width W of the wiring pattern 44 formed on the substrate 40 and have different wiring widths W1 to W4. As the corrosion of the wiring patterns WP1 to WP4 progresses, the wiring pattern WP with a smaller wiring width is more likely to be disconnected. By setting the wiring widths W1 to W4 of the wiring patterns WP1 to WP4 to be equal to or less than the wiring width W of the wiring pattern 44, it is possible to determine the contamination state (corrosion state) of the wiring pattern 44 from the disconnected wiring pattern WP. According to this, it is possible to determine whether there is a possibility of disconnection of the wiring pattern 44, so that the user of the uninterruptible power supply device can take appropriate measures for preventive maintenance and avoidance of fatal accidents.

[0056] Returning to FIG. 4, the voltage dividing circuit 26 is connected between the node N11 and the ground terminal 20 and outputs a divided voltage V2 to the node N12 (second node). The voltage dividing circuit 26 includes a resistance element R2 and a resistance circuit 28. The resistance element R2 is connected between the node N11 and the node N12. The resistance circuit 28 is connected between the node N12 and the ground terminal 20. The resistance element R2 corresponds to an embodiment of the "third resistance element", and the resistance circuit 28 corresponds to an embodiment of the "second resistance circuit".

[0057] The resistance circuit 28 includes a plurality of sets of pads P1 to P3 formed on the substrate 11 and a plurality of resistance elements RB1 to RB3. In the following description, the plurality of sets of pads P1 to P3 are also collectively referred to as "a set of pads P". The plurality of resistance elements RB1 to RB3 are also collectively referred to as "resistance elements RB". The pad P corresponds to an embodiment of the "second pad", and the resistance element RB corresponds to an embodiment of the "fourth resistance element".

[0058] A set of pads P consists of two pads arranged at a distance. Note that the number of sets of pads P and the number of resistance elements RB only need to be the same and are not limited to 3. FIG. 7 is a circuit diagram showing the detailed configuration of the voltage dividing circuit 26 shown in FIG. 4.

[0059] As shown in FIG. 7, each of the plurality of sets of pads P1 to P3 included in the resistance circuit 28 has different pad intervals D1 to D3 from each other. Among the pad intervals D1 to D3, the relationship D1 < D2 < D3 holds. Note that the pad intervals D1 to D3 are set to be equal to or less than the pad interval D of the plurality of pads 46 formed on the substrate 40. For example, the pad interval D3 of a set of pads P3 is equal to the pad interval D of the plurality of pads 46. The pad intervals D1 and D2 of the two sets of pads P1 and P2 are less than the pad interval D of the plurality of pads 46.

[0060] The shapes of the pads P1 to P3 are substantially equal to the shape of the pad 46. When the substrate 11 is a part of the substrate 40, the pads P1 to P3 and the pad 46 can be formed in the same process.

[0061] The plurality of resistance elements RB1 to RB3 are connected in series with the plurality of sets of pads P1 to P3 between the node N11 and the ground terminal 20, respectively. The plurality of resistance elements RB1 to RB3 have equal resistance values. The resistance elements RB1 to RB3 are, for example, chip resistors or lead resistors.

[0062] As shown in FIG. 7, when none of the multiple sets of pads P1 to P3 are short-circuited, the node N12 and the ground terminal 20 are electrically insulated. That is, the resistance circuit 28 is disconnected from the voltage dividing circuit 26. Assuming the resistance value of the resistance circuit 28 is RB0, RB0 becomes substantially infinite. In this case, the divided voltage V2 output to the node N12 of the voltage dividing circuit 26 becomes equal to the divided voltage V1 output to the node N11 (V2 = V1).

[0063] Here, as shown in FIG. 8, assume a case where the pads P1 of the set with the smallest pad interval among the multiple sets of pads P1 to P3 are short-circuited by dust. In this case, since the resistance element RB1 is electrically connected between the node N12 and the ground terminal 20, the resistance value RB0 of the resistance circuit 28 becomes equal to the resistance value of the resistance element RB1. Assuming the resistance values of the resistance elements RB1 to RB3 are RB, RB0 = RB.

[0064] To the node N12 of the voltage dividing circuit 26, a divided voltage V2 corresponding to the ratio of the resistance value R2 of the resistance element R2 and the resistance value RB0 of the resistance circuit 28 is output from the voltage V1 of the node N11. The divided voltage V2 is given by the following equation. V2 = V1·RB0 / (R2 + RB0) …(2) Although not shown in the figure, when two sets of pads P1 and P2 are short-circuited by dust, the resistance elements RB1 and RB2 are electrically connected between the node N12 and the ground terminal 20. The resistance value RB0 of the resistance circuit 28 becomes equal to the combined resistance of the resistance elements RB1 and RB2 connected in parallel. The combined resistance is obtained by the sum of the reciprocals of the resistance values of the resistance elements RB1 and RB2. RB0 is expressed by the equation 1 / RB0 = 1 / RB + 1 / RB. That is, RB0 = RB / 2.

[0065] As the number of sets of short-circuited pads increases in this way, the resistance value RB0 of the resistance circuit 28 changes. Due to the change in the resistance value RB0 of the resistance circuit 28, the divided voltage V2 output to the node N12 of the voltage dividing circuit 26 also changes. According to this, it is possible to detect which set of pads among the multiple sets of pads P1 to P3 is short-circuited from the divided voltage V2 output to the node N12.

[0066] In this embodiment, the plurality of sets of pads P1 to P3 are equal to or less than the pad pitch D of the plurality of pads 46 formed on the substrate 40, and have different pad pitches D1 to D3. As the amount of dust deposited on the plurality of sets of pads P1 to P3 increases, the possibility of short - circuit of the set of pads P with a smaller pad pitch becomes higher. By setting the pad pitches D1 to D3 of the plurality of sets of pads P1 to P3 to be equal to or less than the pad pitch D of the plurality of pads 46, the contamination state (dust deposition state) of the plurality of pads 46 can be determined from the short - circuited set of pads P. According to this, since it is possible to determine the presence or absence of the possibility of short - circuit of the plurality of pads 46, the user of the uninterruptible power supply device can take appropriate measures for preventive maintenance and avoidance of fatal accidents.

[0067] Returning to FIG. 4, the detector 30 is connected to the node N12 and detects the divided voltage V2 that appears at the node N12. The detector 30 detects the contamination state of the wiring pattern 44 and the plurality of pads 46 formed on the substrate 40 based on the detected divided voltage V2.

[0068] Specifically, the detector 30 includes an A / D converter 32, a memory 34, a comparator 36, and a determination unit 38. The A / D converter 32 converts the divided voltage V2, which is analog data, into digital data and outputs it to the comparator 36. The memory 34 stores a contamination determination value. The contamination determination value is used to determine the contamination state of the wiring pattern 44 and the plurality of pads 46 from the divided voltage V2.

[0069] FIG. 9 is a diagram showing an example of the contamination determination value stored in the memory 34. As shown in FIG. 9, the contamination determination value is generated based on the divided voltage V2 output to the node N12 according to the contamination states (breakage occurrence states) of a plurality of wiring patterns WP1 to WP4 and the contamination states (short circuit occurrence states) of a plurality of sets of pads P1 to P3. The divided voltage V2 is obtained by substituting the power supply voltage VDD, the resistance value RA0 of the resistance circuit 24, the resistance value RB0 of the resistance circuit 28, the resistance value R1 of the resistance element R1, and the resistance value R2 of the resistance element R2 into the above formulas (1) and (2).

[0070] FIG. 9 shows the value of the divided voltage V2 when VDD = 5V, RA1 = 1 kΩ, RA2 = 2 kΩ, RA3 = 3 kΩ, RA4 = 5 kΩ, RB = 100 kΩ, R1 = 5 kΩ, and R2 = 100 kΩ. As shown in FIG. 9, when a plurality of wiring patterns WP1 to WP4 are not broken and are normal, and a plurality of sets of pads P1 to P3 are not short-circuited and are normal, the divided voltage V2 of the node N12 is equal to the divided voltage V1 of the node N11 and becomes "4.55V".

[0071] On the other hand, when a plurality of sets of pads P1 to P3 are normal and the wiring pattern WP1 is broken, the divided voltage V2 changes to "4.19V". When a plurality of wiring patterns WP1 to WP4 are normal and one set of pads P1 is short-circuited, the divided voltage V2 changes to "2.28V".

[0072] As described with reference to FIGS. 5 and 6, the resistance value RA0 of the resistance circuit 24 changes when any one of the plurality of wiring patterns WP1 to WP4 is broken. As described with reference to FIGS. 7 and 8, the resistance value RB0 of the resistance circuit 28 changes when at least one set of pads P among the plurality of sets of pads P1 to P3 is short-circuited. Therefore, the divided voltage V2 changes according to the wiring pattern WP that is broken and the number of sets of pads P that are short-circuited.

[0073] Comparator 36 detects which wiring pattern WP among the plurality of wiring patterns WP1 to WP4 is open-circuited by comparing the divided voltage V2 with the contamination determination value shown in FIG. 9. Further, comparator 36 detects which set of pads P among the plurality of sets of pads P1 to P3 is short-circuited by comparing the divided voltage V2 with the contamination determination value.

[0074] Based on the output signal of comparator 36, determination unit 38 determines the contamination state of wiring pattern 44 and the plurality of pads 46. Specifically, determination unit 38 determines the contamination level of wiring pattern 44 from the open-circuited wiring pattern WP. In the example of FIG. 9, when the wiring pattern WP1 with the smallest wiring width W is open-circuited, the contamination level of wiring pattern 44 is determined to be "1". When the wiring pattern WP4 with the largest wiring width W is open-circuited, the contamination level of wiring pattern 44 is determined to be "4". Note that the contamination level of wiring pattern 44 indicates a higher value as the degree of contamination (corrosion) of wiring pattern 44 increases.

[0075] Also, determination unit 38 determines the contamination level of the plurality of pads 46 from the short-circuited set of pads P. In the example of FIG. 9, when the set of pads P1 with the smallest pad interval is short-circuited, the contamination level of the plurality of pads 46 is determined to be "1". When the plurality of sets of pads P1 to P3 are short-circuited, the contamination level of the plurality of pads 46 is determined to be "3". The contamination level of the plurality of pads 46 indicates a higher value as the degree of contamination (dust deposition) of the plurality of pads 46 increases.

[0076] The determination unit 38 generates a detection signal DET based on the determination result and outputs the generated detection signal DET to the control device 13. The detection signal DET includes information indicating the contamination levels of the wiring pattern 44 and the plurality of pads 46. Based on the detection signal DET, the control device 13 uses a display of the operation unit 12 or the like to notify the user of the power supply device of the contamination state of the substrate 40 (the contamination levels of the wiring pattern 44 and the plurality of pads 46). Note that the control device 13 may transmit information indicating the contamination state of the substrate 40 to an external management device or the like via a communication network such as the Internet.

[0077] <Effect> As described above, according to the present embodiment, since the contamination state detection circuit 10 can detect the contamination state of the substrate 40 of the power supply unit 5, maintenance of the power supply device can be performed before disconnection and short - circuit of the circuit of the power supply unit 5 occur. Thereby, the power supply reliability of the power supply device can be improved.

[0078] The contamination state detection circuit 10 includes a plurality of wiring patterns WP1 to WP4 that are equal to or less than the wiring width W of the wiring pattern 44 formed on the substrate 40 and have different wiring widths W1 to W4, and a plurality of sets of pads P1 to P3 that are equal to or less than the pad pitch D of the plurality of pads 46 formed on the substrate 40 and have different pad pitches D1 to D2. The contamination state detection circuit 10 can determine the degree of contamination (contamination level) of the wiring pattern 44 and the plurality of pads 46 based on the occurrence state of disconnection of the wiring patterns WP1 to WP4 and the occurrence state of short - circuit of the plurality of sets of pads P1 to P3. Since the contamination state detection circuit 10 can detect the contamination state of the substrate 40 with high accuracy, maintenance of the power supply device can be executed at an appropriate timing. Thereby, while improving the power supply reliability of the power supply device, it is possible to extend the device life of the power supply device.

[0079] Further, according to the present embodiment, the contamination state detection circuit 10 can detect the contamination state of the substrate 40 without installing the light emitting sensor and the light receiving sensor. Therefore, the constraints on the arrangement of the contamination state detection circuit 10 in the housing 1 can be reduced.

[0080] <Other configuration examples> (1) In the above-described embodiment, the configuration example (see FIG. 3) in which the substrate 11 (second substrate) of the contamination state detection circuit 10 is a part of the substrate 40 (first substrate) of the power supply unit 5 has been described. However, the substrate 11 may be provided independently of the substrate 40. FIG. 10 shows another installation example of the contamination state detection circuit 10. As shown in FIG. 10, for example, the contamination state detection circuit 10 may be installed in a place where dust is likely to accumulate in the housing 1. According to this, it becomes possible to more quickly determine the possibility of disconnection of the wiring pattern 44 formed on the substrate 40 and short circuit of the plurality of pads 46. Further, the contamination state detection circuit 10 can be installed in the housing of an existing power supply device.

[0081] (2) In the above-described embodiment, the configuration example (see FIG. 4) of the contamination state detection circuit 10 when the "first power supply voltage" is the power supply voltage VDD and the "second power supply voltage" is the ground voltage GND has been described. However, the same effects as those of the above-described embodiment can be obtained even when the "first power supply voltage" is the ground voltage GND and the "second power supply voltage" is the power supply voltage VDD.

[0082] (3) In the above-described embodiment, the configuration in which the voltage dividing circuit 22 for detecting the contamination state of the wiring pattern 44 and the voltage dividing circuit 26 for detecting the contamination state of the plurality of pads 46 are integrated has been described. However, the voltage dividing circuit 22 and the voltage dividing circuit 26 may be provided in an independent manner from each other.

[0083] It should be considered that the embodiments disclosed this time are illustrative in all respects and not restrictive. The scope of the present disclosure is shown not by the above description but by the claims, and it is intended that all modifications within the meaning and scope equivalent to the claims are included.

Explanation of reference numerals

[0084] 1 housing, 1a intake port, 1b exhaust port, 2 dust filter, 3 cooling fan, 3a fan, 3b motor, 5 power supply unit, 6 converter, 7 DC line, 8 bidirectional chopper, 9 inverter, 10 fouling state detection circuit, 11, 40 substrate, 12 operation unit, 13 control device, 14 partition plate, 14a opening, 16 flow path, 18 power terminal, 20 ground terminal, 22, 26 voltage dividing circuit, 24, 28 resistance circuit, 30 detector, 32 A / D converter, 34 memory, 36 comparator, 38 determination unit, 42 electronic component, 44, WP1 to WP4 wiring pattern, 46, P1 to P3 pad, 51 commercial AC power supply, 52 battery, 53 load, T1 input terminal, T2 DC terminal, T3 output terminal, C1 to C3 capacitor, S1 to S4 switch, L1 to L3 reactor, F1, F2 AC filter, CD1 to CD3 current detector, W, W1 to W4 wiring width, D, D1 to D3 pad interval, R1, R2, RA1 to RA4, RB1 to RB3 resistance element.

Claims

1. a housing having an air flow passage formed therein; a power supply unit provided within the housing and including a first substrate on which a plurality of electronic components are mounted; a contamination detection circuit provided in the housing for detecting a contamination state of the first board; a first wiring pattern for electrically connecting each electronic component is formed on the first substrate; The contamination state detection circuit includes: a first power supply terminal for receiving a first power supply voltage; a second power supply terminal for receiving a second power supply voltage; a first voltage dividing circuit connected between the first power supply terminal and the second power supply terminal and outputting a first divided voltage to a first node; The first voltage divider circuit includes: a first resistor circuit connected between the first power supply terminal and the first node; a first resistive element connected between the first node and the second power supply terminal; The first resistance circuit includes: a plurality of second wiring patterns formed on a second substrate and having different wiring widths each of which is equal to or smaller than the wiring width of the first wiring pattern; a plurality of second resistance elements having different resistance values, the plurality of second resistance elements being connected in series with the plurality of second wiring patterns between the first power supply terminal and the first node; The power supply device, wherein the contamination state detection circuit further includes a detector that detects a contamination state of the first wiring pattern based on the first divided voltage output to the first node.

2. the detector is configured to compare the first divided voltage output to the first node with a plurality of first contamination determination values ​​and detect a contamination state of the first wiring pattern based on a comparison result; 2. The power supply device according to claim 1, wherein the plurality of first contamination determination values ​​are generated based on the first divided voltage that is output to the first node when each of the plurality of second wiring patterns is broken.

3. 3. The power supply device according to claim 2, wherein the detector has a plurality of contamination levels set corresponding to the plurality of first contamination determination values, and determines the contamination level of the first wiring pattern based on the comparison result.

4. The first substrate further includes a plurality of first pads formed thereon; the contamination state detection circuit further includes a second voltage divider circuit connected between the first node and the second power supply terminal and configured to output a second divided voltage to a second node; The second voltage divider circuit includes: a third resistive element connected between the first node and the second node; a second resistor circuit connected between the second node and the second power supply terminal; The second resistance circuit includes: a plurality of sets of second pads formed on the second substrate and having different pad spacings that are equal to or smaller than the pad spacings of the plurality of first pads; a plurality of fourth resistive elements having equal resistance values, the plurality of fourth resistive elements being connected in series with the plurality of sets of second pads between the second node and the second power supply terminal, 2. The power supply device according to claim 1, wherein the detector detects a contamination state of the first pads based on the second divided voltage output to the second node.

5. the detector is configured to compare the second divided voltage output to the second node with a plurality of second contamination determination values ​​and detect the contamination states of the plurality of first pads based on a comparison result; 5. The power supply device according to claim 4, wherein the plurality of second contamination determination values ​​are generated based on the second divided voltage output to the second node when each of the plurality of sets of second pads is short-circuited.

6. The power supply device according to claim 5, wherein the detector has a plurality of contamination levels set corresponding to the plurality of second contamination judgment values, and determines the contamination level of the plurality of first pads based on the comparison result.

7. The power supply device according to claim 1 , wherein the second substrate is a part of the first substrate.

8. The power supply device according to claim 1 , wherein the second board is provided independently of the first board within the housing.

9. The housing is provided with an intake port and an exhaust port, The power supply device according to claim 1 , further comprising a cooling fan provided at the exhaust port.