System and method of manufacturing semiconductor device

Abstract

The system of the present disclosure comprises a laser assisted bonding (LAB) tool including: a stage block having a top side, a bottom side, and a lateral side extending between the top side and the bottom side; a first vertical laser source positioned above the top side of the stage block and facing the top side of the stage block; and a second vertical laser source positioned below the bottom side of the stage block and facing the bottom side of the stage block, wherein: the top side of the stage block is configured to support a substrate and a first electronic component including a first interconnect coupled to the substrate; and the first vertical laser source is configured to emit a first vertical laser beam at a first vertical angle with respect to the top side of the substrate toward a substrate positioned on the top side of the stage block in order to induce a first heat in the first interconnect to bond the first interconnect to the substrate. The second vertical laser source is configured to emit a second vertical laser beam vertically at a second vertical angle relative to the bottom surface of the substrate toward the bottom surface of the stage block to induce a second row in the first interconnect; the first row and the second row can bond the first interconnect to the substrate.

Description

Technology Field

[0001] The present disclosure generally relates to electronic devices, and in particular to a bonding tool and method for bonding semiconductor devices.

[0002] This application is a partial continuation of U.S. Patent Application No. 16 / 908,928 (pending), filed on June 23, 2020, titled “Hybrid Bonding Interconnection Using Laser and Thermal Compression,” the entire contents of which are incorporated herein by reference.

[0003] Various aspects of the present application relate to U.S. Patent Application No. 17 / 005,021 filed on August 27, 2020, titled “System and method for laser-based bonding of electronic devices”, disclosed in US 2021 / 0082717 A1, the entire contents of which are incorporated herein by reference. Background Technology

[0004] Conventional semiconductor packages and methods for forming semiconductor packages are inadequate and result, for example, in excessive costs, reduced reliability, relatively low performance, or excessively large package sizes. Additional limitations and disadvantages of such approaches will become apparent to those skilled in the art by comparing conventional and traditional approaches with the present disclosure and referring to the drawings. The problem to be solved

[0005] The present disclosure provides a bonding tool and a method for bonding semiconductor devices. means of solving the problem

[0006] The system of the present disclosure comprises a laser assisted bonding (LAB) tool including: a stage block having a top side, a bottom side, and a lateral side extending between the top side and the bottom side; a first vertical laser source positioned above the top side of the stage block and facing the top side of the stage block; and a second vertical laser source positioned below the bottom side of the stage block and facing the bottom side of the stage block, wherein: the top side of the stage block is configured to support a substrate and a first electronic component including a first interconnect coupled to the substrate; and the first vertical laser source is configured to emit a first vertical laser beam at a first vertical angle with respect to the top side of the substrate toward a substrate positioned on the top side of the stage block in order to induce a first heat in the first interconnect to bond the first interconnect to the substrate. The second vertical laser source is configured to emit a second vertical laser beam vertically at a second vertical angle relative to the bottom surface of the substrate toward the bottom surface of the stage block to induce a second row in the first interconnect; the first row and the second row can bond the first interconnect to the substrate.

[0007] One or both of the following may be satisfied: the first size of the first target area of ​​the first vertical laser beam emitted by the first vertical laser source is adjustable; and the second size of the second target area of ​​the second vertical laser beam emitted by the second vertical laser source is adjustable.

[0008] One or both of the following may be satisfied: the power and / or temperature gradient of the first vertical laser beam emitted by the first vertical laser source is adjustable; and the power and / or temperature gradient of the second vertical laser beam emitted by the second vertical laser source is adjustable.

[0009] The first vertical laser source can be configured to emit the first vertical laser beam, and the second vertical laser source can be configured to simultaneously emit the second vertical laser beam.

[0010] The above stage block may include a transparent material portion that allows the second vertical laser beam to pass through and reach the substrate.

[0011] The above stage block may include an opaque material portion that blocks the second vertical laser beam from passing through and reaching the substrate.

[0012] The above stage block may include: an opaque material portion that blocks the second vertical laser beam from passing through and reaching the substrate; and a transparent material portion that allows the second vertical laser beam to pass through and reach the opaque material portion.

[0013] The stage block comprises an opaque material portion; the opaque material portion comprises an opaque material and a grating that defines a pattern of openings penetrating the opaque material; the opaque material blocks the second vertical laser beam from passing through and reaching the substrate; the grating allows the second vertical laser beam to pass through the pattern of openings and reach the substrate; and the stage block may comprise a transparent material portion that allows the second vertical laser to pass through and reach the substrate via the grating of the opaque material portion.

[0014] Additionally, the system of the present disclosure comprises a laser assisted bonding (LAB) tool comprising: a stage block having a top surface, a bottom surface, and a side extending between the top surface and the bottom surface; a first vertical laser source located on the top surface of the stage block and facing the top surface of the stage block; a second vertical laser source located below the bottom surface of the stage block and facing the bottom surface of the stage block; and a compression tool located on the top surface of the stage block; wherein: the top surface of the stage block is configured to support a substrate and a first electronic component coupled to the substrate and comprising a first interconnect; the compression tool is configured to provide compression to the top surface of the first electronic component; and the first vertical laser source is configured to emit a first vertical laser beam at a first vertical angle with respect to the top surface of the substrate toward a substrate located on the top surface of the stage block to induce a first heat in the first interconnect to bond the first interconnect to the substrate; The second vertical laser source is configured to emit a second vertical laser beam vertically toward the bottom surface of the substrate at a second vertical angle toward the bottom surface of the stage block to induce a second row in the first interconnect; the first row and the second row can bond the first interconnect to the substrate.

[0015] The above compression tool may include a compression plate configured to provide the compression by pressing the upper surface of the first electronic component.

[0016] One or both of the following may be satisfied: the first size of the first target area of ​​the first vertical laser beam emitted by the first vertical laser source is adjustable; and the second size of the second target area of ​​the second vertical laser beam emitted by the second vertical laser source is adjustable.

[0017] The first vertical laser source emits the first vertical laser beam, the second vertical laser source emits the second vertical laser beam, and the compression tool may be configured to simultaneously perform the compression on the upper surface of the first electronic component.

[0018] The above stage block may include a transparent material portion that allows the second vertical laser beam to pass through and reach the substrate.

[0019] The above stage block may include an opaque material portion that blocks the second vertical laser beam from passing through and reaching the substrate.

[0020] The above stage block may include: an opaque material portion that blocks the second vertical laser beam from passing through and reaching the substrate; and a transparent material portion that allows the second vertical laser beam to pass through and reach the opaque material portion.

[0021] The stage block comprises an opaque material portion; the opaque material portion comprises an opaque material and a grid defining a pattern of openings penetrating the opaque material; the opaque material blocks the second vertical laser beam from passing through and reaching the substrate; the grid allows the second vertical laser beam to pass through the pattern of openings and reach the substrate; and the stage block may comprise a transparent material portion allowing the second vertical laser to pass through and reach the substrate via the grid of the opaque material portion.

[0022] Additionally, a method for manufacturing a semiconductor device of the present disclosure comprises the steps of: providing a first electronic component coupled to a substrate, wherein the first electronic component comprises a first interconnect; providing the substrate on a laser assisted bonding (LAB) tool, wherein the laser assisted bonding tool comprises a stage block having an upper surface, a lower surface, and a side extending between the upper surface and the lower surface, and the upper surface of the stage block supports the substrate and the first electronic component; inducing a first heat in the first interconnect by a first vertical laser source positioned on the upper surface of the stage block and facing the upper surface of the stage block, wherein the first vertical laser source emits a first vertical laser beam at a first vertical angle with respect to the upper surface of the substrate toward the substrate positioned on the upper surface of the stage block to induce the first heat; The method comprises the step of inducing a second row in the first interconnect by a second vertical laser source located below the bottom surface of the stage block and facing the bottom surface of the stage block, wherein the second vertical laser source emits a second vertical laser beam vertically toward the bottom surface of the stage block at a second vertical angle relative to the bottom surface of the substrate to induce the second row, and wherein the first row and the second row may bond the first interconnect to the substrate.

[0023] The method may include a step of adjusting one or both of: a first size of a first target area of ​​a first vertical laser beam emitted by the first vertical laser source; and a second size of a second target area of ​​a second vertical laser beam emitted by the second vertical laser source.

[0024] The method includes the step of providing compression to the upper surface of the first electronic component by means of a compression tool located on the upper surface of the stage block, wherein the compression tool may include a compression plate configured to provide compression by pressing the upper surface of the first electronic component.

[0025] The stage block comprises an opaque material portion; the opaque material portion comprises an opaque material and a grid defining a pattern of openings penetrating the opaque material; the opaque material blocks the second vertical laser beam from passing through and reaching the substrate; the grid allows the second vertical laser beam to pass through the pattern of openings and reach the substrate; and the stage block may comprise a transparent material portion allowing the second vertical laser to pass through and reach the substrate via the grid of the opaque material portion. Brief explanation of the drawing

[0026] FIGS. 1A to 1C illustrate cross-sectional views of exemplary semiconductor devices. FIGS. 2A and 2B illustrate cross-sectional views of an exemplary bonding tool for bonding an exemplary semiconductor device. FIGS. 3A to 3C illustrate cross-sectional views of an exemplary method for bonding an exemplary semiconductor device. FIGS. 4A to 4C illustrate cross-sectional views of an exemplary method for bonding an exemplary semiconductor device. FIGS. 5A to 5C illustrate cross-sectional views of an exemplary method for bonding an exemplary semiconductor device. FIGS. 6A to 6D illustrate detailed cross-sectional views of exemplary steps for bonding an exemplary semiconductor device using a bonding tool. FIGS. 7A to 7C illustrate cross-sectional and plan views of exemplary steps for bonding an exemplary semiconductor device using a bonding tool. Specific details for implementing the invention

[0027] Various examples of semiconductor devices and methods for manufacturing semiconductor devices are provided below. These examples are non-limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. In the following description, "example" and "eg" are non-limiting terms.

[0028] The drawings illustrate general configurations, and descriptions and details of well-known features and technologies may be omitted to avoid unnecessarily obscuring the present disclosure. Additionally, components in the drawings are not necessarily depicted to scale. For example, the dimensions of some components in the drawings may be exaggerated relative to others to better understand the examples discussed in the present disclosure. Identical reference numbers in different drawings indicate identical components. The term "or" means any one or more items in a list combined by "or". For example, "x or y" means any element of the set of three elements {(x), (y), (x, y)}. For another example, "x, y or z" means any element of the set of seven elements {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.

[0029] The terms “include,” “comprising,” “include,” and “comprising” are “open” terms and specify the existence of the mentioned functions but do not exclude the existence or addition of one or more other functions. In this specification, terms “first,” “second,” etc., may be used to describe various components, and these components should not be limited to these terms. These terms are used solely to distinguish one component from another. Accordingly, for example, the first component discussed in this disclosure may be referred to as the second component without departing from the teachings of this disclosure.

[0030] Unless otherwise specified, the term “combined” may be used to describe two components in direct contact with each other or two components indirectly connected by one or more other components. For example, if component A is combined with component B, component A may be in direct contact with component B or indirectly connected to component B by an intermediate component C. Similarly, the terms “over” or “on” may be used to describe two elements in direct contact with each other or two elements indirectly connected by one or more other elements.

[0031] In one example, a method for manufacturing a semiconductor device includes the step of providing an electronic component on a substrate, wherein the interconnect of the electronic component contacts a conductive structure of the substrate, and the substrate is provided on a laser-assisted bonding (LAB) tool, the LAB tool being composed of a stage block having a window, and heating the interconnect with a laser beam through the window until the interconnect is bonded to the conductive structure.

[0032] In another example, a method for manufacturing a semiconductor device comprises the step of providing an electronic component on a first substrate surface of a substrate, wherein the interconnect of the electronic component contacts a conductive structure of the substrate and the substrate is provided to a hybrid bonder tool including the substrate. After applying a first heat to the interconnect with a laser beam of the LAB tool through a second substrate surface opposite the first substrate surface, a second heat or compression is applied to the interconnect with the TCB tool through the electronic component, using a LAB (laser-assisted bonding) tool and a thermal / compression bonding (TCB) tool.

[0033] In an additional example, the system comprises a laser-assisted bonding (LAB) tool including a laser source and a stage block having a window over the laser source, wherein the laser source is configured to emit a laser beam through the window to apply a first heat to an interconnect of a workpiece supported by the stage block.

[0034] In one example, the system may include a laser-assisted bonding (LAB) tool comprising a stage block and a laser source facing the stage block. The stage block may be configured to support a first substrate and a first electronic component coupled to the first substrate, the first electronic component comprising a first interconnect. The laser source may be configured to emit a first laser toward the stage block to induce a first row on the first interconnect to couple the first interconnect to the first substrate.

[0035] In one example, the semiconductor device may include a substrate comprising a substrate upper portion and a substrate lower portion, and a first electronic component comprising a first interconnect connection portion bonded to the upper portion of the substrate by a first laser beam emitted toward the lower portion of the substrate.

[0036] The present disclosure includes other examples. These examples can be found in the drawings, claims, or the detailed description of the present disclosure.

[0037] FIG. 1A shows a cross-sectional view of an exemplary semiconductor device (10). In the example illustrated in FIG. 1A, the semiconductor device (10) comprises a substrate (11), an electronic component (12 or 13), and an interconnect (121 or 131). The substrate (11) may include a dielectric structure (111) and a conductive structure (112). The substrate (11) and the interconnect (121 or 131) may provide electrical coupling between an external component and an electronic component (12 or 13). In some examples, at least one of the electronic component (12) or the electronic component (13) may include a mold compound or a molded package containing a mold compound. In these examples, the mold compound or the mold package may optionally include one of the electronic component (12) or the electronic component (13) located inside, above, or below the mold compound or the mold package.

[0038] FIG. 1B shows a cross-sectional view of an exemplary semiconductor device (20). In the example illustrated in FIG. 1B, the semiconductor device (20) may include a substrate (11), an electronic component (12, 13, or 14), and an interconnect (121 or 131). The substrate (11) and the electronic component (12 or 13) may be similar to the substrate (11) and the electronic component (12 or 13) illustrated in FIG. 1A. The electronic component (14) may include an interconnect (141).

[0039] FIG. 1C shows a cross-sectional view of an exemplary semiconductor device (30). In the example shown in FIG. 1C, the semiconductor device (30) may include a substrate (11), an electronic component (12), and an interconnect (121). The substrate (11) and the electronic component (12) may be similar to the substrate (11) and the electronic component (12 or 13) shown in FIG. 1A. Additionally, the electronic component (12) may be longer or thinner than the electronic component (12 or 13) shown in FIG. 1A.

[0040] In some examples, the substrate (11) may be a pre-formed substrate. The pre-formed substrate may be manufactured before being attached to an electronic device and may include a dielectric layer between each conductive layer. The conductive layer may include copper and may be formed using an electroplating process. The dielectric layer may be a relatively thick, photodefinable layer that can be attached as a pre-formed film rather than a liquid, and may include a resin containing fillers such as strands, woven, or other inorganic particles for rigidity or structural support. Because the dielectric layer is photodefinable, features such as vias or openings may be formed using a drill or a laser. In some examples, the dielectric layer may include prepreg material or ABF (Ajinomoto Buildup Film). The pre-formed substrate may include a permanent core structure or carrier, such as a dielectric material including bis-maleimide triazine (BT) or FR4, and the dielectric and conductive layers may be formed on the permanent core structure. In another example, the pre-formed substrate may be a coreless substrate, omitting a permanent core structure, and the dielectric and conductive layers may be formed on a sacrificial carrier and removed after the formation of the dielectric and conductive layers and before attachment to an electronic device. The pre-formed substrate may be a printed circuit board (PCB) or a laminate substrate. Such a pre-formed substrate may be formed through a semi-additive or modified semi-additive process.

[0041] In some examples, the substrate (11) may be a redistribution layer ("RDL") substrate. In some examples, the RDL substrate may include one or more conductive redistribution layers and one or more dielectric layers that may be formed layer by layer on an electronic device to which the RDL substrate is electrically coupled. In some examples, the RDL substrate may include one or more conductive redistribution layers and one or more dielectric layers that may be formed layer by layer on a carrier that may be completely removed or at least partially removed after the electronic device and the RDL substrate are coupled together. In some examples, the window (153) shown in FIG. 2A may include or be part of such a carrier. The RDL substrate may be manufactured layer by layer as a wafer-level substrate on a round wafer in a wafer-level process, and may be manufactured as a panel-level substrate on a rectangular or square panel carrier in a panel-level process. The RDL substrate may be formed by an additive build-up process comprising one or more dielectric layers alternately stacked with one or more conductive layers defining each conductive redistribution pattern or trace configured to (a) fan out electrical traces outside the footprint of the electronic device or (b) fan in electrical traces within the footprint of the electronic device. The conductive pattern may be formed using a plating process such as an electroplating process or an electroless plating process. The conductive pattern may comprise an electrically conductive material such as copper or other platingable metals. The location of the conductive pattern may be formed using a photo-patterning process, e.g., a photolithography process and a photoresist material, to form a photolithography mask. The dielectric layer of the RDL substrate may also be patterned by a photopatterning process, which may include a photolithography mask in which light is exposed to desired photopattern features, such as vias within the dielectric layer.The dielectric layer may be formed from photodefinable organic dielectric materials, such as polyimide (PI), benzocyclobutene (BCB), or polybenzoxazole (PBO), for example. These dielectric materials may be spun-on or coated in liquid form rather than attached as a pre-formed film. To allow for the proper formation of the desired photodefinable feature, these photodefinable dielectric materials may be filler-free, such as strands, weaves, or other particles that can obstruct the light of the photopatterning process, or structural reinforcement may be omitted. In some examples, the filler-free nature of the filler-free dielectric material may reduce the thickness of the resulting dielectric layer. While the photodefinable dielectric material may be an organic material, in other examples, the dielectric material of the RDL substrate may comprise one or more inorganic dielectric layers. Some examples of the inorganic dielectric layer(s) may comprise silicon nitride (Si3N4), silicon oxide (SiO2), or silicon oxynitride (SiON). Inorganic dielectric layer(s) may be formed by growing an inorganic dielectric layer using an oxidation or nitridation process instead of using a photodefinable organic dielectric material. Such inorganic dielectric layers may be free of fillers, such as strands, woven structures, or other inorganic particles. In some examples, the RDL substrate may omit a permanent core structure or carrier, such as a dielectric material comprising, for example, bis-maleimide triazine (BT) or FR4, and such a type of RDL substrate may be referred to as a coreless substrate. Other substrates in the present disclosure may include an RDL substrate.

[0042] It should be noted that the various semiconductor devices (10, 20, 30) described in this specification are for understanding the present disclosure and that various other semiconductor devices may be used in the present disclosure. The present disclosure may be applied to other semiconductor devices in which electronic components are connected to a substrate through interconnects.

[0043] FIG. 2A illustrates a cross-sectional view of an exemplary bonding tool for bonding an exemplary semiconductor device. In the example illustrated in FIG. 2A, the laser-assisted bonding (LAB) tool (15) may include a laser source (151), a stage block (or base chuck) (152), and a window (153).

[0044] A laser source (151) can irradiate a laser beam (151A) through a window (153) as shown in FIG. 3B. A stage block (152) may include or accommodate the window (153). In some examples, the window (153) may include an opening through the stage block (152). In some examples, the opening may be filled or covered with a transparent material such as glass or quartz, or with a grating or similar structure that allows light to pass through. In some examples, the stage block (152) may include a ceramic material, or a part of the stage block (152), such as the window (153), may include a ceramic material. In such examples, a ceramic stage tool may be heated by an external heat source, such as the laser source (151), using a laser beam (151A) to accelerate the bonding process through the heating of the ceramic material. In some examples where the window (153) comprises ceramic, the laser beam (151A) operates to heat the ceramic window (153) to heat the semiconductor device (30) without passing through the window (153). On the other hand, if the window (152) is transparent, the semiconductor device (30) can be heated by passing the laser beam (151A) through the window (152) to heat the semiconductor device (30) during the bonding process. In some examples, opening through the stage block (152) may be optional, where the stage block (152) itself may be made of a transparent material, or the window (153) may define the upper surface of the stage block (152). The window (153) may be used to support one or more substrates, such as the substrate (11) introduced in FIGS. 1A through 1C.A laser beam (151A) generated from a laser source (151) can be transmitted through a window (153) to allow interconnects (121, 131, 141) of electronic components (12, 13, 14) to be coupled to terminals of a conductive structure (112) of a substrate (11) as illustrated in FIGS. 1A through 1C. In some examples, the window (153) may comprise a material having any amount of light transmittance so that light of a desired wavelength can pass through, for example, at or near the wavelength of the laser beam (151A).

[0045] FIG. 2B illustrates a cross-sectional view of an exemplary hybrid bonder tool for bonding an exemplary semiconductor device. In the example illustrated in FIG. 2B, the hybrid bonder tool (40) may include a laser-assisted bonding (LAB) tool (15) and a thermal / compression bonding (TCB) tool (35).

[0046] The LAB tool (15) may include a laser source (151), a stage block (152), and a window (153). The LAB tool (15) may be similar to the LAB tool (15) shown in FIG. 2A. The thermal / compression bonding tool (35) may include a thermal / vibration / compression plate (351) and a heat source (352).

[0047] FIGS. 3A to 3C illustrate cross-sectional views of an exemplary method for bonding an exemplary semiconductor device. In the example illustrated in FIGS. 3A to 3C, the exemplary semiconductor device may be the semiconductor device (10) illustrated in FIG. 1A.

[0048] FIG. 3A illustrates a semiconductor device (10) and a laser-assisted bonding (LAB) tool (15) prior to laser beam irradiation in a bonding process. Electronic components (12 or 13) are shown placed on a substrate (11) but are not fully bonded to the substrate (11) via interconnects (121 or 131), respectively. In some examples, the electronic components (12 or 13) may be temporarily bonded to the substrate (11) via interconnects (121 or 131), or may be pre-bonded. In some examples, the electronic components (12 or 13) are provided on the substrate (11) such that the interconnects (121 or 131) of the electronic components come into contact with a conductive structure (112) of the substrate (11). The substrate (11) may be provided on a LAB tool (15) comprising a stage block (152) that includes a window (153).

[0049] The substrate (11) comprises a conductive structure (112) having one or more conductive layers or patterns, and a dielectric structure (111) having one or more dielectric layers interlaced with the conductive structure (112). In some examples, the substrate (11) may have a thickness ranging from about 10 micrometers (μm) to about 2,000 micrometers. The electronic component (12 or 13) may include or refer to a semiconductor die, a semiconductor chip, or a semiconductor package. In some examples, such a semiconductor package may include one or more semiconductor dies or chips that are bonded to and encapsulated in the substrate with interconnects (121 or 131) exposed. In some examples, the interconnects (121 or 131) of the electronic component (12 or 13) may be disposed in a flip-chip configuration at terminals such as pads or UBMs (Under-Bump Metallizations) of the conductive structure (112) of the substrate (11).

[0050] In some examples, the electronic component (12 or 13) may include an application-specific integrated circuit, a logic die, a microcontroller, a memory, a digital signal processor, a network processor, a power management unit, an audio processor, a radio frequency (RF) circuit, or a radio baseband system-on-chip processor. In some examples, the electronic component (12 or 13) may include an active component or a passive component. The electronic component (12 or 13) may have a thickness ranging from about 10 µm to about 1,000 µm.

[0051] An interconnect (121 or 131) can electrically connect an electronic component (12 or 13) to a conductive structure (112) of a substrate (11), respectively. The interconnect (121 or 131) may include a conductive ball or bump, such as a solder ball or bump; a conductive pillar or post, such as a copper pillar or a post with a solder tip; or a metal core solder ball or bump having a core of copper or aluminum surrounded by a solder shell. The interconnect (121 or 131) may have a diameter ranging from about 10 μm to about 1,000 μm. In some examples, the interconnect (121 or 131) may first be formed or attached to the electronic component (12 or 13) and then the interconnect (121 or 131) may be placed on the substrate (11).

[0052] In the example illustrated in FIG. 3A, the LAB tool (15) may be positioned below the semiconductor device (10). The LAB tool (15) may irradiate a laser beam from a laser source (151) to melt or reflow the interconnect (121 or 131) and bond the electronic component (12 or 13) to the substrate (11). Melting may involve heating the interconnect to at least partially melt it so that it can be bonded to an adjacent conductive structure, such as a conductive structure (112) of the substrate (11). In some examples, melting may be referred to as reflow. In some examples, the electronic component (12 or 13) may be permanently bonded to the substrate (11).

[0053] In the example illustrated in FIG. 3A, the stage block (152) may be spaced apart from the laser source (151) and positioned above the laser source (151). The stage block (152) may be spaced apart from the laser source (151) by an operating distance. In some examples, the operating distance varies from about 100 mm to about 1000 mm. The operating distance may be preset and may be changed before or during laser irradiation. The stage block (152) may be installed to cover or support the periphery of the window (153). The stage block (152) may be provided to cover at least part or all of the periphery of the window (153). In some examples, the periphery of the window (153) or the substrate (11) may be placed on the stage block (152).

[0054] In the example illustrated in FIG. 3A, the window (153) may be coupled to the stage block (152). The window (153) may be spaced apart from the laser source (151) by an operating distance. The operating distance between the window (153) and the laser source (151) may be similar to the operating distance between the stage block (152) and the laser source (151). The window (153) may support the semiconductor device (10).

[0055] The window (153) may be formed of a material capable of passing a laser beam. In some examples, the window (153) may be formed of quartz or glass. In some examples, the window (153) may be a void or passage defined by the inner sidewall of the stage block (152). In some examples, the window (153) may comprise a material exhibiting any amount of light transmittance so that light of a desired wavelength may pass through, for example, at or near the wavelength of the laser beam (151A). In some examples, to facilitate the LAB process, the transmittance of the window (153) to the laser beam may be about 90% or more. In some examples, the transmittance of the window (153) may be less than 90%. In some examples, the window (153) may comprise a grating or other structure to allow at least a certain amount of light to pass through. In some examples, the window (153) may have a thickness ranging from about 1 mm to about 300 mm. In some examples, the stage block (152) may support a workpiece operated by the LAB tool (15). The workpiece may include, for example, a substrate (11) or an electronic component (12 or 13) on a substrate (11) that includes interconnects (121 or 131).

[0056] FIG. 3B illustrates a semiconductor device (10) and a LAB tool (15) while a laser beam is irradiated during a bonding process. As shown in FIG. 3B, a laser beam (151A) is irradiated from a laser source (151), and heat can be applied to or transferred to an interconnect (121 or 131) through a window (153) and a substrate (11). In some examples, when the laser beam (151A) is irradiated from the laser source (151), the substrate (11) may be heated and such heat may be transferred to the interconnect (121 or 131). In some examples, when the laser beam (151A) is irradiated from the laser source (151), heat may be applied to the interconnect (121 or 131). In some examples, this heat may be applied to the interconnect (121 or 131) while keeping the temperature of the substrate (11) lower than that of the heated interconnect (121 or 131). For example, the interconnect (121 or 131) may be located at a focal length or focal length within the depth of field (DOF) range of the laser beam (151A). In some examples, focusing of the laser beam (151A) onto the interconnect (121 or 131) allows the interconnect (121 or 131) to be heated more than the substrate (11) or the electronic component (12 or 13). Due to heating by the laser beam (151A), the interconnect (121 or 131) may melt the bond between the substrate (11) and the electronic component (12 or 13), which in some examples may be permanently bonded. The size of the laser source (151) may be larger than the overall size of the substrate (11) or configured to irradiate the laser beam (151) onto the entire bottom surface of the substrate (11) exposed through the window (153).An interconnect (121 or 131) of an electronic component (12 or 13) may be heated by a laser beam (151A) through a window (153) of a stage block (152) until the interconnect (121 or 131) is coupled to a conductive structure (112) of a substrate (11). In some examples, the interconnect (121 or 131) may be within the depth of field (DOF) when the interconnect (121 or 131) is heated.

[0057] In the example illustrated in FIG. 3B, the laser beam (151A) is indicated by an arrow. The substrate (11) and the interconnect (121 or 131) may be located within an area where an appropriate temperature can be maintained to melt the interconnect (121 or 131) when the laser beam (151A) is irradiated. The irradiation range of the laser beam (151A) may vary depending on the thickness and transmittance of the window (153) or the operating distance. The laser beam (151A) may be generated from a pulsed laser or a continuous laser. In some examples, the electronic component (12 or 13) may be on one side of the substrate (11), and the laser beam (151A) may be applied to the interconnect (121 or 131) on a second side of the substrate (11) opposite to the first side. In some examples, the stage block (152) can support a window (153) and a substrate (11) over a laser beam (151A).

[0058] In some examples, the laser beam (151A) may have an energy in the range of about 0.1 kW to about 16 kW to properly heat or melt the interconnect (121 or 131) and prevent excessive heating or damage to the dielectric structure (111) or conductive structure (112). In some examples, the laser source (151) may output one or more laser beams (151A) with an energy of up to about 0.1 kW to about 100 kW, depending on whether they are aimed at a specific area of ​​the stage block (152) or the substrate (11) or are evenly distributed over the whole. In some examples, the laser beam (151A) may have a wavelength of about 600 µm to about 2,000 µm to properly heat or melt the interconnect (121 or 131) and prevent excessive heating or damage to the dielectric structure (111) or conductive structure (112) of the substrate (11). In some examples, the laser beam (151A) may be irradiated for a time ranging from about 100 milliseconds (ms) to about 30,000 ms to adequately heat or melt the interconnect (121 or 131) and avoid excessive heating or damage to the dielectric structure (111) or conductive structure (112) of the substrate (11). For example, to adequately heat the interconnect (121 or 131) and bond the interconnect (121 or 131) to the substrate (11), the laser beam (151A) may be irradiated for about 2000 ms or less, or about 1000 ms or less. In some examples, when heat is applied to the interconnect (121 or 131) from the laser beam (151A), the temperature of the substrate (11) may be maintained at a lower temperature than that of the interconnect (121 or 131). In some examples, when heat is applied to the interconnect (121 or 131) from the laser beam (151A), the temperature of the electronic component (12 or 13) can be maintained at a lower temperature than that of the interconnect (121 or 131).In another example, when heat is applied to the interconnect (121 or 131) from the laser beam (151A), the temperature of the mold compound or molded package adjacent to the electronic component (12 or 13) can be kept lower than the temperature of the interconnect (121 or 131).

[0059] In some examples, when the laser beam (151A) is irradiated, the substrate (11) interconnect (121 or 131) may be at a temperature in the range of about 30°C to about 300°C to properly heat or melt the substrate (11) interconnect (121 or 131) and avoid excessive heating or damage to the dielectric structure (111) or conductive structure (112) of the substrate (11). For example, the heat generated on the substrate (11) or interconnect (121, 131) by the laser beam (151A) may be in the range of about 150°C to about 350°C, e.g., about 230°C to about 280°C. In some examples, when the laser beam is irradiated, the window (153) may be at a temperature in the range of about 30°C to about 300°C. In some examples, the temperature of the window (153) may be maintained in a range of about 25°C to about 150°C, such as about 70°C to about 130°C, which is lower than the melting temperature of the interconnect (121 or 131).

[0060] FIG. 3C shows the LAB tool (15) after the bonding process is completed. In the example illustrated in FIG. 3C, when the bonding between the substrate (11) and the electronic component (12 or 13) is completed, the irradiation of the laser beam (151A) may be stopped, and the semiconductor device (10) may move to the next step. When the irradiation of the laser beam (151A) is stopped, the heat supply from the laser beam may be stopped immediately. As such, since the heat supply by the laser beam is stopped in this way, the interconnect (121 or 131) may be solidified again. The solidified interconnect (121 or 131) may allow electrical or mechanical interconnection between the electronic component (12 or 13) and the substrate (11). The bonding of the next semiconductor device may be performed immediately using the laser beam (151A) without a separate cooling process.

[0061] FIGS. 4A through 4C illustrate cross-sectional views of an exemplary method for bonding an exemplary semiconductor device. The exemplary semiconductor device (20) illustrated in FIGS. 4A through 4C may be similar to the semiconductor device (20) illustrated in FIG. 1B.

[0062] FIG. 4A illustrates a semiconductor device (20) and a laser-assisted bonding (LAB) tool (15) before a laser beam (151A) is irradiated during the bonding process. FIG. 4B illustrates the semiconductor device (20) and the LAB tool (15) while a laser beam (151A) is irradiated during the bonding process. FIG. 4C shows the LAB tool (15) after the bonding process is completed. In the examples illustrated in FIG. 4A through 4C, the substrate (11), electronic components (12 or 13), and interconnects (121 or 131) of the semiconductor device (20) may be similar to the semiconductor device (10) illustrated in FIG. 3A through 3C.

[0063] The electronic component (14) may include active or passive components. The electronic component (14) may be temporarily connected to a conductive structure (112) of the substrate (11) via an interconnect (141). In some examples, the electronic component (14) may include at least one of a resistor, a capacitor, an inductor, or a connector. The electronic component (14) may have a thickness ranging from about 0.1 mm to about 3 mm.

[0064] In the example illustrated in FIG. 4A, the LAB tool (15) may be positioned below the semiconductor device (20). The LAB tool (15) may irradiate a laser beam (151A) from a laser source (151) to melt the interconnect (121 or 131) and bond electronic components (12, 13, 14) to the substrate (11).

[0065] In the example illustrated in FIGS. 4A-4C, the laser source (151), stage block (152), and window (153) of the LAB tool (15) may be similar to those of the LAB tool (15) described in relation to FIGS. 3A-3. The exemplary method illustrated in FIGS. 4A-4C may be similar to that described in relation to FIGS. 3A-3C.

[0066] FIGS. 5A through 5C illustrate cross-sectional views of an exemplary method for bonding an exemplary semiconductor device (30). The exemplary semiconductor device illustrated in FIGS. 5A through 5C may be similar to the semiconductor device (30) illustrated in FIG. 1C.

[0067] FIG. 5A illustrates a semiconductor device (30) and a hybrid bonder tool (40) prior to laser beam irradiation in a bonding process. In the examples illustrated in 5A through 5C, the substrate (11), electronic components (12 or 13), and interconnects (121 or 131) of the semiconductor device (30) may be similar to the substrate (11), electronic components (12 or 13), and interconnects (121 or 131) of the semiconductor device (10) illustrated in 3A through 3C. In some examples, the electronic components (12 or 13) may be provided on one side of the substrate (11) so that the interconnects (121 or 131) of the electronic components (12 or 13) can contact the conductive structure (112) of the substrate (11).

[0068] In some examples, the electronic component (12 or 13) may be warped during laser bonding using the LAB tool (15) and the process of FIGS. 3A-3C. For example, heat from the laser beam (151A) in FIG. 3B is transferred to the electronic component (12 or 13) during the bonding process, causing warping in the electronic component (12 or 13). Such warping may occur, for example, when the area of ​​the electronic component (12 or 13) is sufficiently large compared to the amount of heat transferred during LAB bonding, or when the thickness of the electronic component (12 or 13) is sufficiently thin. To avoid or prevent warping, the bonding process of the semiconductor device (30) can be performed by a hybrid bonder tool (40). Also, FIG. FIGS. 5A-5C illustrates a semiconductor device (30) comprising two separate smaller electronic components (12 and 13), but in some examples, the semiconductor device (30) may comprise a single electronic component that may be longer, larger, or thinner than the electronic component (12 or 13) as illustrated in FIGS. 5A-5C. In these examples, a longer, larger, or thinner die, such as the electronic component (12), may be sensitive to bending and non-wet interconnects (121), for example, near the edge of the electronic component (12). In some examples, the semiconductor device (30) may comprise a single electronic component, or the semiconductor device (30) may comprise a plurality of electronic components (12, 13) as illustrated in FIG. 5A. In some examples where the semiconductor device (30) comprises a single electronic component, the electronic component (12) may comprise a die with a larger area or thinner thickness. For example, the electronic component (12) may have an area of ​​about 1 mm x 1 mm to a maximum of about 300 mm x 300 mm or a thickness of about 30 μm to about 1 mm or 10 mm.In some examples, the semiconductor device (30) may include, for example, a die or electronic component (12), an interposer, a substrate, or an electronic component including an interconnect of a package structure, in addition to the die. The warping of such large-area semiconductor device (30) and the sensitivity to non-wet interconnects (121) may be prevented or mitigated by using a vacuum. For example, a window (153) may include one or more vacuum holes to apply a vacuum to the semiconductor device (30). A LAB tool (15) may include a vacuum mechanism that applies a vacuum through the vacuum holes of the window (153) to force a vacuum on the window (153) while heating the semiconductor device (30) containing the substrate (11) to prevent warping of the substrate (11). In some examples, the TCB tool (35) may include a vacuum mechanism or use the same vacuum mechanism as the LAB tool to apply vacuum to the semiconductor device (30) on the opposite side from the LAB tool (15). In these examples, the plate (351) may include one or more vacuum holes for applying vacuum to hold the electronic components (12, 13) or to force vacuum against the plate (351) to prevent warping of the electronic components (12, 13) and to prevent non-wetting of the interconnects (121, 131) while heating.

[0069] In the example illustrated in FIG. 5A, the hybrid bonder tool (40) may include a LAB tool (15) to irradiate a laser beam (151A) from a laser source (151) located below the semiconductor device (30) to bond an electronic component (12 or 13) to a substrate (11). The hybrid bonder tool (40) may also include a TCB tool (35) to bond the electronic component (12 or 13) to the substrate (11) while preventing bending of the electronic component (12 or 13). The TCB tool (35) may include a plate (351) and a heat source (352) and may compress or support the electronic component (12, 13) from above while heat is applied to limit bending of the electronic component (12, 13) during the bonding process. The plate (351) may be configured to press the upper surface of the electronic component (12 or 13) on the opposite side of the interconnect (121 or 131) when the laser (151A) of the LAB tool (15) applies heat to the interconnect (121 or 131). The plate (351) may be configured to transfer heat, vibration, or compression to the interconnect (121 or 131) when the heat / compression plate (315) presses the upper surface of the electronic component (12 or 13).

[0070] The TCB tool (35) may be positioned above the LAB tool (15). In some examples, the plate (351) may be initially positioned spaced apart from the electronic components (12, 13) and may be lowered after the semiconductor device (30) is placed on the window (153). The plate (351) may be in contact with the top of the electronic components (12, 13) to maintain pressure on the top of the electronic components (12, 13). The plate (351) may apply pressure to the electronic components (12, 13) at a pressure as low as about 0.1 N (N), such as in the range of about 1 N to about 500 N. In some examples, the plate (351) may have a thickness in the range of about 1 mm to about 5 mm.

[0071] In some examples, the plate (351) can vacuum latch the electronic component (12, 13) while simultaneously compressing the electronic component (12, 13). In some examples, vacuum latching can be achieved by coupling the plate (351) to a vacuum generator that creates vacuum suction through an opening in the bottom surface of the plate (351) and exposes the top surface of the electronic component (12 or 13) to this vacuum opening of the plate (351). When heat is transferred to the electronic component (12 or 13), the plate (351) can remain latched to the electronic component (12 or 13) while compressing the electronic component (12 or 13) from above, thereby preventing the electronic component (12 or 13) from bending.

[0072] The plate (351) may be combined with a heat source (352) for heating the thermal / compression plate (351), and this heat may be transferred to the electronic component (12 or 13) when the plate (351) comes into contact with the electronic component (12 or 13). In some examples, the heat source (352) may be maintained at a preset temperature in the range of about 10°C to about 450°C.

[0073] In some examples, the TCB tool (35) is configured to vibrate the plate (351) or to induce vibration of the electronic component (12 or 13) against the substrate (11), such vibration may induce heat due to friction of the interconnect (121 or 131). In some examples, such vibration-induced heat of the interconnect (121 or 131) may induce or help to bond the interconnect (121 or 131) with the substrate (11).

[0074] The heat transferred from the plate (351) to the electronic component (12 or 13) can prevent warping that may occur due to a discrepancy between the upper and lower temperatures of the electronic component (12 or 13). For example, if only the LAB tool (15) is used, the laser beam (151A) can heat the bottom surface of the electronic component (12 or 13) more than the top surface of the electronic component (12 or 13), which can cause warping, and cause it to expand more. This tendency to warp can be controlled by applying compensating heat to the upper surface of the electronic component (12 or 13) with a plate (351). In some examples, the temperature of the substrate (11) may be kept lower than the temperature of the interconnect (121 or 131) when heat is applied to the interconnect (121 or 131) from the LAB tool (15). In some examples, the temperature of the electronic component (12 or 13) with the TCB tool (35) may be kept lower than the temperature of the interconnect (121 or 131) when heat is applied to the interconnect (121 or 131) from the LAB tool (15).

[0075] FIG. 5B illustrates a semiconductor device (30) and a LAB tool (15) while a laser beam (151A) is irradiated during a bonding process. An exemplary method of bonding the semiconductor device (30) to a substrate (11) by irradiating a laser beam (151A) from a laser source (151) to melt the interconnect (121 or 131) of the semiconductor device (30) in the example illustrated in FIG. 5B may be similar to the exemplary method illustrated in FIG. 3B and FIG. 4B. In the example illustrated in FIG. 5B, a thermal / compression bonding tool (35) may compress or heat the electronic device (12 or 13) from above during the bonding process. In some examples, heat may be applied to the laser beam (151A) from the LAB tool (15) and the interconnect (121 or 131) through a substrate surface opposite to the surface where the electronic component (12 or 13) is located. Heat, vibration, or compression may be applied to the TCB tool (35) and interconnect (121 or 131) through the electronic component (12 or 13). In some examples, the laser beam (151A) may have a depth of field (DOF), and the interconnect (121 or 131) may be within the DOF when heated. In some examples, the LAB tool (15) and the TCB tool (35) may be applied simultaneously. In some examples, the window (153) may face or contact the side of the substrate (11) opposite to the substrate (11) where the electronic component (12 or 13) is located when heat is applied by the LAB tool (15).

[0076] FIG. 5C shows the LAB tool (15) after the bonding process is completed. In the example illustrated in FIG. 5C, once the bonding of the substrate (11) and the electronic components (12, 13) is completed, the irradiation of the laser beam (151A) may be stopped, the thermal / compression bonding tool (35) may be separated from the semiconductor device (30) and then lifted, and the semiconductor device (30) may move to the next step.

[0077] FIGS. 6A to 6D illustrate detailed cross-sectional views of exemplary steps of bonding described in relation to FIGS. 3B, 4B, and 5B with respect to exemplary semiconductor devices (10, 20, 30) using a LAB tool (15).

[0078] FIG. 6A illustrates semiconductor devices (10, 20, 30 and LAB tool (15)) while a laser beam is irradiated during the bonding process. FIG. 6A is similar to FIG. 3B, 4B, and 5B and shares corresponding descriptions. The LAB tool (15) shares corresponding features and elements as described in relation to FIG. 2. The TCB tool (35) may be optionally included with the LAB tool (15) for hybrid bonding of the semiconductor device (30) as previously described in relation to FIG. 5.

[0079] As previously described with respect to the stage block (152), in some examples the stage block (152a) may comprise a transparent material such as glass or quartz that allows the laser beam (151A) to pass through the stage block (152a). Also, as previously mentioned, in some examples the transmittance through the stage block (152a) may be about 90% or more for the laser beam (151a) to facilitate the LAB bonding process.

[0080] As illustrated, a laser beam (151A) is irradiated from a laser source (151) toward a stage block (152a), and this laser beam (151A) passes through the stage block (152a) through the window (153) portion of the stage block (152a) and reaches the substrate (11) of the semiconductor device (10, 20, 30). The laser beam (151A) can transfer or induce heat to the interconnects (121, 131, 141). In some examples, after reaching the substrate (11) through the stage block (152a), the laser beam (151A) may pass through the substrate (11) and then reach the interconnects (121, 131, 141) to heat them through thermal irradiation. In some examples, the interconnects (121, 131, 141) may be positioned at a focal length or focal length within the depth of field (DOF) range of the laser beam (151A), and focusing the laser beam (151A) on the interconnects (121, 131, 141) allows for more heating than on the substrate (11) or electronic components (12, 13, 14). In some examples, the laser beam (151A) reaches the substrate (11) through a stage block (152a) and then induces heat in one or more areas of the substrate (11), and these heated areas of the substrate can heat the interconnects (121, 131, 141) through heat conduction.

[0081] The interconnects (121, 131, 141) can be heated until they are bonded to the conductive structure (112) of the substrate (11). By appropriately controlling the heat and time variables, the bonding time for fast throughput can be minimized, while avoiding exposure to high temperatures to minimize excessive thermal expansion or warping of the substrate (11). In some examples, the laser beam (151A) may be irradiated for about 2000 ms or less, or about 1000 ms or less, to induce proper heating of the interconnects (121, 131, 141) and bonding with the substrate (11). In some examples, the heat generated by the laser beam (151A) on the interconnect (121, 131, 141) or substrate (11) can be controlled to be maintained at about 300°C or less than 350°C or about 230°C to about 280°C, such as in the range of about 150°C to about 350°C.

[0082] FIG. 6B illustrates semiconductor devices (10, 20, 30) and a LAB tool (15) while a laser beam is irradiated during the bonding process. FIG. 6B is similar to FIG. 3B, 4B, and 5B and shares corresponding descriptions. The LAB tool (15) shares corresponding features and elements as described in relation to FIG. 2. A TCB tool (35) may be optionally included with the LAB tool (15) for hybrid bonding of the semiconductor device (30) as previously described in relation to FIG. 5.

[0083] As described above, with respect to the stage block (152), in some examples, the stage block (152b) may comprise an opaque material, such as ceramic, that obstructs or blocks the laser beam (151A) from passing through the stage block (152b). In some examples, the opaque material of the stage block (152b) may comprise a metal material. As described above, in some examples, the transmittance through the stage block (152) may be less than 90%, such as 0% for the laser beam (151A).

[0084] As illustrated, a laser beam (151A) is irradiated from a laser source (151) toward the stage block (152b) toward the window (153) portion of the stage block (152b). Although this laser beam (151A) is substantially blocked by the stage block (152b), it can heat the stage block (152b), such as through thermal irradiation. In turn, this heat from the heated stage block (152b), indicated by the wavy upward arrow, can be transferred to heat the interconnects (121, 131, 141). In some examples, the heat from the stage block (152b) reaches the substrate (11) and extends by thermal conduction to heat the interconnects (121, 131, 141).

[0085] The interconnects (121, 131, 141) can be heated until they are bonded to the conductive structure (112) of the substrate (11). By appropriately controlling the heat and time variables, the bonding time can be reduced while avoiding exposure to high temperatures, thereby minimizing excessive thermal expansion of the substrate (11) or warping of the bottom. In some examples, a laser beam (151A) may be irradiated for about 10,000 ms to about 30,000 ms, or for a longer period to about 10 minutes to induce appropriate heating and bonding of the interconnects (121, 131, 141) to the substrate (11). In some examples, for instance, the heat generated on the substrate (11) or interconnect (121, 131) by the laser beam (151A) may be in the range of about 150°C to about 350°C, e.g., about 230°C to about 280°C.

[0086] FIG. 6C illustrates semiconductor devices (10, 20, 30) and a LAB tool (15) while a laser beam (151A) is irradiated during the bonding process. FIG. 6C is similar to FIG. 3B, 4B, and 5B and shares corresponding descriptions. The LAB tool (15) shares corresponding features and elements as described in relation to FIG. 2. A TCB tool (35) may be optionally included with the LAB tool (15) for hybrid bonding of the semiconductor device (30) as previously described in relation to FIG. 5.

[0087] In some examples, the stage block (152c) may include a combination of transparent and opaque materials. For example, the stage block (152c) may include a stack of a transparent material portion (152x) and an opaque material portion (152y). The features or material or characteristics of the transparent portion (152x) may be similar to those described in relation to the stage block (152a). The features or material or characteristics of the opaque portion (152y) may be similar to those described in relation to the stage block (152b).

[0088] As illustrated, a laser beam (151A) is irradiated from a laser source (151) toward a stage block (152c), and this laser beam (151A) can pass through a transparent material portion (152x) of the stage block (152c) and reach an opaque material portion (152y). Although the laser beam (151A) is substantially blocked from passing through the opaque material portion (152y), the opaque material portion (152y) or the transparent material portion (152x) can be heated, for example, by thermal irradiation, thereby heating the upper part of the stage block (152c). In turn, this heat, indicated by the wavy upward arrow, can be transferred to heat the interconnects (121, 131, 141). In some examples, heat from the stage block (152c) extends through the substrate (11) by thermal conduction and heats the interconnects (121, 131, 141). The interconnects (121, 131, 141) can be heated until they are joined to the conductive structure (112) of the substrate (11). In some examples, because the laser beam (151A) is blocked by an opaque material portion (152y) and reaches the substrate (11), the heating of the substrate (11) or the interconnects (121, 131, 141) via thermal conduction can be controlled to be kept lower than when the laser beam (151A) reaches and heats the substrate (11) via thermal irradiation. This thermal control can be used to prevent or limit excessive thermal expansion or warping of the substrate (11).

[0089] There may be examples where the thickness of the transparent portion (152x) is greater than the thickness of the opaque portion (152y). For example, the thickness of the transparent portion (152x) may be in the range of about 1 mm to about 300 mm, and the thickness of the opaque portion (152y) may be in the range of about 100 µm to about 100 mm. In some examples, the opaque portion (152y) may include one or more plating layers covering the transparent portion (152x).

[0090] The interconnects (121, 131, 141) may be heated until they are bonded to the conductive structure (112) of the substrate (11). By appropriately controlling the heat and time variables, exposure to high temperatures may be avoided to reduce bonding time and minimize excessive thermal expansion or warping of the substrate (11). In some examples, a laser beam (151A) may be irradiated for about 5000 ms to about 20000 ms to induce proper heating of the interconnects (121, 131, 141) and bonding with the substrate (11). In some examples, the heat generated by the laser beam (151A) on the interconnects (121, 131, 141) or the substrate (11) may be controlled to be maintained at about 300°C or less than 350°C or about 230°C to about 280°C, such as in the range of about 150°C to about 350°C.

[0091] FIG. 6D shows semiconductor devices (10, 20, 30 and LAB tool (15)) while a laser beam is irradiated during the bonding process. FIG. 6D is similar to FIG. 3B, 4B, and 5B and shares corresponding descriptions. The TCB tool (35) shares corresponding features and elements as described in relation to FIG. 2. The TCB tool (35) may be optionally included together with the LAB tool (15) for hybrid bonding of the semiconductor device (30) as previously described in relation to FIG. 5.

[0092] The stage block (152d) may be an embodiment of the stage block (152) described in relation to FIG. 1-5. As previously described in relation to the stage block (152), in some examples the stage block (152d) may include a grating that allows a certain amount of laser to pass through. In some examples the stage block (152d) may include a combination of transparent and opaque materials. For example, the stage block (152d) may include a stack of a transparent material portion (152x) and an opaque material portion (152z). The features or material or characteristics of the transparent portion (152x) may be similar to those described in relation to the stage block (152a). The features or material or characteristics of the opaque portion (152z) may be similar to those described in relation to the stage block (152b) or the opaque portion (152y).

[0093] The opaque portion (152z) comprises a grid or pattern of openings through an opaque material that optionally allows a laser beam (151A) aligned with these openings to pass through the stage block (152d). In some examples, these openings may be aligned perpendicularly with the interconnect (121, 131, 141) or the semiconductor device (10, 20, 30) on the substrate (11). In some examples, the opaque material is configured to be aligned perpendicularly with the portion of the first substrate that is misaligned with the interconnect (121, 131, 141) or the semiconductor device (10, 20, 30).

[0094] These aligned laser beams (151A) will induce heating and bonding of the interconnects (121, 131, 141) as described for the laser beams (151A) passing through the stage block (152a) in FIG. 6A. Such an opening and misaligned laser beams (151A) will instead be blocked from passing through the stage block (152d) by the opaque material of the opaque part (152z).

[0095] As described, a laser beam (151A) is irradiated from a laser source (151) toward a stage block (152d), and this laser beam (151A) can pass through the transparent material portion (152x) of the stage block (152d). The laser beam (151A), aligned with an opening defined by a grating of the opaque portion (152z), passes through the stage block (152d) to reach the substrate (11) and can cause heating of the interconnects (121, 131, 141) for bonding with the substrate.

[0096] The opening of the grating in the opaque portion (152z) and the misaligned laser beam (151A) will be substantially blocked from passing through the stage block (152d). The interconnects (121, 131, 141) can be heated until they are bonded to the conductive structure (112) of the substrate (11). The grating in the opaque portion (152z) can be configured so that the area of ​​the substrate (11) that needs to be exposed for heating the interconnects (121, 131, 141) by the laser beam (151A) through the stage block (152d) is aligned with the pattern of the opening. Other areas of the substrate (11) that do not need to be exposed for bonding can be aligned with the opaque material of the opaque portion (152z) or misaligned with the pattern of the opening to be blocked or shielded from the laser beam (151A). These features can limit unnecessary heat exposure of the shielding area of ​​the substrate (11) to limit excessive thermal expansion or warping.

[0097] In some examples, the lattice of the opaque portion (152z) exposes the part of the substrate (11) on which the semiconductor device (10, 20, 30) is located, while other parts of the substrate (11) outside the periphery of the semiconductor device (10, 20, 30) remain shielded by the material of the opaque portion (152z).

[0098] In some examples, the lattice of the opaque portion (152z) is configured such that the pattern of the openings exposes the portion of the substrate (11) on which the semiconductor device (10, 20, 30) is located, while other portions of the substrate (11) outside the periphery of the interconnect (121, 131) remain shielded by the material of the opaque portion (152z). For example, as shown with respect to the semiconductor device (20), the lattice is configured such that the opaque portion (152z) exposes (a) the portion of the substrate (11) under the semiconductor device (12, 13) at the periphery of the interconnect (121, 131), and (b) shields the portion of the substrate (11) under the semiconductor device (12, 13) outside the periphery of the interconnect (121, 131).

[0099] There may be examples where the thickness of the transparent portion (152x) is greater than the thickness of the opaque portion (152z). For example, the thickness of the transparent portion (152x) may be in the range of about 1 mm to about 300 mm, and the thickness of the opaque portion (152z) may be in the range of about 100 µm to about 100 mm. In some examples, the opaque portion (152z) may include one or more patterned plating layers covering the transparent portion (152x).

[0100] The interconnects (121, 131, 141) can be heated until they are bonded to the conductive structure (112) of the substrate (11). By appropriately controlling the heat and time variables, the bonding time for fast throughput can be minimized, while avoiding exposure to high temperatures to minimize excessive thermal expansion or warping of the substrate (11). In some examples, a laser beam (151A) can be irradiated for about 2000 ms or less or about 1000 ms or less to induce proper heating of the interconnects (121, 131, 141) and bonding with the substrate (11). In some examples, the heat generated by the laser beam (151A) on the interconnect (121, 131, 141) or substrate (11) can be controlled to be maintained at about 300°C or less than 350°C or about 230°C to about 280°C, such as in the range of about 150°C to about 350°C.

[0101] In some examples, the LAB tool (15) may include a laser source (151U) which may be similar to a laser source (151) but may be configured to emit a laser beam (151B) toward the upper surface of a semiconductor device (10, 20, 30) or the upper surface of a stage block (152a). The laser beam (151B) may be similar to a laser beam (151A) and may induce heating of the interconnects (121, 131, 141) from each semiconductor device (10, 20, 30) to help join the interconnects (121, 131, 141).

[0102] As illustrated in FIGS. 6A-6D, the LAB tool (15) may be provided with a compression tool (65) as part of a hybrid bonder tool (60). The hybrid bonder tool (60) may include or be similar to the hybrid bonder tool (40) in some embodiments as described in relation to FIG. 2B or FIG. 5. For example, the compression tool (65) may include or be similar to the TCB tool (35). The compression tool (65) may be similar to a plate (351) or may include a plate (651) capable of providing one or more of compression, heat, or vibration to the semiconductor device (30). In some examples, the plate (651) of the compression tool (65) may serve as a weight plate that provides compression without providing heat or vibration to the top of the semiconductor device (30), such as the top of a semiconductor component (12 or 13). In some examples, the inherent weight of the plate (651) can provide compression on the upper surface of the semiconductor device (30) without applying additional force to push the plate (651) onto the semiconductor device (30). The compression provided by the plate (651) on the upper surface of the semiconductor device (30) can prevent or limit excessive bending of the semiconductor device (30), semiconductor components (12, 13), or substrate (11) during bonding.

[0103] In some embodiments, the laser source (151U) may be used with the compression tool (65) during bonding. For example, the features, characteristics, or material of the plate (651) of the compression tool (65) may be similar to those described for the stage block (152a, 152b, 152c, or 152d) in terms of transmittance so that the laser beam (151B) can induce bonding between the semiconductor device (30) and the substrate (11) through the compression tool (65).

[0104] For example, as illustrated in FIG. 6A, the plate (651) may include a transparent or transparent material similar to the stage block (152a). Similar to what was described in relation to the stage block (152a) and the laser beam (151A), a laser beam (151B) from the laser source (151U) passes through the plate (651) and reaches the semiconductor device (30) or semiconductor component (12, 13) to induce heat for bonding the interconnect (121, 131).

[0105] As another example, as illustrated in FIG. 6B, the plate (651) may comprise an opaque or opaque material similar to the stage block (152b). The laser beam (151B) from the laser source (151U) may be obstructed or blocked by the plate (651), but similar to the description for the stage block (152b) and the laser beam (151A), the plate (651) may be heated to induce heat transfer for bonding the interconnects (121, 131).

[0106] As another example, as illustrated in FIG. 6C, the plate (651) may include a combination or stack of transparent and opaque materials or layers similar to the stage block (152c). A laser beam (151B) from a laser source (151U) passes through the opaque material of the plate (651) similarly to the stage block (152c) and laser beam (151A) and is obstructed or blocked by the reaching plate (651), whereby the laser beam may be blocked but the plate (651) may be heated to induce heat transfer for bonding the interconnects (121, 131).

[0107] As another example, as illustrated in FIG. 6D, the plate (651) may include a combination or stack of transparent and opaque materials or layers defining a grid having transparent and opaque parts, similar to the stage block (152d). A portion of the laser beam (151B) from the laser source (151U) may be blocked by the opaque material of the grid of the plate (651). However, similar to the description for the stage block (152d) and the laser beam (151A), a portion of the laser beam (151B) from the laser source (151U) may pass through the transparent material and the opening pattern of the grid of the plate (651) to reach the top of the semiconductor device (30) or semiconductor component (12, 13) to induce heat transfer for bonding the interconnect (121, 131).

[0108] FIG. 7A illustrates a cross-sectional view of a bonding stage for bonding interconnects of semiconductor devices using a LAB tool (75). The LAB tool (75) may include a laser source (751L) configured to emit a laser beam (751A) or a laser source (751U) configured to emit a laser beam (751B). FIG. 7B illustrates a plan view of different exemplary operating conditions of the LAB tool (75) having the laser beam (751A) of the laser source (751L) or the laser beam (751B) of the laser source (751U). A lab bonding tool (75) for bonding interconnects of semiconductor devices (10', 10, 20, 30) to respective substrates is illustrated in FIG. 7A.

[0109] The semiconductor device (10)' is illustrated as being located on a stage block (152) and may be similar to the semiconductor device (10), 20, 30) or a variation thereof. The semiconductor device (10)' may include an electronic component (12 or 13) on a first surface of a substrate (11)' and may include an interconnect (101') or an electronic component (13') on a second surface of the substrate (11)'. For example, in some examples, the electronic component (13') may not be on the second surface of the semiconductor device (10)' substrate (11)', or the electronic component (13') may not be on the first surface of the substrate (11)' so that the electronic component (12) can be attached to the stage block (152). In some examples, interconnects (121, 131, 131' or 141) may be simultaneously bonded to each side of the substrate (11)' by a laser beam (751A or 751B) of a laser source (751L or 751U). In some examples, interconnects (121 or 131) of electronic components (12 or 13) may be pre-bonded to a first side of the substrate (11)' using the first LAB bonding or hybrid bonding process or tool described herein, and then the semiconductor device (10)' may be positioned on a stage block (152) such that a second side of the substrate (11)' faces the laser source (751U) of the LAB tool (75) for bonding interconnects (101' or 131') by a laser beam (751B) as shown in FIG. 7A.

[0110] The LAB tool (75) may be similar to the LAB tool (15) and may include a laser source (751L) directed toward the stage block (152). The stage block (152) may include any of one or more variations, including but not limited to those described with respect to the stage blocks (152a, 152b, 152c, 152d) in relation to FIGS. 6A-6D. The laser source (751L) may be similar to the laser source (151) and may include a laser emitter array of laser emitters (755L). In some examples, the laser source (751L) may be referred to as a laser emitter array, a laser emitter panel, or a laser diode panel.

[0111] The laser emitter (755L) may individually emit individual laser beams (751A) that may be similar to the laser beam (151A). The laser emitter (755L) and each laser beam (751A) may be individually aligned perpendicularly with a part of a target, such as a part of the stage block (152) or a part of the semiconductor device (10, 10', 20, 30). In some examples, the laser beams (751A) emitted by the laser source (751L) may leave each laser emitter (755L) and proceed individually toward each target. In some examples, the laser source (751L) does not need to rely on filters, collimators, or lenses to group, aim, or orient a group of laser beams (751A). The laser source (751L) may include an area large enough to process many substrates simultaneously, such as RDL substrates, pre-formed substrates, or wafers. In some examples, the length and width of the laser source (751L) may be at least about 300 mm x 300 mm. For example, the length and width of the laser source (751L) may be at least about 600 mm x 600 mm.

[0112] In some examples, the individual laser emitter (755L) may include an indium phosphide (InP), gallium nitride (GaN), zinc selenide (ZnSe), aluminum gallium arsenide (AlGaAs), indium gallium nitride (InGaN), or zinc oxide (ZnO) diode. There may be examples where the individual laser emitter (755L) may include one or more laser diodes. In some examples, the individual laser emitter (755L) may have a length or width of about 100 μm to about 2 mm. In some examples, the target area of ​​the individual laser emitter (755L) may have a length or width of about 100 μm to about 2 mm. In some examples, the individual laser emitter (755L) may emit a laser beam (751A) with an output of about 10 milliwatts to about 2 watts. In some examples, individual laser emitters (755L) can emit a laser beam (751A) with a wavelength of about 600 μm to about 2,000 μm.

[0113] As can be seen in FIGS. 7A and 7B, the LAB tool (75) can control the laser source (751L) so that different laser emitters (755L) can selectively emit each laser beam (751A) at different power levels toward different target areas. For example, the LAB tool (75) can configure different individual laser emitters (755L) to emit each laser beam (751A) at various laser power levels, such as a high-power beam (751x), a medium-power beam (751y) (lower power than the high-power beam (751x)), or a low-power beam (751y) (lower power than the high-power beam 751x or the medium-power beam 751y). In some examples, these laser configurations can achieve different, adjustable, or varying power or temperature gradients across the target. In some examples, one or more laser beams (751A) emitted as low-power beams (751z) may correspond to a no-power or "off" state.

[0114] In some examples or areas, the LAB tool (75) can control the laser source (751L) so that the laser emitters (755L) vertically aligned within the periphery of the interconnects (121, 131, 141) emit each laser beam (751A) as a high-power beam (751x) to heat the interconnects (121, 131, 141) and bond them to the substrate (11).

[0115] In some examples or regions, as can be seen in relation to the semiconductor device (20), the LAB tool (75) can control the laser source (751L) so that the laser emitters (755L) vertically aligned within the periphery of the electronic components (12, 13, 14) emit each laser beam (751A) as a high-power beam (751x) to bond the electronic components (12, 13, 14) to the substrate (11).

[0116] In some examples, the LAB tool (75) can control the laser source (751L) so that the laser emitter (755L), which is aligned vertically with the peripheral outer region of the interconnect (121, 131, 141), emits the respective laser beam (751A) as a medium power beam (751y) or a low power beam (751z).

[0117] For example, in FIG. 7A, a laser emitter (755L) that is vertically aligned with the electronic components (12, 13) and located outside the periphery of the interconnect (121, 131) in relation to the semiconductor device (10) emits each laser beam (751A) as an intermediate power beam (751y).

[0118] For example, in FIG. 7A, in relation to the semiconductor device (30), a laser emitter (755L) that is vertically aligned with the electronic components (12, 13) and located outside the periphery of the interconnect (121, 131) emits each laser beam (751A) as a low-power beam (751z).

[0119] In some examples, as shown in relation to the semiconductor device (20), the LAB tool (75) can control the laser source (751L) so that the laser emitter (755L), which is vertically aligned with the area between the periphery of the electronic components (12, 13, 14), emits each laser beam (751A) as a low-power beam (751z).

[0120] In some examples, as shown in relation to the semiconductor device (30), the LAB tool (75) can control the laser source (751L) so that the laser emitter (755L), which is vertically aligned with the area between the periphery of the electronic components (12, 13), emits each laser beam (751A) as an intermediate power beam (751y).

[0121] In some examples or regions, the LAB tool (75) can control the laser source (751L) so that the laser emitter (755L), which is vertically aligned with the boundary region between the semiconductor devices (10, 10', 20, 30), emits each laser beam (751A) as a low-power beam (751z).

[0122] In some examples, the LAB tool (75) may include a laser source (751U) located on a stage block (152). In some examples, the laser source (751U) may be similar to the laser source (151 or 151U). In some examples, the laser source (751U) may be similar to the laser source (751L) and may include a laser emitter array of laser emitters (755U) which may be similar to the laser emitter (755L). There may be embodiments in which the LAB tool (75) may include the laser source (751U) without the laser source (751L), or may include the laser source (751L) without the laser source (751U).

[0123] The laser emitter (755U) may individually emit individual laser beams (751B) that may be similar to the laser beam (751A). The laser emitter (755U) and each laser beam (751B) may be individually aligned perpendicularly with a part of a target, such as a part of the stage block (152) or a part of the semiconductor device (10, 10', 20, 30). In some examples, the laser beams (751B) emitted by the laser source (751U) may leave each laser emitter (755U) and proceed individually toward each target. In some examples, the laser source (751U) does not need to rely on filters, collimators, or lenses to group, aim, or orient a group of laser beams (751B).

[0124] The upper laser emitter (755U) of the upper laser source (751U) can be aimed toward the upper side of the stage block (152), and the lower laser emitter (755L) of the lower laser source (751L) can be aimed toward the lower side of the stage block (152). The LAB tool (75) can control the laser source (751U) and the laser source (751L) to simultaneously emit or adjust a laser beam (751A or 751B) while bonding the semiconductor device (10, 10', 20, 30) or interconnect (121, 131, 101' or 141) to the substrate (11).

[0125] As shown in FIGS. 7A and 7B, for example, a LAB tool (75) can control a laser source (751L) so that different individual laser emitters (755L) can selectively emit each laser beam (751A) at different power levels, such as a high-power beam (751x), a medium-power beam (751y) (lower power than the high-power beam (751x)), or a low-power beam (751y) (lower power than the high-power beam (751x) or the medium-power beam (751y)). In some examples, this laser configuration can achieve different, adjustable, or varying power or temperature gradients across the entire target. In some examples, one or more laser beams (751B) emitted as a low-power beam (751z) may correspond to a no-power or "off" state.

[0126] In some examples or regions, the LAB tool (75) can control the laser source (751U) so that the laser emitter (755U), which is vertically aligned within the periphery of the interconnects (121, 131, 101', 141), emits each laser beam (751B) as a high-power beam (751x) to heat each target interconnect (121, 131, 101', 141) and bond it to the substrate (11).

[0127] In some examples or areas, as shown with respect to the semiconductor device (20), the LAB tool (75) can control the laser source (751U) so that the laser emitters (755U) vertically aligned within the periphery of the target electronic component (12, 14) emit each laser beam (751B) as a high-power beam (751x) to bond the electronic component (12, 14) to the substrate (11). In some cases, it is not necessary to target all components of the device. For example, as shown in the semiconductor device (20), the LAB tool (75) can control the laser source (751U) so that the laser emitters (755U) vertically aligned within the periphery of the electronic component (13) emit each laser beam (751B) as a low-power beam (751z) or a medium-power beam (751y). Such adjustments may be made, for example, when the electronic component (13) includes a material that may be sensitive to the laser beam (751B) or a material that may block, reflect, or obstruct the passage of the laser beam (751B). In some examples, such a material may include a mold compound, or a metal such as for heat dissipation or a metal such as for electromagnetic interference (EMI) shielding.

[0128] In some examples, the LAB tool (75) can control the laser source (751U) so that the laser emitter (755U), which is aligned vertically with the outer region of the interconnect (121, 131, 101', 141), emits the respective laser beam (751A) as a medium power beam (751y) or a low power beam (751z).

[0129] As illustrated in FIG. 7A, the compression tool (65) may be provided together with the LAB tool (75) as part of the hybrid bonder tool (70). The compression tool (65) may be as described in relation to FIG. 7.

[0130] The compression tool (65) may include or be similar to the TCB tool (35), wherein the plate (651) may be similar to the plate (351) or may provide one or more of compression, heat, or vibration to the semiconductor device (30) during bonding. In some examples, the plate (651) of the compression tool (65) may serve as a weight plate that provides compression to the top of the semiconductor device (30), such as the top of the semiconductor component (12 or 13), without providing heat or vibration. In some examples, the inherent weight of the plate (651) may provide compression to the top of the semiconductor device (30) without applying additional force to push the plate (651) onto the semiconductor device (30). The compression provided by the plate (651) on the top surface of the semiconductor device (30) may prevent or limit excessive bending of the semiconductor device (30), semiconductor component (12, 13), or substrate (11) during bonding.

[0131] In some embodiments, the laser source (751U) may be used with the compression tool (65) during bonding. The features, characteristics, or material of the plate (651) of the compression tool (65) may be similar to those already described in relation to any one of FIGS. 6A-6D so that the laser beam (751B) can induce bonding between the semiconductor device (30) and the substrate (11) through the compression tool (65).

[0132] For example, similar to that described for FIG. 6A, the plate (651) may comprise a transparent or transparent material. A laser beam (751B) from a laser source (751U), such as a high-power beam (751x) or a medium-power beam (751y), may pass through the plate (651) to reach each target area of ​​the semiconductor device (30) or semiconductor component (12, 13) to induce heat for bonding the interconnects (121, 131).

[0133] As another example, similar to that described for FIG. 6B, the plate (651) may comprise an opaque or opaque material. A laser beam (751B) from a laser source (751U), such as a high-power beam (751x) or a medium-power beam (751y), may be obstructed or blocked by the plate (651), but the plate (651) may be heated to induce heat transfer for bonding the interconnects (121, 131).

[0134] As another example, similar to that described for FIG. 6C, the plate (651) may comprise a combination or stack of transparent and opaque materials or layers. A laser beam (751B) from a laser source (751U), such as a high-power beam (751x) or a medium-power beam (751y), may pass through the transparent material of the plate (651) and reach the opaque material of the plate (651), at which point the laser beam may be blocked but may heat the plate (651) to induce heat transfer for bonding the interconnects (121, 131).

[0135] As another example, similar to that described in FIG. 6D, the plate (651) may comprise a combination or stack of transparent and opaque materials or layers defining a grid having transparent and opaque portions. A portion of the laser beam (751B) from the laser source (751U) may be blocked by the opaque material of the grid of the plate (651). However, a portion of the laser beam (751B) from the laser source (751U), such as a high-power beam (751x) or a medium-power beam (751y), passes through the transparent material and the opening pattern of the grid of the plate (651) to reach the top of the semiconductor device (30) or the semiconductor component (12, 13) to induce heat transfer for bonding the interconnect (121, 131).

[0136] FIG. 7C illustrates a plan view of a semiconductor device (20) (including electronic components (12, 13, 14) on a substrate (11)) and a laser source (152) (including each laser emitter (755) aligned vertically with the semiconductor device (20), and these plan views correspond to each area of ​​the side view of FIG. 7A. The laser source (751) may correspond to either a laser source (751L) or a laser source (751U). The laser emitters (755) may correspond to either a laser emitter (755L or 755U).

[0137] In this embodiment, the LAB tool (75) controls a laser emitter (755) that is vertically aligned with the electronic components (12, 13, 14) to emit a laser beam (e.g., the laser beam (751A or 751B) of FIG. 7a) as a high-power beam (751x) to induce bonding with the substrate (11) of the electronic components (12, 13, 14). In this embodiment, the LAB tool (75) also controls a laser emitter (755) that is not vertically aligned with the electronic components (12, 13, 14) to emit a laser beam (e.g., the laser beam (751A or 751B) of FIG. 7a) as a low-power beam (751z).

[0138] In some examples, the LAB tool (75) may include a bonding monitor (75i) that measures the temperature of several regions of the semiconductor device (20) in real time during bonding. The bonding monitor (75i) may include, for example, an optical infrared imager or a monitor. The bonding monitor (75i) may be configured to determine whether a target temperature is achieved by the laser beam of the laser emitter (755) for each of these several regions of the semiconductor device (20). Such monitoring may be useful for verifying that an appropriate temperature for interconnect bonding has been achieved and for protecting against temperatures that could cause excessive heating, thermal expansion, warping, or damage to the substrate (11) or electronic components (12, 13, 14). When the bonding monitor (75i) determines that a portion of the target area of ​​the semiconductor device (20) is measured to be outside the target temperature range ("off range") during bonding, the LAB tool (75) reacts in real time and selectively controls the individual laser emitter (755) aligned with it to increase or decrease the output of the laser beam emitted to the off-range outside the range, thereby bringing it within the target temperature range.

[0139] Examples of steps 7C1-7C4 can illustrate this operation. As shown in FIG. 7C, the zoom-in portion (12Z) of the electronic component (12) and the zoom-in portion (755Z) of the laser source (751) are illustrated. The zoom-in portion (755Z) represents a laser emitter (755) aligned vertically with the electronic component (12).

[0140] In step 7C1, as can be seen in the zoom-in section (755Z), the laser emitter (755) emits a laser beam with initial or reference power toward an area corresponding to the electronic component (12), and as can be seen in the zoom-in section (12Z), heat is correspondingly generated in the electronic component (12) by such laser beam.

[0141] In step 7C2, a bonding monitor (75i) that monitors the temperature of several regions of the electronic component (12) during bonding identifies off-regions (12-1) at temperatures higher than the target temperature range and off-regions (12-2) at temperatures lower than the target temperature range.

[0142] In step 7C3, based on monitoring information from the bonding monitor (75i), the LAB tool (75) selectively controls the laser emitter (755-1) and the laser emitter (755-2) to adjust the power of each laser beam. The laser emitter (755-1) is aligned vertically with the off-region (12-1) of the electronic component (12), and the laser emitter (755-2) is aligned vertically with the off-region (12-2) of the electronic component (12). To respond to the high temperature measured in the off-region (12-1) of the electronic component (12), the LAB tool (75) may selectively control the laser emitter (755-1) to reduce the power of the laser beam. In response to the low temperature measured in the off-region (12-2) of the electronic component (12), the LAB tool (75) can selectively control the laser emitter (755-2) to increase the power of the laser beam.

[0143] In step 7C4, the off-regions (12-1, 12-2) of the electronic component (12) reach their target temperature as a result of laser beam adjustment of the corresponding laser emitters (755-1 and 755-2). Since the bonding monitor (75i) can continuously monitor multiple regions of the electronic component (12), the LAB tool (75) can selectively control the power of each laser emitter (755) as needed to keep multiple regions of the electronic component (12) within the target temperature range during bonding.

[0144] The present disclosure includes references to specific examples. However, those skilled in the art will understand that various modifications and equivalents may be substituted without departing from the scope of the invention. Additionally, for the sake of simplicity and clarity of the drawings, those skilled in the art will understand that various variations or options may be essentially disclosed by the drawings supported by the detailed description. For example, the semiconductor device (10, 10', 20, 30) may additionally secure to each substrate (11, 11') a dielectric, such as an encapsulant, such as an underfill or mold compound, around each interconnect (121, 131, 141, 101'). As another example, any of the semiconductor device (10, 10', 20, or 30) may include an encapsulant, such as a mold compound, covering one or more sides of the substrate (11), 11', and one or more sides of the component (12, 13). Additionally, modifications to the disclosed examples may be made without departing from the scope of the present disclosure. Accordingly, the present disclosure is not limited to the disclosed examples and will include all examples falling within the scope of the appended claims.

Claims

Claim 1 A laser assisted bonding (LAB) tool comprises: a stage block having a top side, a bottom side, and a lateral side extending between the top side and the bottom side; a first vertical laser source located above the top side of the stage block and facing the top side of the stage block; and a second vertical laser source located below the bottom side of the stage block and facing the bottom side of the stage block; wherein: the top side of the stage block is configured to support a substrate and a first electronic component including a first interconnect coupled to the substrate; and the first vertical laser source is configured to emit a first vertical laser beam at a first vertical angle with respect to the top side of the substrate toward a substrate located on the top side of the stage block in order to induce a first heat in the first interconnect to bond the first interconnect to the substrate. The second vertical laser source is configured to emit a second vertical laser beam vertically at a second vertical angle relative to the bottom surface of the substrate toward the bottom surface of the stage block to induce a second row in the first interconnect; the first row and the second row bond the first interconnect to the substrate, the system. Claim 2 A system satisfying one or both of the following: in claim 1, the first size of a first target area of ​​a first vertical laser beam emitted by the first vertical laser source is adjustable; and the second size of a second target area of ​​a second vertical laser beam emitted by the second vertical laser source is adjustable. Claim 3 A system satisfying one or both of the following: in claim 1, the power and / or temperature gradient of the first vertical laser beam emitted by the first vertical laser source is adjustable; and the power and / or temperature gradient of the second vertical laser beam emitted by the second vertical laser source is adjustable. Claim 4 A system according to claim 1, wherein the first vertical laser source emits the first vertical laser beam and the second vertical laser source is configured to simultaneously emit the second vertical laser beam. Claim 5 A system according to claim 1, wherein the stage block comprises a transparent material portion that allows the second vertical laser beam to pass through and reach the substrate. Claim 6 A system according to claim 1, wherein the stage block includes an opaque material portion that blocks the second vertical laser beam from passing through and reaching the substrate. Claim 7 A system according to claim 1, wherein the stage block comprises: an opaque material portion that blocks the second vertical laser beam from passing through and reaching the substrate; and a transparent material portion that allows the second vertical laser beam to pass through and reach the opaque material portion. Claim 8 A system according to claim 1, wherein the stage block comprises an opaque material portion; the opaque material portion comprises an opaque material and a grating that defines a pattern of openings penetrating the opaque material; the opaque material blocks the second vertical laser beam from passing through and reaching the substrate; the grating allows the second vertical laser beam to pass through the pattern of openings and reach the substrate; and the stage block comprises a transparent material portion that allows the second vertical laser to pass through and reach the substrate via the grating of the opaque material portion. Claim 9 A laser assisted bonding (LAB) tool comprising: a stage block having an upper surface, a lower surface, and a side extending between the upper surface and the lower surface; a first vertical laser source located on the upper surface of the stage block and facing the upper surface of the stage block; a second vertical laser source located below the lower surface of the stage block and facing the lower surface of the stage block; and a compression tool located on the upper surface of the stage block; wherein: the upper surface of the stage block is configured to support a substrate and a first electronic component coupled to the substrate and comprising a first interconnect; the compression tool is configured to provide compression to the upper surface of the first electronic component; and the first vertical laser source is configured to emit a first vertical laser beam at a first vertical angle with respect to the upper surface of the substrate toward a substrate located on the upper surface of the stage block to induce a first heat in the first interconnect to bond the first interconnect to the substrate; The second vertical laser source is configured to emit a second vertical laser beam vertically at a second vertical angle relative to the bottom surface of the substrate toward the bottom surface of the stage block to induce a second row in the first interconnect; the first row and the second row bond the first interconnect to the substrate, the system. Claim 10 In claim 9, the compression tool comprises a compression plate configured to provide the compression by pressing the upper surface of the first electronic component. Claim 11 A system satisfying one or both of the following: in claim 9, the first size of the first target area of ​​the first vertical laser beam emitted by the first vertical laser source is adjustable; and the second size of the second target area of ​​the second vertical laser beam emitted by the second vertical laser source is adjustable. Claim 12 A system according to claim 9, wherein the first vertical laser source emits the first vertical laser beam, the second vertical laser source emits the second vertical laser beam, and the compression tool is configured to simultaneously perform the compression on the upper surface of the first electronic component. Claim 13 In claim 9, the system comprises a stage block including a transparent material portion that allows the second vertical laser beam to pass through and reach the substrate. Claim 14 In claim 9, the system comprises a stage block that includes an opaque material portion that blocks the second vertical laser beam from passing through and reaching the substrate. Claim 15 In claim 9, the system comprises: an opaque material portion that blocks the second vertical laser beam from passing through and reaching the substrate; and a transparent material portion that allows the second vertical laser beam to pass through and reach the opaque material portion. Claim 16 In claim 9, the stage block comprises an opaque material portion; the opaque material portion comprises an opaque material and a grid defining a pattern of openings penetrating the opaque material; the opaque material blocks the second vertical laser beam from passing through and reaching the substrate; the grid allows the second vertical laser beam to pass through the pattern of openings and reach the substrate; and the stage block comprises a transparent material portion allowing the second vertical laser to pass through and reach the substrate through the grid of the opaque material portion. Claim 17 A method for manufacturing a semiconductor device comprises the steps of: providing a first electronic component coupled to a substrate, wherein the first electronic component includes a first interconnect; providing the substrate on a laser assisted bonding (LAB) tool, wherein the laser assisted bonding tool includes a stage block having an upper surface, a lower surface, and a side extending between the upper surface and the lower surface, and the upper surface of the stage block supports the substrate and the first electronic component; inducing a first heat in the first interconnect by a first vertical laser source positioned on the upper surface of the stage block and facing the upper surface of the stage block, wherein the first vertical laser source emits a first vertical laser beam at a first vertical angle with respect to the upper surface of the substrate toward the substrate positioned on the upper surface of the stage block to induce the first heat. A method for manufacturing a semiconductor device, comprising the step of inducing a second row in the first interconnect by a second vertical laser source located below the bottom surface of the stage block and facing the bottom surface of the stage block, wherein the second vertical laser source emits a second vertical laser beam vertically toward the bottom surface of the stage block at a second vertical angle with respect to the bottom surface of the substrate to induce the second row, wherein the first row and the second row bond the first interconnect to the substrate. Claim 18 A method for manufacturing a semiconductor device according to claim 17, comprising the step of adjusting one or both of: a first size of a first target area of ​​a first vertical laser beam emitted by the first vertical laser source; and a second size of a second target area of ​​a second vertical laser beam emitted by the second vertical laser source. Claim 19 A method for manufacturing a semiconductor device according to claim 17, comprising the step of providing compression to the upper surface of the first electronic component by means of a compression tool positioned on the upper surface of the stage block, wherein the compression tool comprises a compression plate configured to provide the compression by pressing the upper surface of the first electronic component. Claim 20 A method for manufacturing a semiconductor device according to claim 17, wherein the stage block comprises an opaque material portion; the opaque material portion comprises an opaque material and a grid defining a pattern of openings penetrating the opaque material; the opaque material blocks the second vertical laser beam from passing through and reaching the substrate; the grid allows the second vertical laser beam to pass through the pattern of openings and reach the substrate; and the stage block comprises a transparent material portion allowing the second vertical laser to pass through and reach the substrate through the grid of the opaque material portion.

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