Semiconductor integrated circuit, phase-locked loop, radar and electronic device

Abstract

A semiconductor integrated circuit, a phase-locked loop, a radar sensor and an electronic device. The semiconductor integrated circuit comprises a substrate layer and a plurality of insulated metal layers, which are arranged on the substrate layer, wherein the plurality of metal layers comprise a shielding structure layer (100), a first device structure layer and a plurality of second device structure layers. The semiconductor integrated circuit contains an oscillator used for outputting a differential signal, and the oscillator contains: a first inductor and a second inductor, which are formed in different second device structure layers; a capacitor device, which is formed in the first device structure layer; and a first transistor and a second transistor, which are formed in the substrate layer, wherein the first inductor and the second inductor are symmetric about the same axis of symmetry, and the shielding structure layer is provided with a shielding structure used for shielding interference signals leaked by the first inductor and / or the second inductor.

Description

Semiconductor integrated circuits, phase-locked loops, radars and electronic equipment

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on November 1, 2022, with application number 202211358788.4 and invention name “Semiconductor integrated circuit, phase-locked loop, radar and electronic equipment”, the contents of which should be understood as incorporated into this application by reference. Technical Field

[0002] The embodiments of the present disclosure relate to, but are not limited to, the field of semiconductor technology, and in particular to a semiconductor integrated circuit, a phase-locked loop, a radar sensor, and an electronic device. Background Art

[0003] In integrated circuits, inductors are important electrical components whose performance parameters directly impact the performance of the integrated circuit. The quality factor (Q) of an inductor is the ratio of the energy stored in the inductor to the energy lost. Therefore, the higher the Q value of an inductor, the higher the inductor's efficiency and the better its performance.

[0004] A voltage-controlled oscillator (VCO) circuit includes two inductor devices. When the quality factor (Q) of the inductor is low, it not only increases the loss but also interferes with other devices in the VCO circuit.

[0005] Summary of the Invention

[0006] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0007] Embodiments of the present disclosure provide a semiconductor integrated circuit, a phase-locked loop, a radar sensor, and an electronic device.

[0008] On the one hand, an embodiment of the present disclosure provides a semiconductor integrated circuit, comprising: a substrate layer and a plurality of metal layers arranged and insulated on the substrate layer; wherein the plurality of metal layers include: a shielding structure layer, a first device structure layer and a plurality of second device structure layers, and the semiconductor integrated circuit includes an oscillator for outputting a differential signal; the oscillator includes a first inductor and a second inductor formed in different second device structure layers, a capacitor device formed in the first device structure layer, and a first transistor and a second transistor formed in the substrate layer; wherein the first inductor and the second inductor are symmetrical about the same symmetry axis; and the shielding structure layer is formed with a shielding structure for shielding interference signals leaked by the first inductor and / or the second inductor.

[0009] On the other hand, an embodiment of the present disclosure further provides a voltage-controlled oscillator, comprising the semiconductor integrated circuit of any of the aforementioned embodiments.

[0010] On the other hand, the embodiments of the present disclosure further provide a phase-locked loop, comprising a phase frequency detector, a charge pump, a filter, an oscillator and a frequency divider arranged in the semiconductor circuit; wherein: the first input end of the phase frequency detector is the input end of the phase lock loop, the second input end of the phase frequency detector is connected to the output end of the frequency divider, and the output end of the phase frequency detector is connected to the input end of the charge pump; the output end of the charge pump is connected to the input end of the filter, the output end of the filter is connected to the control end of the oscillator, and the output end of the oscillator is connected to the input end of the frequency divider.

[0011] On the other hand, an embodiment of the present disclosure further provides a radar sensor, comprising a signal receiving module, a signal transmitting module and a clock source, wherein the signal transmitting module is configured to transmit an electronic wave signal via a transmitting antenna based on a reference frequency provided by a phase-locked loop in the clock source, and the signal receiving module is configured to use a receiving antenna to receive an echo formed by reflection from a target object, and perform down-conversion processing based on the reference frequency provided by the phase-locked loop in the clock source to generate and output an intermediate frequency signal; wherein the phase-locked loop is the phase-locked loop of any of the aforementioned embodiments.

[0012] On the other hand, an embodiment of the present disclosure further provides an electronic device, including the oscillator as described in any of the previous embodiments, or the phase-locked loop as described in any of the previous embodiments, or the radar sensor as described in any of the previous embodiments.

[0013] By providing a shielding structure that allows the first and second inductors to be stacked, the overall size can be reduced and interference can be mitigated. By aligning the axis of symmetry of the first inductor with the axis of symmetry of the second inductor, the electromagnetic and current effects of the first inductor on the second inductor can be reduced, while also reducing the circuit size.

[0014] In another aspect, an embodiment of the present disclosure further provides a semiconductor structure, comprising: a device structure layer and a shielding structure layer, both of which are insulated; the device structure layer is provided with at least one inductor; and the shielding structure layer is provided with a first shielding structure for shielding interference signals leaked by the inductor, wherein:

[0015] The inductor device includes a ring-shaped inductor structure, the ring-shaped inductor structure includes a plurality of segments, the plurality of segments are sequentially connected to form a non-closed polygonal symmetrical structure, and each segment includes a plurality of metal strips arranged in the same direction and in parallel;

[0016] The first shielding structure includes multiple substructures, each substructure corresponds to a segment of the annular inductor structure, and each substructure includes multiple parallel metal wires. One end of the multiple metal wires of the multiple substructures is connected by metal wires, and the other end is open to form a non-closed charge cancellation path. The extension direction of the metal wires in each substructure is perpendicular to the extension direction of the metal strips in the annular inductor structure segment corresponding to the substructure.

[0017] By arranging a shielding structure composed of metal wires below the metal strips of the inductor device, and because the extension direction of the metal wires in the shielding structure is perpendicular to the extension direction of the metal strips of the inductor device, and one end of each metal wire is connected to each other through a metal path and the other end is open, the charge cancellation path formed in this way can offset the interference signals of different current directions leaked by multiple groups of metal strips in the inductor device as much as possible through the metal wires perpendicular to the current direction, thereby achieving the purpose of reducing the impact on other devices.

[0018] Other features and advantages of the present disclosure will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present disclosure. Other advantages of the present disclosure can be realized and obtained through the solutions described in the description and the drawings.

[0019] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description.

[0020] Summary of the Figures

[0021] The accompanying drawings are used to provide an understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation to the technical solution of the present disclosure.

[0022] FIG1 is a schematic diagram of various layers of a semiconductor integrated circuit provided by this embodiment;

[0023] FIG2 is a circuit diagram of the semiconductor integrated circuit according to this embodiment;

[0024] FIG3 is a schematic diagram of a semiconductor structure provided by an embodiment of the present disclosure;

[0025] FIG4 is a schematic diagram of a first inductor according to an embodiment of the present disclosure;

[0026] FIG5 is a schematic diagram of a ring inductor structure in the first inductor shown in FIG4 ;

[0027] FIG6 is a schematic diagram of a shielding structure according to an embodiment of the present disclosure;

[0028] FIG7 is a schematic diagram of the first shielding structure shown in FIG6;

[0029] Figure 8 is a comparison of the Q values ​​of inductors with and without shielding structures;

[0030] FIG9 is a schematic diagram of another semiconductor structure provided by an embodiment of the present disclosure;

[0031] FIG10 is a schematic diagram of another first inductor according to an embodiment of the present disclosure;

[0032] FIG11 is a schematic diagram of a ring inductor structure in the first inductor shown in FIG10 ;

[0033] FIG12 is a schematic diagram of a second inductor in the embodiment shown in FIG9 ;

[0034] FIG13 is a schematic diagram of another shielding structure according to an embodiment of the present disclosure;

[0035] FIG14 is a schematic diagram of another second shielding structure according to an embodiment of the present disclosure;

[0036] Figure 15 is a comparison of the Q values ​​of the inductors with and without shielding structures;

[0037] FIG16 is a schematic diagram of a phase-locked loop circuit provided in an embodiment of the present disclosure;

[0038] FIG17 is a schematic diagram of a radar sensor provided by an embodiment of the present disclosure;

[0039] FIG18 is a schematic diagram of another radar sensor provided in an embodiment of the present disclosure.

[0040] Details

[0041] The present disclosure describes a number of embodiments, but this description is exemplary rather than restrictive, and it will be apparent to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present disclosure. Although many possible feature combinations are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.

[0042] The present disclosure includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The disclosed embodiments, features, and elements of the present disclosure may also be combined with any conventional features or elements to form a unique solution defined by the claims. Any features or elements of any embodiment may also be combined with features or elements from other solutions to form another unique solution defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this disclosure may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the appended claims and their equivalents, the embodiments are not subject to other limitations. In addition, various modifications and changes may be made within the scope of protection of the appended claims.

[0043] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps in the specific order described. As will be understood by those skilled in the art, other orders of steps are also possible. Therefore, the specific order of the steps set forth in the specification should not be interpreted as a limitation on the claims. In addition, the claims to the method and / or process should not be limited to performing their steps in the order written, and those skilled in the art can readily understand that these orders can be changed and still remain within the spirit and scope of the disclosed embodiments.

[0044] In this specification, a transistor refers to an element having at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode.

[0045] In this specification, the first electrode can be a drain electrode and the second electrode can be a source electrode, or vice versa. The functions of "source electrode" and "drain electrode" may be reversed when using transistors with opposite polarity or when the direction of current changes during circuit operation. Therefore, in this specification, "first electrode" and "second electrode" may be reversed.

[0046] In this specification, "electrically connected" includes components connected together via an element having some electrical function. There are no particular limitations on the "element having some electrical function" as long as it enables the transfer of electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.

[0047] In this specification, "parallel" means that the angle formed by two straight lines is close to 0° within the allowable range of process / engineering errors. For example, this angle is generally greater than -10° and less than 10°, and therefore, this angle is also included as being greater than -5° and less than 5°. Furthermore, "perpendicular" means that the angle formed by two straight lines is close to 90° within the allowable range of process / engineering errors. For example, this angle is generally greater than 80° and less than 100°, and therefore, this angle is also included as being greater than 85° and less than 95°.

[0048] In this document, "two or more" includes two, and "plurality" has the same meaning as "two or more".

[0049] In this article, the "projection" refers to "orthographic projection".

[0050] In this document, the numerical ranges given include the boundary values.

[0051] The low Q factor of an inductor is due to the electric field generated by the inductor inducing charges of opposite polarity in corresponding parts of the substrate. This AC voltage difference between different parts of the inductor also creates an AC voltage difference between the corresponding substrates. Since the substrate is a semiconductor, this voltage difference inevitably generates a current, known as capacitively coupled substrate current. This current causes ohmic losses, lowering the inductor's Q factor.

[0052] The inventors have discovered that in some circuits containing multiple inductors, such as VCO circuits, interference between multiple inductors is likely to occur due to the large inductor induced currents. Consequently, the multiple inductors are spaced relatively far apart, resulting in a larger overall size or a larger number of layers in the semiconductor integrated circuit. Furthermore, the large induced currents can easily interfere with other circuit components within and outside the VCO circuit. Therefore, embodiments of the present application provide a semiconductor integrated circuit that, by redesigning the inductor structure, reduces overall size and interference.

[0053] FIG1 is a schematic diagram of each layer of a semiconductor integrated circuit provided in this embodiment. The semiconductor integrated circuit can be applied to a VCO circuit or other similar circuits. The semiconductor integrated circuit includes a substrate layer 10 and a plurality of metal layers sequentially arranged and insulated on the substrate layer 10. The plurality of metal layers include a shielding structure layer 20, a first device structure layer 30, and a plurality of second device structure layers 40 (the insulating layers between the metal layers are not shown in FIG1 ). The semiconductor integrated circuit includes an oscillator, which includes a first inductor, a second inductor, a capacitor, a first transistor, and a second transistor. The first inductor and the second inductor are stacked and arranged in different second device structure layers 40, and the first inductor and the second inductor are symmetrical about the same symmetry axis. The oscillator is used to output a differential signal. The capacitor is arranged in the first device structure layer 30, and the first transistor and the second transistor are arranged in the substrate layer 10. The shielding structure layer 20 is provided with a shielding structure for shielding interference signals leaked by the inductor device (the first inductor and / or the second inductor).

[0054] By providing a shielding structure that allows the first and second inductors to be stacked, the overall size can be reduced and interference can be mitigated. By aligning the axis of symmetry of the first inductor with the axis of symmetry of the second inductor, the electromagnetic and current effects of the first inductor on the second inductor can be reduced, while also reducing the circuit size.

[0055] In an exemplary embodiment, the shape of the shielding structure may correspond to the shape of the first inductor (for example, the same shape as the first inductor) to shield the interference signal leaked by the first inductor. The shielding structure may include a non-closed charge cancellation path formed by arranging multiple metal wires, wherein the multiple metal wires are arranged along the current direction in the first inductor, and the extension direction of the multiple metal wires is perpendicular to the positive projection of the current direction. Assuming that the current direction in the inductor is a straight line direction from A to B to C to D, a metal wire a can be set at the projection position of A, a metal wire b can be set at the projection position of B, a metal wire c can be set at the projection position of C, and a metal wire d can be set at the projection position of D. The metal wires a, b, c and d are arranged in parallel and have the same extension direction, which is perpendicular to the current direction from A to D.

[0056] For example, the first inductor includes multiple groups of metal strips, with current directions in different groups of metal strips being different, while current directions in the same group of metal strips are the same. The shielding structure includes multiple groups of metal wires, each group of metal wires corresponding to a group of metal strips, the projection of each group of metal wires on the substrate layer overlapping with the projection of its corresponding group of metal strips on the substrate layer, and the extension direction of each group of metal wires being perpendicular to the current direction of its corresponding group of metal strips. By providing a shielding structure composed of metal wires below the metal strips of the inductor device, and because the metal wires arranged in the shielding structure are perpendicular to the current direction of the metal strips of the inductor device, and because one end of each metal wire is connected to each other by a metal path and the other end is disconnected, the charge cancellation path thus formed can minimize the interference signals of different current directions leaked from the multiple groups of metal strips in the inductor device through the metal wires perpendicular to the current direction, thereby reducing the impact on other devices.

[0057] The overlap or interleaving between any inductor and the shielding structure mentioned herein means that the projection of the corresponding inductor is completely covered by the shielding structure, that is, the orthographic projection of the shielding structure includes the orthographic projection of the corresponding inductor.

[0058] In one exemplary embodiment, the projection of the capacitive device on the substrate layer does not overlap with the projection of the shielding structure on the substrate layer to prevent the shielding layer from interfering with the capacitor. The capacitor can be formed by two layers of metal film in the first device layer. Exemplarily, the first device structure layer provided with the capacitive device is located between the second device structure layer and the shielding structure layer.

[0059] In an exemplary embodiment, the metal wires in the shielding structure may be arranged to have no closed loop, thereby preventing the formation of a current loop in the shielding structure that increases loss.

[0060] Figure 2 is a circuit diagram of the oscillator of this embodiment. As shown in the figure, the oscillator includes a first inductor L1, a second inductor L2, a capacitor C1, a first transistor M1 and a second transistor M2. The first end of the first inductor L1 is connected to the first end of the capacitor C1, the first electrode of the first transistor M1 and the control electrode of the second transistor M2. The second end of the first inductor L1 is connected to the second end of the capacitor C1, the first electrode of the second transistor M2 and the control electrode of the first transistor M1. The power supply end (i.e., the control end) of the first inductor L1 is connected to the voltage end VDD. The second electrode of the first transistor M1 is connected to the first end of the second inductor L2, the second electrode of the second transistor M2 is connected to the first end of the second inductor L2, and the second end of the second inductor L2 is grounded. The second electrode of the first transistor M1 is connected to the first output end Vout1 of the oscillator, and the second electrode of the second transistor M2 is connected to the second output end Vout2 of the oscillator. When VDD changes, according to the formula v(t)=L*di / dt, The frequency of the oscillator's output signal changes. In the formula, i is the instantaneous current in inductor L1, v(t) is the instantaneous voltage at time t, and L and C are the oscillator's inductor L1 and capacitor C1. The oscillator's first and second output terminals output a differential signal.

[0061] In an exemplary embodiment, the first inductor includes a non-closed polygonal annular inductor structure and two rectangular inductor structures connected to the two ends of the annular inductor structure in a one-to-one correspondence; the annular inductor structure is an axisymmetric structure, and the two rectangular inductor structures are symmetrical with the annular inductor structure about the same symmetry axis, that is, the symmetry axes of the two rectangular inductor structures coincide with the symmetry axis of the annular inductor structure; wherein: the two rectangular inductor structures include a symmetrically arranged first end and a second end (ends not connected to the annular inductor structure), and the first end and the second end are the first end and the second end of the first inductor L1.

[0062] In an exemplary embodiment, the annular inductor structure further includes a control terminal located at the symmetry axis.

[0063] The first inductor includes a toroidal inductor structure, a first connecting portion, and a second connecting portion. The toroidal inductor structure is a non-closed polygonal symmetrical structure comprising a plurality of segments, the plurality of segments being sequentially connected to form the non-closed polygonal symmetrical structure. The first segment of the plurality of segments is a leading segment, and the last segment is a trailing segment. Each segment comprises a plurality of metal strips arranged in the same direction (i.e., arranged in parallel), the metal strips in each segment being connected one-to-one with the metal strips in adjacent segments, and the toroidal inductor structure is symmetrical about a first axis of symmetry. The first connecting portion includes a first connecting sub-portion and a second connecting sub-portion symmetrical about the first axis of symmetry (the first connecting sub-portion and the second connecting sub-portion are the aforementioned rectangular inductor structures. In other embodiments, the first connecting sub-portion and the second connecting sub-portion may have other shapes, such as a square or an irregular polygon). The first connecting sub-portion is connected to the leading segment of the plurality of segments in the toroidal inductor structure, and the second connecting sub-portion is connected to the trailing segment of the plurality of segments in the toroidal inductor structure. The first connecting sub-portion is a first end of the first inductor, and the second connecting sub-portion is a second end of the first inductor.

[0064] The second connecting portion is connected to the annular inductor structure, is located on a side of the annular inductor structure away from the first connecting portion and extends in a direction away from the first connecting portion, and the center line of the second connecting portion coincides with the first symmetry axis. The second connecting portion is the control end of the first inductor and also the control end of the oscillator. It can be seen that the control end of the oscillator is located on the first symmetry axis, and the first output end and the second output end of the oscillator are symmetrical about the first symmetry axis.

[0065] Optionally, each connecting sub-section may be composed of a plurality of parallel metal strips. The width and spacing of the metal strips of the connecting sub-section may be the same as the width and spacing of the metal strips in the toroidal inductor structure.

[0066] Optionally, the non-closed polygon may be a quadrilateral, pentagon, hexagon, heptagon, octagon or enneagon. In other words, the projection of the ring inductor structure on the substrate layer may be a quadrilateral, pentagon, hexagon, heptagon, octagon or enneagon.

[0067] In an exemplary embodiment, the number and width of the metal strips in the toroidal inductor structure, as well as the spacing between the metal strips, can be set as needed, and different sizes and numbers can be used to obtain different inductance values. For example, each section of the toroidal inductor structure can include 8 to 15 parallel metal strips, each metal strip has a width of 2μm to 2.2μm, and the spacing between adjacent metal strips is 1.5μm to 1.8μm; or, each section of the toroidal inductor structure can include 3 to 5 parallel metal strips, each metal strip has a width of 9μm-14μm, and the spacing between adjacent metal strips is 1.8μm to 2.2μm. Because the skin effect current of the inductor is concentrated on the surface, when the width and spacing of the metal strips are both within the limits allowed by the process, the surface area of ​​the inductor is increased to the maximum, thereby reducing the loss caused by the skin effect.

[0068] To shield the induced current of the first inductor, the shielding structure layer includes a first shielding structure. The first shielding structure comprises multiple groups of metal wires arranged along the extension direction of the polygonal sides of the ring-shaped inductor structure. One end of each group of metal wires is connected to one end of an adjacent group of metal wires, while the other end of each group of metal wires is disconnected (i.e., left floating), so that different groups of connected metal wires form a non-enclosed charge cancellation path. The first shielding structure is used to shield the induced current of the ring-shaped inductor structure. The first shielding structure includes multiple substructures, each corresponding to a segment of the ring-shaped inductor structure. Each substructure includes multiple parallel metal wires, and the extension direction of the metal wires in each substructure is perpendicular to the extension direction of the metal strips in the corresponding ring-shaped inductor structure segment. The first shielding substructure also includes a symmetrically arranged substructure for shielding the first connecting sub-section and a substructure for shielding the second connecting sub-section; each substructure includes a plurality of parallel and loop-free metal wires, wherein each substructure includes a group of metal wires that are parallel to each other and arranged in a rectangular shape, one end of the metal wires in the same group are connected to each other, and the other end is disconnected, and the two substructures are connected by a metal wire so that the two substructures as a whole form a non-closed charge compensation path.

[0069] Corresponding to the shape of the first inductor ring-shaped inductor structure, the projection of the first shielding structure on the substrate layer can be a quadrilateral, a pentagon, a hexagon, a heptagon, an octagon or a nonagon.

[0070] In an exemplary embodiment, the substructure for shielding the first connecting sub-portion and the substructure for shielding the second connecting sub-portion in the first shielding structure are not connected to the substructure for shielding the toroidal inductor structure.

[0071] In an exemplary embodiment, in a direction parallel to the substrate, the first connecting sub-section and the second connecting sub-section are arranged along a first direction x; the first connecting sub-section includes a first main body structure and a first branch structure, the first main body structure is connected to the first section of the annular inductor structure, the first main body structure includes a plurality of metal strips extending in the second direction, the first branch structure is connected to the metal strip close to the second connecting sub-section among the plurality of metal strips, and extends toward the second connecting sub-section; the second connecting sub-section includes a second main body structure and a second branch structure, the second main body structure is connected to the tail section of the annular inductor structure, the second main body structure includes a plurality of metal strips extending in the second direction, the second branch structure is connected to the metal strip close to the first connecting sub-section among the plurality of metal strips, and extends toward the first connecting sub-section; the first direction is perpendicular to the second direction.

[0072] In one exemplary embodiment, the second inductor can be configured as a metal structure extending along the axis of symmetry, with the projection of the second inductor partially or entirely located within the area enclosed but not covered by the projection of the first inductor. Because the electromagnetic effects generated when the first and second inductors share the same axis of symmetry cancel each other out, minimizing the mutual influence between the different inductors, designing the second inductor to extend along the axis of symmetry of the first inductor can reduce its impact on the first inductor and reduce device area. The positional relationship between the second inductor and the first inductor, namely, the positional relationship between the projection of the second inductor and the projection of the first inductor, depends on design requirements. The less overlapping area of ​​the projections, the less interference there is.

[0073] Exemplarily, the second inductor includes one or more of the following connected structures: a coil structure symmetrical about the symmetry axis, a bending structure arranged along the symmetry axis, and a strip structure arranged along the symmetry axis.

[0074] For example, the second inductor may be a strip structure, one end of the strip structure being the first end of the second inductor, and the other end of the strip structure being the second end of the second inductor. The extension direction of the second inductor is the same as the extension direction of the first inductor, and the projection of the symmetry axis of the second inductor coincides with the projection of the symmetry axis of the first inductor. The semiconductor structure with dual inductors can be applied to a voltage-controlled oscillator (VCO) circuit. Optionally, the width of the second inductor strip structure may be 4.4 μm to 6.6 μm, and the width of the second inductor strip structure is the length in a direction perpendicular to the symmetry axis of the second inductor. In this example, the second inductor has a small inductance value, and a special shielding structure may not be provided.

[0075] For another example, the second inductor may include a coil structure, which may be a structure obtained by rotating a metal strip multiple times. The head end and the tail end of the coil structure may extend in the same direction to increase the area of ​​the second inductor, and the two ends of the coil structure are the first end and the second end of the second inductor, respectively. The projection of the center line of the second inductor coincides with the projection of the symmetry axis of the first inductor to reduce the electromagnetic interference of the first inductor on the second inductor. Optionally, the width of the metal strip in the second inductor may be 4.4μm to 6.6μm, and the spacing between adjacent metal strips may be 1.5μm to 1.8μm. Exemplarily, the orthographic projections of the first end and the second end of the second inductor are both located at the orthographic projection of the symmetry axis of the first inductor.

[0076] For another example, the second inductor may include a bent structure arranged along the axis of symmetry. This is similar to the aforementioned coil structure, except that the metal strips forming the second inductor are not rotated to form a complete coil. For example, the second inductor may be bent in a U-shape or an S-shape. The orthographic projections of the first and second ends of the second inductor may both lie along the axis of symmetry, or the orthographic projections of the first and second ends of the second inductor may be symmetrical about the axis of symmetry of the first inductor.

[0077] Optionally, a second shielding structure may be provided for the coil structure, the second shielding structure being used to shield interference signals leaked from the portion of the second inductor outside the area covered by the first inductor (e.g., the coil structure portion in FIG9 ). The second shielding structure includes a plurality of parallel metal wires, the plurality of metal wires being disconnected, i.e., having no connection between the metal wires, or the plurality of metal wires being single-ended and connected without forming a loop, and the projection of the metal wires on the substrate layer being greater than or equal to the projection of the coil structure on the substrate layer.

[0078] The following description will be made by taking a heptagon as an example of a non-closed polygon and referring to the accompanying drawings.

[0079] The second device structure layer 200 includes a first inductor layer 210 and a second inductor layer 220. The following primarily describes the shielding structure layer 100, the first inductor layer 210, and the second inductor layer 220. The stacking order of these three layers, from bottom to top, is shielding structure layer 100, first inductor layer 210, and second inductor layer 220. FIG. 3 is a schematic diagram of a semiconductor device including a first inductor, a second inductor, and a shielding structure.

[0080] The first inductor layer 210 includes a first inductor 21. In this example, as shown in FIG4 , the first inductor 21 includes a ring-shaped inductor structure 211, a first connecting portion 212, and a second connecting portion 213. The first connecting portion 212, the ring-shaped inductor structure 211, and the second connecting portion 213 are connected in sequence. The second connecting portion 213 is located on a side of the ring-shaped inductor structure 211 away from the first connecting portion 212. The annular inductor structure 211 is a non-closed polygonal structure and is symmetrical with an axis of symmetry C1. In this example, as shown in FIG5 , the annular inductor structure 211 is a regular octagonal structure as a whole. It can be understood that the shape of the area formed by connecting the outermost boundary points of the annular inductor structure 211 is a regular octagon. The annular inductor structure 211 includes a first segment 2111, a second segment 2112, a third segment 2113, a fourth segment 2114, a fifth segment 2115, a sixth segment 2116, and a seventh segment 2117 connected end to end, that is, including seven groups of metal strips (each segment in this example is equivalent to a group in the above text). The ends of the first segment 2111 (i.e., the first segment) and the seventh segment 2117 (i.e., the tail segment) that are not connected to the other segments are the first end 2110 and the second end 2118 of the annular inductor structure, respectively. A first opening is formed between the first end 2110 and the second end 2118 . If the first end 2110 and the second end 2118 are connected, the annular inductor structure 211 is a regular octagon.

[0081] In this example, the toroidal inductor structure 211 is composed of a plurality of parallel metal strips. The number of metal strips may be 8 to 15, with 13 metal strips being used as an example in Figures 3-5. The width of each metal strip may be 2 μm to 2.2 μm (e.g., 2 μm), and the spacing may be 1.5 μm to 1.8 μm (e.g., 1.5 μm). The plurality of metal strips are connected at a first end 2110 and at a second end 2118. The plurality of spaced metal strips in each segment are parallel to each other and extend in the same direction. As shown in Figure 5, the plurality of metal strips in the first segment 2111 extend in direction 1, the plurality of metal strips in the second segment 2112 extend in direction 2, the plurality of metal strips in the third segment 2113 extend in direction 3, the plurality of metal strips in the fourth segment 2114 extend in direction 4, the plurality of metal strips in the fifth segment 2115 extend in direction 5, the plurality of metal strips in the sixth segment 2116 extend in direction 6, and the plurality of metal strips in the seventh segment 2117 extend in direction 7. The first end 2110 of the toroidal inductor structure includes multiple parallel metal strips extending in direction 8 (each metal strip is connected to the multiple metal strips in the first segment 2111 on a one-to-one basis), as well as a connecting segment connecting the multiple metal strips. The second end 2118 of the toroidal inductor structure includes multiple parallel metal strips extending in direction 4 (each metal strip is connected to the multiple metal strips in the seventh segment 2117 on a one-to-one basis), as well as a connecting segment connecting the multiple metal strips. In this example, direction 5 is the opposite direction of direction 1, direction 6 is the opposite direction of direction 2, direction 7 is the opposite direction of direction 3, and direction 8 is the opposite direction of direction 4. In this example, the lengths of the multiple parallel metal strips in each segment (the length of the metal strips in the direction they extend) vary, with metal strips closer to the center of the toroidal inductor structure being shorter than those farther from the center.

[0082] As shown in FIG4 , the first connecting portion 212 includes a symmetrically arranged first connecting sub-portion 2121 and a second connecting sub-portion 2122. The first connecting sub-portion 2121 and the second connecting sub-portion 2122 are symmetrical about an axis of symmetry C1. The first connecting sub-portion 2121 is connected to the first end 2110 of the annular inductor structure 211, and the second connecting sub-portion 2122 is connected to the second end 2118 of the annular inductor structure 211. The first connecting sub-portion 2121 includes a first main structure and a first branch structure. The first main structure is connected to the first end 2110 of the annular inductor structure 211. The first main structure includes a plurality of metal strips extending along the y-direction. The first branch structure is connected to the first main structure and is a rectangular shape (e.g., a metal strip) extending along the x-direction. That is, the first branch structure is connected to a metal strip in the plurality of metal strips in the first main structure that is closest to the second connecting sub-portion. The second connecting sub-section 2122 is symmetrically arranged with the first connecting sub-section 2121 and includes a second main structure and a second branch structure. The second main structure is connected to the second end 2118 of the ring inductor structure 211. The second main structure includes multiple metal strips extending along the y-direction. The second branch structure is connected to the second main structure and is a rectangular (such as a metal strip) extending in the opposite direction of the x-direction. That is, the second branch structure is connected to the metal strip closest to the first connecting sub-section among the multiple metal strips in the second main structure. The first branch structure and the second branch structure are symmetrically arranged and serve as the two connection ends (input end and output end) of the first inductor respectively. For the first inductor, current flows into one branch structure and out of the other branch structure, and the current flow path is curved. Therefore, the metal wire in the corresponding shielding structure is vertical. In other embodiments, the metal wire in the corresponding shielding structure can be inclined, that is, at a certain angle to the y-direction. In other examples, the position of the branch structure can be adjusted, for example, located at the end of the main structure away from the ring inductor structure 211. In other embodiments, the branch structure can be omitted and the first and second main structures can be directly used as the connection ends.

[0083] The second connection portion 213 is located on a side of the annular inductor structure 211 away from the first connection portion 212 and is connected to the annular inductor structure 211. In this example, the second connection portion 213 is a rectangular structure extending along the y-direction. Exemplarily, the projection of the center line of the second connection portion 213 along the y-direction coincides with the projection of the symmetry axis of the annular inductor structure 211. For example, one end of the second connection portion 213 is connected to the fourth segment 2114 of the annular inductor structure 211. The second connection portion 213 and the first annular portion 211 can be connected in the same layer or through different layers. The other end of the second connection portion 213 extends along the y-direction in a direction away from the first connection portion 212. The second connection portion 213 serves as the power connection end of the first inductor.

[0084] In an exemplary embodiment, the first main structure of the first connecting sub-section 2121 and the second main structure of the second connecting sub-section 2122 can be formed in parallel by a plurality of metal strips spaced apart and extending in the y direction. The metal strips can be 3-5, and 3 metal strips are used as an example in Figures 3-4. The width of each metal strip can be 10μm-14μm (for example, 12μm), and the spacing between the metal strips can be 1.6μm to 2.4μm (for example, 2μm). In Figures 3-4, the metal strips of the first main structure of the first connecting sub-section 2121 and the second main structure of the second connecting sub-section 2122 are connected at four locations. In other examples, there can be two or three connections, and this example is not limited to this. In other embodiments, the size of the metal strips of the first connecting sub-section 2121 and the second connecting sub-section 2122 can be the same as the size of the first annular portion 211, as long as the inductance parameter design requirements are met.

[0085] The width and spacing of the metal strips can increase the surface area of ​​the inductor. Since inductance is inversely proportional to frequency, increasing the inductance can reduce the frequency. The lower the frequency, the less pronounced the skin effect. Therefore, by adjusting the width and spacing of the inductor metal strips, the losses caused by the skin effect can be reduced. When the width and spacing of the metal strips in the first inductor meet the DRC (Design Rule Check) limits allowed by the process, the surface area of ​​the inductor is maximized, and the losses due to the skin effect are minimized.

[0086] In this example, the first inductor 21 can be made of copper (Cu). In other examples, the first inductor 21 can be made of other metal materials, which is not limited in this application.

[0087] The second inductor layer 220 includes a second inductor 22, as shown in FIG3 . In this example, the second inductor 22 is a strip-shaped structure (or strip-like structure) extending along the y-direction. The strip-shaped structure is symmetrical about a second axis of symmetry, the projection of which on the first inductor layer coincides with the first axis of symmetry C1. The overlap of the projections of the second inductor 22 and the first inductor 21 with each other can reduce the impact of the electromagnetic / current flow of the first inductor on the electromagnetic / current flow of the second inductor. Furthermore, the stacking of the two inductors can reduce the size of the semiconductor device. The projection of the second inductor 22 on the first inductor layer 210 does not extend beyond the first and second connecting portions in the y-direction. For example, the second inductor 22 includes a first end and a second end. The projection of the first end of the second inductor 22 on the first inductor layer 210 does not extend beyond the edge of the second connecting portion 213 of the first inductor away from the first connecting portion 212, and the projection of the second end of the second inductor 22 on the first inductor layer 210 does not extend beyond the branch structure in the first connecting portion of the first inductor. Since the electromagnetic effects generated when the first inductor and the second inductor are on the same symmetry axis cancel each other, the mutual influence between different inductors is minimized. Therefore, placing a slender second inductor at the symmetry axis can not only realize the circuit design of the oscillator, but also reduce the device area.

[0088] In an exemplary embodiment, the width of the second inductor (ie, the length in the x-direction) may be 4.4 μm to 6.6 μm (eg, 5.5 μm).

[0089] In this example, the second inductor 22 can be made of aluminum (Al). In other examples, the second inductor 22 can be made of other metal materials, which is not limited in this application.

[0090] Since the second inductor 22 has a relatively small inductance, it can be isolated from the first inductor 21 by the insulating layer between the second inductor 22 and the first inductor 21 . In this example, the second inductor 22 does not require a special isolation structure.

[0091] In this example, as shown in FIG6 , the first shielding structure in shielding structure layer 100 for shielding interference from the first inductor includes two shielding structural portions: a first shielding structural portion 110 and a second shielding structural portion 120. First shielding structural portion 110 is used to reduce the induced current in toroidal inductor structure 211 of the first inductor, while second shielding structural portion 120 is used to reduce the induced current in first connecting portion 212 of the first inductor. The projection of first shielding structural portion 110 on the shielding structure layer includes the projection of toroidal inductor structure 211 on the shielding structure layer 100, and the projection of second shielding structural portion 110 on the shielding structure layer overlaps with the projection of first connecting portion 212 on the shielding structure layer 100.

[0092] In this example, as shown in FIG6 , the first shielding structure portion 110 and the second shielding structure portion 120 are spaced apart. By isolating the first shielding structure portion 110 from the second shielding structure portion 120 , it is possible to prevent a current loop from being formed in the shielding structure to increase loss.

[0093] In this example, as shown in FIG7 , the first shielding structure portion 110 is similar in overall shape to the annular inductor structure 211 and includes a first substructure 1101 , a second substructure 1102 , a third substructure 1103 , a fourth substructure 1104 , a fifth substructure 1105 , a sixth substructure 1106 and a seventh substructure 1107 that are interconnected. Among them, the area of ​​the first substructure 1101 includes the projection area of ​​the first segment 2111 of the toroidal inductor structure 211 on the first shielding structure layer, the area of ​​the second substructure 1102 includes the projection area of ​​the second segment 2112 of the toroidal inductor structure 211 on the first shielding structure layer, the area of ​​the third substructure 1103 includes the projection area of ​​the third segment 2113 of the toroidal inductor structure 211 on the first shielding structure layer, the area of ​​the fourth substructure 1104 includes the projection area of ​​the fourth segment 2114 of the toroidal inductor structure 211 on the first shielding structure layer, the area of ​​the fifth substructure 1105 includes the projection area of ​​the fifth segment 2115 of the toroidal inductor structure 211 on the first shielding structure layer, the area of ​​the sixth substructure 1106 includes the projection area of ​​the sixth segment 2116 of the toroidal inductor structure 211 on the first shielding structure layer, and the area of ​​the seventh substructure 1107 includes the projection area of ​​the seventh segment 2117 of the toroidal inductor structure 211 on the first shielding structure layer.

[0094] The first shielding structure 110 includes multiple metal wires extending in different directions, with no loops between them. The first shielding structure 110 comprises multiple substructures, each of which includes multiple parallel metal wires. The direction in which the metal wires extend in each substructure is determined by the direction in which the metal strips in the annular inductor structure 211 above it extend. In this example, the metal wires in each substructure extend perpendicular to the direction in which the metal strips in the annular inductor structure 211 extend. The extending direction (direction 7) of the plurality of metal wires in the first substructure 1101 is perpendicular to the extending direction (direction 1) of the plurality of metal strips in the first section 2111 of the toroidal inductor structure 211. The extending direction (direction 8) of the plurality of metal wires in the second substructure 1102 is perpendicular to the extending direction (direction 2) of the plurality of metal strips in the second section 2112 of the toroidal inductor structure 211. The extending direction (direction 1) of the plurality of metal wires in the third substructure 1103 is perpendicular to the extending direction (direction 3) of the plurality of metal strips in the third section 2113 of the toroidal inductor structure 211. The extending direction (direction 2) of the plurality of metal wires in the fourth substructure 1104 is perpendicular to the extending direction (direction 3) of the plurality of metal strips in the third section 2113 of the toroidal inductor structure 211. The extension direction (direction 4) of the multiple metal strips in the fourth section 2114 of the inductor structure 211 is perpendicular to each other. The extension direction (direction 3) of the multiple metal wires in the fifth substructure 1105 is perpendicular to the extension direction (direction 5) of the multiple metal strips in the fifth section 2115 of the ring-shaped inductor structure 211. The extension direction (direction 4) of the multiple metal wires in the sixth substructure 1106 is perpendicular to the extension direction (direction 6) of the multiple metal strips in the sixth section 2116 of the ring-shaped inductor structure 211. The extension direction (direction 5) of the multiple metal wires in the seventh substructure 1107 is perpendicular to the extension direction (direction 7) of the multiple metal strips in the seventh section 2117 of the ring-shaped inductor structure 211. In this example, direction 5 is the opposite direction of direction 1, direction 6 is the opposite direction of direction 2, direction 7 is the opposite direction of direction 3, and direction 8 is the opposite direction of direction 4.

[0095] Inside the polygon, a metal line L2 connects the multiple substructures together. Parallel metal lines in each substructure ultimately connect to the inner ring-shaped connection line L2. The width of the metal line L2 can be the same as the width of the other metal lines in the shielding structure.

[0096] In an exemplary embodiment, a zeroth substructure 1100 and an eighth substructure 1108 may also be included, wherein the zeroth substructure 1100 includes a plurality of metal wires arranged in a parallel shape, and the extension direction (direction 6) of the plurality of metal wires is perpendicular to the extension direction (direction 8) of the plurality of metal strips in the first end 2110 of the annular inductor structure 211; the eighth substructure 1108 includes a plurality of metal wires arranged in a parallel shape, and the extension direction (direction 6) of the plurality of metal wires is perpendicular to the extension direction (direction 4) of the plurality of metal strips in the second end 2118 of the annular inductor structure 211.

[0097] Each substructure includes metal lines that are connected sequentially but do not form a loop. The metal lines in each substructure are connected to the metal lines in the adjacent substructures, but do not form a loop. In an exemplary embodiment, the width of each metal line in the first shielding structure 110 can be 0.68μm to 1.05μm (e.g., 0.85μm), and the spacing between the metal lines can be 0.68μm to 1.05μm (e.g., 0.85μm).

[0098] Through the above arrangement, on the plane of the shielding structure layer, the first shielding structure portion 110 includes the orthographic projection of the toroidal inductor structure 211 on the shielding structure layer 100. Furthermore, the metal wires in the first shielding structure portion 110 extend perpendicularly to the metal strips in the toroidal inductor structure 211. The current induced by the shielding structure is in the opposite direction to the current in the metal strips of the toroidal inductor structure 211 above it, resulting in the electric fields canceling each other out within the shielding structure. Furthermore, the metal wires in the first shielding structure are isolated and disconnected, preventing the formation of induced currents between the shielding metals. Consequently, the above embodiment can reduce induced currents and improve the quality factor (Q) of the inductor.

[0099] In this example, as shown in FIG6 , the second shielding structure 120 includes a ninth substructure 1201 for shielding the first main structure of the first connecting subsection 2121 and a tenth substructure 1202 for shielding the second main structure of the second connecting subsection 2122. The ninth substructure 1201 and the tenth substructure 1202 are symmetrically arranged about a third axis of symmetry, the projection of which on the first inductor layer coincides with the first axis of symmetry C1. The ninth substructure 1201 includes a plurality of parallel metal wires, which are connected in parallel via a connecting wire. The plurality of metal wires are connected sequentially but without loops, thereby preventing the formation of induced currents. Optionally, the ninth substructure 1201 and the tenth substructure 1202 can be connected via a connecting metal wire (i.e., the aforementioned L2).

[0100] Because the currents flowing through the first connecting sub-portion 2121 and the second connecting sub-portion 2122 have different directions, the induced currents flowing through the ninth substructure 1201 and the tenth substructure 1202 are in opposite directions. Electric field cancellation is achieved through the metal line l1 connecting the ninth substructure 1201 and the tenth substructure 1202. The width of the metal line l1 is 3 μm to 5 μm (e.g., 4 μm).

[0101] Figure 8 is a simulation comparison of the Q values ​​of an inductor (Figure 3) using the shielding structure shown in Figure 6 and an inductor without the shielding structure. In the figure, curve Q1 shows the simulation result of the inductor Q value after using the shielding structure of this embodiment, with the maximum Q value reaching 26.5. Curve Q2 shows the simulation result of the inductor Q value without the shielding structure, with the maximum Q value reaching 23. It can be seen that the shielding structure described in this embodiment can significantly improve the Q value of the inductor.

[0102] The inductor in the above embodiment can be used in the voltage-controlled oscillator (VCO) circuit of a radar sensor chip, addressing the problem of inductor radiation leakage in the VCO circuit, which can interfere with the signals of integrated circuit devices on the semiconductor substrate. A VCO formed using this inductor can be used in a radio frequency phase-locked loop (PLL) circuit to provide a 13GHz clock signal.

[0103] FIG9 is a partial schematic diagram of another oscillator provided in an embodiment of the present disclosure. In this example, a semiconductor structure with a high inductance value is provided to meet the needs of different clock circuits. Similar to the inductor structure shown in FIG3 , the inductor structure layer 200′ in this embodiment still includes a first inductor layer 210′ ​​and a second inductor layer 220′. Some structures differ from the embodiment of FIG3 . The following mainly describes the shielding structure layer 100′, the first inductor layer 210′, and the second inductor layer 220′. The stacking order of the three layers from bottom to top is shielding structure layer 100′, first inductor layer 210′, and second inductor layer 220′.

[0104] The first inductor layer 210' includes a first inductor 21'. As shown in FIG10 , the first inductor 21' includes a ring-shaped inductor structure 211', a first connecting portion 212', and a second connecting portion 213' (not shown in the figure, but the positions and shapes can be referred to in the previous description and in FIG3 and FIG4 ). The ring-shaped inductor structure 211' is a non-closed polygonal structure and is symmetrical with the fourth axis of symmetry (C2 in the figure). In this example, as shown in FIG11 , the ring-shaped inductor structure 211' is an overall regular octagonal structure and includes a first segment 2111', a second segment 2112', a third segment 2113', a fourth segment 2114', a fifth segment 2115', a sixth segment 2116', and a seventh segment 2117' connected end to end. The ends of the first segment 2111' and the seventh segment 2117' not connected to other segments are the first end 2110' and the second end 2118' of the ring-shaped inductor structure, respectively. A first opening is formed between the first end 2110 ′ and the second end 2118 ′. If the first end 2110 ′ and the second end 2118 ′ are connected, the annular inductor structure 211 ′ is a non-closed regular octagon.

[0105] In this example, the toroidal inductor structure 211' is composed of multiple parallel metal strips. The number of metal strips can range from 3 to 5, with four metal strips used as an example in Figures 9-11. Each metal strip can be 9 μm to 14 μm wide (e.g., 12 μm), and the spacing can be 1.8 μm to 2.2 μm (e.g., 2.0 μm). The multiple metal strips are connected at a first end 2110' and a second end 2118', respectively. The multiple spaced-apart metal strips in each segment are parallel to each other and extend in the same direction. As shown in FIG11 , the multiple metal strips in the first segment 2111′ extend in Direction 1, the multiple metal strips in the second segment 2112′ extend in Direction 2, the multiple metal strips in the third segment 2113′ extend in Direction 3, the multiple metal strips in the fourth segment 2114′ extend in Direction 4, the multiple metal strips in the fifth segment 2115′ extend in Direction 5, the multiple metal strips in the sixth segment 2116′ extend in Direction 6, and the multiple metal strips in the seventh segment 2117′ extend in Direction 7. The first end 2110′ of the toroidal inductor structure includes multiple parallel metal strips extending in Direction 8 (each metal strip is connected to the multiple metal strips in the first segment 2111′ on a one-to-one basis) and a connecting segment connecting the multiple metal strips. The second end 2118′ of the toroidal inductor structure includes multiple parallel metal strips extending in Direction 4 (each metal strip is connected to the multiple metal strips in the seventh segment 2117′ on a one-to-one basis) and a connecting segment connecting the multiple metal strips. In this example, direction 5 is opposite to direction 1, direction 6 is opposite to direction 2, direction 7 is opposite to direction 3, and direction 8 is opposite to direction 4. In this example, the lengths of the multiple parallel metal strips in each segment (the lengths in the extending directions of the metal strips) are different, with the lengths of the metal strips closer to the center of the toroidal inductor structure being shorter than the lengths of the metal strips farther from the center of the toroidal inductor structure.

[0106] As shown in Figure 10, the first connecting portion 212' includes a symmetrically arranged first connecting sub-portion 2121' and a second connecting sub-portion 2122'. The first connecting sub-portion 2121' and the second connecting sub-portion 2122' are symmetrical about the symmetry axis C2. The first connecting sub-portion 2121' is connected to the first end 2110' of the annular inductor structure 211', and the second connecting sub-portion 2122' is connected to the second end 2118' of the annular inductor structure 211'. The first connecting sub-portion 2121' includes a first main structure and a first branch structure. The first main structure is connected to the first end 2110' of the annular inductor structure 211'. The first main structure is a rectangle extending along the y-direction. The first branch structure is connected to the first main structure and is a rectangle extending along the x-direction. The second connecting sub-section 2122' is symmetrically arranged with the first connecting sub-section 2121' and includes a second main structure and a second branch structure. The second main structure is connected to the second end 2118' of the ring-shaped inductor structure 211'. The second main structure is a rectangle extending along the y-direction. The second branch structure is connected to the second main structure and is a rectangle extending in the opposite direction of the x-direction. In other embodiments, the first and second branch structures may be squares or other polygons, which is not limited herein.

[0107] Similar to the embodiment shown in FIG3 , in this embodiment, the first main structure of the first connecting sub-section 2121′ and the second main structure of the second connecting sub-section 2122′ can be formed by a plurality of spaced-apart metal strips extending in parallel along the y-direction. The number of metal strips can be 3-5, and FIG9-10 uses an example of three metal strips. The width of each metal strip can be 10 μm-14 μm (for example, 12 μm), and the spacing between the metal strips can be 1.6 μm to 2.4 μm (for example, 2 μm). In FIG9-10 , the metal strips of the first main structure of the first connecting sub-section 2121′ and the second main structure of the second connecting sub-section 2122′ are connected at four locations. In other examples, there can be two or three connections, and this example is not limited to this. In other embodiments, the size of the metal strips of the first connecting sub-section 2121′ and the second connecting sub-section 2122′ can be the same as the size of the first annular portion 211′, as long as the inductance parameter design requirements are met.

[0108] In this example, the first inductor 21 ′ can be made of copper (Cu). In other examples, the first inductor 21 ′ can be made of other metal materials, which is not limited in this application.

[0109] The second inductor layer 220' includes a second inductor 22', as shown in Figures 9 and 12. In this example, the second inductor 22' includes a coil structure 2201 and a strip structure 2202. The projection of the centerline of the second inductor 22' onto the first inductor layer 210' coincides with the fourth symmetry axis C2. The coincidence of the centerline of the second inductor 22' and the projection of the symmetry axis of the first inductor 21' can reduce the impact of the electromagnetic field / current of the first inductor on the electromagnetic field / current of the second inductor. Furthermore, the stacking of the two inductors can reduce the size of the semiconductor device.

[0110] As shown in Figure 12, the coil structure 2201 in the second inductor 22' is a structure formed by rotating a metal strip twice. The coil structure 2201 includes two ends (including a head end and a tail end) facing the first inductor 21'. Each end is connected to a metal strip of the same width as the metal strip in the coil structure. In other examples, the width of the connected metal strips can be different from the width of the metal strip in the coil structure. The head end of the coil structure is connected to the first metal strip, and the tail end of the coil structure is connected to the second metal strip. The first and second metal strips extend in the same direction. In the figure, both metal strips extend in the y-direction. The two metal strips constitute the strip structure 2202 of the second inductor 22'. The ends of the two metal strips away from the coil structure serve as the input and output of the second inductor 22', respectively. In this example, the coil structure rotates twice. In other examples, it can rotate multiple times as needed.

[0111] In an exemplary embodiment, the width of the second inductor may be 4.4 μm to 6.6 μm (eg, 5.5 μm), and the spacing between the metal strips may be 1.5 μm to 1.8 μm (eg, 1.5 μm).

[0112] In this example, the second inductor 22 can be made of aluminum (Al). In other examples, the second inductor 22 can be made of other metal materials, which is not limited in this application.

[0113] In this example, the shielding structure layer 100' may include multiple shielding structures. As shown in FIG13 , the shielding structure layer 100' includes two shielding structures: a first shielding structure 110' and a second shielding structure 130. In this example, the first shielding structure 110' includes a first portion and a second portion, wherein the first portion is similar to the shielding structure 110 shown in FIG6 , and the second portion is similar to the shielding structure 120 shown in FIG6 . The first shielding structure 110' is used to reduce the induced current of the first inductor 21', and the second shielding structure 130 is used to reduce the induced current of the second inductor 22'. The projection of the first shielding structure 110' on the shielding structure layer includes the projection of the first inductor 21' on the shielding structure layer 100'. The projection of the second shielding structure 130 on the shielding structure layer overlaps with the second inductor 22', for example, may overlap with the coil structure 2201 of the second inductor 22'. The projection of the second shielding structure 130 on the shielding structure layer may include the projection of the coil structure 2201 on the shielding structure layer.

[0114] As shown in FIG13 , the first portion of the first shielding structure 110 ′ is similar in overall shape to the ring-shaped inductor structure 211 ′, and includes a first substructure 1101 ′, a second substructure 1102 ′, a third substructure 1103 ′, a fourth substructure 1104 ′, a fifth substructure 1105 ′, a sixth substructure 1106 ′, and a seventh substructure 1107 ′ that are interconnected. The area of ​​the first substructure 1101' includes the projection area of ​​the first segment 2111' of the toroidal inductor structure 211' on the first shielding structure layer, the area of ​​the second substructure 1102' includes the projection area of ​​the second segment 2112' of the toroidal inductor structure 211' on the first shielding structure layer, the area of ​​the third substructure 1103' includes the projection area of ​​the third segment 2113' of the toroidal inductor structure 211' on the first shielding structure layer, the area of ​​the fourth substructure 1104' includes the projection area of ​​the fourth segment 2114' of the toroidal inductor structure 211' on the first shielding structure layer, the area of ​​the fifth substructure 1105' includes the projection area of ​​the fifth segment 2115' of the toroidal inductor structure 211' on the first shielding structure layer, the area of ​​the sixth substructure 1106' includes the projection area of ​​the sixth segment 2116' of the toroidal inductor structure 211' on the first shielding structure layer, and the area of ​​the seventh substructure 1107' includes the projection area of ​​the seventh segment 2117' of the toroidal inductor structure 211' on the first shielding structure layer.

[0115] The first shielding structure 110' comprises multiple metal wires extending in different directions, with no loops between them. The first portion of the first shielding structure 110' comprises multiple substructures, each of which includes multiple parallel metal wires. The direction in which the metal wires extend in each substructure is determined by the direction in which the metal strips in the overlying ring inductor structure 211' extend. In this example, the metal wires in each substructure extend perpendicular to the direction in which the metal strips in the ring inductor structure 211' extend. The extending direction (direction 7) of the plurality of metal wires in the first substructure 1101' is perpendicular to the extending direction (direction 1) of the plurality of metal strips in the first section 2111' of the toroidal inductor structure 211'. The extending direction (direction 8) of the plurality of metal wires in the second substructure 1102' is perpendicular to the extending direction (direction 2) of the plurality of metal strips in the second section 2112' of the toroidal inductor structure 211'. The extending direction (direction 1) of the plurality of metal wires in the third substructure 1103' is perpendicular to the extending direction (direction 3) of the plurality of metal strips in the third section 2113' of the toroidal inductor structure 211'. The extending direction (direction 2) of the plurality of metal wires in the fourth substructure 1104' is perpendicular to the extending direction (direction 3) of the plurality of metal strips in the third section 2113' of the toroidal inductor structure 211'. The extension direction (Direction 4) of the multiple metal strips in the fourth section 2114' of the structure 211' is perpendicular. The extension direction (Direction 3) of the multiple metal wires in the fifth substructure 1105' is perpendicular to the extension direction (Direction 5) of the multiple metal strips in the fifth section 2115' of the toroidal inductor structure 211'. The extension direction (Direction 4) of the multiple metal wires in the sixth substructure 1106' is perpendicular to the extension direction (Direction 6) of the multiple metal strips in the sixth section 2116' of the toroidal inductor structure 211'. The extension direction (Direction 5) of the multiple metal wires in the seventh substructure 1107' is perpendicular to the extension direction (Direction 7) of the multiple metal strips in the seventh section 2117' of the toroidal inductor structure 211'. In this example, Direction 5 is the opposite of Direction 1, Direction 6 is the opposite of Direction 2, Direction 7 is the opposite of Direction 3, and Direction 8 is the opposite of Direction 4. As can be seen from the figure, the x-direction is the same as Direction 4, and the y-direction is the same as Direction 2.

[0116] In this example, the first portion of the first shielding structure 110' further includes a zeroth substructure 1100' and an eighth substructure 1108'. The zeroth substructure 1100' in this example is the same as the zeroth substructure 1100 in Figure 7 , and the eighth substructure 1108' in this example is the same as the eighth substructure 1108 in Figure 7 . The zeroth substructure 1100' includes a plurality of parallel metal wires, the extension direction (direction 6) of which is perpendicular to the extension direction (direction 8) of the plurality of metal strips at the first end 2110' of the toroidal inductor structure 211'. The eighth substructure 1108' includes a plurality of parallel metal wires, the extension direction (direction 6) of which is perpendicular to the extension direction (direction 4) of the plurality of metal strips at the second end 2118' of the toroidal inductor structure 211'.

[0117] In this example, the second portion of the first shielding structure 110' is similar to the shielding structure 120 shown in Figure 6, including a ninth substructure 1201' and a tenth substructure 1202'. The ninth substructure 1201' in this example is the same as the ninth substructure 1201 in Figure 6, and the tenth substructure 1202' in this example is the same as the tenth substructure 1202 in Figure 6.

[0118] Each substructure includes metal lines that are connected sequentially but do not form a loop. The metal lines in each substructure are connected to the metal lines in the adjacent substructures, but do not form a loop. In an exemplary embodiment, the width of each metal line in the first shielding structure 110' can be 0.68μm to 1.05μm (e.g., 0.85μm), and the spacing between the metal lines can be 0.68μm to 1.05μm (e.g., 0.85μm).

[0119] Through the above arrangement, on the plane of the shielding structure layer, the first shielding structure 110' encompasses the orthographic projection of the first inductor 21' onto the shielding structure layer 100'. Furthermore, the extension direction of the metal wires in the first shielding structure 110' is perpendicular to the extension direction of the metal strips in the annular inductor structure 211'. The direction of the current induced by the shielding structure is opposite to the direction of the current in the metal strips of the upper annular inductor structure 211, causing the electric fields in the shielding structure to cancel each other out. Furthermore, the metal wires in the first shielding structure are isolated and disconnected, preventing the formation of induced currents between the shielding metals. Therefore, the above embodiment can reduce induced currents and improve the quality factor (Q) of the inductor.

[0120] In this example, as shown in Figure 13 , second shielding structure 130 is used to shield the induced current in the coil structure of second inductor 22 ′. The second shielding structure comprises multiple parallel metal wires, with the centerline of the second shielding structure coinciding with the projection of the centerline of the coil structure. The parallel arrangement of the multiple metal wires eliminates loops and prevents the formation of induced currents.

[0121] In another example, the second shielding structure 130 may adopt the structure shown in FIG. 14 , which can ensure that the metal wires of the shielding structure are perpendicular to the metal strips in the inductor as much as possible to obtain a better shielding effect.

[0122] Figure 15 is a simulation comparison of the Q values ​​of an inductor using the shielding structure shown in Figure 13 (Figure 9) and an inductor without the shielding structure. In the figure, curve Q3 shows the simulation result of the inductor Q value after using the shielding structure of this embodiment, with the maximum Q value reaching 30. Curve Q4 shows the simulation result of the inductor Q value without the shielding structure, with the maximum Q value reaching 25. It can be seen that the shielding structure described in this embodiment can significantly improve the Q value of the inductor.

[0123] The inductor in the above embodiment can be used in the voltage-controlled oscillator (VCO) circuit of a radar sensor chip, addressing the problem of VCO circuits being susceptible to radiation leakage, which can interfere with the signals of integrated circuit components on the semiconductor substrate. A VCO formed using this inductor can be used in a radio frequency phase-locked loop (PLL) circuit to provide a 7.2 GHz clock signal.

[0124] In other embodiments, the first inductor may have other polygonal structures, and the shielding structure may also have corresponding shapes, as long as the metal wires in the shielding structure and the metal strips in the inductor structure are perpendicular to each other. For example, the first inductor may have a quadrilateral, pentagon, hexagon, heptagon, or enneagonal shape.

[0125] In other embodiments, depending on the application scenario of the semiconductor structure, the semiconductor structure may include only the first inductor. For example, in the example of FIG6 , the semiconductor structure includes only the inductor 21 and the first shielding structure 110 and the second shielding structure 120 for shielding the induced current of the inductor 21. For another example, in the example of FIG9 , the semiconductor structure includes only the inductor 21' and the first shielding structure 110' for shielding the induced current of the inductor 21'. Alternatively, in other embodiments, in addition to the first inductor and the shielding structure for shielding the induced current of the first inductor, other semiconductor devices may also be included, and this application does not limit this.

[0126] In other embodiments, the positions of the first device structure layer, the second device structure layer and the shielding structure layer can be adjusted as needed, for example, the positions of the first device structure layer and the second device structure layer can be interchanged, or the positions of the first device structure layer and the shielding structure layer can be interchanged.

[0127] The present disclosure also provides a semiconductor structure, comprising an insulated device structure layer (i.e., the aforementioned second device structure layer) and a shielding structure layer, wherein the device structure layer is provided with at least one inductor device, and the shielding structure layer is provided with a first shielding structure for shielding interference signals leaked by the inductor device, wherein:

[0128] The inductor device includes a ring-shaped inductor structure, the ring-shaped inductor structure includes a plurality of segments, the plurality of segments are sequentially connected to form a non-closed polygonal symmetrical structure, and each segment includes a plurality of metal strips arranged in the same direction and in parallel;

[0129] The first shielding structure includes multiple substructures, each substructure corresponds to a segment of the annular inductor structure, and each substructure includes multiple parallel metal wires, one end of each metal wire is connected to the adjacent metal wire, and the other end is disconnected to form a non-closed charge cancellation path, and the extension direction of the metal wire in each substructure is perpendicular to the extension direction of the metal strip in the annular inductor structure segment corresponding to the substructure.

[0130] By arranging a shielding structure composed of metal wires below the metal strips of the inductor device, and because the extension direction of the metal wires in the shielding structure is perpendicular to the extension direction of the metal strips of the inductor device, and one end of each metal wire is connected to each other through a metal path and the other end is open, the charge cancellation path formed in this way can offset the interference signals of different current directions leaked by multiple groups of metal strips in the inductor device as much as possible through the metal wires perpendicular to the current direction, thereby achieving the purpose of reducing the impact on other devices.

[0131] In an exemplary embodiment, the inductor device further includes a first connecting portion connected to the annular inductor structure, the first connecting portion including a first connecting sub-portion and a second connecting sub-portion, the first connecting sub-portion including a first main structure and a first branch structure that are interconnected and extend in directions perpendicular to each other, the first main structure being connected to a first segment of the multiple segments of the annular inductor structure, the second connecting sub-portion including a second main structure and a second branch structure that are interconnected and extend in directions perpendicular to each other, the second main structure being connected to a last segment of the multiple segments of the annular inductor structure, the first branch structure and the second branch structure serving as the input and output ends of the inductor device, the first connecting sub-segment and the second connecting sub-segment being symmetrically arranged, and the axis of symmetry coincides with the axis of symmetry of the annular inductor structure;

[0132] The shielding structure layer is also provided with a substructure for shielding the first connecting sub-part and a substructure for shielding the second connecting sub-part, the orthographic projection of the substructure for shielding the first connecting sub-part includes the orthographic projection of the first main structure, and the orthographic projection of the substructure for shielding the second connecting sub-part includes the orthographic projection of the second main structure; each substructure includes a plurality of parallel and loop-free metal wires, wherein each substructure includes a group of metal wires that are parallel to each other and arranged in a rectangle, one end of the metal wires in the same group are connected to each other, and the other end is disconnected, and the two substructures are connected by a metal wire so that the two substructures as a whole form a non-closed charge compensation path.

[0133] In an exemplary embodiment, the inductor device further includes a second inductor insulated from the annular inductor structure, the second inductor extends along the symmetry axis of the annular inductor structure, and the orthographic projection of the symmetry axis of the second inductor coincides with the orthographic projection of the symmetry axis of the annular inductor structure.

[0134] In an exemplary embodiment, the second inductor includes one or more of the following structures: a coil structure symmetrical about the symmetry axis, a meandering structure arranged along the symmetry axis, and a strip structure arranged along the symmetry axis.

[0135] In an exemplary embodiment, when the second inductor includes a coil structure symmetrical with the symmetry axis of the annular inductor structure, the shielding structure layer is also provided with a second shielding structure for shielding the induced current of the coil structure in the second inductor, and the second shielding structure includes a plurality of metal wires without loops.

[0136] The detailed description of the above embodiments can be found in the above description and will not be repeated here.

[0137] Figure 16 is a system block diagram of a phase-locked loop (PLL), which includes a phase and frequency detector (PFD), a charge pump (CP), a low pass filter (LPF), an oscillator (VCO), and a divider (DIV). The PLL is primarily used to generate a clock signal or a frequency modulated continuous wave (FMCW) signal. As shown in Figure 16, the first input of the PFD is connected to the input of the PLL, the second input of the PFD is connected to the output of the divider DIV, and the output of the PFD is connected to the input of the charge pump CP. The output of the charge pump CP is connected to the input of the filter LPF, the output of the filter LPF is connected to the control terminal of the oscillator VCO, and the output of the oscillator VCO is connected to the input of the divider DIV. The reference clock signal REFCLK and the divided frequency signal DIVCLK are input to a phase detector (PFD). The PFD compares the phases of REFCLK and DIVCLK, generating error signals, or control signals (UP and DOWN), corresponding to the phase difference between the two signals. These signals are then input to a charge pump (CP). Controlled by the error signals, the charge pump (CP) adjusts its output current. This current is filtered by a filter (LPF) and converted into a voltage signal, which is then output to a voltage-controlled oscillator (VCO). The VCO adjusts the frequency of its output oscillation signal based on the voltage of the received voltage signal. This oscillation signal is divided by a frequency divider to produce DIVCLK. When REFCLK and DIVCLK are at the same frequency and in the same phase, the PLL is locked. The VCO can be a VCO included in a semiconductor integrated circuit according to any of the aforementioned embodiments. The phase-locked loop (PLL) can be integrated into the aforementioned semiconductor circuit.

[0138] The embodiment of the present disclosure also provides a radar sensor, as shown in FIG17 , including a signal receiving module 51, a signal transmitting module 52 and a clock source 53, wherein the signal transmitting module 52 is configured to transmit an electromagnetic wave signal through a transmitting antenna based on a reference frequency provided by a phase-locked loop in the clock source 53; the signal receiving module 51 is configured to use a receiving antenna to receive an echo formed by reflection from a target object, and perform down-conversion processing based on the radio frequency signal transmitted by the signal transmitting module 52 to generate and output an intermediate frequency signal; wherein the phase-locked loop is a phase-locked loop including the above-mentioned voltage-controlled oscillator.

[0139] Optionally, in an exemplary embodiment of the present disclosure, the frequency modulated continuous wave signal is a millimeter wave signal, so that the electronic device can be applied to fields such as autonomous driving, industrial automation, smart home appliances, and security inspection.

[0140] As shown in Figure 18, in an exemplary embodiment, the radar sensor may also include an analog-to-digital conversion module 54 and a signal processing module 55, wherein the signal receiving module 51 generates and outputs an intermediate frequency signal to the analog-to-digital conversion module 54, which is processed by the analog-to-digital conversion module 54 and then transmitted to the signal processing module 55, and the signal processing module 55 is used to perform signal processing on the digital signal output by the analog-to-digital conversion module 54.

[0141] For example, the signal transmission module 52 generates a chirp signal using a preset continuous frequency modulation scheme; a radio frequency transmission signal is obtained through frequency multiplication and fed to a transmitting antenna to transmit a corresponding detection signal wave. When the detection signal wave is reflected by an object, an echo signal wave is generated. The echo signal wave is converted into a radio frequency received signal by the receiving antenna. The signal receiving module 51 is configured to down-convert and filter the radio frequency received signal using the radio frequency transmission signal. The signal is then processed by the analog-to-digital conversion module 54 to output a baseband digital signal representing the difference frequency between the detection signal wave and the echo signal wave. The signal processing module 55 is configured to extract measurement information from the baseband digital signal through signal processing and output measurement data. The signal processing includes performing phase, frequency, and time domain digital signal processing calculations based on at least one signal to be processed provided by at least one receiving antenna. The measurement data includes at least one of the following: distance data indicating the relative distance of at least one detected obstacle; velocity data indicating the relative velocity of at least one detected obstacle; and angle data indicating the relative angle of at least one detected obstacle.

[0142] Optionally, the frequency modulated continuous wave signal is a millimeter wave signal, and the radar sensor may be an AiP millimeter wave radar chip with an integrated antenna. In other embodiments of the present application, the radar sensor may also be other types of radar chips, which is not limited in the present application.

[0143] In an exemplary embodiment, the present disclosure further provides an electronic device including the aforementioned phase-locked loop or radar sensor.

[0144] Exemplarily, the electronic device includes: a device body; and an electronic device, such as a phase-locked loop or radar sensor, disposed on the device body. The device body is a structure that carries and is signal-connected to a radio device. The radio device transmits and / or receives radio signals that have been phase-shifted by a phase shifter, thereby performing functions such as target detection and / or communication within a beam scanning range. This provides the device body with detected target information and / or communication information, thereby assisting or even controlling the operation of the device body.

[0145] In an optional embodiment, the electronic device comprising the device body and the aforementioned at least one radio device may be a component or product used in fields such as smart housing, transportation, smart home, consumer electronics, monitoring, industrial automation, in-cabin detection, and health care. For example, the device body may be intelligent transportation equipment (such as cars, bicycles, motorcycles, ships, subways, trains, etc.), security equipment (such as cameras), liquid level / flow rate detection equipment, smart wearable devices (such as bracelets, glasses, etc.), smart home devices (such as sweeping robots, door locks, televisions, air conditioners, smart lights, etc.), various communication devices (such as mobile phones, tablets, etc.), as well as gates, smart traffic lights, smart signs, traffic cameras, and various industrial robotic arms (or robots), etc. It may also be various instruments for detecting vital signs and various devices equipped with the instruments, such as in-cabin detection in automobiles, indoor personnel monitoring, smart medical equipment, consumer electronic devices, etc.

[0146] In the description of the embodiments of the present disclosure, it should be noted that the terms "upper", "lower", "one side", "the other side", "one end", "the other end", "side", "relative", "four corners", "periphery", ""mouth"-shaped structure", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, and do not indicate or imply that the structure referred to has a specific orientation, is constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0147] In the description of the embodiments of the present disclosure, unless otherwise clearly specified or limited, the terms "connection", "direct connection", "indirect connection", "fixed connection", "installation", and "assembly" should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integral connection. The terms "installation", "connection", and "fixed connection" can refer to direct connection, indirect connection through an intermediate medium, or internal communication between two components. For those skilled in the art, the meanings of the above terms in the present disclosure can be understood according to the circumstances.

Claims

1. A semiconductor integrated circuit comprising: A substrate layer and a plurality of metal layers disposed on the substrate layer and insulated; wherein the plurality of metal layers include: a shielding structure layer, a first device structure layer and a plurality of second device structure layers, and the semiconductor integrated circuit includes an oscillator for outputting a differential signal; The oscillator comprises a first inductor and a second inductor formed in different second device structure layers, a capacitor formed in the first device structure layer, and a first transistor and a second transistor formed in the substrate layer; wherein the first inductor and the second inductor are symmetrical about the same symmetry axis; The shielding structure layer is formed with a shielding structure for shielding interference signals leaked by the first inductor and / or the second inductor.

2. The semiconductor integrated circuit according to claim 1, wherein: The shielding structure includes a plurality of metal wires, which are arranged to form a non-closed charge compensation path, wherein the plurality of metal wires are arranged along the current direction in the inductor, and the extension direction of the plurality of metal wires is perpendicular to the positive projection of the current direction.

3. The semiconductor integrated circuit according to claim 1, wherein: The orthographic projection of the capacitive device on the substrate layer does not overlap with the orthographic projection of the shielding structure on the substrate layer.

4. The semiconductor integrated circuit according to claim 1, wherein: The first end of the first inductor is connected to the first end of the capacitor, the first electrode of the first transistor and the control electrode of the second transistor, the second end of the first inductor is connected to the second end of the capacitor, the first electrode of the second transistor and the control electrode of the first transistor, the control end of the first inductor is connected to the voltage end, the second electrode of the first transistor is connected to the first end of the second inductor, the second electrode of the second transistor is connected to the first end of the second inductor, the second end of the second inductor is grounded, the second electrode of the first transistor is connected to the first output end of the oscillator, the second electrode of the second transistor is connected to the second output end of the oscillator, and the first output end and the second output end of the oscillator output a differential signal.

5. The semiconductor integrated circuit according to claim 1, wherein: The first inductor includes a non-closed polygonal annular inductor structure and a first connecting portion connected to the annular inductor structure; the annular inductor structure is an axisymmetric structure, the annular inductor structure includes multiple segments, the multiple segments are connected in sequence to form a non-closed polygonal symmetrical structure, the first segment of the multiple segments is a head segment, and the last segment is a tail segment, the first connecting portion includes a first connecting sub-portion and a second connecting sub-portion, the first connecting sub-portion is connected to the head segment, the second connecting sub-portion is connected to the tail segment, and the symmetry axis of the first connecting sub-portion and the second connecting sub-portion coincides with the symmetry axis of the annular inductor structure; the ends of the first connecting sub-portion and the second connecting sub-portion that are not connected to the annular inductor structure are the first end and the second end of the first inductor, and the first end and the second end are symmetrically arranged.

6. The semiconductor integrated circuit according to claim 5, wherein: The first inductor further includes a second connection portion, which is connected to the annular inductor structure and is located at a side of the annular inductor structure away from the first connection portion, and the second connection portion is a control end of the first inductor.

7. The semiconductor integrated circuit according to claim 5, wherein: The first connecting sub-portion and the second connecting sub-portion are rectangular inductor structures.

8. The semiconductor integrated circuit according to claim 6, wherein: The shielding structure layer includes a first shielding structure for shielding the induced current of the annular inductor structure, the first shielding structure includes multiple substructures, each substructure corresponds to a segment of the annular inductor structure, each substructure includes multiple parallel metal wires, and the extension direction of the metal wires in each substructure is perpendicular to the extension direction of the metal strips in the annular inductor structure segment corresponding to the substructure.

9. The semiconductor integrated circuit according to claim 6 or 7, wherein: The shielding structure includes a substructure for shielding the first connecting sub-part and a substructure for shielding the second connecting sub-part; each substructure includes a plurality of parallel and loop-free metal wires, wherein each substructure includes a group of metal wires that are parallel to each other and arranged in a rectangle, one end of the metal wires in the same group are connected to each other, and the other end is disconnected, and the two substructures are connected by a metal wire so that the two substructures form a non-closed charge compensation path as a whole.

10. The semiconductor integrated circuit according to claim 5, wherein: Each section of the ring-shaped inductor structure includes a plurality of metal strips arranged in the same direction; Each section of the ring inductor structure includes 8 to 15 metal strips arranged in parallel, the width of each metal strip is 2 μm to 2.2 μm, and the spacing between adjacent metal strips is 1.5 μm to 1.8 μm; or Each section of the annular inductor structure includes 3 to 5 metal strips arranged in parallel, the width of each metal strip is 9 μm-14 μm, and the spacing between adjacent metal strips is 1.8 μm to 2.2 μm.

11. The semiconductor integrated circuit according to claim 6, wherein: The control end of the oscillator is located on the symmetry axis, and the first output end and the second output end of the oscillator are arranged symmetrically about the symmetry axis.

12. The semiconductor integrated circuit according to claim 1, wherein: The second inductor is configured as a metal structure extending along the direction of the symmetry axis, and a projection of the second inductor is partially or completely located in a region surrounded and not covered by the projection of the first inductor.

13. The semiconductor integrated circuit according to claim 1 or 12, wherein: The second inductor includes one or more of the following structures: a coil structure symmetrical about the symmetry axis, a bending structure arranged along the symmetry axis, and a strip structure arranged along the symmetry axis.

14. The semiconductor integrated circuit according to claim 1, 12 or 13, wherein: The width of the metal strips in the second inductor is 4.4 μm to 6.6 μm, and the spacing between adjacent metal strips is 1.5 μm to 1.8 μm.

15. The semiconductor integrated circuit according to claim 1, wherein: The orthographic projection of the first end and the orthographic projection of the second end of the second inductor are both located on the symmetry axis.

16. The semiconductor integrated circuit according to claim 1, wherein: The shielding structure layer includes a second shielding structure, and the second shielding structure is used to shield the induced current of the second inductor.

17. The semiconductor integrated circuit according to claim 1, wherein: The first device structure layer is located between the second device structure layer and the shielding structure layer.

18. A phase-locked loop, integrated in a semiconductor circuit as claimed in any one of claims 1 to 17, wherein: The phase-locked loop includes a phase frequency detector, a charge pump, a filter, an oscillator and a frequency divider arranged in the semiconductor circuit; wherein: The first input end of the phase frequency detector is the input end of the phase locked loop, the second input end of the phase frequency detector is connected to the output end of the frequency divider, and the output end of the phase frequency detector is connected to the input end of the charge pump; The output end of the charge pump is connected to the input end of the filter, the output end of the filter is connected to the control end of the oscillator, and the output end of the oscillator is connected to the input end of the frequency divider.

19. A radar sensor, comprising a signal receiving module, a signal transmitting module and a clock source, wherein the signal transmitting module is configured to transmit an electronic wave signal through a transmitting antenna based on a reference frequency provided by a phase-locked loop in the clock source, and the signal receiving module is configured to receive an echo formed by reflection from a target object using a receiving antenna, and perform down-conversion processing based on the reference frequency provided by the phase-locked loop in the clock source to generate and output an intermediate frequency signal; wherein, The phase-locked loop is the phase-locked loop according to claim 18.

20. An electronic device comprising the phase-locked loop according to claim 18 or the radar sensor according to claim 19.

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