Control method for inverter circuit, a power conversion device, and energy storage apparatus

Abstract

A control method for an inverter circuit, comprising: when the output current of a T-type three-level inverter circuit is greater than a preset threshold and the T-type three-level inverter circuit is not in an overcurrent protection state, triggering the overcurrent protection state; and when the T-type three-level inverter circuit is in the overcurrent protection state, stopping outputting a first driving signal, and outputting a third driving signal, so that a first switching transistor and a second switching transistor in a first bridge arm are in a cut-off state because the first driving signal is not received, and a second bridge arm is alternately turned on because the third driving signal is received.

Description

Inverter circuit control method, power conversion device and energy storage equipment

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on June 14, 2023, with application number 202310709192.2 and invention name “Control method of inverter circuit, power conversion device and energy storage device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of voltage conversion technology, and in particular to a control method for an inverter circuit, a power conversion device, and an energy storage device. Background Art

[0004] The statements herein merely provide background information related to the present application and do not necessarily constitute exemplary techniques.

[0005] In an off-grid inverter with a T-type three-level inverter circuit topology, when a nonlinear load (such as an RCD load) is connected to its output, a wave-by-wave current limiting protection method is often used to protect the off-grid inverter from overcurrent. Specifically, when the output current of the off-grid inverter is detected to be higher than the overcurrent protection threshold, all the switches in the off-grid inverter are blocked, reducing the output current. When the output current falls below the overcurrent threshold, the switching current is restored to the switches in the off-grid inverter. If the output current of the off-grid inverter exceeds the overcurrent threshold again, the output current will be blocked again, and all the switches will be blocked again. When the output current falls below the overcurrent threshold again, the switching current is restored to the switches. After multiple blocking operations, the off-grid inverter is shut down. However, when all the switches are blocked, the voltage across the bus capacitors can easily increase, leading to an imbalance in the DC bus midpoint voltage, which can easily cause problems such as switch damage and premature shutdown.

[0006] Summary of the Invention

[0007] According to various embodiments of the present application, the present application provides a control method for an inverter circuit, a power conversion device, and an energy storage device.

[0008] The present application provides a control method for a T-type three-level inverter circuit, wherein the T-type three-level inverter circuit includes a bus capacitor unit, a positive and negative DC bus, a first bridge arm, a second bridge arm, and an inductor, wherein the bus capacitor unit is connected between the positive and negative DC bus, and the bus capacitor unit includes two bus capacitors connected in series; the first bridge arm is connected between the positive and negative DC bus, and the first bridge arm includes a first switch tube and a second switch tube connected in series; the midpoint between the first switch tube and the second switch tube is connected to the first end of the inductor; the second end of the inductor serves as the output end of the T-type three-level inverter circuit; the second bridge arm is connected between the midpoint of the first bridge arm and the midpoints of the two bus capacitors; the control method includes: obtaining a T-type three-level The output current and overcurrent protection state of the inverter circuit; when the output current is greater than a preset overcurrent protection threshold, the overcurrent protection state is triggered; when not in the overcurrent protection state, a first drive signal and a second drive signal are output; the first drive signal is used to drive the first bridge arm to work, and the second drive signal is used to drive the second bridge arm to work, so as to convert the DC power on the positive and negative DC bus into AC power for output; when in the overcurrent protection state, the output of the first drive signal is stopped and the third drive signal is output; when the first bridge arm does not receive the first drive signal, the first switch tube and the second switch tube are both in the cut-off state; the third drive signal is used to drive the second bridge arm to alternately turn on.

[0009] The present application also provides a power conversion device, which includes a T-type three-level inverter circuit and a controller; the T-type three-level inverter circuit includes a bus capacitor unit, a positive and negative DC bus, a first bridge arm, a second bridge arm and an inductor, the bus capacitor unit is connected between the positive and negative DC bus, and the bus capacitor unit includes two bus capacitors connected in series; the first bridge arm is connected between the positive and negative DC bus, and the first bridge arm includes a first switching tube and a second switching tube connected in series; the midpoint between the first switching tube and the second switching tube is connected to the first end of the inductor; the second end of the inductor serves as the output end of the T-type three-level inverter circuit; the second bridge arm is connected between the midpoint of the first bridge arm and the midpoints of the two bus capacitors; the controller is used to execute the control method as described above.

[0010] The present application also provides an energy storage device, which includes an energy storage battery and the power conversion device as described above. The energy storage battery is connected to the positive and negative DC bus bars to provide DC power to the positive and negative DC bus bars, and the T-type three-level inverter circuit is used to convert the DC power on the positive and negative DC bus bars into AC power for output.

[0011] The present application also provides an electronic device comprising: a processor; a memory storing executable instructions of the processor; wherein the processor is configured to execute the control method as described above by executing the executable instructions.

[0012] The present application also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the control method as described above is implemented.

[0013] The details of one or more embodiments of the present application are set forth in the following drawings and description. Other features, objects, and advantages of the present application will become apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments or exemplary technologies of the present application, the following briefly introduces the drawings required for use in the description of the embodiments or exemplary technologies. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, without paying any creative work, they can also obtain drawings of other embodiments based on these drawings.

[0015] FIG1 is a schematic diagram of a module of a power conversion device provided in an embodiment of the present application.

[0016] FIG2 is a schematic diagram of the circuit structure of a T-type three-level inverter circuit provided in an embodiment of the present application.

[0017] FIG3 is a schematic diagram of a current flow path when all switching tubes of a T-type three-level inverter circuit provided by an embodiment of the present application are blocked.

[0018] FIG4 is a flow chart of a control method for a T-type three-level inverter circuit provided in an embodiment of the present application.

[0019] FIG5 is a schematic diagram of a current flow path in an overcurrent protection state of a T-type three-level inverter circuit provided by an embodiment of the present application.

[0020] FIG6 is a partial flow chart of a control method for a T-type three-level inverter circuit provided in an embodiment of the present application.

[0021] FIG. 7 is a detailed flowchart of step S130 in FIG. 4 .

[0022] FIG8 is a partial flow chart of a control method for a T-type three-level inverter circuit provided in an embodiment of the present application.

[0023] FIG9 is a schematic diagram of a module of an energy storage device provided in an embodiment of the present application.

[0024] FIG10 is a schematic diagram of a module of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0025] It should be noted that the terms "first" and "second" in the description, claims and drawings of this application are used to distinguish similar objects, rather than to describe a specific order or sequence.

[0026] It should also be noted that the method disclosed in the embodiments of the present application or the method shown in the flowchart includes one or more steps for implementing the method. Without departing from the scope of the claims, the execution order of multiple steps can be interchanged with each other, and some steps can also be deleted.

[0027] The following will describe some embodiments with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features therein may be combined with each other.

[0028] Please refer to Figure 1, which shows a power conversion device 100 provided in an embodiment of the present application. As shown in Figure 1, the power conversion device 100 includes a T-type three-level inverter circuit 110 and a controller 120. The controller 120 is used to control the operation of the T-type three-level inverter circuit 110 so that the T-type three-level inverter circuit 110 outputs alternating current. In this embodiment, the T-type three-level inverter circuit 110 is a single-phase T-type three-level inverter circuit.

[0029] Please refer to Figure 2, which shows a T-type three-level inverter circuit 110 provided in an embodiment of the present application. As shown in Figure 2, the T-type three-level inverter circuit 110 is a single-phase T-type three-level inverter circuit. The T-type three-level inverter circuit 110 includes a bus capacitor unit 111, positive and negative DC busbars (BUS+, BUS-), a first bridge arm 112, a second bridge arm 113, and an inductor L1.

[0030] The positive and negative DC busbars (BUS+, BUS-) can be used to connect to a power supply to receive DC power provided by the power supply. In one embodiment, the power conversion device 100 may further include a DC conversion circuit. One end of the DC conversion circuit is used to connect to the DC power supply, and the other end of the DC conversion circuit is used to connect to the positive and negative DC busbars (BUS+, BUS-). The DC conversion circuit is used to convert the DC power supplied by the DC power supply into a voltage and output it to the positive and negative DC busbars (BUS+, BUS-), thereby providing power to the T-type three-level inverter circuit 110.

[0031] The bus capacitor unit 111 is connected between the positive and negative DC busbars (BUS+, BUS-), and the bus capacitor unit 111 includes two bus capacitors connected in series. In Figure 2, the two bus capacitors are described as bus capacitor C1 and bus capacitor C2. One end of the bus capacitor C1 is connected to the positive DC busbar BUS+, the other end of the bus capacitor C1 is connected to one end of the bus capacitor C2, and the other end of the bus capacitor C2 is connected to the negative DC busbar BUS-. The midpoint O of the two bus capacitors is the connection point between the two bus capacitors, which is the reference point of the T-type three-level inverter circuit 110, and the potential of the reference point is the reference zero potential. The voltage between the positive and negative DC busbars (BUS+, BUS-) is Udc, and energy is stored through the bus capacitor C1 and the bus capacitor C2. When the two are in a voltage equilibrium state, the voltage across the bus capacitor C1 is +Udc / 2, and the voltage across the bus capacitor C2 is both Udc / 2, or the voltage difference between the two is within a preset allowable deviation range. When the voltage difference between the two bus capacitors exceeds the preset allowable deviation range, the two need to be balanced. In traditional circuits, additional balancing circuits need to be added to balance the voltage on the bus capacitors, which will increase the cost of the product. In this embodiment, by changing the drive of the single-phase T-type three-level inverter circuit, the occurrence of voltage imbalance on the bus capacitors can be avoided, thereby eliminating the need for an additional bus midpoint balancing circuit, which is beneficial to reducing costs. It can be understood that in other embodiments, the bus midpoint balancing circuit and the control method in this embodiment can also be used simultaneously to ensure that the voltage on the DC bus can be balanced in time when an imbalance occurs.

[0032] The first bridge arm 112 is connected between the positive and negative DC busbars (BUS+, BUS-). The first bridge arm 112 includes a first switching transistor S1 and a second switching transistor S2 connected in series. The midpoint a between the first switching transistor S1 and the second switching transistor S2 is connected to the first end of the inductor L1. The second end of the inductor L1 serves as the live wire output terminal L of the T-type three-level inverter circuit 110, which is used to connect to the live wire of the load. Specifically, the first end of the first switching transistor S1 is connected to the positive DC busbar BUS+, the second end of the first switching transistor S1 is connected to the first end of the second switching transistor S2 and the first end of the inductor L1 (i.e., the midpoint a between the first switching transistor S1 and the second switching transistor S2), and the second end of the second switching transistor S2 is connected to the negative DC busbar BUS-.

[0033] The second bridge arm 113 is connected between the midpoint a of the first bridge arm 112 and the midpoint O of the two bus capacitors. The midpoint O is also connected to the neutral line output terminal N of the T-type three-level inverter circuit 110, which is used to connect to the neutral line of the load. The second bridge arm 113 includes a third switch tube S3 and a fourth switch tube S4 connected in series, and the third switch tube S3 and the fourth switch tube S4 are arranged opposite each other. Specifically, the first end of the third switch tube S3 is connected to the midpoint a of the first bridge arm 112 and the first end of the inductor L1, the second end of the third switch tube S3 is connected to the second end of the fourth switch tube S4, and the first end of the fourth switch tube S4 is connected to the midpoint O of the two bus capacitors. For example, when both the third switch S3 and the fourth switch S4 are transistors, the emitter of the third switch S3 serves as the second terminal, and the collector serves as the first terminal. The emitter of the third switch S3 is connected to the emitter of the fourth switch S4, and the collector of the fourth switch S4 is connected to the negative DC bus BUS-, so that the parasitic diodes of the third and fourth switches S3 or the diodes connected in parallel therewith are connected top to top. Therefore, when both the third and fourth switches S3 and S4 are turned off, the branch of the second bridge arm 113 is disconnected.

[0034] The control terminals of the respective switching transistors in the T-type three-level inverter circuit 110 may be connected to the controller 120 for receiving a drive signal from the controller 120, thereby turning the respective switching transistors on or off according to the received drive signal. The controller 120 may include a central processing unit (CPU), other general-purpose processors, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gates, or transistor logic devices.

[0035] It is understood that the embodiments of the present application do not limit the type of each switch tube in the T-type three-level inverter circuit 110. For example, each switch tube can be configured as a triode, a silicon controlled rectifier (SCR), a metal oxide semiconductor field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), or a gallium nitride high electron mobility transistor (GaN HEMT), or can be configured by connecting at least one of a triode, SCR, MOSFET, IGBT, or GaN HEMT in parallel with a diode. For ease of description, the embodiments of the present application illustrate an example in which each switch tube is configured by a triode and a body diode connected in parallel therewith. The base of the triode is the control terminal, the collector is the first terminal, and the emitter is the second terminal.

[0036] The working principle of the T-type three-level inverter circuit 110 shown in FIG1 is as follows:

[0037] When the AC power output by the T-type three-level inverter circuit 110 is in a positive half cycle, the first switch S1 and the fourth switch S4 are complementarily turned on, the second switch S2 is in the off state, and the third switch S3 is constantly turned on.

[0038] Specifically, when the first switch tube S1 is turned on, the second switch tube S2 is turned off, the fourth switch tube S4 is turned off, and the third switch tube S3 is turned on, the current flows from the positive DC bus BUS+ through the first switch tube S1, the inductor L1 and the load (Rt shown in Figure 2 is the equivalent load resistance) to the midpoint O. At this time, the bus capacitor C1 discharges to charge the inductor L1.

[0039] When the first switch S1 is turned off, the second switch S2 is turned off, the third switch S3 is turned on, and the fourth switch S4 is turned on, due to the freewheeling effect of the inductor L1, the current in the inductor L1 forms a loop through the load, the fourth switch S4, and the third switch S3, so that the current in the inductor L1 gradually decreases.

[0040] When the AC power output by the T-type three-level inverter circuit 110 is in the negative half cycle (i.e., the output terminal L is a negative voltage), the first switch S1 is in a constant off state, the second switch S2 and the third switch S3 are complementary turned on, and the fourth switch S4 is constantly turned on.

[0041] Specifically, when the second switch tube S2 is turned on, the third switch tube S3 is turned off, the first switch tube S1 is turned off, and the fourth switch tube S4 is turned on, the negative current on the negative DC bus BUS- passes through the second switch tube S2, the inductor L1, and the load to the midpoint O and then flows to the bus capacitor C2. At this time, the bus capacitor C2 discharges to charge the inductor L1.

[0042] When the second switch S2 is turned off, the third switch S3 is turned on, the first switch S1 is turned off, and the fourth switch S4 is turned on, due to the freewheeling effect of the inductor L1, the current in the inductor L1 forms a loop through the third switch S3, the fourth switch S4, and the load, thereby gradually reducing the current in the inductor L1.

[0043] When the load connected to the output end of the T-type three-level inverter circuit 110 is a nonlinear load (such as an RCD load), the nonlinear load will cause the output current of the T-type three-level inverter circuit 110 to be distorted (the AC power output by the T-type three-level inverter circuit 110 is a sinusoidal voltage, and the nonlinear load causes the output current to be non-sinusoidal). To accommodate the RCD load, the T-type three-level inverter circuit 110 uses a wave-by-wave current limiting method for overcurrent protection. When it is detected that the output current of the T-type three-level inverter circuit 110 is greater than the overcurrent threshold, the overcurrent protection is triggered, and all the switching tubes in the T-type three-level inverter circuit 110 are subjected to wave blocking processing, so that all the switching tubes are in the off state.

[0044] At this time, due to the freewheeling effect of the inductor L1, the current on the inductor L1 will pass through the loop formed by the load, the bus capacitor C2, and the parasitic diode of the second switch tube S2 (as shown by the arrow in Figure 3) to charge the bus capacitor C2. The current on the inductor L1 gradually decreases to the overcurrent recovery threshold. At this time, the drive signal is restored to all the switch tubes in the T-type inverter circuit, so that the T-type three-level inverter circuit 110 works normally to output AC power.

[0045] During the restoration of normal operation of the T-type three-level inverter circuit 110, when the AC power output by the T-type three-level inverter circuit 110 is in the positive half-cycle of the AC power, the bus capacitor C1 discharges to charge the inductor L1, and the current in the inductor L1 increases until the overcurrent protection is triggered again. After the overcurrent protection is triggered again, the T-type three-level inverter circuit 110 is subjected to a wave blocking process, that is, each switch of the T-type three-level inverter circuit 110 is controlled to be in the off state. At this time, the bus capacitor C2 continues to be charged through the loop shown in Figure 3. Therefore, when the T-type three-level inverter circuit 110 triggers the wave-by-wave current limiting, since fault protection measures (such as shutting down the T-type three-level inverter circuit 110) are not immediately taken, the above process will be repeated: the bus capacitor C1 discharges, the overcurrent protection is triggered, and the bus capacitor C2 is charged.

[0046] It can be seen that this will cause the bus capacitor C2 to be constantly charged and the bus capacitor C1 to be constantly discharged during the wave-by-wave current limiting protection process, so that the voltage difference between the bus capacitors C1 and C2 becomes increasingly larger, which in turn makes the midpoint voltage of the DC bus unbalanced, which can easily cause damage to the switching tube in the circuit and premature shutdown of the circuit for protection.

[0047] To this end, the present application provides a control method for a T-type three-level inverter circuit 110, which addresses the issue of DC bus midpoint voltage imbalance when the T-type three-level inverter circuit 110 performs wave-by-wave current limiting protection. In at least one embodiment, the control method provided herein can be executed by the aforementioned controller 120. It is understood that there can be one controller 120, or more than one controller 120, which together implement the control method of this embodiment.

[0048] Please refer to FIG. 4 , which is a flow chart of a control method for a T-type three-level inverter circuit according to an embodiment of the present application. The control method includes the following steps S110 - S140 .

[0049] S110 : Obtain the output current and overcurrent protection status of the T-type three-level inverter circuit.

[0050] The output current can be obtained by detecting the output end of the T-type three-level inverter circuit 110 through a current detection circuit. The current detection circuit can be integrated into the controller 120 or connected to the controller 120 and set independently.

[0051] In addition, the overcurrent protection state can be represented by setting an overcurrent status value. For example, the overcurrent status value defaults to 0. When the overcurrent protection state is triggered, the overcurrent status value is set to 1. When the overcurrent protection state is not triggered or the overcurrent protection state is released, the overcurrent status value is set to 0, and vice versa. In this way, the overcurrent protection state of the T-type three-level inverter circuit 110 can be obtained by obtaining the overcurrent status value.

[0052] S120 : When the output current is greater than a preset overcurrent protection threshold, triggering the overcurrent protection state.

[0053] For example, when the output current is greater than a preset overcurrent protection threshold, the overcurrent state value is set to 1 to indicate that the overcurrent protection state is triggered.

[0054] S130. When not in the overcurrent protection state, output a first drive signal and a second drive signal, wherein the first drive signal is used to drive the first bridge arm to operate, and the second drive signal is used to drive the second bridge arm to operate, so as to convert the DC power on the positive and negative DC bus into AC power and then output it.

[0055] The first drive signal and the second drive signal can be PWM (Pulse Width Modulation) signals. The first switch S1 and the second switch S2 in the first bridge arm 112 are turned on and off by the first drive signal, and the switch S1 and the second switch S2 in the second bridge arm 113 are turned on and off by the second drive signal. It is understood that the first switch S1 and the second switch S2 in the first bridge arm 112 are not turned on at the same time, and the two switch S1 and the second switch S2 in the second bridge arm 113 are not turned on at the same time.

[0056] S140. When in the overcurrent protection state, stop outputting the first drive signal and output the third drive signal, wherein when the first bridge arm does not receive the first drive signal, the first switch tube and the second switch tube are both in the cut-off state, and the third drive signal is used to drive the second bridge arm to alternately turn on.

[0057] Since the third drive signal drives the second bridge arm 113 to alternately turn on, when the second bridge arm 113 is turned on, the current on the inductor L1 will be discharged through the path formed by the second bridge arm 113 (as shown by the arrow in Figure 5), so that the current on the inductor L1 gradually decreases, thereby reducing the time for the path to be formed in Figure 3, and thus reducing the time for the inductor L1 to charge the bus capacitor C2, preventing the bus capacitor C2 from increasing, and further preventing the midpoint voltage of the bus capacitors C1 and C2 from being unbalanced.

[0058] In the control method provided by the present application, when the output current of the T-type three-level inverter circuit 110 is greater than a preset threshold, an overcurrent protection state is triggered. When in the overcurrent protection state, the controller 120 stops outputting the first drive signal and outputs a third drive signal, so that the first switch tube S1 and the second switch tube S2 in the first bridge arm 112 are in a cut-off state due to not receiving the first drive signal, and the second bridge arm 113 is alternately turned on due to receiving the third drive signal. In this way, during overcurrent protection, the second bridge arm 113 can form an inductor current discharge loop with the inductor L1, so that the current of the inductor L1 gradually decreases, thereby preventing the current on the inductor L1 from charging the bus capacitor C2 through the parasitic diode of the second switch tube S2 and increasing the voltage of the bus capacitor C2, thereby preventing the problem of unbalanced midpoint voltage of the DC bus when the T-type three-level inverter circuit 110 performs wave-by-wave current limiting protection.

[0059] It should be noted that in this application, there is no necessary order between steps S110, S120, S130, and S140. For example, when the overcurrent protection state is triggered and the circuit is in the overcurrent protection state, step S140 is executed. When the overcurrent protection state is not triggered and the circuit is not in the overcurrent protection state, step S130 is executed.

[0060] It is understood that when the output current is less than the preset overcurrent recovery threshold, overcurrent protection is not required. Therefore, the control method may further include: when the output current is less than the preset overcurrent recovery threshold and the overcurrent protection state is in place, releasing the overcurrent protection state. The preset overcurrent recovery threshold is less than the preset overcurrent protection threshold. When the overcurrent protection state is released, the first drive signal and the second drive signal may be re-output to drive the first bridge arm 112 and the second bridge arm 113 to resume normal operation.

[0061] Please refer to Figure 6, which is a partial flow chart of the control method provided in an embodiment of the present application. As shown in Figure 6, in some embodiments, the control method of the T-type three-level inverter circuit 110 may further include:

[0062] S150. When the overcurrent protection state is triggered, the overcurrent triggering times are increased by one, and the initial value of the overcurrent triggering times is zero.

[0063] When the output current is greater than the preset overcurrent protection threshold, the overcurrent protection state is triggered. At this time, the first drive signal is stopped from being output to the first bridge arm 112, and the third drive signal is output to the second bridge arm 113, so that the second bridge arm 113 is alternately turned on.

[0064] S160 : When the number of overcurrent triggering times is greater than or equal to a preset number, control the T-type three-level inverter circuit to stop working.

[0065] When the overcurrent triggering times are greater than or equal to the preset times, it can be confirmed that the output current of the T-type three-level inverter circuit 110 is overcurrent. In order to prevent the output current from overcurrent damaging the circuit, the T-type three-level inverter circuit 110 is controlled to stop working.

[0066] Compared to when all switching transistors are blocked, the circuit of inductor L1 decreases faster because inductor L1 charges negative bus capacitor C2. Therefore, the output current decreases faster. Only when the output current falls significantly below the preset overcurrent recovery threshold will the first and second drive signals be re-output to restore the circuit to normal operation. Therefore, when the circuit resumes normal operation, it takes a longer time for the output current to reach the overcurrent protection threshold again. During this process, inductor L1 also takes longer to charge bus capacitor C2, resulting in a larger voltage difference between the two bus capacitors C1 and C2.

[0067] In this example, when the overcurrent protection state is triggered, a third drive signal is output to alternately turn on the second bridge arm 113. The discharge circuit formed by the second bridge arm 113 only experiences switching losses from the third and fourth switch transistors S3 and S4, with no other devices consuming electrical energy. Consequently, the electrical energy in the inductor L1 decreases slowly, and as soon as the output current drops to a preset overcurrent recovery threshold, the circuit quickly responds by re-outputting the first and second drive signals to restore normal operation. Upon resuming normal operation, the output current remains relatively high, shortening the time required for the output current to rise to the overcurrent protection threshold and, consequently, the time required to resume normal operation. Consequently, the time required to charge the bus capacitor C2 is also shortened, further preventing an increase in the voltage difference between the two bus capacitors C1 and C2, thereby further preventing the problem of unbalanced DC bus midpoint voltage.

[0068] Please refer to FIG. 7 , which is a detailed flowchart of the third driving signal in step S140 of the embodiment of the present application being used to drive the second bridge arm to alternately turn on. This step includes:

[0069] S141. When the AC power is in the positive half cycle, the third driving signal is used to control the third switch tube to be constantly turned on, and to control the fourth switch tube to be alternately turned on.

[0070] At this time, the first switch S1 and the second switch S2 are both turned off, and when the fourth switch S4 and the third switch S3 are turned on, the third switch S3 and the fourth switch S4 form a discharge loop for the inductor L1. This discharge loop, as shown by the arrows in FIG5 , causes the inductor L1 to perform freewheeling discharge. However, when the fourth switch S4 is turned off, the discharge loop for the inductor L1 cannot be formed.

[0071] S142. When the AC power is in the negative half cycle, the third driving signal is used to control the fourth switch tube to be constantly turned on and to control the third switch tube to be alternately turned on.

[0072] At this time, the first switch S1 and the second switch S2 are both turned off, and when the fourth switch S4 and the third switch S3 are turned on, the third switch S3 and the fourth switch S4 form a discharge loop for the inductor L1, causing the inductor L1 to perform freewheeling discharge. The current direction at this time is opposite to the current direction in FIG5 . When the third switch is turned off, the discharge loop for the inductor L1 cannot be formed.

[0073] It can be understood that the AC power being in the positive half-cycle or negative half-cycle mentioned at this time refers to whether the AC power is in the positive half-cycle or negative half-cycle when the T-type three-level inverter circuit 110 is working normally at this moment, rather than whether the AC power is actually in the positive half-cycle or negative half-cycle at this moment. The positive and negative values ​​of the AC power at this time are the same as those at the moment when the overcurrent protection state is triggered.

[0074] In some embodiments, the third drive signal may be the same as the second drive signal, that is, when the overcurrent protection state is triggered, the output of the first drive signal to the first bridge arm 112 is stopped, but the output of the second drive signal to the second bridge arm 113 is continued. Of course, the third drive signal may also be different from the second drive signal, but may maintain the same timing as the second drive signal, that is, when the overcurrent protection state is triggered, the output of the second drive signal to the second bridge arm 112 is stopped and the third drive signal is output to the second bridge arm 112. Alternatively, the timing of the third drive signal and the second drive signal may also be different, and this application does not impose any restrictions on this, as long as the third drive signal can cause the second bridge arm 113 to be alternately turned on, that is, the second bridge arm 113 is alternately switched between the on and off states.

[0075] Furthermore, step S130 includes:

[0076] When the AC power is in the positive half cycle, the first drive signal is used to control the on and off of the first switch tube and control the second switch tube to be constantly off. The second drive signal is used to control the third switch tube to be constantly on and control the on and off of the fourth switch tube, and the first switch tube S1 and the fourth switch tube are alternately turned on.

[0077] When the AC power is in the negative half cycle, the first drive signal is used to control the on and off of the second switch tube and control the first switch tube to be constantly off, and the second drive signal is used to control the fourth switch tube to be constantly on and control the on and off of the third switch tube, and the second switch tube and the third switch tube are alternately turned on.

[0078] The specific working process has been described in the above embodiments and will not be repeated here.

[0079] Referring to FIG. 8 , in some embodiments, the control method may further include:

[0080] S210: Obtain a current reference value.

[0081] The current reference value can be pre-set based on actual needs. Alternatively, it can be obtained based on the output voltage and the voltage reference value. Specifically, a voltage deviation between the output voltage and the voltage reference value is calculated, and the voltage deviation value is proportionally adjusted or proportional-integral adjusted to obtain the current reference value. Of course, this application does not limit the specific method for obtaining the current reference value.

[0082] S220 , determining a duty cycle of the alternately turned-on switching tubes according to the output current and the current reference value.

[0083] Specifically, the current deviation value may be calculated according to the output current and the current reference value, and the duty cycle may be obtained by performing proportional adjustment or proportional-integral adjustment on the current deviation value.

[0084] S230 , generating a first driving signal and a second driving signal according to the duty cycle.

[0085] In this example, the output current is used as a feedback value, the duty cycle is determined according to the output current and the current reference value, and then the first drive signal and the second drive signal are output according to the duty cycle, thereby adjusting the output current of the T-type three-level inverter circuit 110 so that the output current can meet the demand and be more stable.

[0086] In some embodiments, the output current can be regulated through a current loop, where the output current and a current reference value are input into the current loop, allowing the current loop to determine the duty cycle. Alternatively, the current reference value can be obtained through a voltage loop, and then the output current can be regulated through the current loop.

[0087] The present application also provides an energy storage device, as shown in Figure 9, which is a module schematic diagram of the energy storage device 10 provided in an embodiment of the present application. Specifically, the energy storage device 10 includes an energy storage battery 200 and the aforementioned power conversion device 100. The energy storage battery 200 is connected to the positive and negative DC busbars (BUS+, BUS-) to provide DC power to the positive and negative DC busbars (BUS+, BUS-). The T-type three-level inverter circuit 110 is used to convert the DC power on the positive and negative DC busbars (BUS+, BUS-) into AC power for output.

[0088] In some embodiments, a DC conversion module (not shown) may be connected between the energy storage battery 200 and the positive and negative DC busbars (BUS+, BUS-). The DC conversion module is used to convert the DC power of the energy storage battery 200 into a voltage and then provide it to the positive and negative DC busbars (BUS+, BUS-).

[0089] 10 , the present application further provides an electronic device 20, comprising a processor 21 and a memory 22. The memory 22 stores executable instructions of the processor 21, and the processor 21 is configured to execute the above control method by executing the executable instructions.

[0090] The present application also provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the control method as described above is implemented.

[0091] The processor may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0092] The memory can be used to store computer programs and / or modules. The processor implements various functions of the power conversion device 100 by running or accessing the computer programs and / or modules stored in the memory, and by calling data stored in the memory. The memory can primarily include a program storage area and a data storage area. The program storage area can store an operating system and at least one application required for a function (such as a power on / off function, a key processing function, etc.); the data storage area can store data generated based on the use of the power conversion device 100. Furthermore, the memory can include non-volatile memory, such as a hard disk, internal memory, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device.

[0093] The memory may be an external memory and / or an internal memory of the power conversion device 100 and / or the energy storage device 10. Furthermore, the memory may be a physical memory, such as a memory stick, a TF card (Trans-flash Card), and the like.

[0094] If the program code and various data in the memory are implemented in the form of a software functional unit and sold or used as an independent product, they can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, such as the control method of the T-type three-level inverter circuit 110, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, it can implement the steps of the above-mentioned various method embodiments. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device that can carry computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), etc.

[0095] The embodiments of the present application are described in detail above in conjunction with the accompanying drawings, but the present application is not limited to the above embodiments. Various changes can be made within the scope of knowledge possessed by ordinary technicians in the relevant technical field without departing from the purpose of the present application.

Claims

1. A control method for a T-type three-level inverter circuit, the T-type three-level inverter circuit comprising a bus capacitor unit, a positive and negative DC bus, a first bridge arm, a second bridge arm and an inductor, the bus capacitor unit is connected between the positive and negative DC bus, the bus capacitor unit comprises two bus capacitors connected in series; the first bridge arm is connected between the positive and negative DC bus, the first bridge arm comprises a first switch tube and a second switch tube connected in series; the midpoint between the first switch tube and the second switch tube is connected to the first end of the inductor; the second end of the inductor serves as the output end of the T-type three-level inverter circuit; the second bridge arm is connected between the midpoint of the first bridge arm and the midpoints of the two bus capacitors; the control method comprises: Obtaining the output current and overcurrent protection status of the T-type three-level inverter circuit; When the output current is greater than a preset overcurrent protection threshold, an overcurrent protection state is triggered; When not in the overcurrent protection state, outputting a first drive signal and a second drive signal; The first driving signal is used to drive the first bridge arm to work, and the second driving signal is used to drive the second bridge arm to work, so as to convert the direct current on the positive and negative direct current bus bars into alternating current for output; When in the overcurrent protection state, the first drive signal is stopped from being output and the third drive signal is output; when the first bridge arm does not receive the first drive signal, the first switch tube and the second switch tube are both in the cut-off state; the third drive signal is used to drive the second bridge arm to be alternately turned on.

2. The control method according to claim 1, wherein: The control method further comprises: When the output current is less than a preset overcurrent recovery threshold and is in an overcurrent protection state, the overcurrent protection state is released; and the preset overcurrent recovery threshold is less than the preset overcurrent protection threshold.

3. The control method according to claim 2, wherein: The control method further comprises: When the overcurrent protection state is triggered, the overcurrent triggering times are increased by one, and the initial value of the overcurrent triggering times is zero; When the overcurrent triggering number is greater than or equal to a preset number, the T-type three-level inverter circuit is controlled to stop working.

4. The control method according to any one of claims 1 to 3, wherein: The second bridge arm includes a third switch tube and a fourth switch tube connected in series, and the third switch tube and the fourth switch tube are arranged oppositely; The third driving signal is used to drive the second bridge arm to be alternately turned on, and includes: When the alternating current is in a positive half cycle, the third driving signal is used to control the third switch tube to be constantly turned on, and to control the fourth switch tube to be alternately turned on; When the alternating current is in a negative half cycle, the third driving signal is used to control the fourth switch to be constantly turned on and to control the third switch to be alternately turned on.

5. The control method according to claim 4, wherein: The first driving signal is used to drive the first bridge arm to work, and the second driving signal is used to drive the second bridge arm to work, including: When the alternating current is in a positive half cycle, the first driving signal is used to control the on and off of the first switch tube and to control the second switch tube to be constantly off, and the second driving signal is used to control the third switch tube to be constantly on and to control the on and off of the fourth switch tube; and the first switch tube and the fourth switch tube are alternately turned on; When the alternating current is in the negative half cycle, the first drive signal is used to control the on and off of the second switch tube and control the first switch tube to be constantly cut off, and the second drive signal is used to control the fourth switch tube to be constantly turned on and control the on and off of the third switch tube; and the second switch tube and the third switch tube are turned on alternately.

6. The control method according to claim 5, wherein: The method further comprises: Get current reference value; Determine the duty cycle of the alternately turned-on switch tube according to the output current and the current reference value; The first drive signal and the second drive signal are generated according to the duty cycle.

7. A power conversion device, comprising a T-type three-level inverter circuit and a controller; the T-type three-level inverter circuit comprises a bus capacitor unit, a positive and negative DC bus, a first bridge arm, a second bridge arm and an inductor, the bus capacitor unit is connected between the positive and negative DC bus, and the bus capacitor unit comprises two bus capacitors connected in series; the first bridge arm is connected between the positive and negative DC bus, and the first bridge arm comprises a first switch tube and a second switch tube connected in series; the midpoint between the first switch tube and the second switch tube is connected to the first end of the inductor; the second end of the inductor serves as the output end of the T-type three-level inverter circuit; the second bridge arm is connected between the midpoint of the first bridge arm and the midpoints of the two bus capacitors; the controller is used to execute the control method as described in any one of claims 1 to 6.

8. An energy storage device, comprising an energy storage battery and the power conversion device as claimed in claim 7, wherein the energy storage battery is connected to the positive and negative DC bus bars to provide DC power to the positive and negative DC bus bars, and the T-type three-level inverter circuit is used to convert the DC power on the positive and negative DC bus bars into AC power for output.

9. An electronic device, comprising: processor; a memory storing executable instructions of the processor; The processor is configured to execute the control method according to any one of claims 1 to 6 by executing the executable instructions.

10. A computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the control method according to any one of claims 1 to 6.

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