Surface-emitting device and surface-emitting device production method

Abstract

The present invention provides a surface-emitting device with which it is possible to inhibit deformation of a surface-emitting element when mounting the surface-emitting element on a mounting substrate.　This surface-emitting device comprises: a surface-emitting element including an element region and a peripheral region around the element region; and a mounting substrate on which the surface-emitting element is mounted. The element region has a light-emitting element part having an electrode provided on the mounting substrate-side thereof. The electrode is joined to the mounting substrate via a bump, and a spacer is interposed between the peripheral region and the mounting substrate.

Description

Surface emitting device and method for manufacturing the surface emitting device

[0001] The technology according to the present disclosure (hereinafter also referred to as "the technology") relates to a surface emitting device and a method for manufacturing the surface emitting device.

[0002] 2. Description of the Related Art Conventionally, semiconductor devices have been known that include a semiconductor element and a mounting substrate on which the semiconductor element is mounted (for example, by flip-chip mounting) (see, for example, Patent Documents 1 and 2).

[0003] Japanese Patent Laid-Open No. 8-288336 Japanese Patent Laid-Open No. 2001-35872

[0004] However, Patent Documents 1 and 2 make no mention of the possibility that the semiconductor element may be deformed when mounted on a mounting board.

[0005] Therefore, a main object of the present technology is to provide a surface light emitting device that can prevent deformation of the surface light emitting element when the surface light emitting element is mounted on a mounting substrate.

[0006] The present technology provides a surface emitting device comprising: a surface light emitting element including an element region and a peripheral region around the element region; and a mounting substrate on which the surface light emitting element is mounted; wherein the element region has a light emitting element portion with an electrode provided on the mounting substrate side, the electrode being joined to the mounting substrate via a bump; and a spacer being interposed between the peripheral region and the mounting substrate. The spacer may be interposed between an outermost periphery of the peripheral region and the mounting substrate. The peripheral region may have a dummy element portion. The dummy element portion may include the outermost periphery. The outermost periphery may extend along at least a portion of the periphery of the element region, and the spacer may be provided along at least a portion of the extension direction of the outermost periphery. The outermost periphery may extend along the entire periphery of the element region. The spacer may have a plurality of portions aligned in the extension direction. The spacer may include a dummy bump. An emission surface of the surface light emitting element, which is the surface opposite to the mounting substrate side, may be flat. A modified layer may be present on a side surface of the surface light emitting element. In a direction perpendicular to the in-plane direction, the surface of the electrode facing the mounting substrate may be closer to the mounting substrate than the surface of the outermost periphery of the peripheral region facing the mounting substrate, and the thickness of the spacer may be greater than the thickness of the bump. Another electrode may be provided on the mounting substrate side of the dummy element portion of the peripheral region and / or on the mounting substrate side of the dummy element portion of the element region, and the another electrode may be joined to the mounting substrate via another bump. The element region may have a plurality of the light-emitting element portions spaced apart in the in-plane direction, and the another electrode may be a common electrode provided in common to the plurality of light-emitting element portions. Each of the bump and the dummy bump may contain a material that is resistant to crushing under pressure. The bump and the dummy bump may be made of the same conductive material. The peripheral region may include a dummy element portion, and each of the light-emitting element portion and the dummy element portion may have first and second semiconductor structures stacked on each other and a light-emitting layer disposed between the first and second semiconductor structures.The present technology also provides a method for manufacturing a surface emitting device, including: forming a surface emitting device including an element region having a light emitting element portion and a peripheral region of the element region; and interposing a spacer between the peripheral region and a mounting substrate, and bonding an electrode provided on the mounting substrate side of the light emitting element portion to the mounting substrate via a bump. The spacer may include a dummy bump. The bonding step may be performed by pressing an emission surface, which is the surface of the surface emitting element opposite to the mounting substrate side, toward the mounting substrate. The forming step may include forming a plurality of the surface emitting elements collectively so that the peripheral regions are adjacent to each other, and performing stealth dicing on the plurality of surface emitting elements along the boundaries between the adjacent peripheral regions after the forming step and before the bonding step to separate them into individual pieces.

[0007] 1 is a cross-sectional view (part 1) of a surface emitting device according to Example 1 of an embodiment of the present technology; FIG. 2 is a cross-sectional view (part 2) of a surface emitting device according to Example 1 of an embodiment of the present technology; FIG. 3 is a bottom view of a state in which a mounting substrate of a surface emitting device according to Example 1 of an embodiment of the present technology is omitted; FIG. 4 is a flowchart for describing an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology; FIG. 5 is a cross-sectional view of a process of an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology; FIG. 6 is a cross-sectional view of a process of an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology; FIG. 7 is a cross-sectional view of a process of an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology; FIG. 8 is a cross-sectional view of a process of an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology; 19A is a cross-sectional view illustrating steps of an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology. FIG. 19B is a cross-sectional view illustrating steps of an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology. FIG. 19C is a cross-sectional view illustrating steps of an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology. FIG. 19D is a perspective view illustrating steps of an example of a manufacturing method of a surface emitting device according to Example 1 of an embodiment of the present technology. FIG. 19A is a view for explaining a defect during bump bonding of a surface emitting device according to a comparative example. FIG. 19B is a view for explaining an action during bump bonding of a surface emitting device according to an embodiment of the present technology. FIG. 19D is a cross-sectional view illustrating a surface emitting device according to Example 2 of an embodiment of the present technology. FIG. 19C is a cross-sectional view illustrating a surface emitting device according to Example 3 of an embodiment of the present technology. FIG. 19D is a bottom view of a surface emitting device according to Example 3 of an embodiment of the present technology, with a mounting substrate omitted. FIG. 19C is a cross-sectional view illustrating a surface emitting device according to Example 4 of an embodiment of the present technology. FIG. 19D is a bottom view of a surface emitting device according to Example 4 of an embodiment of the present technology, with a mounting substrate omitted.10 is a cross-sectional view of a surface emitting device according to Example 5 of an embodiment of the present technology. FIG. 11 is a cross-sectional view of a surface emitting device according to Example 6 of an embodiment of the present technology. FIG. 12 is a cross-sectional view of a surface emitting device according to Example 8 of an embodiment of the present technology. FIG. 13 is a cross-sectional view of a surface emitting device according to Example 14 of an embodiment of the present technology. FIG. 14 is a cross-sectional view of a surface emitting device according to Example 1 of an embodiment of the present technology. FIG. 15 is a cross-sectional view of a surface emitting device according to Example 1 of an embodiment of the present technology. FIG. 16 is a cross-sectional view of a surface emitting device according to Example 1 of an embodiment of the present technology. FIG. 17 is a cross-sectional view of a surface emitting device according to Example 1

[0008] Preferred embodiments of the present technology will be described in detail below with reference to the accompanying drawings. Note that in this specification and the drawings, components having substantially the same functional configurations are denoted by the same reference numerals, and redundant description will be omitted. The embodiments described below illustrate typical embodiments of the present technology, and the scope of the present technology should not be interpreted narrowly. Even when it is described in this specification that the surface emitting device and the method for manufacturing the surface emitting device according to the present technology each achieve multiple effects, it is sufficient that the surface emitting device and the method for manufacturing the surface emitting device according to the present technology each achieve at least one effect. The effects described in this specification are merely examples and are not limiting, and other effects may also be achieved.

[0009] The description will be made in the following order: 0. Introduction 1. Surface emitting device according to Example 1 of one embodiment of the present technology 2. Surface emitting device according to Example 2 of one embodiment of the present technology 3. Surface emitting device according to Example 3 of one embodiment of the present technology 4. Surface emitting device according to Example 4 of one embodiment of the present technology 5. Surface emitting device according to Example 5 of one embodiment of the present technology 6. Surface emitting device according to Example 6 of one embodiment of the present technology 7. Surface emitting device according to Example 7 of one embodiment of the present technology 8. Surface emitting device according to Example 8 of one embodiment of the present technology 9. Surface emitting device according to Example 9 of one embodiment of the present technology 10. Surface emitting device according to Example 10 of one embodiment of the present technology 11. Surface emitting device according to Example 11 of one embodiment of the present technology 12. Surface emitting device according to Example 12 of one embodiment of the present technology 13. Surface emitting device according to Example 13 of one embodiment of the present technology 14. Surface emitting device according to Example 14 of one embodiment of the present technology 15. Modified example of the present technology 16. Application example to electronic device 17. Example of applying a surface light emitting device to a distance measurement device 18. Example of mounting a distance measurement device on a moving object

[0010] <0. Introduction>

[0011] Conventionally, semiconductor devices have been known that include a semiconductor element (semiconductor chip) including an element region and its peripheral region, and a mounting substrate (e.g., a drive substrate, a wiring substrate, etc.) on which the semiconductor element is flip-chip mounted (see, for example, Patent Documents 1 and 2).

[0012] Generally, a plurality of semiconductor devices are formed collectively on a single wafer, and then the wafer is diced into individual semiconductor devices.

[0013] In conventional semiconductor devices, the element portion, which is a structure possessed by the element region, is bonded to the mounting substrate via bumps, whereas no spacer structure is interposed between the peripheral region and the mounting substrate.

[0014] The inventors discovered a problem with conventional semiconductor devices: when the entire semiconductor element is pressed against the mounting substrate during flip-chip mounting (bump bonding), the peripheral region, which is not interposed between the element and the mounting substrate, is pressed against the mounting substrate, causing the element (chip) to deform (bend). That is, the inventors discovered a problem in which the semiconductor element deforms (elastically deforms) due to the presence of a gap between the peripheral region of the element region of the semiconductor element and the mounting substrate. If the semiconductor element deforms during bump bonding, tensile stress is applied to the semiconductor element after bump bonding, leading to element damage and reduced reliability.

[0015] Therefore, after extensive research, the inventors developed a surface emitting device according to the present technology, which is a surface emitting device that can prevent deformation (elastic deformation) of the surface emitting element when the surface emitting element is mounted on a mounting substrate (when bumps are bonded).

[0016] Specifically, the inventors succeeded in suppressing deformation (elastic deformation) of the surface-emitting element when it is mounted on the mounting substrate by interposing a spacer structure between the peripheral region of the element region of the surface-emitting element and the mounting substrate.

[0017] The above problem becomes more serious as the area of ​​the dicing region, which is the outermost periphery of the peripheral region, becomes larger. For example, when dicing by stealth dicing, it is necessary to secure a certain area for the laser irradiation area as the dicing region. To address this problem, it is conceivable to provide some kind of structure in the laser irradiation area before stealth dicing. However, in this case, the laser light is scattered or absorbed by the structure during stealth dicing, making it difficult to perform stealth dicing accurately.

[0018] Therefore, the inventors have succeeded in performing stealth dicing accurately and suppressing deformation when mounting the surface-emitting element to the mounting substrate (when bump bonding) by forming a structure that acts as a spacer in the laser irradiation area after stealth dicing, for example.

[0019] Hereinafter, several examples of an embodiment of a surface light emitting device according to the present technology will be described in detail with reference to the drawings. In the following, in cross-sectional views such as Fig. 1, the upper side will be referred to as "upper" and the lower side will be referred to as "lower" as appropriate.

[0020] <1. Surface light emitting device according to example 1 of an embodiment of the present technology> Fig. 1 is a cross-sectional view (part 1) of a surface light emitting device 10 according to example 1 of an embodiment of the present technology. Fig. 2 is a cross-sectional view (part 2) of the surface light emitting device 10 according to example 1 of an embodiment of the present technology. Fig. 3 is a bottom view of the surface light emitting device 10 according to example 1 of an embodiment of the present technology, with the mounting substrate omitted. Fig. 1 is a cross-sectional view taken along line 1-1 in Fig. 3. Fig. 2 is a cross-sectional view taken along line 2-2 in Fig. 3.

[0021] <Configuration of surface light emitting device> (Overall configuration of surface light emitting device)

[0022] As an example, as shown in FIGS. 1 and 2 , a surface light emitting device 10 according to the present technology includes a surface light emitting element 100 and a mounting substrate 200 on which the surface light emitting element 100 is mounted.

[0023] The surface light emitting device 100 is, for example, in the form of a chip, and is also called a "surface light emitting chip." For example, the surface light emitting device 100 is flip-chip mounted on a mounting substrate 200. Flip-chip mounting is also called "junction-down mounting" or "face-down mounting." For example, the surface light emitting device 100 is driven by a driver (driving circuit). For example, the mounting substrate 200 is a driving substrate having a driver (driving circuit) or a wiring substrate connected to the driver (driving circuit).

[0024] 1 to 3, the surface light emitting element 100 includes an element region EA and a peripheral region PA of the element region EA. The element region EA and the peripheral region PA are spaced apart in the in-plane direction, for example.

[0025] 3, the element area EA includes a plurality of (e.g., 64) light emitting element units LE spaced apart in the in-plane direction. The plurality of light emitting element units LE are arranged in a two-dimensional array (e.g., a matrix) in the in-plane direction, constituting a light emitting element unit array.

[0026] The peripheral area PA has, as an example, a dummy element portion DE. The dummy element portion DE has, as an example, two first regions R1, R1 that sandwich the element area EA in the direction of line 1-1 in FIG. 3 when viewed from below (plan view, the same applies below), and a second region R2 (the outermost portion of the peripheral area PA) that is circular when viewed from below (for example, rectangular frame-shaped when viewed from below) and surrounds the area including the element area EA and the two first regions R1, R1.

[0027] Each light-emitting element unit LE is, for example, a back-emitting type vertical cavity surface-emitting laser (VCSEL). Each light-emitting element unit LE emits light to the side opposite to the mounting substrate 200 (to the back side (upper surface) of the substrate 101 described later).

[0028] 1 and 2, each of the light-emitting element units LE and dummy element units DE includes a substrate 101, first and second semiconductor structures SS1 and SS2 stacked on the substrate 101, and a light-emitting layer 106 disposed between the first and second semiconductor structures SS1 and SS2. That is, each of the light-emitting element units LE and dummy element units DE has substantially the same stacked structure.

[0029] The first and second semiconductor structures SS1 and SS2 have different conductivity types. Each light-emitting element LE has a double heterostructure in which the light-emitting layer 106 is sandwiched in the stacking direction (vertical direction, direction perpendicular to the in-plane direction) between the first and second semiconductor structures SS1 and SS2 of different conductivity types, and holes and electrons can undergo radiative recombination (radiative recombination) in the light-emitting layer 106.

[0030] The first semiconductor structure SS1 has, for example, a first contact layer 102 arranged on a substrate 101, a first semiconductor multilayer reflector 103 arranged on the first contact layer 102, and a first cladding layer 105 arranged on the first semiconductor multilayer reflector 103. For example, an oxide constriction layer 104 is arranged in the first semiconductor multilayer reflector 103. For example, a portion (lower portion) of the substrate 101 and the first contact layer 102 is shared by each light emitting element portion LE and dummy element portion DE.

[0031] As an example, the second semiconductor structure SS2 has a second cladding layer 107 arranged on the light-emitting layer 106, a second semiconductor multilayer reflector 108 arranged on the second cladding layer 107, and a second contact layer 109 arranged on the second semiconductor multilayer reflector 108.

[0032] That is, in the surface-emitting device 100, as an example, a first contact layer 102, a first semiconductor multilayer reflector 103 having an oxide constriction layer 104 disposed therein, a first cladding layer 105, an emission layer 106, a second cladding layer 107, a second semiconductor multilayer reflector 108, and a second contact layer 109 are stacked in this order on a substrate 101.

[0033] In each light-emitting element unit LE, a resonator is configured including a light-emitting layer 106 and first and second semiconductor multilayer film reflectors 103 and 108 sandwiching the light-emitting layer 106 in the stacking direction (vertical direction). The resonator length is, for example, an integral multiple of half the wavelength (λ / 2) of a standing wave generated within the resonator, where λ is the emission wavelength of the light-emitting element unit LE.

[0034] Each of the light-emitting element portions LE and dummy element portions DE includes a mesa, for example. Hereinafter, the mesa of the light-emitting element portion LE will be referred to as a light-emitting mesa LM, and the mesa of the dummy element portion DE will be referred to as a dummy mesa DM. The dummy mesa is also referred to as a "pedestal portion."

[0035] As an example, each light-emitting mesa LM and dummy mesa DM is composed of a portion (upper part) of the first contact layer 102, a first semiconductor multilayer reflector 103 having an oxide constriction layer 104 therein, a first cladding layer 105, a light-emitting layer 106, a second cladding layer 107, a second semiconductor multilayer reflector 108, and a second contact layer 109.

[0036] As an example, each of the light emitting mesas LM and dummy mesas DM has a height of several μm to several tens of μm (for example, approximately 3 to 10 μm). It is preferable that the difference in height between each of the light emitting mesas LM and dummy mesas DM is as small as possible. The shape of the light emitting mesa LM in plan view is circular here (see FIG. 3), but it may also be, for example, elliptical or polygonal, such as a square, rectangle, hexagon, or octagon. The shape of the dummy mesa DM in plan view (shape when viewed from below) is rectangular frame-like here (see FIG. 3), but it may also be, for example, a circular ring, an elliptical ring, or a polygonal frame shape other than a rectangular frame shape.

[0037] Each light-emitting element unit LE is provided with a cathode electrode 115 (electrode) on the mounting substrate 200 side, for example. Each cathode electrode 115 is provided in a solid state on the second contact layer 109 of the corresponding light-emitting element unit LE, for example. Each cathode electrode 115 is joined to the mounting substrate 200 via a first bump B1 (bump), for example. Each cathode electrode 115 is made of, for example, Au / Ni / AuGe or the like.

[0038] 1, in the first region R1 of the dummy element portion DE, an anode electrode 112 (another electrode) is provided on the mounting substrate 200 side, for example. The anode electrode 112 is provided in a solid state on the second contact layer 109 in the first region R1 of the dummy element portion DE, for example. The anode electrode 112 is joined to the mounting substrate 200 via a plurality of second bumps B2 (another bumps), for example. The anode electrode 112 is a common electrode provided in common to a plurality of light-emitting element portions LE. The anode electrode 112 is made of, for example, Au / Pt / Ti or the like.

[0039] As an example, the region of the first contact layer 102 between the element region EA and the peripheral region PA and the region between adjacent light emitting element portions LE are covered with the intermediate electrode 113. The intermediate electrode 113 is made of, for example, Au / Pt / Ti.

[0040] As an example, the side and bottom surfaces (tops of the dummy mesas DM) of the first regions R1 of the dummy element portions DE and the side surfaces of each light emitting element portion LE in the element region EA are covered with an insulating film 111. The insulating film 111 is made of a dielectric material such as SiO, SiN, or SiON.

[0041] As an example, the intermediate electrode 113 and the insulating film 111 provided on the side and lower surface of the first region R1 of the dummy element portion DE are covered with wiring 114. The end of the wiring 114 provided on the lower surface of the first region R1 is in contact with the anode electrode 112. In other words, the anode electrode 112 is connected to the intermediate electrode 113 via the wiring 114. The wiring 114 is made of, for example, conductive plating. The conductive plating is made of, for example, Au, Ag, Cu, etc.

[0042] As is clear from the above description, in the surface light emitting device 10, the surface light emitting element 100 has an electrode layout with a common anode and an independent cathode on the mounting substrate 200, and each light emitting element unit LE can be driven independently by a driver.

[0043] (Substrate) The substrate 101 is made of, for example, GaAs (for example, SI (semi-insulating)-GaAs).

[0044] (First Contact Layer) The first contact layer 102 is a semiconductor layer with high carrier conductivity and low resistance. For example, it is made of a p-GaAs layer doped with a high concentration of p-type impurities. Examples of the p-type impurities (dopants) include Zn, Mg, Be, and C. The contact layer is also called a "current injection layer." A lateral current path is formed within the first contact layer 102 of the light-emitting element section LE. (First Semiconductor Multilayer Reflector) The first semiconductor multilayer reflector 103 is, for example, a semiconductor multilayer reflector doped with p-type impurities, and has low light absorption, high reflectivity, and electrical conductivity. The semiconductor multilayer reflector has a structure in which multiple types (for example, two types) of semiconductor layers (e.g., p-AlGaAs layers) with different refractive indices are alternately stacked with an optical thickness equal to one-quarter of the emission wavelength λ. Examples of the p-type impurities (dopants) include Zn, Mg, Be, and C.

[0045] (Oxidized Constriction Layer) The oxidized constriction layer 104 has a non-oxidized region 104a and an oxidized region 104b surrounding the non-oxidized region 104a. The non-oxidized region 104a is made of a compound semiconductor (e.g., AlGaAs, AlAs, etc.). The oxidized region 104b is made of an insulator (e.g., an oxide such as AlxOy). Because the oxidized region 104b has a higher resistance and a lower refractive index than the non-oxidized region 104a, the non-oxidized region 104a functions as a current / light passing region, and the oxidized region 104b functions as a current / light constriction region. The oxidized constriction layer 104 is preferably located at or near a node of a standing wave generated in the resonator. (First Cladding Layer) The first cladding layer 105 is, for example, made of p-AlGaAs. The cladding layer is also called a "spacer layer." (Light-Emitting Layer) The light-emitting layer 106 is, for example, made of a compound semiconductor having a bandgap energy smaller than that of the first and second semiconductor structures SS1 and SS2. For example, the light-emitting layer 106 is made of a GaAs-based compound semiconductor (e.g., GaAs, AlGaAs, GaInAs, GaInAsN, etc.). The light-emitting layer 106 may have a quantum well structure, a multiple quantum well structure, or a quantum dot structure. The light-emitting layer 106 is also called an "active layer." The light-emitting layer 106 has a light-emitting region, which is a region into which current is injected (current injection region) and which emits light. The light-emitting region is defined by the oxidized region 104b of the oxidized constriction layer 104. The light-emitting layer 106 is preferably located at or near the antinode of a standing wave generated in the resonator. (Second Cladding Layer) The second cladding layer 107 is, for example, made of n-AlGaAs. The cladding layer is also called a "spacer layer."

[0046] (Second Semiconductor Multilayer Reflector) The second semiconductor multilayer reflector 108 is, for example, a semiconductor multilayer reflector doped with n-type impurities, and has low light absorption, high reflectivity, and electrical conductivity. The semiconductor multilayer reflector has a structure in which multiple types (for example, two types) of semiconductor layers (for example, n-AlGaAs layers) with different refractive indices are alternately stacked with an optical thickness of ¼ the emission wavelength λ. Examples of the n-type impurity (dopant) include Si, Se, and Ge. The second semiconductor multilayer reflector 108 is set to have a slightly higher reflectivity than the first semiconductor multilayer reflector 103.

[0047] (Second Contact Layer) The second contact layer 109 is a semiconductor layer with high carrier conductivity and low resistance, and is made of, for example, an n-GaAs layer doped with a high concentration of n-type impurities. Examples of the n-type impurities (dopants) include Si, Se, and Ge. The contact layer is also called a "current injection layer."

[0048] (dummy element part, spacer)

[0049] In the surface emitting device 10, a spacer SP is interposed between the peripheral area PA and the mounting substrate 200. More specifically, as an example, a dummy bump DB of the spacer SP is interposed between the outermost periphery of the peripheral area PA and the mounting substrate 200. Here, the spacer SP is configured to include a plurality of dummy bumps DB. More specifically, as an example, the dummy bump DB is interposed between the second region R2 of the dummy element portion DE, which is the outermost periphery of the peripheral area PA, and the mounting substrate 200.

[0050] The dummy bump DB may or may not bond the second region R2 to the mounting substrate 200. That is, the dummy bump DB may be sandwiched between the second region R2 and the mounting substrate 200, or a gap may exist between the dummy bump DB and one of the second region R2 and the mounting substrate 200. In other words, there may be play between the spacer SP and one of the second region R2 and the mounting substrate 200. The second region R2 of the dummy element portion DE is also a stealth dicing area SDA (laser irradiation area) for stealth dicing performed in the manufacturing method of the surface emitting device 10, which will be described later.

[0051] In recent years, the chip size of chip-shaped surface-emitting elements (surface-emitting chips) has become increasingly smaller, and stealth dicing, which does not cause chipping or cracking, does not produce processing waste, and does not produce cutting margins, has become popular as a dicing method for wafers on which multiple surface-emitting elements are formed simultaneously. Stealth dicing is a dicing method in which laser light is focused in a laser irradiation area (stealth dicing area SDA) shared by adjacent surface-emitting elements SLE on a wafer W, as shown in the comparative reference diagram of FIG. 35 , for example, and causes cracks inside the wafer through thermal shock. For this reason, the stealth dicing area SDA could not be provided with shielding materials such as metal that block the laser light, laser light-absorbing layers that reduce the optical density of the laser light focus, or unevenness that disrupts the optical path of the laser light. In other words, the stealth dicing area SDA had to be a flat area free of structures that would affect the laser light.

[0052] In the example of FIG. 35 , a flat area (stealth dicing area SDA, laser irradiation area) without any structure for stealth dicing is provided on the outer periphery outside the bump bonding areas (element area EA and dummy element portion DE) of each of two adjacent surface-emitting elements SLE on the wafer W. The total width of the flat areas of two adjacent surface-emitting elements SLE required for stealth dicing is approximately 0.4 times the thickness of the wafer W, and is 40 μm when the thickness of the wafer W is 100 μm, for example. Therefore, the width of the flat area required on the outer periphery of one surface-emitting element SLE is half of the total, that is, approximately 0.2 times the thickness of the wafer W. If the thickness of the wafer W does not change, the width of the required flat area also does not change. Therefore, as the chip size becomes smaller, the proportion of the flat area in a surface-emitting chip (chip-shaped surface-emitting element) increases. As the chip size becomes smaller, the proportion of flat areas on the chip periphery where no structures are provided increases, and when the surface-emitting chip is press-bonded to a mounting substrate, the chip periphery where no structures are provided is pressed strongly, making the surface-emitting chip more likely to bend (see FIG. 19A ). If the surface-emitting chip bends during press-bonding, a force (reaction force) acts to return the bent surface-emitting chip to its original position after bonding, and strong tensile stress is applied to the light-emitting element unit LE and electrodes near the chip periphery, which may damage the surface-emitting chip or reduce its reliability.

[0053] Therefore, in the surface light emitting device 10, the spacer SP is configured by a plurality of dummy bumps DB (structures) that can be easily formed in the stealth dicing area SDA (flat area) after stealth dicing. The dummy bumps DB can be formed simultaneously with the first and second bumps B1 and B2 when the surface light emitting device 100 is bump-bonded to the mounting substrate 200.

[0054] The second region R2 of the dummy element portion DE extends, for example, along at least a part (for example, the entire periphery) of the outer periphery of the element region EA (see FIG. 3).

[0055] The spacers SP are provided along at least a portion (e.g., the entirety) of the second region R2 in the extension direction (circumferential direction). More specifically, the spacers SP have a plurality of dummy bump groups aligned in the extension direction (circumferential direction) of the second region R2. Each dummy bump group includes a plurality (e.g., three) dummy bumps DB aligned in a direction intersecting (e.g., perpendicular to) the extension direction.

[0056] The emission surface, which is the surface of the surface light emitting device 100 opposite the mounting substrate 200 side (the back surface (upper surface) of the substrate 101), is a flat surface. The surface of the dummy element portion DE facing the mounting substrate 200 (lower surface) is a flat surface. An insulating film or a transparent conductive film that is transparent to the wavelength of the laser light used in stealth dicing may be provided on this flat surface. The presence of these flat surfaces can be evidence that the surface light emitting device 100 has been singulated by stealth dicing.

[0057] At least one modified layer (e.g., first and second modified layers SD1 and SD2) may be present on the side surface of the substrate 101 in the outermost portion of the peripheral area PA (the second region R2 of the dummy element portion DE). The presence of the modified layer may be evidence that the surface light emitting device 100 has been singulated by stealth dicing. Also, as an example, no oxidized region is provided on the side surface of the oxidized constriction layer 104 in the outermost portion of the peripheral area PA (the second region R2 of the dummy element portion DE).

[0058] In the direction perpendicular to the in-plane direction (stacking direction), the surface of the second region R2 of the dummy element portion DE facing the mounting substrate 200 (the former) and the surface of the cathode electrode 115 facing the mounting substrate 200 (the latter) are at the same position. This means that when the surface light emitting element 100 is flip-chip mounted (bump mounted) to the mounting substrate 200, a load can be applied evenly to the surface light emitting element 100 (the distance between the substrate 101 and the mounting substrate 200 can be made uniform in the plane), and element damage due to poor bonding or local stress can be suppressed. However, strictly speaking, there is a slight difference in the positions of the former and latter in the stacking direction.

[0059] Specifically, as an example, in a direction perpendicular to the in-plane direction, the surface (lower surface) of the cathode electrode 115 facing the mounting substrate 200 is located closer to the mounting substrate 200 than the surface (lower surface) of the second region R2 of the dummy element portion DE facing the mounting substrate 200, for example, by a predetermined distance (a very small distance). The thickness of the spacer SP (the thickness of each dummy bump DB) is thicker than the thickness of the first bump B1, for example, by the predetermined distance, and thicker than the thickness of the second bump B2, for example, by the thickness of the anode electrode 112. This makes it possible to make the spacing between the substrate 101 and the mounting substrate 200 more uniform in the plane. Note that, for example, if the positional relationship between the two surfaces in the direction perpendicular to the in-plane direction is reversed, it is preferable to make the thickness of the spacer SP thinner than the thickness of the first bump B1 and thicker than the thickness of the second bump B2.

[0060] 3, as an example, a plurality of first bumps B1 are arranged in a matrix (rows and columns) to correspond to a plurality of light-emitting element units LE. As an example, a plurality of second bumps B2 are arranged in a matrix (rows and columns) to correspond to a first region R1 of the dummy element unit DE. As an example, a plurality of dummy bumps DB are arranged in a matrix (rows and columns) to correspond to each side of the second region R2 of the dummy element unit DE.

[0061] For example, the first bump B1, the second bump B2, and the dummy bump DB each contain a material that is resistant to crushing under pressure. Furthermore, for example, the first bump B1, the second bump B2, and the dummy bump DB are made of the same conductive material. The dummy bump DB may be made of, for example, a conductive resin, a semi-insulating resin, an insulating resin, or the like.

[0062] The conductive material constituting the first bump B1, the second bump B2, and the dummy bump DB is preferably a conductive material that can be transitioned from a softened state (relatively soft state) to a hardened state (relatively hard state) during bump bonding. Specifically, the conductive material includes a material that is resistant to being crushed by pressure.

[0063] More specifically, the conductive material may be, for example, a metal particle paste. The metal particle paste can be gradually transformed from a softened state to a hardened state by applying pressure. Furthermore, the metal paste can be solidified by sintering. Examples of the metal particle paste include Au particle paste, Ag particle paste, and Cu particle paste.

[0064] The metal particle paste is preferably a metal nanopaste containing metal nanoparticles, in which metal particles containing metal nanoparticles with a particle size of less than 1 μm are dispersed in a resin binder. Examples of such metal nanopastes include Au nanopaste, Ag nanopaste, and Cu nanopaste.

[0065] The conductive material may be, for example, an alloy paste. The alloy paste may be, for example, a solder paste (cream solder). Solder paste has a property (thixotropy) in which the viscosity decreases (becomes softened) when stirred and returns to its original state (hardened) when left standing. Specific examples of solder paste include Sn—Ag-based, Sn—Au-based, and Sn—Cu-based pastes.

[0066] As an example, it is preferable that the difference in the arrangement density (area density) of the first bumps B1, the second bumps B2, and the dummy bumps DB within the surface be as small as possible (ideally 0). This makes it possible to make the load applied to the surface light emitting element 100 more uniform within the surface when the surface light emitting element 100 is mounted on the mounting substrate 200 (when the bumps are bonded), and thus makes it possible to further suppress deformation of the surface light emitting element 100.

[0067] (Mounting substrate) The mounting substrate 200 has a semiconductor substrate 201 as a substrate portion, a first electrode 202 (cathode) joined to each cathode electrode 115 via a first bump B1, and a second electrode 203 (anode) joined to the anode electrode 112 via a second bump B2.

[0068] The driver of the drive substrate serving as the mounting substrate 200 or the driver connected to the wiring substrate serving as the mounting substrate 200 includes, as an example, a power supply and a transistor (e.g., an n-MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a p-MOSFET, etc.) that controls the on / off of the current flow from the power supply to the surface light emitting element 100.

[0069] <Operation of Surface Light-Emitting Device> The operation of the surface light-emitting device 10 will be described below. When a power supply voltage of the driver is applied to the surface light-emitting element 100, current from the anode side of the driver is injected into the first contact layer 102 via the second electrode 203, the second bump B2, the anode electrode 112, the wiring 114, and the intermediate electrode 113. The current via the first contact layer 102 flows into the first semiconductor multilayer film reflector 103 of each light-emitting element unit LE, is constricted by the oxide constriction layer 104, and is injected into the light-emitting region of the light-emitting layer 106 via the first cladding layer 105. At this time, the light-emitting region emits light, and the light travels back and forth between the first and second semiconductor multilayer film reflectors 103 and 108 while being constricted by the oxide constriction layer 104 and amplified by the light-emitting layer 106. When oscillation conditions are satisfied, the light is emitted as laser light to the back side (top side) of the substrate 101. The current injected into the light-emitting region flows out to the cathode side of the driver via the second cladding layer 107, the second semiconductor multilayer reflector 108, the second contact layer 109, the cathode electrode 115, the first bump B1, and the first electrode 202 in this order.

[0070] <<Method of Manufacturing Surface Light-Emitting Device>> An example of a method of manufacturing the surface light-emitting device 10 will be described below with reference to the flowchart in FIG. 8 and process diagrams (FIGS. 5 to 18) of the method of manufacturing the surface light-emitting device 10. The overall flow is as follows: First, a semiconductor manufacturing method using semiconductor manufacturing equipment is used to simultaneously produce a plurality of surface light-emitting elements 100 on a single wafer (hereinafter referred to as "substrate 101" for convenience) that is the base material of the substrate 101. Next, the series of surface light-emitting elements 100 are separated from one another by dicing to obtain chip-shaped surface light-emitting elements 100 (surface-emitting chips). The chip-shaped surface light-emitting elements 100 are mounted on a mounting substrate 200.

[0071] In the first step S1, a stack is produced (see FIG. 5 ). Specifically, a first contact layer 102, a first semiconductor multilayer reflector 103 having an oxidized layer 104S (e.g., an AlGaAs layer, an AlAs layer, or the like) disposed therein, a first cladding layer 105, an emission layer 106, a second cladding layer 107, a second semiconductor multilayer reflector 108, and a second contact layer 109 are stacked in this order on a substrate 101 serving as a growth substrate by an epitaxial crystal growth method such as MOCVD (Metal Organic Chemical Vapor Deposition). In this case, as raw materials for the compound semiconductor, for example, methyl-based organometallic gases such as trimethylaluminum (TMAl), trimethylgallium (TMGa), and trimethylindium (TMIn), and arsine (AsH) gas are used, as raw materials for the donor impurities, for example, disilane (SiH), and as raw materials for the acceptor impurities, for example, carbon tetrabromide (CBr).

[0072] In the next step S2, a first mesa M1, which will become the light-emitting mesa LM, and a second mesa M2, which will become two integrated dummy mesas DM (two adjacent dummy mesas DM), are formed (see FIG. 6 ). Specifically, a resist pattern is formed by photolithography to cover the areas on the stack where the first and second mesas M1 and M2 will be formed, and the stack is then etched by dry etching or wet etching using the resist pattern as a mask. The etching is performed, for example, until the bottom of the etching reaches the inside of the first contact layer 102. As a result, the first and second mesas M1 and M2 are formed. The resist pattern is then removed. An etching stop layer (e.g., an InGaP layer) may be disposed between the first contact layer 102 and the first semiconductor multilayer reflector 103.

[0073] In the next step S3, an oxidized constriction layer 104 is formed (see FIG. 7). Specifically, the first and second mesas M1 and M2 (see FIG. 6) are exposed to a high-temperature water vapor atmosphere, and the oxidized layer 104S is selectively oxidized for a predetermined distance from the side. As a result, an oxidized constriction layer 104 in which a non-oxidized region 104a is surrounded by an oxidized region 104b is formed in the first mesa M1, thereby generating the light-emitting mesa LM. A layer in which a non-oxidized region is surrounded by an oxidized region is also formed in the second mesa M2, thereby generating two integrated dummy mesas DM.

[0074] In the next step S4, the anode electrode 112, intermediate electrode 113, and cathode electrode 115 are formed (see FIG. 8). Specifically, for example, by lift-off, the cathode electrode 115 is formed in a solid state on the top of the light-emitting mesa LM, the anode electrode 112 is formed in a solid state on the top of the dummy mesa DM, and the intermediate electrode 113 is formed to cover the inter-mesa region on the top surface of the first contact layer 102. At this time, the electrode materials are deposited by, for example, evaporation, sputtering, or the like.

[0075] In the next step S5, an insulating film 111 is formed. Specifically, the insulating film 111 is first formed on the entire surface (see FIG. 9). Next, part of the insulating film 111 is removed by photolithography and etching to expose the anode electrode 112, the intermediate electrode 113, the cathode electrode 115, and the stealth dicing area SDA of the two integrated dummy mesas DM (see FIG. 10).

[0076] In the next step S6, the wiring 114 is formed (see FIGS. 11 and 12). Specifically, the wiring 114 is formed by, for example, plating so as to cover the intermediate electrode 113, the insulating film 111 formed on the outer peripheries of the side and top surfaces of the two integrated dummy mesas DM, and the outer periphery of the anode electrode 112. Note that, prior to plating, it is preferable to form a seed layer in advance in the areas to be plated.

[0077] In the next step S7, stealth dicing is performed (see FIGS. 13 and 14 ). Prior to stealth dicing, the back surface of the substrate 101 is preferably polished using a back glider or a CMP (Chemical Mechanical Polisher) device to thin the substrate 101 to, for example, about 100 μm. Stealth dicing, for example, is performed by attaching dicing tape to the back surface (bottom surface) of the substrate 101, tape-mounting the substrate, and scanning the laser light from the front surface (top surface) of the substrate 101 along the boundary between adjacent dummy element portions DE in the extension direction (circumferential direction) of the second region R2 while focusing the laser light onto the stealth dicing area SDA (flat area).

[0078] The focus control here is a control that, at each scanning position, positions the focus of the laser light at a first depth position within the substrate 101 (a position closer to the back surface of the substrate 101) and then at a second depth position within the substrate 101 (a position farther from the back surface of the substrate 101 than the first depth position). When the focus of the laser light is at the first depth position, multiphoton absorption occurs at a high light density, causing rapid heat generation, and the resulting thermal shock creates a first modified layer SD1 in the substrate 101 and a crack originating from the first modified layer SD1 and extending to the back surface of the substrate 101 (see FIG. 13). When the focus of the laser light is at the second depth position, multiphoton absorption occurs at a high light density, causing rapid heat generation, and the resulting thermal shock creates a second modified layer SD2 in the substrate 101 and a crack originating from the second modified layer SD2 and extending toward the back surface of the substrate 101, extending to the first modified layer SD1 (see FIG. 14).

[0079] Thereafter, the tape-mounted substrate 101 is put into a tape stretching machine to separate the surface light emitting devices 100 into chips, completing the dicing process (see FIG. 15).

[0080] In the final step S8, the surface light emitting element 100 is mounted (flip-chip mounted) on the mounting substrate 200 (see FIGS. 16 to 18 , where FIG. 18 is a schematic view showing the mounting substrate 200 in a see-through state). Specifically, first, softened first bumps B1 are attached to the first electrodes 202 of the mounting substrate 200, softened second bumps B2 are attached to the second electrodes 203, and softened dummy bumps DB are attached to the locations of the dummy element portions DE corresponding to the second regions R2 (see FIG. 16 ). The arrangement density (area density) and size of each bump may be set so that the spacing between the substrate 101 and the mounting substrate 200 is generally constant within the plane and so that the difference in the amount of crushing of the bumps when a predetermined pressure is applied to them is small. Here, each bump contains a conductive material that is resistant to crushing when pressure is applied. For example, when each bump is made of solder paste, the paste is stirred in a hardened state and softened in advance.

[0081] Next, the chip-shaped surface light emitting element 100 is picked up by vacuum suction of the backside of the substrate 101 using a bonding head BH with a collet C (a buffer material) and a vacuum suction hole VSH, as shown in FIG. 19B , and is aligned with the mounting substrate 200 so that the cathode electrode 115 faces the first bump B1, the anode electrode 112 faces the second bump B2, and the second region R2 faces the dummy bump DB (see FIG. 16 ). Then, pressure bonding is performed in a high-temperature environment. During this process, the entire surface light emitting element 100 is uniformly pressed against the mounting substrate 200 with a predetermined pressure, bonding the cathode electrode 115 to the first electrode 202 via the first bump B1, and bonding the anode electrode 112 to the second electrode 203 via the second bump B2 (see FIGS. 17 and 18 ). At this time, multiple dummy bumps DB are interposed as spacers in the gap between the second region R2 and the mounting substrate 200, suppressing deflection of the surface-emitting element 100 (see FIG. 19B ). Furthermore, as each bump is crushed, it gradually transitions from a softened state to a hardened state, dispersing the stress acting on the surface-emitting element 100 from the initial to intermediate stages of bonding, thereby suppressing element damage. From the intermediate to final stages of bonding, each bump becomes relatively hard, ensuring sufficient bonding strength (bonding rigidity). On the other hand, as in the comparative example shown in FIG. 19A , if no spacers are interposed between the outermost periphery of the surface-emitting element 100C and the mounting substrate 200C during bump bonding, the surface-emitting element 100C deflects, and tensile stress is applied to the surface-emitting element 100C after bonding, potentially resulting in damage to the element and reduced reliability.

[0082] Next, each bump is solidified. Specifically, for example, if each bump is a metal particle paste, it may be solidified by sintering it by heating under pressure, or by sintering it in a heating furnace (by reflow). For example, if each bump is a solder paste, it is solidified by leaving it for a predetermined time after the end of stirring.

[0083] Since the dummy bumps DB are not sandwiched between metals, they are likely to peel off and may fall off after bump bonding, but this does not pose any particular problem. The function of the dummy bumps DB as spacers is important during bump bonding when the entire surface light emitting element 100 is pressed against the mounting substrate 200, but is not so important after bump bonding.

[0084] After the bump bonding, an underfill may be injected (preferably filled) into the gap between the surface light emitting element 100 and the mounting substrate 200 in order to protect the bonding portion from foreign matter and to improve the bonding strength.

[0085] In the above focus control, the focus of the laser light is controlled at two depth positions, but for example, if the wafer is thinner, it may be positioned at one depth position, or if the wafer is thicker, it may be controlled at three or more depth positions.

[0086] <Effects of the Surface Light Emitting Device and the Manufacturing Method of the Surface Light Emitting Device> The following describes the effects of the surface light emitting device 10 and the manufacturing method of the surface light emitting device 10. The surface light emitting device 10 includes a surface light emitting element 100 including an element region EA and a peripheral region PA of the element region EA, and a mounting substrate 200 on which the surface light emitting element 100 is mounted. The element region EA has a light emitting element unit LE on the mounting substrate 200 side, where a cathode electrode 115 is provided. The cathode electrode 115 is joined to the mounting substrate 200 via a first bump B1, and a spacer SP is interposed between the peripheral region PA and the mounting substrate 200.

[0087] In the surface emitting device 10, when the surface emitting element 100 is mounted on the mounting substrate 200 (during bump bonding), a spacer SP is interposed between the peripheral area PA and the mounting substrate 200, and the cathode electrode 115 provided in the light emitting element section LE can be bonded to the mounting substrate 200 via the first bump B1.

[0088] As a result, the surface emitting device 10 can provide a surface emitting device that can prevent the surface emitting element 100 from deforming (elastically deforming) (bending) when mounted on the mounting substrate 200.

[0089] On the other hand, in the semiconductor device described in Patent Document 1, in order to keep the gap between the multiple electrodes of the opposing chips constant, height adjustment pads are provided on some of the electrodes to mechanically keep the gap constant. However, when this configuration is applied to a surface light emitting device, the surface light emitting chip bends concavely due to the pressure during bonding, and strong stress is applied particularly to the light emitting element portion near the adjustment pad, which raises concerns that the surface light emitting chip may be damaged or its reliability may be reduced.

[0090] The semiconductor element mounting structure described in Patent Document 2 has high density connection bumps at the four corners of the semiconductor element, reducing bump cracks caused by thermal stress at the connections due to heat generated when the element is operated. However, when this configuration is applied to a surface light emitting device, the surface light emitting element is bent concavely due to pressure when the bumps are bonded, and strong stress is applied to the light emitting element part, particularly near the connection bumps at the four corners, which raises concerns that the surface light emitting element may be damaged or its reliability may be reduced.

[0091] Spacers SP are interposed between the outermost periphery of the peripheral area PA and the mounting substrate 200. This makes it possible to more effectively suppress deformation of the surface light emitting device 100 during bump bonding.

[0092] The peripheral area PA has a dummy element portion including the outermost periphery, which allows the thickness of the spacer SP to be reduced.

[0093] The outermost periphery of the peripheral area PA extends along at least a part (for example, the entire periphery) of the periphery of the element area EA, and the spacers SP are provided along at least a part (for example, the entire periphery) of the outermost periphery of the peripheral area PA in the extending direction thereof, thereby making it possible to extend the range in which deformation of the surface light emitting element 100 can be suppressed during bump bonding in the circumferential direction of the outermost periphery.

[0094] The outermost periphery of the peripheral region PA extends along the entire periphery of the element region EA. This allows the spacers SP to be provided along the entire periphery of the outermost periphery of the peripheral region PA. In this case, deformation of the surface light emitting element 100 can be suppressed along the entire periphery during bump bonding.

[0095] The spacer SP has a plurality of portions aligned in the direction of extension of the outermost periphery of the peripheral area PA, thereby allowing the spacer SP to be composed of a plurality of structures.

[0096] The spacers SP include dummy bumps DB. This allows the spacers SP to be formed during bump bonding. For example, since there is no need to form structures that will become the spacers SP before dicing the surface light emitting device 100 using stealth dicing, stealth dicing can be performed accurately, making chipping and cracking less likely to occur in the surface light emitting device 100. Since structures that will become the spacers SP (plurality of dummy bumps DB) can be formed after dicing the surface light emitting device 100 using stealth dicing, bending of the surface light emitting device 100 during bump bonding is suppressed, thereby suppressing damage such as chip cracking and chipping. This also prevents element damage and reduced reliability due to strong tensile stress applied to the light emitting device portion and electrodes near the outermost periphery caused by bending. Therefore, a high-quality and highly reliable surface light emitting device can be provided.

[0097] It is preferable that the dummy bump DB is provided on the dummy element portion DE, and that the surface of the dummy element portion DE facing the mounting substrate 200 and the surface of the anode electrode 112 facing the mounting substrate 200 are located on the same plane. This allows the thickness of the dummy bump DB to be the same as the thickness of the first bump B1.

[0098] Since the dummy bumps DB can be formed simultaneously with the first bumps B1, variations in the bump shape can be suppressed, an increase in the number of manufacturing steps can be suppressed, and quality can be improved and costs can be reduced.

[0099] The light emitting surface of the surface light emitting device 100, which is the surface opposite to the mounting substrate 200, is preferably a flat surface, which can improve the quality of the light emitting surface.

[0100] First and second modified layers SD1, SD2 may be present on the side surfaces of the surface light emitting device 100. This allows for the estimation that the surface light emitting device 100 has been diced by stealth dicing, which can ensure that element damage and deterioration in reliability are sufficiently suppressed compared to surface light emitting devices diced by mechanical dicing methods such as blade dicing.

[0101] In a direction perpendicular to the in-plane direction, the surface of the cathode electrode 115 facing the mounting substrate 200 is located closer to the mounting substrate 200 than the surface of the outermost periphery of the peripheral area PA facing the mounting substrate 200, and the thickness of the spacer SP may be thicker than the thickness of the first bump B1.

[0102] An anode electrode 112 is provided on the mounting substrate 200 side of the dummy element portion DE of the peripheral area PA, and the anode electrode 112 is joined to the mounting substrate 200 via the second bump B2. This makes it possible to simultaneously bump-bond the cathode electrode 115 and the anode electrode 112 to the mounting substrate 200, thereby reducing the number of manufacturing steps.

[0103] The element region EA has a plurality of light-emitting element units LE spaced apart in the in-plane direction, and the anode electrode 112 is a common electrode provided in common to the plurality of light-emitting element units LE, thereby making it possible to independently drive the plurality of light-emitting element units LE while reducing the number of electrodes.

[0104] Each of the first bumps B1 and the dummy bumps DB preferably contains a material that is resistant to crushing under pressure, thereby suppressing element damage during bump bonding and improving bonding strength (bonding rigidity).

[0105] The first bumps B1 and the dummy bumps DB are made of the same conductive material, which simplifies the bump bonding process and reduces costs by limiting (reducing) the types of bump materials.

[0106] The peripheral area PA includes a dummy element portion DE, and each of the light-emitting element portion LE and the dummy element portion DE has first and second semiconductor structures SS1, SS2 stacked on each other, and a light-emitting layer 106 disposed between the first and second semiconductor structures SS1, SS2. This makes it possible to easily form the surface light-emitting element 100 through a semiconductor manufacturing process.

[0107] The manufacturing method of the surface emitting device 10 includes the steps of forming a surface emitting element 100 including an element region EA having a light emitting element portion LE and a peripheral region PA of the element region EA, and interposing a spacer SP between the peripheral region PA and a mounting substrate 200, and joining a cathode electrode 115 provided on the light emitting element portion LE to the mounting substrate 200 via a first bump B1.

[0108] According to the manufacturing method of the surface emitting device 10, the surface emitting device 10 can be manufactured while suppressing deformation (warping) of the surface emitting device 100 when the surface emitting device 100 is mounted on the mounting substrate 200.

[0109] In the method for manufacturing the surface light emitting device 10, the spacers SP include the dummy bumps DB, which allows the spacers SP to be formed during bump bonding.

[0110] The bonding step is performed by pressing the light-emitting surface, which is the surface of the surface light-emitting element 100 opposite to the mounting substrate 200, toward the mounting substrate 200. This allows the surface light-emitting element 100 to be pressure-bonded to the mounting substrate 200 while suppressing deformation of the surface light-emitting element 100. At this time, by pressing the light-emitting surface toward the mounting substrate 200 via a buffer material, damage to the light-emitting surface can be suppressed.

[0111] The forming step includes a step of forming a plurality of surface light emitting elements 100 collectively so that the peripheral areas PA are adjacent to each other, and after the forming step and before the bonding step, separating the plurality of surface light emitting elements 100 by stealth dicing. This makes it possible to obtain a plurality of chip-shaped surface light emitting elements 100 having a high-quality flat emission surface and suppressing element damage and deterioration in reliability.

[0112] 2. Surface Light Emitting Device According to Example 2 of an Embodiment of the Present Technology FIG. 20 is a cross-sectional view of a surface light emitting device 20 according to Example 2 of an embodiment of the present technology.

[0113] 20 , the surface light emitting device 20 has the same configuration as the surface light emitting device 20 according to Example 1, except that the insulating film 111 is also disposed between the second contact layer 109 and the anode electrode 112 in the first region R1 of the dummy element portion DE. That is, the anode electrode 112 serving as a common electrode may be disposed on the second contact layer 109 as in the surface light emitting device 10 according to Example 1, or may be disposed on the insulating film 111 as in the surface light emitting device 20. The arrangement of the common electrode is preferably set in accordance with the inductance, conductance, and impedance design when the surface light emitting device 100 is driven.

[0114] 21 is a cross-sectional view of a surface emitting device 30 according to Example 3 of an embodiment of the present technology. Fig. 22 is a bottom view of the surface emitting device 30 according to Example 3 of an embodiment of the present technology, with the mounting substrate 200 omitted. Fig. 21 is a cross-sectional view taken along line 21-21 in Fig. 22 .

[0115] As shown in Figures 21 and 22, the surface emitting device 30 has a configuration generally similar to that of the surface emitting device 10 of Example 1, except that the peripheral area PA has a first dummy element portion DE1 and the element area EA has at least one (e.g., two) second dummy element portion DE2.

[0116] In the surface emitting device 30, the first dummy element portion DE1 includes the outermost periphery of the peripheral region PA, and has a first dummy mesa DM1 on the mounting substrate 200 side. A plurality of dummy bumps DB constituting spacers are interposed between the first dummy mesa DM1 and the mounting substrate 200.

[0117] In the surface light emitting device 30, as an example, the light emitting element unit array has a plurality (e.g., three) of light emitting element unit groups each including a plurality (e.g., 24) of light emitting element units LE, and the plurality (e.g., three) of light emitting element unit groups are arranged in one direction in the plane (e.g., the direction of line 21-21 in FIG. 22). The light emitting element unit groups and the second dummy element units DE2 are arranged alternately in the one direction.

[0118] 23 is a cross-sectional view of a surface emitting device 40 according to a fourth example of an embodiment of the present technology. Fig. 24 is a bottom view of the surface emitting device 40 according to the fourth example of an embodiment of the present technology, with the mounting substrate 200 omitted. Fig. 23 is a cross-sectional view taken along line 23-23 in Fig. 24 .

[0119] As shown in Figures 23 and 24, the surface-emitting device 40 has a configuration generally similar to that of the surface-emitting device 10 of Example 1, except that the surface-emitting device 100 has a mesare-less structure and an ion-implanted region IIA is provided instead of the oxidized constriction layer 104.

[0120] In the surface-emitting device 40, each light-emitting element section LE and dummy element section DE is composed of a substrate 101, a first contact layer 102, a first semiconductor multilayer film reflector 103, a first clad layer 105, an emission layer 106, a second clad layer 107, a second semiconductor multilayer film reflector 108, and a second contact layer 109.

[0121] An ion implantation region IIA is provided as a high-resistance region or an insulating region so as to surround the region of the light emitting element portion LE directly above the cathode electrode 115. Here, the ion implantation region IIA is provided in a region excluding the first contact layer 102 in the stacking direction (vertical direction) of the light emitting element portion LE. Here too, a lateral current path is formed in the first contact layer 102 of the light emitting element portion LE.

[0122] Examples of ion species used in the ion implantation region IIA include H+ and B+.

[0123] A trench T is provided between the element region EA and the dummy element portion DE. The bottom surface of the trench T coincides with the lower surface of the first contact layer 102. An intermediate electrode 113 is provided on the bottom surface of the trench T. One of the opposing side surfaces of the trench T is a side surface of the element region EA, and the other is a side surface of the dummy element portion DE. An ion implantation region IIA is provided on the opposing side surfaces of the trench T. In a narrow sense, trench means a "groove," but in a broad sense it also includes "holes," "recesses," "dents," etc.

[0124] The wiring 114 is provided so as to cover the peripheral portion of the trench T on the lower surface of the element region EA, the side surface of the trench T on the element region EA side, the side surface on the dummy element portion DE side, the intermediate electrode 113, and the peripheral portion of the trench T on the lower surface of the dummy element portion DE. An end of the portion of the wiring 114 covering the lower surface of the dummy element portion DE is in contact with the anode electrode 112. The wiring 114 configured as described above ensures good conductivity between the intermediate electrode 113 in contact with the first contact layer 102 and the anode electrode 112. 5. Surface Emitting Device According to Example 5 of an Embodiment of the Present Technology FIG. 25 is a cross-sectional view of a surface emitting device 50 according to Example 5 of an embodiment of the present technology.

[0125] The surface emitting device 50 has a configuration generally similar to that of the surface emitting device 10 according to Example 1, except that the anode electrode 112 is provided on the back surface side (upper surface side) of the substrate 101 and the dummy element portion DE does not have a region corresponding to the first region R1. Here, the substrate 101 is made of, for example, p-GaAs.

[0126] In the surface emitting device 50, the anode electrode 112 is provided on the back surface of the substrate 101 so as to surround the light emitting region of the light emitting layer 106 in a plan view. The anode electrode 112 is connected to the second electrode 203 of the mounting substrate 200 via a bonding wire BW. 6. Surface emitting device according to example 6 of an embodiment of the present technology Fig. 26 is a cross-sectional view of a surface emitting device 60 according to example 6 of an embodiment of the present technology.

[0127] The surface emitting device 60 has a configuration generally similar to that of the surface emitting device 10 according to Example 1, except that the dummy element portion DE does not have an outermost periphery of the peripheral area PA, and the outermost periphery is joined to the mounting substrate 200 via dummy bumps DB. <7. Surface emitting device according to Example 7 of one embodiment of the present technology> Figure 27 is a cross-sectional view of a surface emitting device 70 according to Example 7 of one embodiment of the present technology.

[0128] As shown in Figure 27, the surface emitting device 70 has a configuration generally similar to that of the surface emitting device 10 of Example 1, except that each light emitting element section LE of the surface emitting element 100 is a rear-emitting light emitting diode (LED).

[0129] In the surface emitting device 70 , for example, the first semiconductor multilayer film reflector 103 is not provided, and an oxide constriction layer 104 is provided in the first cladding layer 105 .

[0130] In the surface-emitting device 70, the light emitted from the light-emitting layer 106 of the light-emitting element section LE to the upper side (the back side of the substrate 101) and the light emitted from the light-emitting layer 106 to the lower side (the front side of the substrate 101) and reflected by the second semiconductor multilayer film reflector 108 are combined and emitted to the back side of the substrate 101.

[0131] According to the surface emitting device 70, it is possible to realize a surface emitting device including a highly efficient and high-output light emitting diode that exhibits the same effects as the surface emitting device 10 according to Example 1. <8. Surface emitting device according to Example 8 of an embodiment of the present technology> Fig. 28 is a cross-sectional view of a surface emitting device 80 according to Example 8 of an embodiment of the present technology.

[0132] As shown in Figure 28, the surface emitting device 80 has a configuration generally similar to that of the surface emitting device 10 of Example 1, except that each light emitting element section LE of the surface emitting element 100 is a rear-emitting light emitting diode (LED).

[0133] In the surface emitting device 80 , for example, the first and second semiconductor multilayer film reflectors 103 and 108 are not provided, and an oxide constriction layer 104 is provided in the first cladding layer 105 .

[0134] In the surface-emitting device 80, the light emitted from the light-emitting layer 106 of the light-emitting element section LE to the upper side (the back side of the substrate 101) and the light emitted from the light-emitting layer 106 to the lower side (the front side of the substrate 101) and reflected by the cathode electrode 115 are combined and emitted to the back side of the substrate 101.

[0135] According to the surface light emitting device 80, it is possible to realize a surface light emitting device equipped with highly efficient light emitting diodes that exhibits the same effects as the surface light emitting device 10 according to the first embodiment.

[0136] 9. Surface Light Emitting Device According to Example 9 of an Embodiment of the Present Technology FIG. 29 is a bottom view illustrating a surface light emitting device 90 according to Example 9 of an embodiment of the present technology, with the mounting substrate 200 omitted.

[0137] The surface light emitting device 90 has the same configuration as the surface light emitting device 10 according to Example 1, except that the first bumps B1, the second bumps B2, and the dummy bumps DB are arranged in a staggered pattern. Note that instead of the staggered pattern, they may be arranged in a random pattern, for example.

[0138] According to the surface light emitting device 90, the bumps can be arranged densely, making it possible to realize a surface light emitting device 90 having a surface light emitting element 100 with more channels and in which element damage and deterioration in reliability are suppressed.

[0139] 10. Surface Light Emitting Device According to Example 10 of an Embodiment of the Present Technology FIG. 30 is a bottom view illustrating a surface light emitting device 110 according to Example 10 of an embodiment of the present technology in a state in which the mounting substrate 200 is omitted.

[0140] As shown in Figure 30, the surface emitting device 110 has a configuration similar to that of the surface emitting device 90 of Example 9, except that the first region R1 of the dummy element portion DE is circular (e.g., rectangular frame-shaped) extending along the entire periphery of the outer periphery of the element area EA, and the second bump B2 is provided along the entire periphery of the second region R2.

[0141] 11. Surface Light Emitting Device According to Example 11 of an Embodiment of the Present Technology FIG. 31 is a bottom view illustrating a surface light emitting device 120 according to Example 11 of an embodiment of the present technology, with the mounting substrate 200 omitted.

[0142] As shown in Figure 31, the surface emitting device 120 has a configuration similar to that of the surface emitting device 10 of Example 1, except that a dummy bump DB is provided along a portion of the circumferential direction of the second region R2 of the dummy element portion DE.

[0143] In the surface light emitting device 120, a plurality of dummy bumps DB are provided along the four corners, the center of the short sides, and the center of the long sides of the second region R2.

[0144] According to the surface emitting device 120, no dummy bumps DB are provided along part of the second region R2, but by arranging the dummy bumps DB in a balanced manner relative to the second region R2 as in the example of Figure 31, it is possible to suppress deformation of the surface emitting device when the bumps are bonded.

[0145] 12. Surface Light Emitting Device According to Example 12 of an Embodiment of the Present Technology FIG. 32 is a bottom view illustrating a surface light emitting device 130 according to Example 12 of an embodiment of the present technology in a state in which the mounting substrate 200 is omitted.

[0146] As shown in Figure 32, the surface emitting device 130 has a configuration similar to that of the surface emitting device 10 of Example 1, except that a dummy bump DB is provided along a portion of the circumferential direction of the second region R2 of the dummy element portion DE.

[0147] In the surface light emitting device 130, a plurality of dummy bumps DB are provided along a plurality of equally spaced locations, including the four corner locations in the circumferential direction of the second region R2.

[0148] According to the surface emitting device 130, no dummy bumps DB are provided along part of the second region R2, but by arranging the dummy bumps DB in a balanced manner relative to the second region R2 as in the example of Figure 32, it is possible to suppress deformation of the surface emitting device when the bumps are bonded.

[0149] 13. Surface Light Emitting Device According to Example 13 of an Embodiment of the Present Technology FIG. 33 is a cross-sectional view of a surface light emitting device 140 according to Example 13 of an embodiment of the present technology.

[0150] The surface light emitting device 140 has a configuration generally similar to that of the surface light emitting device 50 according to the fifth embodiment, except that it does not have the dummy element portion DE.

[0151] In the surface light emitting device 140, a plurality of dummy bumps DB are interposed as spacers between the outermost periphery of the peripheral area PA of the surface light emitting element 100, where no structure (e.g., dummy mesa DM) is provided, and the mounting substrate 200.

[0152] 14. Surface Light Emitting Device According to Example 14 of an Embodiment of the Present Technology FIG. 34 is a cross-sectional view of a surface light emitting device 150 according to Example 14 of an embodiment of the present technology.

[0153] The surface light emitting device 150 has a configuration generally similar to that of the surface light emitting device 30 according to the third embodiment, except that the surface light emitting device 150 does not have the first dummy element portion DE1.

[0154] In the surface light emitting device 150, a plurality of dummy bumps DB are interposed as spacers between the outermost periphery of the peripheral area PA of the surface light emitting element 100, where no structure (e.g., dummy mesa DM) is provided, and the mounting substrate 200.

[0155] 15. Modifications of the Present Technology The present technology is not limited to the examples of the above-described embodiment, and can be modified as appropriate.

[0156] For example, a modified light-emitting element unit LE shown in FIG. 36 may be used as the light-emitting element unit of the surface-emitting device according to each of the above embodiments. The light-emitting element unit LE of this modified example is a multi-junction VCSEL. In this modified example, the light-emitting element unit LE includes multiple (e.g., three) stacked light-emitting layers 106, an oxide constriction layer 104 disposed on the p-side (upper side) of each light-emitting layer 106, and a tunnel junction layer 116 disposed between two adjacent light-emitting layers 106. Each light-emitting layer 106 is sandwiched between a first cladding layer 105 directly above it and a second cladding layer 107 directly below it. Each oxide constriction layer 104 is sandwiched between a first cladding layer 105 directly above it and a first cladding layer 105 directly below it. Each tunnel junction layer 116 is sandwiched between a second cladding layer 107 directly above it and a first cladding layer 105 directly below it. By using the light-emitting element unit LE of this modification as the light-emitting element unit of the surface-emitting device according to each of the above-described embodiments, it is possible to achieve high output. Therefore, this surface-emitting device is particularly suitable as a light source for a distance measurement device (LiDAR) mounted on a moving body (e.g., a vehicle) described later. Note that in this modification, the numbers of the light-emitting layers 106, the oxide constriction layers 104, and the tunnel junction layers 116 can be changed as appropriate.

[0157] For example, the spacer SP may be made up of a single structure.

[0158] For example, the spacer SP may be composed of at least one structure other than a bump.

[0159] In each of the above embodiments, the surface light emitting device may not have at least one of the first and second contact layers 102 and 109 .

[0160] Instead of or in addition to the first semiconductor multilayer reflector 103, the oxide constriction layer 104 may be provided in at least one of the following: in the first contact layer 102, between the first contact layer 102 and the first semiconductor multilayer reflector 103, between the first semiconductor multilayer reflector 103 and the first cladding layer 105, in the first cladding layer 105, between the first cladding layer 105 and the light-emitting layer 106, between the light-emitting layer 106 and the second cladding layer 107, in the second cladding layer 107, between the second cladding layer 107 and the second semiconductor multilayer reflector 108, in the second semiconductor multilayer reflector 108, between the second semiconductor multilayer reflector 108 and the second contact layer 109, and in the second contact layer 109.

[0161] In each of the above-described embodiments, the light emitting element section array of the surface light emitting element is one in which the light emitting element sections LE are arranged two-dimensionally, but for example, the light emitting element sections LE may be arranged one-dimensionally.

[0162] For example, current confinement in the surface-emitting device is not limited to the oxide confinement layer 104 or the ion-implanted region IIA. For example, current confinement may be achieved by QWI, a tunnel junction, a buried tunnel junction, or the like, which confines carriers by creating a bandgap energy difference between the inside and outside of the aperture through Ga vacancy diffusion. Multiple current confinement structures may also be used in combination. For example, the non-oxidized region 104a of the oxide confinement layer 104 may be surrounded by the ion-implanted region IIA.

[0163] For example, the substrate 101 may be a Si substrate, a Ge substrate, a GaN substrate, an InP substrate, or the like. In any case, it is preferable to appropriately select a semiconductor layer laminated on the substrate 101 that is lattice-matched to the material of the substrate 101. For the surface-emitting device, a material that emits light at any wavelength within the wavelength band of 200 to 2000 nm can be used.

[0164] The surface light emitting device is not limited to a semiconductor multilayer film reflector, and may have a reflector made of one or a combination of two or more materials selected from semiconductors, dielectrics, and metals.

[0165] In the surface emitting devices of the above embodiments, the conductivity types (p-type and n-type) of the first and second semiconductor structures may be reversed. In this case, the positional relationship between the anode electrode and the cathode electrode must also be reversed.

[0166] Parts of the configurations of the surface emitting devices of the above-described embodiments may be combined within a range that does not contradict each other.

[0167] In each of the above embodiments, the material, thickness, width, shape, size, etc. of each component of the surface light emitting element and mounting substrate that make up the surface light emitting device can be changed as appropriate within the range that allows the surface light emitting device to function.

[0168] 16. Application Examples to Electronic Devices The technology according to the present disclosure (the present technology) can be applied to various products (electronic devices). For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot, or on a low-power device (for example, a smartphone, a smartwatch, a tablet, a mouse, etc.).

[0169] A surface emitting device according to the present technology can also be applied as a light source for devices that form or display images using light (for example, printers, copiers, projectors, head-mounted displays, head-up displays, etc.).

[0170] 17. Example of Application of Surface Light Emitting Device to Distance Measuring Device An application example of the surface light emitting device 10 according to the first embodiment will be described below.

[0171] 37 illustrates an example of a schematic configuration of a distance measurement device 1000 (distance measuring device) including a surface light-emitting device 10, as an example of an electronic device according to the present technology. The distance measurement device 1000 measures the distance to a subject S by a TOF (Time Of Flight) method. The distance measurement device 1000 includes the surface light-emitting device 10. The distance measurement device 1000 includes, for example, the surface light-emitting device 10, a light-receiving device 125, lenses 128 and 138, a signal processing unit 145, a control unit 155, a display unit 165, and a storage unit 175.

[0172] The light receiving device 125 receives light emitted from the surface emitting device 10 and reflected by the subject S (object). That is, the light receiving device 125 detects the light reflected by the subject S. The lens 128 is a lens, such as a collimating lens, for converting the light emitted from the surface emitting device 10 into parallel light. The lens 138 is a lens, such as a condensing lens, for collecting the light reflected by the subject S and guiding it to the light receiving device 125.

[0173] The signal processing unit 145 is a circuit for generating a signal corresponding to the difference between the signal input from the light receiving device 125 and the reference signal input from the control unit 155. The control unit 155 is configured to include, for example, a time-to-digital converter (TDC). The reference signal may be a signal input from the control unit 155 or an output signal from a detection unit that directly detects the output of the surface light emitting device 10. The control unit 155 is, for example, a processor that controls the surface light emitting device 10, the light receiving device 125, the signal processing unit 145, the display unit 165, and the storage unit 175. The control unit 155 is a circuit that measures the distance to the subject S based on the signal generated by the signal processing unit 145. The control unit 155 generates a video signal for displaying information about the distance to the subject S and outputs it to the display unit 165. The display unit 165 displays the information about the distance to the subject S based on the video signal input from the control unit 155. The control unit 155 stores the information about the distance to the subject S in the storage unit 175.

[0174] In this application example, instead of the surface light emitting device 10 , any one of the surface light emitting devices 20 , 30 , 40 , 50 , 60 , 70 , 80 , 90 , 110 , 120 , and 130 can also be applied to the distance measurement device 1000 .

[0175] 18. Example in which distance measuring device is mounted on a moving body> FIG. 38 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving body control system to which the technology according to the present disclosure can be applied.

[0176] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 38, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0177] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0178] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0179] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, a distance measurement device 12031 is connected to the outside-vehicle information detection unit 12030. The distance measurement device 12031 includes the above-described distance measurement device 1000. The outside-vehicle information detection unit 12030 causes the distance measurement device 12031 to measure the distance to an object outside the vehicle (subject S) and acquires the distance data obtained thereby. The outside-vehicle information detection unit 12030 may perform object detection processing for people, cars, obstacles, signs, etc. based on the acquired distance data.

[0180] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0181] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0182] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0183] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0184] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 38, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0185] FIG. 39 is a diagram showing an example of the installation position of the distance measurement device 12031.

[0186] In FIG. 39, a vehicle 12100 has distance measurement devices 12101, 12102, 12103, 12104, and 12105 as a distance measurement device 12031.

[0187] Distance measuring devices 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of vehicle 12100. Distance measuring device 12101 provided on the front nose and distance measuring device 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire data ahead of vehicle 12100. Distance measuring devices 12102 and 12103 provided on the side mirrors mainly acquire data on the sides of vehicle 12100. Distance measuring device 12104 provided on the rear bumper or back door mainly acquires data behind vehicle 12100. The forward data acquired by distance measuring devices 12101 and 12105 is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, etc.

[0188] 39 shows an example of the detection ranges of the distance measuring devices 12101 to 12104. Detection range 12111 indicates the detection range of the distance measuring device 12101 provided on the front nose, detection ranges 12112 and 12113 indicate the detection ranges of the distance measuring devices 12102 and 12103 provided on the side mirrors, respectively, and detection range 12114 indicates the detection range of the distance measuring device 12104 provided on the rear bumper or back door.

[0189] For example, based on the distance data obtained from the distance measuring devices 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the detection ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0190] For example, based on the distance data obtained from the distance measuring devices 12101 to 12104, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0191] The above describes an example of a mobile object control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the distance measurement device 12031 of the above-described configuration.

[0192] The present technology can also be configured as follows. (1) A surface emitting device comprising: a surface light emitting element including an element region and a peripheral region around the element region; and a mounting substrate on which the surface light emitting element is mounted, wherein the element region has a light emitting element portion with an electrode provided on the mounting substrate side, the electrode being joined to the mounting substrate via a bump, and a spacer being interposed between the peripheral region and the mounting substrate. (2) The surface emitting device according to (1), wherein the spacer is interposed between an outermost portion of the peripheral region and the mounting substrate. (3) The surface emitting device according to (1) or (2), wherein the peripheral region has a dummy element portion. (4) The surface emitting device according to (3), wherein the dummy element portion includes the outermost portion. (5) The surface emitting device according to any one of (2) to (4), wherein the outermost portion extends along at least a portion of the periphery of the element region, and the spacer is provided along at least a portion of the extending direction of the outermost portion. (6) The surface emitting device according to (5), wherein the outermost peripheral portion extends along the entire periphery of the element region. (7) The surface emitting device according to (5) or (6), wherein the spacer has a plurality of portions aligned in the extending direction. (8) The surface emitting device according to any one of (1) to (7), wherein the spacer includes a dummy bump. (9) The surface emitting device according to any one of (1) to (8), wherein an emission surface of the surface emitting element opposite the mounting substrate is flat. (10) The surface emitting device according to any one of (1) to (9), wherein a modified layer is present on a side surface of the surface emitting element. (11) The surface emitting device according to any one of (1) to (10), wherein a surface of the electrode facing the mounting substrate is closer to the mounting substrate than a surface of the outermost peripheral portion of the peripheral region facing the mounting substrate in a direction perpendicular to the in-plane direction, and wherein the thickness of the spacer is greater than the thickness of the bump. (12) A surface emitting device described in any one of (1) to (11), wherein another electrode is provided on the mounting substrate side of the dummy element portion of the peripheral region and / or on the mounting substrate side of the dummy element portion of the element region, and the another electrode is joined to the mounting substrate via another bump.(13) The surface emitting device according to (11), wherein the element region has a plurality of the light emitting element components spaced apart in an in-plane direction, and the another electrode is a common electrode provided in common to the plurality of light emitting element components. (14) The surface emitting device according to any one of (8) to (13), wherein the bumps and the dummy bumps each contain a material that is resistant to crushing when pressure is applied. (15) The surface emitting device according to any one of (8) to (14), wherein the bumps and the dummy bumps are made of the same conductive material. (16) The surface emitting device according to any one of (1) to (15), wherein the peripheral region includes dummy element components, and each of the light emitting element component and the dummy element component has first and second semiconductor structures stacked on each other, and a light emitting layer disposed between the first and second semiconductor structures. (17) A method for manufacturing a surface emitting device, comprising: a step of forming a surface emitting device including an element region having a light emitting element portion and a peripheral region of the element region; and a step of interposing a spacer between the peripheral region and a mounting substrate, and bonding an electrode provided on the mounting substrate side of the light emitting element portion to the mounting substrate via a bump. (18) A method for manufacturing a surface emitting device according to (17), wherein the spacer includes a dummy bump. (19) A method for manufacturing a surface emitting device according to (17) or (18), wherein the bonding step is performed by pressing an emission surface, which is the surface of the surface emitting element opposite to the mounting substrate side, toward the mounting substrate. (20) A method for manufacturing a surface emitting device according to any one of (17) to (19), wherein, in the forming step, a plurality of the surface emitting elements are formed collectively so that the peripheral regions are adjacent to each other; and a step of singulating the plurality of surface emitting elements by stealth dicing after the forming step and before the bonding step.

[0193] 10, 20, 30, 40, 50, 60, 70, 80, 90, 110, 120, 130: Surface light emitting device 100: Surface light emitting element 106: Light emitting layer 115: Cathode electrode (electrode) 112: Anode electrode (another electrode) 200: Mounting substrate EA: Element area PA: Peripheral area LE: Light emitting element section B1: First bump (bump) B2: Second bump (another bump) DE: Dummy element section SP: Spacer DB: Dummy bump SS1: First semiconductor structure SS2: Second semiconductor structure SD1: First modified layer (modified layer) SD2: Second modified layer (modified layer)

Claims

1. A surface emitting device comprising: a surface emitting element including an element region and a peripheral region surrounding the element region; and a mounting substrate on which the surface emitting element is mounted, wherein the element region has a light emitting element portion having an electrode on the mounting substrate side, the electrode being joined to the mounting substrate via a bump, and a spacer being interposed between the peripheral region and the mounting substrate.

2. The surface emitting device according to claim 1, wherein the spacer is interposed between the outermost periphery of the peripheral region and the mounting substrate.

3. The surface emitting device according to claim 2, wherein the peripheral region has a dummy element portion.

4. The surface emitting device according to claim 3, wherein the dummy element portion includes the outermost peripheral portion.

5. The surface emitting device according to claim 2, wherein the outermost periphery extends along at least a part of the periphery of the element region, and the spacer is provided along at least a part of the direction in which the outermost periphery extends.

6. The surface emitting device according to claim 5, wherein the outermost peripheral portion extends along the entire periphery of the element region.

7. The surface emitting device according to claim 5, wherein the spacer has a plurality of portions aligned in the extending direction.

8. The surface emitting device according to claim 1, wherein the spacer includes a dummy bump.

9. The surface emitting device according to claim 1, wherein an emission surface of said surface emitting element opposite said mounting substrate is a flat surface.

10. The surface emitting device according to claim 1, wherein a modified layer is present on a side surface of the surface emitting element.

11. A surface emitting device as described in claim 1, wherein in a direction perpendicular to the in-plane direction, a surface of the electrode facing the mounting substrate is located closer to the mounting substrate than a surface of the outermost periphery of the peripheral region facing the mounting substrate, and the thickness of the spacer is greater than the thickness of the bump.

12. A surface emitting device as described in claim 1, wherein a separate electrode is provided on the mounting substrate side of the dummy element portion of the peripheral region and / or on the mounting substrate side of the dummy element portion of the element region, and the separate electrode is joined to the mounting substrate via a separate bump.

13. The surface emitting device according to claim 12, wherein the element region has a plurality of the light emitting element portions spaced apart in an in-plane direction, and the another electrode is a common electrode provided in common to the plurality of light emitting element portions.

14. The surface emitting device according to claim 8, wherein each of the bumps and the dummy bumps contains a material that is resistant to being crushed by pressure.

15. The surface light emitting device according to claim 8, wherein the bumps and the dummy bumps are made of the same conductive material.

16. The surface emitting device according to claim 1, wherein the peripheral region includes a dummy element portion, and each of the light emitting element portion and the dummy element portion has first and second semiconductor structures stacked on each other, and a light emitting layer disposed between the first and second semiconductor structures.

17. A method for manufacturing a surface emitting device, comprising: a step of forming a surface emitting element including an element region having a light emitting element portion and a peripheral region of the element region; and a step of interposing a spacer between the peripheral region and a mounting substrate, and bonding an electrode provided on the mounting substrate side of the light emitting element portion to the mounting substrate via a bump.

18. The method for manufacturing a surface emitting device according to claim 17, wherein the spacer includes a dummy bump.

19. The method for manufacturing a surface emitting device according to claim 17, wherein the bonding step is performed by pressing an emission surface, which is the surface of the surface emitting device opposite the mounting substrate, against the mounting substrate.

20. A method for manufacturing a surface emitting device as described in claim 17, comprising: in the forming step, a plurality of the surface emitting elements are formed collectively so that the peripheral regions are adjacent to each other; and after the forming step and before the joining step, a step of individualizing the plurality of surface emitting elements by stealth dicing.

Images