Production method for GAN epitaxial film and production method for semiconductor device

WO2025009374A1PCT designated stage expired Publication Date: 2025-01-09SHIN ETSU HANDOTAI CO LTD
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Application Number
PCT/JP2024/021963
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-07-03
Filing Date
2024-06-18
Publication Date
2025-01-09

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Abstract

The present invention is a production method for a GaN epitaxial film. The production method is characterized by including a preparation procedure for preparing a support substrate that has a thickness of less than 1 mm and is formed by sealing a core that has a diameter of at least 150 mm and comprises a nitride ceramic with a sealing layer, a substrate production procedure for layering, in order, a flattening layer and a seed crystal layer that comprises an SiC single crystal on the support substrate to obtain an epitaxial growth substrate, and an epitaxial procedure for growing a GaN epitaxial film that has a thickness of at least 7 μm on the epitaxial growth substrate to produce a GaN epitaxial film that has a dislocation density of no more than 1.0×106 / cm2. The present invention thereby provides a production method for a GaN epitaxial film that makes it possible to produce a GaN thick film that has a large diameter but has no warpage or cracks and has a dislocation density of no more than 1.0×106 / cm2 by means of a simple process at low cost.
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Description

GaN epitaxial film manufacturing method and semiconductor device manufacturing method

[0001] The present invention relates to a method for manufacturing a GaN epitaxial film and a method for manufacturing a semiconductor device.

[0002] Si, GaAs, and Sap (sapphire) bulk substrates are promising substrates for growing GaN epitaxial films because they can be obtained with large diameters and are inexpensive, but when attempting to grow a thick epitaxial film to reduce dislocations in the epitaxial film, problems arise such as warping and cracking of the substrate. Furthermore, overcoming these problems makes the buffer process extremely complicated, resulting in reduced productivity.

[0003] On the other hand, GaN and AlN bulk substrates, which have similar thermal expansion coefficients and lattice constants, are promising in terms of physical properties, but they cannot be mass-produced with diameters of 150 mm or more and are expensive. As described in Patent Document 1, there is a method of creating a GaN film with low dislocation density on a heterogeneous substrate using the VAS (Void-Assisted Separation) method, and using this as a substrate, but it is unclear whether it can be made into a large diameter, and the process is complicated. Furthermore, Non-Patent Document 1 gives an example of improving the high defect density of GaN-on-Si substrates by using GaN-on-GaN, but it is unclear whether it can be made into a large diameter.

[0004] As in Patent Documents 2 and 3, when a substrate having a ceramic core with approximately the same thermal expansion coefficient as the crystal to be formed is used, a thick film can be formed. However, due to the difference in lattice constant between the seed crystal of Si or the like and the crystal to be formed, the crystal may grow to a thickness of 1.0 × 10 6 / cm 2 It is difficult to achieve a dislocation density below this.

[0005] When a substrate having a ceramic core is used, there is a method for producing a vertical transistor by separating the support substrate including the ceramic core by ion implantation, as described in Patent Document 4. Also, as described in Patent Document 5, a method for producing a vertical transistor by separating the support substrate including the ceramic core by a planarization layer (SiO 2 There is also a method for producing an ultraviolet light emitting element by separating the layer (layer) by etching.

[0006] In addition, Patent Documents 4 and 6 disclose that, in addition to Si, SiC, AlN, AlGaN, and Al are used as the single crystal layer on the support substrate containing a ceramic core. 2 O 3 It is described that the above can be used and that those having similar lattice constants are preferable, but there is no description as to whether the dislocation density can be reduced.

[0007] Epitaxial Lateral Overgrowth (ELO) is also known as a means for reducing dislocation density. For example, Patent Documents 7 and 8 describe ELO growth using island-shaped SiN on the support substrate of Patent Document 2. Patent Documents 9 and 10 also describe the concept of reducing dislocations by ELO growth of GaN in two stages on a Si-containing film containing island-shaped SiN, with the Si (doping) concentration of the two-stage island-shaped growth portion of GaN being 1.0×10 17 ~10 20 / cm 3 There is a description:

[0008] Patent Document 11 describes that no mask such as SiN is used, and that island-shaped GaN is grown under certain growth conditions to reduce dislocations by ELO growth, achieving a threading dislocation (TD) density of 5.0 × 10 6/ cm 2 , 5.0 x 10 for three times 5/ cm 2 There is a description that a GaN film of this order can be obtained.

[0009] However, these techniques involve forming ELO on Si, and it is necessary to perform ELO multiple times in order to reduce the dislocation density.

[0010] One known method for reducing dislocation density is to form a film composed of inclined planes as an underlayer, rather than growing the (0001) plane, through which dislocations from below easily propagate. This method uses an island-shaped mask such as SiN (Patent Document 1, Patent Documents 12-13), or achieves the growth of an inclined plane film by adjusting the growth conditions without patterning a mask layer (Patent Documents 14-17). The substrate used is a freestanding GaN substrate that was first fabricated by the VAS method on a substrate such as Si, GaAs, or Sap. However, it is unclear whether it is possible to increase the diameter.

[0011] Japanese Patent Application Publication No. 2020-070229 Japanese Patent Application Publication No. 2013-177285 Japanese Patent Application Publication No. 2019-523994 International Publication No. 2021 / 230148 Japanese Patent Application Publication No. 2022-056492 Japanese Patent Application Publication No. 2022-012558 Japanese Patent Application Publication No. 2022-165964 Japanese Patent Application Publication No. 2020-505767 Japanese Patent Application Publication No. 2018 JP-88528 A JP 2015-29042 A JP 2016-41654 A JP 2020-070230 A JP 2020-033210 A JP 2020-033211 A JP 2020-033212 A JP 2020-033253 A JP 2020-033254 A

[0012] Odyssey Semiconductor, Inc. "Defects Matter," Odyssey Semiconductor, Inc., 2023, [Retrieved May 17, 2023], Internet<URL: https: / / odysseysemi.com / technology / >

[0013] As described above, various techniques have been proposed for increasing the thickness and diameter of epitaxial layers and reducing dislocation density, but there has not been a low-cost, simple method for producing GaN epitaxial films that can increase the diameter, prevent warping and cracking during thickening, and reduce dislocation density.

[0014] The present invention has been made to solve the above problems, and provides a method for manufacturing a silicon wafer having a large diameter, no warpage or cracks, and a dislocation density of 1.0×10 6 / cm 2 The present invention aims to provide a method for manufacturing a GaN epitaxial film that produces the following GaN thick film at low cost using a simple process: Another object of the present invention is to provide a method for manufacturing a semiconductor device that can produce high-quality semiconductor devices at low cost.

[0015] The present invention has been made to achieve the above object, and is a method for producing a GaN epitaxial film, comprising the steps of: a preparation step of preparing a support substrate having a diameter of 150 mm or more and a thickness of less than 1 mm, the support substrate having a core made of nitride ceramic sealed with a sealing layer; a substrate production step of sequentially laminating a planarizing layer and a seed crystal layer made of SiC single crystal on the support substrate to obtain an epitaxial growth substrate; and an epitaxial step of growing a GaN epitaxial film having a thickness of 7 μm or more on the epitaxial growth substrate, thereby achieving a dislocation density of 1.0×10 6 / cm 2 The present invention provides a method for producing a GaN epitaxial film, characterized by producing the following GaN epitaxial film.

[0016] According to this method for producing a GaN epitaxial film, by growing a GaN epitaxial film on an epitaxial growth substrate containing a ceramic core, it is possible to produce a thick GaN film, unlike bulk substrates such as Si, Sap, and GaAs, which, although inexpensive and large-diameter products are available, cannot form thick GaN epitaxial films due to differences in thermal expansion coefficients. Furthermore, if such a thick film with low dislocations can be produced, the crystallinity of the device layer will be good, which will improve the breakdown voltage and reduce leakage current in electronic devices, and will also enable higher output or higher efficiency in visible and ultraviolet light devices, thereby contributing to energy conservation.

[0017] Furthermore, according to this method for manufacturing a GaN epitaxial film, the single crystal layer on the support substrate is made into a SiC single crystal. SiC is a material whose lattice constant is closer to that of GaN than Si, and is available in large diameters at low cost compared to other crystalline layers such as GaN and AlN that can be used to manufacture high-quality GaN epitaxial films. Therefore, SiC can be manufactured without warping or cracking using a simple process, and with a dislocation density of 1.0 × 10 6 / cm 2 The following GaN epitaxial films can be formed:

[0018] Furthermore, by using a support substrate with a diameter of 150 mm or more, it is possible to form a GaN epitaxial film with a large diameter.

[0019] Furthermore, by growing a GaN epitaxial film to 7 μm or more, it is possible to produce an epitaxial film of a thickness that cannot be formed on bulk substrates such as Si, Sap, or GaAs, which cannot form thick GaN epitaxial films due to differences in thermal expansion coefficients, although inexpensive, large-diameter products are available.

[0020] Furthermore, by making the thickness of the support substrate less than 1 mm, it is possible to pass CMOS lines for conventional silicon epitaxial wafers. For example, in GaN-on-Si substrate devices, Si substrates of standard thickness cannot be used due to problems such as warping and cracking caused by differences in thermal expansion coefficients, and a thick substrate of 1 mm or more must be used by bonding or the like, which makes it impossible to pass CMOS lines for conventional silicon. However, with the present invention, CMOS lines can be passed through.

[0021] Therefore, despite the large diameter, there is no warping or cracking, and the dislocation density is 1.0 × 10 6 / cm 2 The following GaN thick films can be produced at low cost using a simple process:

[0022] In this case, the epitaxial process may include a formation step of forming island-shaped SiN layers, an ELO step of growing a GaN layer using the SiN layers as a mask, and then a growth step of growing a GaN epitaxial film on the topmost SiN layer or GaN layer.

[0023] This makes it possible to further reduce the dislocation density of the GaN epitaxial film.

[0024] In this case, the forming step and the ELO step can be performed alternately in the epitaxial process.

[0025] This allows the dislocation density of the GaN epitaxial layer to be further reduced compared to when the formation step and the ELO step are performed once each.

[0026] In this case, the SiC single crystal may have an off-angle of 0° to 4°.

[0027] This allows the Group III nitride epitaxial film to grow in a step-flow mode.

[0028] The present invention also provides a method for manufacturing a semiconductor device, comprising the steps of: fabricating a device on the GaN epitaxial film manufactured by the above-described method for manufacturing a GaN epitaxial film; and then separating the device from the support substrate by etching the planarization layer.

[0029] According to this method for manufacturing a semiconductor device, even if the diameter is large, there is no warping or cracking, and the dislocation density is 1.0 × 10 6 / cm 2 The following GaN thick film is an epitaxial film produced by a low-cost, simple process, and devices are fabricated on the epitaxial film, so high-quality semiconductor devices without warping or cracks can be manufactured at low cost.

[0030] Furthermore, by separating the insulating support substrate portion by etching the planarization layer between the support substrate and the epitaxial film, it is possible to use only the conductive GaN film in the semiconductor device. Even if an insulating support substrate portion is present, in a vertical device that requires current to flow vertically, the device fabrication process can be simplified by supplying current from the back surface of the substrate.

[0031] As described above, according to the method for producing a GaN epitaxial film of the present invention, it is possible to produce a GaN epitaxial film having a large diameter but without warping or cracks, and with a dislocation density of 1.0×10 6 / cm 2 The following GaN thick films can be produced at low cost through a simple process: Furthermore, according to the method for producing a semiconductor device of the present invention, high-quality semiconductor devices can be produced at low cost.

[0032] 1 shows an epitaxial substrate on which a GaN epitaxial film is formed, obtained by a GaN epitaxial film manufacturing method according to an embodiment of the present invention; 2 shows an example of a GaN epitaxial film manufacturing method and a semiconductor device manufacturing method using the manufactured epitaxial film; 3 shows a device using a GaN epitaxial film of the present invention; 4 shows a device using a GaN epitaxial film of the present invention; 5 shows an epitaxial film of Example 1; 6 shows a manufacturing procedure for the epitaxial film and semiconductor device of Example 2; 7 shows a manufacturing procedure for the epitaxial film and semiconductor device of Example 2; 8 shows a manufacturing procedure for the epitaxial film and semiconductor device of Example 3; 9 shows a cross-sectional photograph of the epitaxial film of Example 3; 10 shows a manufacturing procedure for the epitaxial film and semiconductor device of Example 4; 11 shows a manufacturing procedure for the epitaxial film and semiconductor device of Example 5; 12 shows a manufacturing procedure for the epitaxial film and semiconductor device of Example 6; 13 shows a manufacturing procedure for the epitaxial film and semiconductor device of Comparative Example 1.

[0033] The present invention will be described in detail below, but the present invention is not limited thereto.

[0034] As mentioned above, despite the large diameter, there is no warping or cracking, and the dislocation density is 1.0 × 10 6 / cm 2 There has been a demand for a method for producing a GaN epitaxial film that can produce the following GaN thick film at low cost using a simple process.

[0035] As a result of extensive research into the above-mentioned problems, the present inventors have discovered a method for producing a GaN epitaxial film, which includes the steps of: preparing a support substrate having a diameter of 150 mm or more and a thickness of less than 1 mm, the support substrate having a core made of nitride ceramic sealed with a sealing layer; a substrate production step of sequentially laminating a planarizing layer and a seed crystal layer made of SiC single crystal on the support substrate to obtain an epitaxial growth substrate; and an epitaxial step of growing a GaN epitaxial film having a thickness of 7 μm or more on the epitaxial growth substrate, thereby achieving a dislocation density of 1.0×10 6 / cm 2The GaN epitaxial film manufacturing method described below is characterized by manufacturing the GaN epitaxial film, and it is possible to manufacture a GaN epitaxial film having a large diameter but without warping or cracking and with a dislocation density of 1.0 × 10 6 / cm 2 The present invention was accomplished by finding that the following GaN thick film can be produced at low cost by a simple process.

[0036] As described above, there has also been a demand for a method of manufacturing semiconductor devices that can produce high-quality semiconductor devices at low cost.

[0037] As a result of extensive research into the above-described problems, the inventors have discovered that a high-quality semiconductor device can be manufactured at low cost by a semiconductor device manufacturing method characterized by fabricating a device on a GaN epitaxial film manufactured by the above-described GaN epitaxial film manufacturing method, and then separating the device from the support substrate by etching the planarizing layer, thereby completing the present invention.

[0038] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a GaN epitaxial film according to an embodiment of the present invention will be described below with reference to FIGS.

[0039] First, a GaN epitaxial film obtained by a GaN epitaxial film manufacturing method according to an embodiment of the present invention will be described with reference to Fig. 1. Here, a film for a vertical power device (MOS-FET) is exemplified as the GaN epitaxial film.

[0040] As shown in Fig. 1, a GaN epitaxial film 112 is formed on an epitaxial growth substrate 109. The epitaxial growth substrate 109 serves as a base on which the GaN epitaxial film 112 grows, and also serves as a support member for preventing deformation, such as warping, of the GaN epitaxial film 112. In the following description, the GaN epitaxial film 112 formed on the epitaxial growth substrate 109 as shown in Fig. 1 will be referred to as an epitaxial substrate 1.

[0041] The epitaxial growth substrate 109 includes a support substrate 100, a planarizing layer 105, and a seed crystal layer 107. In Fig. 1, a buffer layer 111 is formed on the epitaxial growth substrate 109, and an ELO layer 113 is further formed on the buffer layer 111.

[0042] The support substrate 100 is a support member for preventing deformation of the GaN epitaxial film 112, and includes a core 101 and a sealing layer 103. The core 101 is a layer that forms the base of the support substrate 100, and is made of nitride ceramics such as AlN. The sealing layer 103 is a layer that covers the periphery (both sides) of the core 101 to prevent the diffusion of impurities, and is made of, for example, SiO 2 The coating thickness is, for example, about 200 nm.

[0043] The planarization layer 105 is a layer that flattens unevenness resulting from the outer shapes of the core 101 and the sealing layer 103. The planarization layer 105 is also a portion that is removed by etching when the GaN epitaxial film 112 is separated from the epitaxial growth substrate 109 after devices are formed on the GaN epitaxial film 112. The planarization layer 105 contains, for example, any of silicon oxide, silicon oxynitride, and aluminum arsenide, and more specifically, silicon oxide (SiO 2 The planarizing layer 105 is provided at least on the side where the seed crystal layer 107 is bonded, but may be provided so as to encompass the entire substrate or on both sides of the substrate.

[0044] The seed crystal layer 107 is a layer that serves as a base layer on which the GaN epitaxial film 112 grows, and is made of SiC single crystal. SiC is a material whose lattice constant is closer to that of GaN than Si, and is available at a lower cost and with a larger diameter than other crystal layers such as GaN and AlN that can be used to produce high-quality GaN epitaxial films. Therefore, SiC can be grown using a simple process without warping or cracking, and with a dislocation density of 1.0 × 10 6 / cm 2 The following GaN epitaxial film can be formed. The lower limit of the dislocation density is not particularly limited, but is, for example, 1.0×10 4 / cm 2 It can be more than that.

[0045] The crystal structure of the SiC single crystal is not particularly limited, and examples include 6H—SiC, 4H—SiC, 3C—SiC, etc. For example, 4H—SiC is suitable for use in electronic devices, and 6H—SiC and 4H—SiC are suitable for use in visible and ultraviolet light devices.

[0046] The buffer layer 111 is a layer that is provided as needed to alleviate mismatch due to the difference in lattice constant between the seed crystal layer 107 and the GaN epitaxial film 112 and to alleviate stress on the GaN epitaxial film 112, and is made of, for example, AlN or AlGaN.

[0047] The ELO layer 113 is a layer that reduces dislocation density during epitaxial growth of the GaN epitaxial film 112 and is formed as needed to further reduce dislocation density. The ELO layer 113 includes a SiN layer 110 and a GaN layer 115. The SiN layer 110 is an island-shaped layer that acts as a mask when the GaN layer 115 grows. The GaN layer 115 is a GaN layer that grows from gaps not masked by the SiN layer 110. The SiN layer 110 restricts the growth direction during growth, thereby bending the direction of dislocations and reducing dislocations that reach the GaN epitaxial film 112. The density and size of the island-shaped SiN layer 110 can be adjusted as appropriate depending on the device application. Note that while FIG. 1 conceptually and schematically illustrates the characteristics of the SiN layer 110, in subsequent figures, the SiN layer 110 will be depicted as a layered shape for convenience.

[0048] The GaN epitaxial film 112 is a single-crystal layer on which a semiconductor device is formed. The composition of the GaN epitaxial film 112 is not limited to GaN, but includes other Group III nitrides such as InN and AlN and their alloys. The composition, structure, and conductivity type of the GaN epitaxial film 112 can be selected appropriately depending on the device to be formed, and it may be multilayered. FIG. 1 illustrates a stacked structure of an n-GaN layer 118, a p-GaN layer 122, and a GaN layer 123. The thickness of the GaN epitaxial film must be 7 μm or more. The upper limit of the thickness of the GaN epitaxial film is not particularly limited, but can be, for example, 50 μm or less. This concludes the description of the GaN epitaxial film 112.

[0049] Next, an example of a method for manufacturing the GaN epitaxial film 112 and a method for manufacturing a semiconductor device using the manufactured GaN epitaxial film 112 will be described with reference to FIG.

[0050] First, a support substrate 100 shown in FIG. 1 is prepared, which has a diameter of 150 mm or more, a nitride ceramic core 101 sealed with a sealing layer 103, and a thickness of less than 1 mm (S1 in FIG. 2: preparation step). Here, the diameter of the support substrate must be 150 mm or more. If the diameter is less than 150 mm, the diameter of the GaN epitaxial film 112 will also be less than 150 mm, making it impossible to increase the diameter. The upper limit of the diameter of the support substrate is not particularly limited, but can be, for example, 500 mm or less.

[0051] Furthermore, the thickness of the support substrate must be less than 1 mm. If the thickness is 1 mm or more, the epitaxial substrate 1 will be 1 mm or more, and even if an attempt is made to introduce it into a conventional silicon CMOS line or the like to form a device on the GaN epitaxial film 112, it will be too thick to be passed through the line. The lower limit of the thickness of the support substrate is not particularly limited, but can be, for example, 0.1 mm or more.

[0052] More preferably, the thickness of the support substrate 100 is within the Si substrate thickness standards of JEITA and SEMI, so that conventional silicon CMOS lines can be reliably passed through.

[0053] Next, a planarizing layer 105 and a seed crystal layer 107 made of a SiC single crystal are laminated in this order on the support substrate 100 shown in FIG. 1 to obtain an epitaxial growth substrate 109 (S2 in FIG. 2: substrate manufacturing step).

[0054] Specifically, the planarization layer 105 is formed by depositing SiO.sub.2 on the surface of the support substrate 100 by plasma CVD, LPCVD, low-pressure MOCVD, or the like. 2 After performing a thermal stabilization treatment, the surface can be polished and smoothed by a known polishing method such as CMP. The thickness of the planarization layer 105 after polishing is, for example, 0.05 μm to 3.0 μm.

[0055] An example of a method for forming the seed crystal layer 107 is a method of transferring the surface layer of a SiC single crystal substrate. Specifically, hydrogen ions are first implanted into the C-face side of a SiC single crystal substrate fabricated by sublimation deposition to form a split interface in advance. Next, the C-face side of the SiC single crystal substrate into which hydrogen ions have been implanted is bonded to the planarization layer 105. At this time, surface activation treatment can be performed as necessary to eliminate voids.

[0056] Next, a split heat treatment is performed on the SiC single crystal substrate while it is bonded to the planarization layer 105, whereby peeling occurs starting from the hydrogen ion implantation layer, and the surface layer of the SiC single crystal substrate is transferred to the planarization layer 105, with the split interface appearing as the surface. Surface polishing such as CMP, or wet etching or dry etching is then performed to remove the damaged layer caused by the peeling.

[0057] It is preferable to use a SiC single crystal having an off-angle of 0° to 4° for the seed crystal layer 107. This allows the Group III nitride epitaxial film formed on the seed crystal layer 107 to grow in a step-flow mode. If a lower off-angle is required in some cases, a 0° off-angle substrate may be cut out from a 4° off-angle substrate and used.

[0058] The thickness of the seed crystal layer 107 is, for example, 0.04 μm or more and 1.0 μm or less, but is set appropriately depending on the structure and type of the device to be formed on the GaN epitaxial film 112 .

[0059] The conductivity of the seed crystal layer 107 can be selected to be conductive or non-conductive depending on the structure and type of device to be formed on the GaN epitaxial film 112. For example, low resistivity (about 20 mΩcm) or high resistivity (1.0×10 6 Ωcm or more).

[0060] For example, in a device that requires electrical conduction in the vertical direction of the device layer, the electrodes can be formed either all on the same surface as shown in FIG. 3 or on the top and bottom surfaces as shown in FIG. 4.

[0061] Here, the device layer portion is a collective name for the portion above the seed crystal layer 107 , and refers to the GaN epitaxial film 112 or the portion including the buffer layer 111 , the ELO layer 113 and the GaN epitaxial film 112 .

[0062] In the device 200 (MOS-FET) shown in Figure 3, the seed crystal layer 107 is conductive, and the device is used with the epitaxial growth substrate 109 attached. In this case, the seed crystal layer 107 is used to form a drain electrode, so the seed crystal layer 107 is preferably thick to reduce lateral resistance, and a thickness of 300 nm or more is suitable, for example. Furthermore, to facilitate ohmic contact, the resistivity of the seed crystal layer 107 is preferably reduced to approximately 0.01 to 0.03 Ω cm.

[0063] On the other hand, the device 201 (MOS-FET) shown in FIG. 4 is a device in which the seed crystal layer 107 has high resistivity, semi-insulation, or insulation, and after forming a device on the GaN epitaxial film 112, only the device layer portion is separated and used as a device. In this case, the seed crystal layer 107 is preferably thin since it will be removed, and a thickness of less than 300 nm is suitable, for example. Note that if the seed crystal layer 107 is conductive, there is no need to remove the seed crystal layer 107. Therefore, the device can be used in the electrode formation type shown in FIG. 4 with the seed crystal layer 107 remaining below the device layer portion. For devices such as RF devices in which it is undesirable to pass current underneath, a semi-insulating seed crystal layer 107 is desirable.

[0064] Next, if necessary, a buffer layer 111 is formed on the seed crystal layer 107 (S3 in FIG. 2). The buffer layer 111 can be formed by MOCVD, for example.

[0065] Next, if necessary, an ELO layer 113 is formed. Specifically, a formation step (S4 in FIG. 2) of forming island-shaped SiN layers 110 and an ELO step (S5 in FIG. 2) of growing a GaN layer 115 using the SiN layer 110 as a mask are performed. This allows the dislocation density of the GaN epitaxial film to be further reduced.

[0066] The formation step and the ELO step may be alternately performed as necessary to form multiple SiN layers 110 and GaN layers 115. This allows the dislocation density of the GaN epitaxial film 112 to be further reduced compared to when the formation step and the ELO step are performed once each.

[0067] Thereafter, a GaN epitaxial film 112 is grown (S6 in FIG. 2: growth step). The GaN epitaxial film 112 is formed on the outermost SiN layer 110 or GaN layer 115 if the formation step and ELO step have been performed, or on the buffer layer 111 if the formation step and ELO step have not been performed and the buffer layer 111 has been formed. The GaN epitaxial film 112 is formed on the seed crystal layer 107 if the formation step and ELO step have not been performed and the buffer layer 111 has not been formed.

[0068] The surface of the seed crystal layer 107 on which epitaxial growth is performed is preferably the Si face, which tends to make the epitaxial layer flat, but the C face may also be used. Steps S3 to S6 are collectively referred to as the epitaxial process. This concludes the description of the method for manufacturing the GaN epitaxial film 112.

[0069] Next, a method for manufacturing a semiconductor device using the GaN epitaxial film 112 manufactured by the manufacturing method for the GaN epitaxial film 112 will be described.

[0070] First, a desired device is fabricated on the GaN epitaxial film 112 (S7 in FIG. 2). Fabrication of the device includes changing the conductivity type by ion implantation or the like, and forming insulating layers and electrodes by sputtering or the like.

[0071] Here, when the seed crystal layer 107 and the support substrate 100 are not separated from the GaN epitaxial film 112 even after the device is formed on the GaN epitaxial film 112, as in the device 200 shown in FIG. 3, the device is completed through the above steps.

[0072] On the other hand, when the support substrate 100 is to be separated from the GaN epitaxial film 112 even after a device has been formed on the GaN epitaxial film 112, as in the case of the device 201 shown in Fig. 4, the device is separated from the support substrate 100 by etching the planarizing layer 105 (S8 in Fig. 2). There are no particular restrictions on the etchant as long as it dissolves the planarizing layer 105. However, when the planarizing layer 105 is made of SiO 2 In this case, an HF (hydrogen fluoride) solution can be exemplified.

[0073] During the separation, not only the planarizing layer 105 but also the seed crystal layer 107 and the buffer layer 111 may be removed. This completes the description of the method for manufacturing a semiconductor device. The semiconductor devices to be manufactured are not particularly limited, but examples include LEDs, LDs (laser diodes), PDs (photodiodes), HEMTs (high mobility field effect transistors), FETs, and HBTs.

[0074] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples.

[0075] Example 1: Epitaxial substrate for vertical device First, a GaN epitaxial film 112 was grown in the following manner to produce an epitaxial substrate 1a shown in FIG.

[0076] First, as shown in FIG. 1, a nitride ceramic substrate (AlN) as a core 101 was wrapped in a sealing layer 103, and a silicon oxide layer 105 having a thickness of 0.05 μm to 3.0 μm was provided as a planarizing layer 105 on at least the side where a seed crystal layer 107 was to be bonded.

[0077] Next, 4H—SiC (resistivity 20 Ωcm, thickness 0.04 μm to 1.0 μm, epitaxial growth surface is a Si surface with an off-angle of 0°) was transferred onto the flattening layer 105 as a seed crystal layer 107. Thereafter, the epitaxial growth substrate 109 was placed in a growth apparatus and heated to a growth temperature (1000 to 1200° C.), and TMA (trimethylaluminum), TMG (trimethylgallium), and NH 3 A gas is supplied to form a buffer layer 111 on the seed crystal layer 107. 0.2 Ga 0.8 An N layer of 0.15 μm was formed.0.2 Ga 0.8 The N layer was doped with Si at 1.0 × 10 19 atoms / cm 3 Doped.

[0078] Furthermore, the supply of TMA and TMG was stopped, and SiH 4 and N.H. 3 is supplied to grow the SiN layer 110 in an island shape with a thickness of 1 nm on the buffer layer 111, and then SiH 4 The supply of nitrogen was stopped, and TMG was flowed to epitaxially grow a GaN layer 115 to a thickness of 3.0 μm. Subsequently, a Si-doped n-GaN layer 114 was epitaxially grown to a thickness of 7 μm, followed by a 0.5 μm Mg-doped p-GaN layer 119 and a 0.5 μm GaN layer 120. As is well known, the Mg doped in the GaN layer is often inactivated immediately after epitaxial growth. In such cases, a separate heat treatment is required to activate it as a p-type dopant. In this example, the heat treatment was performed at 1300°C in a nitrogen atmosphere at atmospheric pressure. In the following examples, when a "Mg-doped p-GaN layer" is mentioned, it should be understood that a similar process was performed. The epitaxial substrate 1a was fabricated through the above steps.

[0079] Next, using a Hitachi SU-70 electron microscope with a semiconductor backscattered electron detector (PDBSE), the dislocation density near the surface of the epitaxial substrate 1a was evaluated in an area of ​​20 μm×20 μm at an acceleration voltage of 5 kV. As a result, the dislocation density was found to be 7.5×10 5 cm -2 Thus, an epitaxial substrate 1a for a vertical device on which a high-quality GaN epitaxial film was grown could be manufactured. In the III nitride epitaxial growth layer, dislocations disappear as the growth proceeds, so the dislocation density in the lower layer (the bottom of the GaN layer 115 or the n-GaN layer 114 in this example) at the beginning of growth was 1.0×10 6 / cm 2 Even if the thickness exceeds 1000 nm, the dislocation density decreases rapidly in the upper layer. Therefore, in the case of an epitaxial substrate on which a GaN epitaxial film of 7 μm or more is grown according to the present invention, the quality required for device performance can be guaranteed by evaluating the vicinity of the surface of the fabricated epitaxial substrate.

[0080] Example 2: MOS-FET First, a GaN epitaxial film 112 was grown in the following manner to produce an epitaxial substrate 1b shown in FIG. 6(a).

[0081] First, as in Example 1, a nitride ceramic substrate (AlN) as core 101 was wrapped in sealing layer 103, and a silicon oxide layer having a thickness of 0.05 μm to 3.0 μm was provided as planarization layer 105 on at least the side where seed crystal layer 107 was to be bonded.

[0082] Next, 4H—SiC (resistivity 20 Ωcm, thickness 0.04 μm to 1.0 μm, epitaxial growth surface is a Si surface with an off-angle of 0°) was transferred onto the planarizing layer 105 as the seed crystal layer 107, and Al was deposited on the seed crystal layer 107 as the buffer layer 111 in the same manner as in Example 1. 0.2 Ga 0.8 An N layer of 0.15 μm was formed. 0.2 Ga 0.8 The N layer contains 1.0 × 10 Si. 19 atoms / cm 3 Doped.

[0083] Next, as in Example 1, a SiN layer 110 was grown on the buffer layer 111 in an island shape with a thickness of 1 nm, and then a GaN layer 115 was epitaxially grown to a thickness of 2.0 μm. On top of that, a SiN layer 110 was grown in an island shape with a thickness of 1 nm, and then a GaN layer 115 was epitaxially grown to a thickness of 1.0 μm. In other words, the number of times the ELO layer 113 was stacked was increased compared to the first embodiment.

[0084] Thereafter, a Si-doped n-GaN layer 114 was epitaxially grown to a thickness of 7 μm, a Mg-doped p-GaN layer 119 was grown to a thickness of 0.5 μm, and a GaN layer 120 was grown thereon to a thickness of 0.5 μm. Through the above steps, an epitaxial substrate 1b was manufactured.

[0085] The dislocation density near the surface of the epitaxial substrate 1b was measured in the same manner as in Example 1, and was found to be 6.0×10 5 cm -2 Thus, an epitaxial substrate 1b for a vertical device on which a high-quality GaN epitaxial film was grown could be manufactured.

[0086] Next, this epitaxial substrate 1b for a vertical device was processed by the following device process to fabricate a vertical power device (MOS-FET). First, as shown in FIG. 6(b), a mask 301 having a predetermined pattern shape was formed on the outermost surface by photolithography, and n-type semiconductor layers were formed in the openings of the mask 301. + The layer 303 is implanted with ions to form n-type GaN layer 120 on the top surface. + A layer 303 was formed.

[0087] Furthermore, as shown in FIG. 6(c), n + A mask 301 having an opening formed so that the layer 303 is in the center was formed, and dry etching was carried out down to the n-GaN layer 114 .

[0088] Next, as shown in Fig. 6(d), a mask 301 was formed on the dry-etched portion by photolithography, and a SiN film 305 was formed by sputtering. After that, the mask 301 was removed, and a SiO 2 A film 307 was formed.

[0089] Next, as shown in FIG. 6(f), a mask 301 is formed by photolithography, and then SiO 2 The center of the film 307 was etched. Thereafter, the mask 301 was removed, and a mask 301 for the gate electrode was formed by photolithography as shown in FIG.

[0090] 7(b), a gate electrode 309 was formed by sputtering, and the mask 301 was removed. Next, as shown in FIG. 7(c), a mask 301 was formed by photolithography, and SiO 2 7(d), the mask 301 was removed and then a source electrode 313 was formed by sputtering.

[0091] Next, as shown in FIG. 7( e ), a mask 301 for element isolation is formed by photolithography, and then the SiO 2 planarization layer 105 is removed by dry etching. 27( e ), the layers above the seed crystal layer 107 are collectively shown as a device layer portion 315 for the sake of simplicity.

[0092] Next, as shown in FIG. 7( f ), the mask 301 was removed, and a temporary support substrate 317 was attached to the device layer portion 315, and immersed in an HF solution 319. As a result, the SiO 2 The layer melted, separating the device layer portion 315 from the portion below the planarization layer 105 .

[0093] Thereafter, as shown in FIG. 7( g ), a drain electrode 316 was sputtered onto the seed crystal layer 107 on the separated device layer portion 315 side, and an ohmic electrode was formed by RTA (Rapid Thermal Anneal) in a nitrogen atmosphere, after which Au 320 was sputtered onto the surface. In the following examples, if heat treatment is required to establish ohmic contact with the electrode, it will be performed under commonly known conditions and will not be described further. Furthermore, as shown in FIG. 7( h ), a metal bond was formed with a substrate on which Au 320 had been sputtered onto a previously prepared conductive substrate 321. Furthermore, as shown in FIG. 7( i ), each chip on the separated device layer portion 315 side was picked up one by one and soldered onto a substrate 323 on which an electronic circuit was formed. This resulted in the formation of a vertical power device (MOS-FET) as a semiconductor device.

[0094] Example 3: SBD (Schottky Barrier Diode) First, an HVPE-GaN epitaxial film 401 was grown as the GaN epitaxial film 112 in the following manner to produce an epitaxial substrate 1c shown in FIG. 8(a).

[0095] First, as in Example 1, a nitride ceramic substrate (AlN) as core 101 was wrapped in sealing layer 103, and a silicon oxide layer having a thickness of 0.05 μm to 3.0 μm was provided as planarization layer 105 on at least the side where seed crystal layer 107 was to be bonded.

[0096] Next, 4H—SiC (resistivity 20 Ωcm, thickness 0.04 μm to 1.0 μm, epitaxial growth surface is a Si surface with an off-angle of 0°) is transferred onto the planarizing layer 105 as the seed crystal layer 107, and Al is deposited on the seed crystal layer 107 as the buffer layer 111 in the same manner as in Example 1. 0.2 Ga 0.8 An N layer of 0.15 μm was formed. 0.2 Ga 0.8 The N layer contains 1.0 × 10 Si. 19 atoms / cm 3 Doped.

[0097] Next, a SiN layer 110 was grown on the buffer layer 111 in an island shape with a thickness of 1 nm, and then a GaN layer 115 was epitaxially grown to a thickness of 3.4 μm, in the same manner as in Example 1. Then, a SiN layer 110 was grown in an island shape with a thickness of 1 nm, and then a GaN layer 115 was epitaxially grown to a thickness of 2.1 μm.

[0098] Thereafter, an HVPE-GaN epitaxial film 401 was epitaxially grown to a thickness of 19 μm by HVPE (Hydride Vapor Phase Epitaxy). Through the above steps, an epitaxial substrate 1c was manufactured.

[0099] The dislocation density near the surface of the HVPE-GaN epitaxial film 401 was measured in the same manner as in Example 1, and was found to be 3.0×10 5 cm -2 Thus, an epitaxial substrate 1c for a vertical device on which a high-quality GaN epitaxial film was grown could be manufactured.

[0100] Furthermore, when the cross section of the epitaxial substrate 1c for a vertical device was observed with an electron microscope, the planarization layer 105 (SiO 2 ), the seed crystal layer 107 (SiC), the buffer layer 111, the SiN layer 110, and the growth of the HVPE-GaN epitaxial film 401 were confirmed.

[0101] Specifically, a layer with a thickness of approximately 24.7 μm was observed in the SEM image shown in Figure 9(a), which is approximately the same as the total thickness of the buffer layer 111 (0.15 μm thick), the GaN layer 115 (3.4 μm + 2.1 μm thick), and the HVPE-GaN epitaxial film 401 (19 μm), and it was found that the total thickness of these layers was as intended.

[0102] Furthermore, as shown in Figures 9(b) and (c), when the layer with a thickness of approximately 24.7 µm was enlarged, a layer with a thickness of 3.4 µm was observed, which is the same as the thickness of the first layer of GaN layer 115, and therefore it was found that GaN layer 115 also had the desired thickness.

[0103] In the TEM images shown in FIGS. 9(d) and 9(e), the planarization layer 105 (SiO 2 ), seed crystal layer 107 (SiC), buffer layer 111 (Al 0.2 Ga 0.8 It was confirmed that the SiN layer 110 was laminated in this order.

[0104] Next, this epitaxial substrate 1c for a vertical device was processed by the following device process to fabricate a vertical power device (SBD): First, a mask 501 for a Schottky electrode was fabricated by photolithography, and a Schottky electrode 503 was formed by sputtering, as shown in FIG.

[0105] Thereafter, as shown in FIG. 8C, a mask 501 is formed by photolithography, and then the SiO 2 Next, as shown in FIG. 8D, a temporary support substrate 504 is bonded to the Schottky electrode 503 side, and immersed in an HF solution 319 to remove the SiO 2 2 The planarization layer 105 was melted to separate the upper portion (device layer portion) and the lower portion, and SiC as the seed crystal layer 107 was exposed on the device layer portion side.

[0106] Furthermore, as shown in FIG. 8( e), a drain electrode 505 was formed on the surface of the seed crystal layer 107, and then Au 507 was formed as shown in FIG. 8( f). A previously prepared conductive substrate 321 with Au 507 attached was then metal-bonded. Furthermore, as shown in FIG. 8( g), each of the separated chips was picked up and soldered onto a substrate 322 on which an electronic circuit had been formed. This resulted in the formation of a vertical power device (SBD) as a semiconductor device.

[0107] Example 4: Vertical light emitting device First, a GaN epitaxial film 112 was grown in the following manner to produce an epitaxial substrate 1d shown in FIG. 10(a).

[0108] First, as in Example 1, a nitride ceramic substrate (AlN) as core 101 was wrapped in sealing layer 103, and a silicon oxide layer having a thickness of 0.05 μm to 3.0 μm was provided as planarization layer 105 on at least the side where seed crystal layer 107 was to be bonded.

[0109] Next, 6H—SiC (resistivity 20 Ωcm, thickness 0.04 μm to 1.0 μm, epitaxial growth surface is a Si surface with an off-angle of 0°) is transferred onto the planarizing layer 105 as the seed crystal layer 107, and Al is deposited on the seed crystal layer 107 as the buffer layer 111 in the same manner as in Example 1. 0.2 Ga 0.8 An N layer was formed to a thickness of 0.15 μm. 0.2 Ga 0.8 The N layer contains 1.0 × 10 Si. 19 atoms / cm 3 Doped.

[0110] Next, as in Example 1, a SiN layer 110 was grown on the buffer layer 111 in an island shape to a thickness of 1 nm, and then a GaN layer 115 was epitaxially grown to a thickness of 3.0 μm. On top of that, a SiN layer 110 was grown in an island shape to a thickness of 1 nm, and then a GaN epitaxial film 112 was epitaxially grown to a thickness of 4.0 μm.

[0111] Furthermore, six pairs of MQW (multiple quantum well) layers (InGaN: 2.3 nm / GaN: 11 nm) were grown as the active layer of the light-emitting diode. A 200 nm Mg-doped GaN layer was grown on top of the MQW layers. Through these steps, an epitaxial substrate 1d for a vertical light-emitting device was manufactured.

[0112] The dislocation density near the surface of the epitaxial substrate 1d was measured in the same manner as in Example 1, and was found to be 9.0×10 5 cm -2 Thus, an epitaxial substrate 1d for a vertical device on which a high-quality GaN epitaxial film 112 was grown could be manufactured.

[0113] Next, this vertical device epitaxial substrate 1d was processed by the following device process to fabricate a vertical light-emitting device. First, as shown in Figure 10(b), a mask 601 was formed by photolithography on the outermost surface of the vertical device epitaxial substrate 1c, and then a p-electrode 603 was formed by sputtering. Then, as shown in Figure 10(c), a mask 601 was formed by photolithography to protect the p-electrode 603 and also to separate the elements.

[0114] Next, as shown in FIG. 10(d), the SiO 2 planarization layer 105 is removed by dry etching. 2 10( e), a temporary support substrate 605 was attached to the p-electrode 603 side, and the planarizing layer 105 was dissolved by immersion in an HF solution 319, thereby separating the device layer portion from the portion below the planarizing layer 105.

[0115] Next, as shown in FIG. 10( f), an n-electrode 607 was formed by sputtering on the seed crystal layer 107 exposed on the separated device layer portion. Furthermore, as shown in FIG. 10( g), Au was sputtered onto the surface, and metal bonding was performed with a previously prepared conductive substrate 321 on which Au had been formed, followed by a sintering process. Furthermore, as shown in FIG. 10( f), each chip was picked up and soldered onto a substrate 322 on which an electronic circuit had been formed. This resulted in the formation of a vertical light-emitting element as a semiconductor device.

[0116] Example 5: Horizontal power device First, a GaN epitaxial film 112 was grown in the following manner to produce an epitaxial substrate 1e for a lateral power device, as shown in FIG. 11(a).

[0117] First, as in Example 1, a nitride ceramic substrate (AlN) as core 101 was wrapped in sealing layer 103, and a silicon oxide layer having a thickness of 0.05 μm to 3.0 μm was provided as planarization layer 105 on at least the side where seed crystal layer 107 was to be bonded.

[0118] Next, 4H—SiC (resistivity 1.0×10) was deposited on the planarizing layer 105 as a seed crystal layer 107. 6 Ωcm or more, thickness of 0.04 μm to 1.0 μm, epitaxial growth surface is a Si surface with an off-angle of 0°) was transferred onto the seed crystal layer 107, and Al was deposited on the seed crystal layer 107 as a buffer layer 111 in the same manner as in Example 1. 0.2 Ga 0.8 The N layer was formed to a thickness of 0.15 μm.

[0119] Next, as in Example 1, a SiN layer 110 was grown on the buffer layer 111 in an island shape with a thickness of 1 nm, and then a GaN layer 115 was epitaxially grown to a thickness of 3.4 μm. On top of that, a SiN layer 110 was grown in an island shape with a thickness of 1 nm, and further a GaN epitaxial film 112 was epitaxially grown to a thickness of 4.0 μm.

[0120] On top of that, a barrier layer of Al 0.25 Ga 0.75 An N layer 701 was epitaxially grown to a thickness of 25 nm, and an Mg-doped p-GaN layer 703 was further grown to a thickness of 3 nm. Through the above steps, an epitaxial substrate 1e for a lateral power device was manufactured.

[0121] The dislocation density near the surface of the epitaxial substrate 1e was measured in the same manner as in Example 1, and was found to be 9.0×10 5 cm -2 Thus, an epitaxial substrate 1e for a lateral power device on which a high-quality GaN epitaxial film 112 was grown could be manufactured.

[0122] Next, this epitaxial substrate 1e for a lateral power device was processed by the following device process to fabricate a lateral power device. First, as shown in FIG. 11(b), a mask 705 for forming S (source) and D (drain) electrodes was formed by photolithography, and Al was then removed by dry etching. 0.25 The GaN layer 701 was etched to a depth of 4 nm.

[0123] Next, an S electrode 707 and a D electrode 709 were formed by sputtering. Furthermore, as shown in Fig. 11(c), a mask 705 for forming a G (gate) electrode was formed by photolithography, and a G electrode 711 was sputtered and sintered.

[0124] Next, a mask 705 for element isolation was formed by photolithography, and dry etching was performed down to the planarization layer 105 as shown in FIG. 11(d). Then, as shown in FIG. 11(e), a temporary support substrate 713 was bonded, and the substrate was immersed in an HF solution 319 to remove the SiO 2 2 The layer was dissolved to separate the device layer portion from the portion below the planarizing layer 105 .

[0125] Next, as shown in FIG. 11( f ), with the device of the device layer portion supported on the temporary support substrate 713, the exposed seed crystal layer 107 was covered with a thin film 715 of Au and metal-bonded to a heat dissipation substrate 717 covered with the thin film 715 of Au.

[0126] 11(h), each chip was picked up and mounted at a designated position on the substrate 322 on which the electronic circuit was formed, thereby forming a lateral power device as a semiconductor device.

[0127] Example 6: Lateral Light Emitting Device First, a GaN epitaxial film 112 was grown in the following manner to produce an epitaxial substrate 1f for a horizontal light emitting device as shown in FIG. 12(a).

[0128] First, as in Example 1, a nitride ceramic substrate (AlN) as core 101 was wrapped in sealing layer 103, and a silicon oxide layer having a thickness of 0.05 μm to 3.0 μm was provided as planarization layer 105 on at least the side where seed crystal layer 107 was to be bonded.

[0129] Next, 6H—SiC (resistivity 20 Ωcm, thickness 0.04 μm to 1.0 μm, epitaxial growth surface is a Si surface with an off-angle of 0°) is transferred as a seed crystal layer 107 onto the surface of the flattening layer 105, and Al is grown on the seed crystal layer 107 as a buffer layer 111 in the same manner as in Example 1. 0.2 Ga 0.8 An N layer was formed to a thickness of 0.15 μm. 0.2 Ga 0.8 The N layer contains 1.0 × 10 Si. 19 atoms / cm 3 Doped.

[0130] Next, as in Example 1, a SiN layer 110 was grown on the buffer layer 111 in an island shape with a thickness of 1 nm, and then a GaN layer 115 was epitaxially grown on it in a thickness of 3 μm. On top of that, a SiN layer 110 was grown in an island shape with a thickness of 1 nm, and then a GaN epitaxial film 112 was epitaxially grown on it in a thickness of 4 μm.

[0131] Next, six pairs of MQW (InGaN: 2.3 nm / GaN: 11 nm) were grown as the active layer of the light-emitting diode, and then a 200 nm thick Mg-doped GaN layer 801 was grown. Through the above steps, an epitaxial substrate 1f for a lateral light-emitting device was manufactured.

[0132] The dislocation density near the surface of the epitaxial substrate 1f was measured in the same manner as in Example 1, and was found to be 9.0×10 5 cm -2 Thus, an epitaxial substrate 1f for a lateral light emitting device on which a high-quality GaN epitaxial film 112 was grown could be manufactured.

[0133] Next, this epitaxial substrate 1f for the lateral light emitting device was processed by the following device process to fabricate a lateral light emitting device: First, as shown in Figure 12(a), a mask 901 was formed by photolithography, and a p-electrode 903 was formed by sputtering.

[0134] Next, as shown in FIG. 12(b), a mask 901 is formed by photolithography to form an n-electrode, and the n-electrode forming portion and the element isolation portion are simultaneously etched by dry etching. 0.2 Ga 0.8Dry etching was performed up to the top of the N buffer layer 111 .

[0135] 12(c), a mask 901 is formed by photolithography to form an n-electrode 904, and sintering is performed to form an ohmic electrode. Then, as shown in FIG. 12(d), a mask 901 is formed by photolithography for element isolation, and a buffer layer 111 (Al 0.2 Ga 0.8 The planarization layer 105 (SiO 2 ) is then dry-etched. 2 was exposed.

[0136] Next, as shown in FIG. 12( e ), a temporary support substrate 906 is bonded, and the substrate is immersed in an HF solution 319 to form the SiO 2 The device layer portion was separated from the portion below the planarizing layer 105, and a thin film of Au 905 was formed on the seed crystal layer 107 exposed on the device layer portion side (FIG. 12(f)).

[0137] Next, as shown in Fig. 12(g), metal bonding was performed with a heat dissipation substrate 717 coated with a thin film of Au 905. Then, as shown in Fig. 12(h), each chip was picked up and mounted at a specified position on the substrate 322 on which the electronic circuit was formed. In this way, a horizontal light emitting element was formed as a semiconductor device.

[0138] Example 7: Epitaxial substrate for vertical device An epitaxial substrate was fabricated in the same manner as in Example 1, except that the SiN layer 110 and the GaN layer 115 thereon were not formed. As in Example 1, the dislocation density of the GaN layer 120 was measured and found to be 1×10 6 cm -2 Although the dislocation density is higher than that of Example 1, it is 1×10 6 cm -2 The following high quality epitaxial substrates were obtained:

[0139] Comparative Example 1 A GaN epitaxial film 112 was grown in the following manner to produce the epitaxial substrate 2 shown in FIG.

[0140] First, as in Example 1, a nitride ceramic substrate (AlN) as core 101 was wrapped in sealing layer 103, and a silicon oxide layer having a thickness of 0.05 μm to 3.0 μm was provided as planarization layer 105 on at least the side where seed crystal layer 107 was to be bonded.

[0141] Next, Si (resistivity 20 Ωcm, thickness 0.04 μm to 1.0 μm, off-angle 0°) instead of SiC was transferred onto the planarizing layer 105 as the seed crystal layer 107, and Al was deposited on the seed crystal layer 107 as the buffer layer 111 in the same manner as in Example 1. 0.2 Ga 0.8 The N layer was formed to a thickness of 0.15 μm. 0.2 Ga 0.8 The N layer contains 1.0 × 10 Si. 19 atoms / cm 3 Thereafter, a GaN layer 907 was epitaxially grown to a thickness of 7 μm in the same manner as in Example 1.

[0142] The dislocation density near the surface of the GaN layer 907 was measured in the same manner as in Example 1, and was found to be 2×10 8 cm -2 This was higher than that of the example. Thereafter, a GaN layer 909 was epitaxially grown to a thickness of 19 μm by HVPE to produce an epitaxial substrate for a vertical device. Furthermore, the dislocation density near the surface of the GaN layer 907 was measured in the same manner as in example 1, and was found to be 9×10 6 cm -2 was higher than that of the example.

[0143] This specification includes the following aspects: [1]: A method for producing a GaN epitaxial film, comprising: a preparation step of preparing a support substrate having a diameter of 150 mm or more and a thickness of less than 1 mm, the support substrate having a core made of nitride ceramic sealed with a sealing layer; a substrate production step of sequentially laminating a planarizing layer and a seed crystal layer made of SiC single crystal on the support substrate to obtain an epitaxial growth substrate; and an epitaxial step of growing a GaN epitaxial film having a thickness of 7 μm or more on the epitaxial growth substrate, thereby achieving a dislocation density of 1.0×10 6 / cm 2A method for manufacturing a GaN epitaxial film, characterized by manufacturing the following GaN epitaxial film. [2]: The method for manufacturing a GaN epitaxial film according to [1] above, wherein the epitaxial process comprises a formation step of forming island-shaped SiN layers and an ELO step of growing a GaN layer using the SiN layers as a mask, followed by a growth step of growing a GaN epitaxial film on the outermost SiN layer or the GaN layer. [3]: The method for manufacturing a GaN epitaxial film according to [2] above, wherein the epitaxial process comprises alternately performing the formation step and the ELO step. [4]: ​​The method for manufacturing a GaN epitaxial film according to any of [1] to [3] above, wherein the SiC single crystal has an off-angle of 0° to 4°. [5]: A method for manufacturing a semiconductor device, comprising: forming a device on the GaN epitaxial film manufactured by the method for manufacturing a GaN epitaxial film according to any one of [1] to [4] above; and then separating the device from the support substrate by etching the planarization layer.

[0144] The present invention is not limited to the above-described embodiments, which are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and that provides similar effects is included within the technical scope of the present invention.

Claims

1. A method for producing a GaN epitaxial film, comprising: a preparation step of preparing a support substrate having a diameter of 150 mm or more and a thickness of less than 1 mm, the support substrate having a core made of nitride ceramic sealed with a sealing layer; a substrate production step of sequentially laminating a planarization layer and a seed crystal layer made of a SiC single crystal on the support substrate to obtain a substrate for epitaxial growth; and an epitaxial step of growing a GaN epitaxial film having a thickness of 7 μm or more on the substrate for epitaxial growth, thereby achieving a dislocation density of 1.0×10 6 / cm 2 A method for producing a GaN epitaxial film, comprising the steps of:

2. A method for producing a GaN epitaxial film as described in claim 1, characterized in that the epitaxial process includes a formation step of forming an island-shaped SiN layer, an ELO step of growing a GaN layer using the SiN layer as a mask, and then a growth step of growing a GaN epitaxial film on the outermost SiN layer or GaN layer.

3. The method for producing a GaN epitaxial film according to claim 2, characterized in that in the epitaxial process, the formation step and the ELO step are performed alternately.

4. The method for producing a GaN epitaxial film according to claim 1, wherein the SiC single crystal has an off-angle of 0° to 4°.

5. A method for manufacturing a semiconductor device, comprising the steps of: forming a device on a GaN epitaxial film manufactured by the method for manufacturing a GaN epitaxial film according to any one of claims 1 to 4; and then separating the device from the supporting substrate by etching the planarizing layer.

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