Display device

Abstract

Provided is a display device (60) in which a TFT layer provided on a flexible base substrate includes at least one inorganic insulating film, a plurality of first wirings (18g) is formed so as to extend in parallel to each other in a display region (D), and a plurality of first wiring numbers (Na) indicating the arrangement order of the plurality of first wirings (18g) is provided in a frame region (F) around the display region (D) so as to correspond to the plurality of first wirings (18g). The plurality of first wiring numbers (Na) are connected to each other by connecting lines (C) provided along the periphery of the frame region (F), and the plurality of first wiring numbers (Na) and the connecting lines (C) include an inorganic insulating layer formed of the inorganic insulating film.

Description

display device

[0001] The present invention relates to a display device.

[0002] In recent years, self-luminous organic electroluminescence (EL) display devices using organic electroluminescence (EL) elements have been attracting attention as alternatives to liquid crystal display devices. Flexible organic EL display devices have been proposed, in which organic EL elements and the like are formed on a flexible resin substrate.

[0003] For example, Patent Document 1 discloses a flexible organic EL device in which protruding structures are formed using a photosensitive resin in the peripheral region outside the active region in order to prevent cracks that occur in the inorganic barrier layer from the dividing line from reaching the active region.

[0004] Japanese Patent Application Laid-Open No. 2020-194795

[0005] However, in the organic EL device disclosed in Patent Document 1, it is necessary to provide protruding structures in the peripheral region (frame region) simply to suppress the progression of cracks into the active region (display region), so there is room for improvement.

[0006] The present invention has been made in view of the above points, and an object of the present invention is to suppress the progression of cracks into the display area at low cost.

[0007] In order to achieve the above object, the display device of the present invention comprises a flexible base substrate, and a thin film transistor layer provided on the base substrate, including at least one inorganic insulating film, and having a plurality of first wirings formed thereon so as to extend parallel to each other in a display area, and is characterized in that a frame area surrounding the display area is provided with a plurality of first wiring numbers corresponding to the plurality of first wirings and indicating the arrangement order of the plurality of first wirings, and the plurality of first wiring numbers are connected to each other via connecting lines provided along the periphery of the frame area, and the plurality of first wiring numbers and the connecting lines include an inorganic insulating layer formed by the inorganic insulating film.

[0008] Furthermore, the display device according to the present invention comprises a flexible base substrate, and a thin-film transistor layer provided on the base substrate, including at least one inorganic insulating film, and having a plurality of first wirings formed in a display area so as to extend parallel to each other, and a plurality of first wiring numbers indicating the arrangement order of the plurality of first wirings are provided in a frame area surrounding the display area, corresponding to the plurality of first wirings, wherein each of the first wiring numbers is composed of a plurality of characters including an inorganic insulating layer formed by the inorganic insulating film, and at least a portion of the first wiring numbers are provided along a direction intersecting the extension direction of each of the first wirings, and adjacent pairs of first wiring numbers among the plurality of first wiring numbers are arranged so as to overlap when viewed from an edge of the base substrate along the pair of first wiring numbers to an inward direction perpendicular to the edge.

[0009] According to the present invention, the propagation of cracks into the display area can be suppressed at low cost.

[0010] FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention. FIG. 2 is a plan view of a display region of an organic EL display panel constituting the organic EL display device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view of an organic EL display panel constituting the organic EL display device according to the first embodiment of the present invention. FIG. 4 is an equivalent circuit diagram of a thin film transistor layer constituting the organic EL display panel of the organic EL display device according to the first embodiment of the present invention. FIG. 5 is a cross-sectional view showing an organic EL layer constituting the organic EL display panel of the organic EL display device according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view of a frame region of an organic EL display panel of the organic EL display device according to the first embodiment of the present invention. FIG. 7 is an enlarged plan view of a substrate edge in the frame region of an organic EL display panel constituting an organic EL display device according to a second embodiment of the present invention. FIG. 8 is an enlarged plan view of a substrate edge in the frame region of a first modified example of an organic EL display panel of an organic EL display device according to a second embodiment of the present invention. FIG. 9 is an enlarged plan view of a substrate edge in the frame region of a second modified example of an organic EL display panel of an organic EL display device according to the second embodiment of the present invention.

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.

[0012] First Embodiment FIGS. 1 to 6 show a first embodiment of a display device according to the present invention. In the following embodiments, an organic EL display device including an organic EL element layer is exemplified as a display device including a light-emitting element layer. FIG. 1 is a plan view showing a schematic configuration of an organic EL display device 60 according to this embodiment. FIG. 2 is a plan view of a display region D of an organic EL display panel 50a constituting the organic EL display device 60. FIG. 3 is a cross-sectional view of the organic EL display panel 50a. FIG. 4 is an equivalent circuit diagram of a thin-film transistor layer 30 constituting the organic EL display panel 50a. FIG. 5 is a cross-sectional view showing an organic EL layer 33 constituting the organic EL display panel 50a. FIG. 6 is a cross-sectional view of a frame region F of the organic EL display panel 50a.

[0013] As shown in FIG. 1, the organic EL display device 60 includes an organic EL display panel 50a and a flexible printed wiring board 55 mounted on a terminal portion T (to be described later) of the organic EL display panel 50a.

[0014] 1, the organic EL display panel 50a includes, for example, a rectangular display area D for displaying images, and a frame area F provided in a frame shape around the display area D. Note that, although the present embodiment illustrates a rectangular display area D, this rectangular shape also includes, for example, a substantially rectangular shape with arc-shaped sides, arc-shaped corners, or a shape with a notch in one of the sides.

[0015] In the display region D, a plurality of sub-pixels P are arranged in a matrix as shown in Fig. 2. In the display region D, for example, a sub-pixel P having a red light-emitting region Lr for displaying red, a sub-pixel P having a green light-emitting region Lg for displaying green, and a sub-pixel P having a blue light-emitting region Lb for displaying blue are provided adjacent to each other as shown in Fig. 2. In the display region D, one pixel is configured by, for example, three adjacent sub-pixels P having the red light-emitting region Lr, the green light-emitting region Lg, and the blue light-emitting region Lb.

[0016] 1, a terminal portion T is provided at the upper end of the frame region F so as to extend in one direction (the horizontal direction in the figure). Also, as shown in Fig. 1, a gate drive circuit Ma is monolithically provided in the frame region F along the left and right sides of the display region D in the figure. Also, as shown in Fig. 1, a source drive circuit Mb is monolithically provided in the frame region F along the top side of the display region D in the figure.

[0017] As shown in FIG. 3 , the organic EL display panel 50 a includes a resin substrate 10 provided as a flexible base substrate, a thin film transistor (hereinafter also referred to as “TFT”) layer 30 provided on the resin substrate 10, an organic EL element layer 40 provided as a light emitting element layer on the TFT layer 30, and a sealing film 45 provided on the organic EL element layer 40.

[0018] As shown in FIGS. 3 and 6 , the resin substrate 10 includes a first resin substrate layer 6 provided on the side opposite the TFT layer 30, a second resin substrate layer 8 provided on the TFT layer 30 side, and an intra-substrate inorganic insulating film 7 provided between the first resin substrate layer 6 and the second resin substrate layer 8. The first resin substrate layer 6 and the second resin substrate layer 8 are made of, for example, polyimide resin. The intra-substrate inorganic insulating film 7, the base coat film 11 (described later), the first gate insulating film 13, the first interlayer insulating film 15, the second gate insulating film 17, the second interlayer insulating film 19, and the protective insulating film 21 are made of, for example, a single layer or a multilayer film of an inorganic insulating film such as silicon nitride, silicon oxide, or silicon oxynitride. At least the first interlayer insulating film 15 and the second gate insulating film 17 on the side of the semiconductor layer 16 a (described later) are made of a silicon oxide film.

[0019] As shown in FIG. 3 , the TFT layer 30 includes a base coat film 11 provided on a resin substrate 10, a plurality of first in-pixel TFTs 9 a (see FIG. 4 ), a plurality of second in-pixel TFTs 9 b, a plurality of capacitors 9 c (see FIG. 4 ), and a plurality of extra-pixel TFTs 9 d provided on the base coat film 11, and a protective insulating film 21 and a planarizing film 22 provided in that order on each of the first in-pixel TFTs 9 a, each of the second in-pixel TFTs 9 b, each of the capacitors 9 c, and each of the extra-pixel TFTs 9 d. Here, as shown in FIG. 2 , in the TFT layer 30, a plurality of gate lines 18 g are provided as first wirings extending parallel to each other in the horizontal direction in the figure. Furthermore, as shown in FIG. 2 , in the TFT layer 30, a plurality of source lines 20 f are provided as second wirings extending parallel to each other in a direction intersecting (orthogonal to) the plurality of gate lines 18 g, i.e., in the vertical direction in the figure. 2, the TFT layer 30 is provided with a plurality of power supply lines 20g extending parallel to one another in the vertical direction in the drawing. Each power supply line 20g is adjacent to a corresponding source line 20f, as shown in FIG. 2. Each subpixel P in the TFT layer 30 is provided with a first in-pixel TFT 9a, a second in-pixel TFT 9b, and a capacitor 9c, as shown in FIG. 4. In the TFT layer 30, as shown in FIG. 3, the following are stacked in order on a resin substrate 10: a base coat film 11, a first semiconductor film that will become a semiconductor layer 12a (described later), a first gate insulating film 13, a first metal film that will become a gate electrode 14a (described later), a first interlayer insulating film 15, a second semiconductor film that will become a semiconductor layer 16a (described later), a second gate insulating film 17, a second metal film that will become gate lines 18g, etc., a second interlayer insulating film 19, a third metal film that will become source lines 20f, etc., a protective insulating film 21, and a planarizing film 22.

[0020] 4, the first in-pixel TFT 9a is electrically connected to a corresponding gate line 18g and source line 20f in each sub-pixel P. Similarly to the second in-pixel TFT 9b described later, the first in-pixel TFT 9a includes a semiconductor layer (16a), a gate electrode (18a), a source electrode (20a), and a drain electrode (20b).

[0021] 4, the second in-pixel TFT 9b is electrically connected to the corresponding first in-pixel TFT 9a and the power supply line 20g in each subpixel P. Also, as shown in Fig. 3, the second in-pixel TFT 9b includes a semiconductor layer 16a provided on the first interlayer insulating film 15, a gate electrode 18a provided on the semiconductor layer 16a via a second gate insulating film 17, and a source electrode 20a and a drain electrode 20b provided on the second interlayer insulating film 19 so as to be spaced apart from each other.

[0022] The semiconductor layer 16a is formed of an oxide semiconductor such as an In—Ga—Zn—O-based semiconductor, and includes a source region 16aa and a drain region 16ab spaced apart from each other, and a channel region 16ac defined between the source region 16aa and the drain region 16ab, as shown in FIG. The In—Ga—Zn—O-based semiconductor is a ternary oxide of In (indium), Ga (gallium), and Zn (zinc), and the proportions (composition ratios) of In, Ga, and Zn are not particularly limited. The In—Ga—Zn—O-based semiconductor may be amorphous or crystalline. A crystalline In—Ga—Zn—O-based semiconductor with a c-axis oriented generally perpendicular to the layer plane is preferred as the crystalline In—Ga—Zn—O-based semiconductor. Alternatively, the In—Ga—Zn—O-based semiconductor may contain other oxide semiconductors. Other oxide semiconductors include, for example, In—Sn—Zn—O-based semiconductors (e.g., In ２ O ３ -SnO ２ In—ZnO; InSnZnO). Here, the In—Sn—Zn—O based semiconductor is a ternary oxide of In (indium), Sn (tin), and Zn (zinc). Other oxide semiconductors include In—Al—Zn—O based semiconductors, In—Al—Sn—Zn—O based semiconductors, Zn—O based semiconductors, In—Zn—O based semiconductors, Zn—Ti—O based semiconductors, Cd—Ge—O based semiconductors, Cd—Pb—O based semiconductors, CdO (cadmium oxide), Mg—Zn—O based semiconductors, In—Ga—Sn—O based semiconductors, In—Ga—O based semiconductors, Zr—In—Zn—O based semiconductors, Hf—In—Zn—O based semiconductors, Al—Ga—Zn—O based semiconductors, Ga—Zn—O based semiconductors, In—Ga—Zn—Sn—O based semiconductors, InGaO３ (ZnO) ５ , magnesium zinc oxide (Mg ｘ Zn １－ｘ O), cadmium zinc oxide (Cd ｘ Zn １－ｘ The Zn—O-based semiconductor may be ZnO in an amorphous state, a polycrystalline state, a microcrystalline state in which the amorphous state and the polycrystalline state are mixed, or a semiconductor in which no impurity element is added, to which one or more impurity elements selected from the group 1 elements, the group 13 elements, the group 14 elements, the group 15 elements, the group 17 elements, etc. are added.

[0023] 3, the gate electrode 18a is provided so as to overlap the channel region 16ac of the semiconductor layer 16a, and is configured to control conduction between the source region 16aa and the drain region 16ab of the semiconductor layer 16a. Here, the gate electrode 18a is formed of a second metal film, similar to the gate line 18g.

[0024] 3, the source electrode 20a and the drain electrode 20b are electrically connected to the source region 16aa and the drain region 16ab of the semiconductor layer 16a, respectively, through contact holes formed in the second gate insulating film 17 and the second interlayer insulating film 19. Here, the source electrode 20a and the drain electrode 20b are formed of a third metal film, similar to the source line 20f and the power supply line 20g.

[0025] 4, in each subpixel P, the capacitor 9c is electrically connected to the corresponding first in-pixel TFT 9a and the power supply line 20g. Here, the capacitor 9c includes, for example, a lower conductive layer formed of a second metal film, an upper conductive layer formed of a third metal film, and a first interlayer insulating film 19 provided between the lower and upper conductive layers. The upper conductive layer is electrically connected to the power supply line 20g via a contact hole formed in the first interlayer insulating film 19.

[0026] The planarization film 22 has a flat surface in the display region D and is made of an organic resin material such as polyimide resin.

[0027] 3, the organic EL element layer 40 includes a plurality of organic EL elements 35 provided as a plurality of light-emitting elements so as to be arranged in a matrix on the TFT layer 20 in correspondence with a plurality of sub-pixels P. Here, the organic EL element 35 includes a first electrode 31a provided on the TFT layer 30, an organic EL layer 33 provided on the first electrode 31a, and a second electrode 34 provided on the organic EL layer 33, as shown in FIG.

[0028] As shown in FIG. 3 , the first electrode 31 a is electrically connected to the drain electrode 20 b of the second intra-pixel TFT 9 b of each subpixel P via a contact hole formed in the protective insulating film 21 and the planarizing film 22. The first electrode 31 a has a function of injecting holes (positive holes) into the organic EL layer 33. The first electrode 31 a is preferably formed of a material with a large work function to improve the efficiency of hole injection into the organic EL layer 33. Examples of materials that can be used to form the first electrode 31 a include metal materials such as silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), titanium (Ti), ruthenium (Ru), manganese (Mn), indium (In), ytterbium (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), and tin (Sn). The material constituting the first electrode 31a is, for example, astatine (At) / astatine oxide (AtO ２The first electrode 31a may be made of an alloy such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The first electrode 31a may be formed by stacking multiple layers of the above materials. Examples of compound materials with high work functions include indium tin oxide (ITO) and indium zinc oxide (IZO). The peripheral edge of the first electrode 31a is covered with an edge cover 32a arranged in a grid pattern over the entire display area D. The edge cover 32a is made of, for example, an organic resin material such as polyimide resin or acrylic resin, or a polysiloxane-based spin-on-glass (SOG) material. As shown in FIG. 3, a portion of the surface of the edge cover 32a protrudes upward and forms an island-shaped pixel photospacer.

[0029] As shown in FIG. 5, the organic EL layer 33 includes a hole injection layer 1, a hole transport layer 2, a light emitting layer 3, an electron transport layer 4, and an electron injection layer 5, which are stacked in this order on the first electrode 31a.

[0030] The hole injection layer 1 is also called an anode buffer layer, and has the function of bringing the energy levels of the first electrode 31a and the organic EL layer 33 closer to each other, thereby improving the efficiency of hole injection from the first electrode 31a to the organic EL layer 33. Examples of materials that form the hole injection layer 1 include triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives.

[0031] The hole transport layer 2 has a function of improving the efficiency of transporting holes from the first electrode 31a to the organic EL layer 33. Here, examples of materials constituting the hole transport layer 2 include porphyrin derivatives, aromatic tertiary amine compounds, styrylamine derivatives, polyvinylcarbazole, poly-p-phenylenevinylene, polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, zinc sulfide, and zinc selenide.

[0032] The light-emitting layer 3 is a region into which holes and electrons are injected from the first electrode 31 a and the second electrode 34, respectively, and where the holes and electrons recombine when a voltage is applied by the first electrode 31 a and the second electrode 34. Here, the light-emitting layer 3 is made of a material with high luminous efficiency. Examples of materials that can be used to form the light-emitting layer 3 include metal oxinoid compounds [8-hydroxyquinoline metal complexes], naphthalene derivatives, anthracene derivatives, diphenylethylene derivatives, vinylacetone derivatives, triphenylamine derivatives, butadiene derivatives, coumarin derivatives, benzoxazole derivatives, oxadiazole derivatives, oxazole derivatives, benzimidazole derivatives, thiadiazole derivatives, benzothiazole derivatives, styryl derivatives, styrylamine derivatives, bisstyrylbenzene derivatives, trisstyrylbenzene derivatives, perylene derivatives, perinone derivatives, aminopyrene derivatives, pyridine derivatives, rhodamine derivatives, aquidin derivatives, phenoxazone, quinacridone derivatives, rubrene, poly-p-phenylenevinylene, and polysilane.

[0033] The electron transport layer 4 has a function of efficiently transferring electrons to the light-emitting layer 3. Examples of materials constituting the electron transport layer 4 include organic compounds such as oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinodimethane derivatives, diphenoquinone derivatives, fluorenone derivatives, silole derivatives, and metal oxinoid compounds.

[0034] The electron injection layer 5 has a function of bringing the energy levels of the second electrode 34 and the organic EL layer 33 closer to each other and improving the efficiency of electron injection from the second electrode 34 to the organic EL layer 33, and this function can reduce the driving voltage of the organic EL element 35. The electron injection layer 5 is also called a cathode buffer layer. Here, examples of materials constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF ２ ), calcium fluoride (CaF ２ ), strontium fluoride (SrF ２ ), barium fluoride (BaF ２ inorganic alkali compounds such as aluminum oxide (Al ２ O ３ ), strontium oxide (SrO), etc.

[0035] As shown in FIG. 3 , the second electrode 34 is provided in common to all subpixels P so as to cover each organic EL layer 33 and the edge cover 32 a. The second electrode 34 has a function of injecting electrons into the organic EL layer 33. To improve the efficiency of electron injection into the organic EL layer 33, the second electrode 34 is preferably made of a material with a small work function. Examples of materials that can be used for the second electrode 34 include silver (Ag), aluminum (Al), vanadium (V), calcium (Ca), titanium (Ti), yttrium (Y), sodium (Na), manganese (Mn), indium (In), magnesium (Mg), lithium (Li), ytterbium (Yb), and lithium fluoride (LiF). Examples of materials that can be used for the second electrode 34 include magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), and astatine (At) / astatine oxide (AtO). ２ The second electrode 34 may be formed of an alloy such as lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), or lithium fluoride (LiF) / calcium (Ca) / aluminum (Al). The second electrode 34 may be formed of a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The second electrode 34 may be formed by stacking multiple layers made of the above materials. Examples of materials with a low work function include magnesium (Mg), lithium (Li), lithium fluoride (LiF), magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), and lithium fluoride (LiF) / calcium (Ca) / aluminum (Al).

[0036] 3 and 6 , the sealing film 45 is provided so as to cover the second electrode 34, and includes a first inorganic sealing film 41, an organic sealing film 42, and a second inorganic sealing film 43 laminated in this order on the second electrode 34, and has the function of protecting the organic EL layer 33 of the organic EL element 35 from moisture, oxygen, etc. Here, the first inorganic sealing film 41 and the second inorganic sealing film 43 are made of inorganic insulating films such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film. Moreover, the organic sealing film 42 is made of an organic resin material such as an acrylic resin, an epoxy resin, a silicone resin, a polyurea resin, a parylene resin, a polyimide resin, or a polyamide resin.

[0037] 3, the organic EL display panel 50a includes a plurality of peripheral photo-spacers 32b arranged in an island shape on the planarization film 22 in the frame region F, with a conductive layer 31b interposed therebetween, so as to protrude upward in the figure. Each peripheral photo-spacer 32b is formed in the same layer and made of the same material as the edge cover 32a. The conductive layer 31b is also formed in the same layer and made of the same material as the first electrode 31a.

[0038] As shown in FIGS. 3 and 6, the organic EL display panel 50a also includes, in the frame region F, a plurality of extra-pixel TFTs 9d that constitute the gate drive circuit Ma and the source drive circuit Mb.

[0039] As shown in Figures 3 and 6, the extra-pixel TFT 9d comprises a semiconductor layer 12a provided on a base coat film 11, a gate electrode 14a provided on the semiconductor layer 12a via a first gate insulating film 13, and a source electrode 20c and a drain electrode 20d provided on a second interlayer insulating film 19 so as to be spaced apart from each other.

[0040] The semiconductor layer 12a is formed of polysilicon such as LTPS (low temperature polysilicon), and as shown in FIG. 3, includes a source region 12aa and a drain region 12ab that are defined to be spaced apart from each other, and a channel region 12ac that is defined between the source region 12aa and the drain region 12ab.

[0041] 3, the gate electrode 14a is provided so as to overlap the channel region 12ac of the semiconductor layer 12a, and is configured to control conduction between the source region 12aa and the drain region 12ab of the semiconductor layer 12a. Here, the gate electrode 14a is formed of a first metal film.

[0042] 3, the source electrode 20c and the drain electrode 20d are electrically connected to the source region 12aa and the drain region 12ab of the semiconductor layer 12a, respectively, via contact holes formed in the first gate insulating film 13, the second interlayer insulating film 15, the second gate insulating film 17, and the second interlayer insulating film 19. Here, the source electrode 20c and the drain electrode 20d are formed of a third metal film, similar to the source line 20f, the power supply line 20g, the source electrode 20a, and the drain electrode 20b.

[0043] 6, the organic EL display panel 50a includes a first damming wall 22d provided in a frame shape in the frame region F so as to surround the display region D, and a second damming wall 22e provided in a frame shape around the first damming wall 22d. Here, the first damming wall 22d and the second damming wall 22e are formed in the same layer and made of the same material as the planarizing film 22. As shown in FIG. 6, the first damming wall 22d is provided so as to overlap the outer peripheral edge of the organic sealing film 42 of the sealing film 45, and is configured to suppress the spread of ink that will become the organic sealing film 42.

[0044] As shown in FIG. 1, the organic EL display panel 50a also has, in the frame region F, a plurality of first wiring numbers Na corresponding to a plurality of gate lines 18g and a plurality of second wiring numbers Nb corresponding to a plurality of source lines 20f.

[0045] The first wiring number Na is composed of a plurality of characters, such as a four-digit number, as shown in FIG. 1, and indicates the arrangement order of the plurality of gate lines 18g for quality analysis, etc. Furthermore, as shown in FIG. 1, the first wiring number Na is provided along the direction in which each gate line 18g extends. Note that the first wiring number Na may also be provided along a direction intersecting the direction in which each gate line 18g extends. Furthermore, as shown in FIG. 1, the first wiring number Na corresponding to each gate line 18g is provided on both sides (the right and left sides in the drawing) of the direction in which each gate line 18g extends. 6, the first wiring number Na appropriately includes a semiconductor layer 12n formed in the same layer as the semiconductor layer 12a using the same material, an inorganic insulating layer 13n formed in the same layer as the first gate insulating film 13 using the same material, an inorganic insulating layer 15n formed in the same layer as the first interlayer insulating film 15 using the same material, a semiconductor layer 16n formed in the same layer as the semiconductor layer 16a using the same material, an inorganic insulating layer 17n formed in the same layer as the second gate insulating film 17 using the same material, an inorganic insulating layer 19n formed in the same layer as the second interlayer insulating film 19 using the same material, and an inorganic insulating layer 21n formed in the same layer as the protective insulating film 21. Note that in the first wiring number Na, the combinations of the semiconductor layer 12n, the inorganic insulating layer 13n, the inorganic insulating layer 15n, the semiconductor layer 16n, the inorganic insulating layer 17n, the inorganic insulating layer 19n, and the inorganic insulating layer 21n can be selected or omitted, and some of them may be omitted.

[0046] The second wiring number Nb is composed of multiple characters, such as a four-digit number, as shown in FIG. 1, and indicates the arrangement order of multiple source lines 20f for quality analysis, etc. Also, as shown in FIG. 1, the second wiring number Nb is provided along the direction in which each source 20f extends. The second wiring number Nb may also be provided along a direction intersecting the direction in which each source 20f extends. Also, as shown in FIG. 1, the second wiring number Nb corresponding to each source 20f is provided on one side of the direction in which each source 20f extends (the lower side in the figure). Here, as with the first wiring number Na, as shown in FIG. 6, the second wiring number Na appropriately includes a semiconductor layer 12n, an inorganic insulating layer 13n, an inorganic insulating layer 15n, a semiconductor layer 16n, an inorganic insulating layer 17n, an inorganic insulating layer 19n, and an inorganic insulating layer 21n. In addition, in the second wiring number Nb, the combination of semiconductor layer 12n, inorganic insulating layer 13n, inorganic insulating layer 15n, semiconductor layer 16n, inorganic insulating layer 17n, inorganic insulating layer 19n and inorganic insulating layer 21n can be selected or omitted, and some may be omitted.

[0047] The multiple numbers in each first wiring number Na and the multiple numbers in each second wiring number Nb are connected via multiple connecting lines C arranged in a rectangular frame shape along the periphery of the frame region F, as shown in Figure 1.

[0048] As shown in FIG. 1 , the width of the connecting line C at its corners is thicker than the width of the remaining portions. Here, the connecting line C includes semiconductor layers 12n, inorganic insulating layers 13n, inorganic insulating layers 15n, semiconductor layers 16n, inorganic insulating layers 17n, inorganic insulating layers 19n, and inorganic insulating layers 21n, as appropriate, in the same manner as the first wiring number Na and second wiring number Nb. Note that the combination of the semiconductor layers 12n, inorganic insulating layers 13n, inorganic insulating layers 15n, semiconductor layers 16n, inorganic insulating layers 17n, inorganic insulating layers 19n, and inorganic insulating layers 21n in the connecting line C can be selected or omitted, and some of them may be omitted.

[0049] The first wiring number Na, second wiring number Nb and connecting line C in the above configuration are not only used for analyzing quality, etc., but also, due to their annular structure surrounding the display area D, can stop cracks that occur at the substrate edge E due to, for example, the division of the resin substrate 10, thereby suppressing the progression of cracks to the display area D and improving water resistance reliability.

[0050] The organic EL display device 60 described above is configured so that, in each subpixel P, a gate signal is input to the first in-pixel TFT 9 a via the gate line 18 g to turn the first in-pixel TFT 9 a on, a data signal is written to the gate electrode 18 a and capacitor 9 c of the second in-pixel TFT 9 b via the source line 20 f, and a current from the power supply line 20 g corresponding to the gate voltage of the second in-pixel TFT 9 b is supplied to the organic EL layer 33, causing the light-emitting layer 3 of the organic EL layer 33 to emit light, thereby displaying an image. Note that in the organic EL display device 60, even if the first in-pixel TFT 9 a is turned off, the gate voltage of the second in-pixel TFT 9 b is held by the capacitor 9 c, so that light emission by the light-emitting layer 3 is maintained until the gate signal for the next frame is input.

[0051] Next, a method for manufacturing the organic EL display device 60 of this embodiment will be described. The method for manufacturing the organic EL display device 60 of this embodiment includes a TFT layer forming step, an organic EL element layer forming step, a sealing film forming step, and a mounting step.

[0052] <TFT Layer Forming Process> First, for example, a non-photosensitive polyimide resin (about 6 μm thick) is applied onto a glass substrate, and then the applied film is pre-baked and post-baked to form a first resin substrate layer 6.

[0053] Next, an inorganic insulating film (approximately 500 nm thick) such as a silicon oxide film is formed on the substrate surface on which the first resin substrate layer 6 is formed, for example, by plasma CVD (chemical vapor deposition), thereby forming an intra-substrate inorganic insulating film 7.

[0054] Furthermore, for example, a non-photosensitive polyimide resin (thickness: about 6 μm) is applied to the substrate surface on which the intra-substrate inorganic insulating film 7 is formed, and then the applied film is pre-baked and post-baked to form a second resin substrate layer 8, thereby forming a resin substrate 10.

[0055] Then, a silicon nitride film (thickness: about 50 nm) and a silicon oxide film (thickness: about 250 nm) are sequentially formed on the resin substrate 10 formed on the glass substrate, for example, by plasma CVD, thereby forming a base coat film 11.

[0056] Next, an amorphous silicon film (about 50 nm thick) is formed on the substrate surface on which the base coat film 11 has been formed, for example, by plasma CVD, and the amorphous silicon film is crystallized by laser annealing or the like to form a first conductor film made of polysilicon.Then, the first semiconductor film is patterned to form semiconductor layers 12a and the like.

[0057] Thereafter, a silicon oxide film (about 100 nm thick) is formed by, for example, plasma CVD on the surface of the substrate on which the semiconductor layer 12a and the like are formed, thereby forming the first gate insulating film 13.

[0058] Furthermore, a first metal film such as a molybdenum film (thickness: about 200 nm) is formed on the surface of the substrate on which the second gate insulating film 13 is formed, for example, by sputtering, and then the first metal film is patterned to form the gate electrode 14 a.

[0059] Subsequently, the semiconductor layer 12a is doped with impurity ions using the gate electrode 14a as a mask to make a part of the semiconductor layer 12a conductive, thereby forming a source region 12aa, a drain region 12ab, and a channel region 12ac in the semiconductor layer 12a.

[0060] Thereafter, a silicon nitride film (about 150 nm thick) and a silicon oxide film (about 100 nm thick) are sequentially formed on the substrate surface where a portion of the semiconductor layer 12a has been made conductive, for example, by plasma CVD, thereby forming a first interlayer insulating film 15.

[0061] Furthermore, on the surface of the substrate on which the first interlayer insulating film 15 is formed, InGaZnO ４ After forming a second semiconductor film made of an oxide semiconductor such as a film (thickness: about 30 nm), the second semiconductor film is patterned to form the semiconductor layer 16a and the like.

[0062] Subsequently, a silicon oxide film (about 100 nm thick) is formed by, for example, plasma CVD on the surface of the substrate on which the semiconductor layer 16a and the like are formed, thereby forming the second gate insulating film 17.

[0063] Thereafter, a second metal film such as a molybdenum film (about 200 nm thick) is formed on the surface of the substrate on which the second gate insulating film 17 has been formed, for example, by sputtering, and then the second metal film is patterned to form the gate electrode 18a, the gate line 18g, etc.

[0064] Furthermore, on the substrate surface on which the gate electrode 18a and the like are formed, a silicon oxide film (about 300 nm thick) and a silicon nitride film (about 150 nm thick) are sequentially formed by, for example, plasma CVD to form a second interlayer insulating film 19. Note that by heat treatment after the formation of the second interlayer insulating film 19, part of the semiconductor layer 16a is made conductive, and a source region 16aa, a drain region 16ab, and a channel region 16ac are formed in the semiconductor layer 16a.

[0065] Next, on the substrate surface on which the second interlayer insulating film 19 has been formed, the first gate insulating film 13, the first interlayer insulating film 15, the second gate insulating film 17, and the second interlayer insulating film 19 are appropriately patterned to form contact holes.

[0066] Thereafter, a titanium film (about 50 nm thick), an aluminum film (about 400 nm thick), and a titanium film (about 200 nm thick) are sequentially formed by, for example, sputtering on the surface of the substrate on which the contact holes have been formed, to form a third metal film, and then the third metal film is patterned to form a source electrode 20a, a drain electrode 20b, a source electrode 20c, a drain electrode 20d, a source line 20f, a power line 20g, and the like.

[0067] Furthermore, a silicon oxide film (with a thickness of about 250 nm) is formed on the substrate surface on which the source electrode 20a and the like are formed, for example, by plasma CVD, and then the silicon oxide film is patterned to form the protective insulating film 21 and the inorganic insulating layer 21n. At the same time, semiconductor layer 12n, inorganic insulating layer 13n, inorganic insulating layer 15n, semiconductor layer 16n, inorganic insulating layer 17n, and inorganic insulating layer 19n are appropriately formed below the inorganic insulating layer 21n, thereby forming the first wiring number Na, the second wiring number Nb, and the connecting line C.

[0068] Next, an acrylic photosensitive resin film (about 2 μm thick) is applied to the substrate surface on which the protective insulating film 21 etc. has been formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed and post-baked to form a planarization film 22 having contact holes, a first dam wall 22d, a second dam wall 22e etc.

[0069] Finally, the protective insulating film 21 exposed from the contact hole in the planarizing film 22 is removed to make the contact hole reach the drain electrode 20d of the second intra-pixel TFT 9b.

[0070] In this manner, the TFT layer 30 can be formed.

[0071] <Organic EL element layer forming process> On the planarization film 22 of the TFT layer 30 formed in the TFT layer forming process, a first electrode 31 a, an edge cover 32 a, an organic EL layer 33 (hole injection layer 1, hole transport layer 2, light-emitting layer 3, electron transport layer 4, electron injection layer 5), and a second electrode 34 are formed by using a well-known method, thereby forming an organic EL element layer 40.

[0072] <Sealing film forming process> First, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed by plasma CVD using a mask on the surface of the substrate on which the organic EL element layer 40 formed in the organic EL element layer forming process is formed, thereby forming a first inorganic sealing film 41.

[0073] Subsequently, an organic resin material such as an acrylic resin is deposited by, for example, an inkjet method on the surface of the substrate on which the first inorganic sealing film 41 has been formed, to form an organic sealing film 42 .

[0074] Finally, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is deposited by plasma CVD using a mask on the substrate on which the organic sealing film 42 has been formed, thereby forming a second inorganic sealing film 43 and forming a sealing film 45.

[0075] <Mounting process> First, a protective sheet (not shown) is attached to the substrate surface on which the sealing film 45 is formed, and then laser light is irradiated from the glass substrate side of the resin substrate 10 to peel the glass substrate from the underside of the resin substrate 10, and further, a protective sheet (not shown) is attached to the underside of the resin substrate 10 from which the glass substrate has been peeled.

[0076] Next, the mother substrate on which the (multiple) organic EL display panels (50a) manufactured by the above-mentioned processes are arranged in a matrix is ​​cut, for example, with laser light to cut out the organic EL display panels 50a individually and separate them into individual pieces.

[0077] Finally, an ACF is placed on the terminal portion T of the individualized organic EL display panel 50a, and then the flexible printed wiring board 55 is mounted by crimping the flexible printed wiring board 55 through the ACF (anisotropic conductive film).

[0078] In this manner, the organic EL display device 60 of this embodiment can be manufactured.

[0079] As described above, in the organic EL display device 60 of this embodiment, a plurality of first wiring numbers Na and a plurality of second wiring numbers Nb indicating the arrangement order of the plurality of gate lines 18g and the plurality of source lines 20f are provided in the frame region F around the display region D. The plurality of first wiring numbers Na and the plurality of second wiring numbers Nb are connected to one another via connecting lines C provided along the periphery of the frame region F, and the plurality of first wiring numbers Na, the plurality of second wiring numbers Nb, and the connecting lines C are integrally formed by appropriately stacking the semiconductor layer 12n, the inorganic insulating layer 13n, the inorganic insulating layer 15n, the semiconductor layer 16n, the inorganic insulating layer 17n, the inorganic insulating layer 19n, and the inorganic insulating layer 21n. As a result, a connected body of a plurality of first wiring numbers Na and a plurality of second wiring numbers Nb, which are formed by appropriately stacking semiconductor layers 12n, inorganic insulating layers 13n, inorganic insulating layers 15n, semiconductor layers 16n, inorganic insulating layers 17n, inorganic insulating layers 19n, and inorganic insulating layers 21n, is arranged to surround the display area D. Therefore, even if a crack occurs at the substrate edge E due to, for example, division of the resin substrate 10, the crack can be stopped by the connected body of a plurality of first wiring numbers Na and a plurality of second wiring numbers Nb. Moreover, the plurality of first wiring numbers Na and the plurality of second wiring numbers Nb can not only stop a crack that occurs at the substrate edge E due to, for example, division of the resin substrate 10, but can also be used to analyze quality, etc., and therefore, the progression of the crack toward the display area D can be suppressed at low cost.

[0080] Second Embodiment Figures 7 to 9 show a second embodiment of a display device according to the present invention. Fig. 7 is an enlarged plan view of a substrate edge E in a frame region F of an organic EL display panel 50b constituting the organic EL display device of this embodiment. Also, Figs. 8 and 9 are enlarged plan views of a substrate edge E in a frame region F of organic EL display panels 50ba and 50bb as first and second modifications of the organic EL display panel 50b. In the following embodiments, the same components as those in Figs. 1 to 6 are designated by the same reference numerals, and detailed descriptions thereof will be omitted.

[0081] In the first embodiment described above, an organic EL display device 60 is illustrated as having an organic EL display panel 50a in which a plurality of first wiring numbers Na and a plurality of second wiring numbers Nb are connected, whereas in the present embodiment, an organic EL display device is illustrated as having an organic EL display panel 50b in which a plurality of first wiring numbers Na and a plurality of second wiring numbers Nb are not connected.

[0082] The organic EL display device of this embodiment includes an organic EL display panel 50b and a flexible printed wiring board 55 mounted on a terminal portion T of the organic EL display panel 50b.

[0083] The organic EL display panel 50b, like the organic EL display panel 50a of the first embodiment, includes, for example, a rectangular display area D for displaying images, and a frame area F arranged in a frame shape around the display area D.

[0084] Similarly to the organic EL display panel 50a of the first embodiment, the organic EL display panel 50b includes a resin substrate 10 provided as a flexible base substrate, a TFT layer 30 provided on the resin substrate 10, an organic EL element layer 40 provided as a light-emitting element layer on the TFT layer 30, and a sealing film 45 provided on the organic EL element layer 40.

[0085] Furthermore, similar to the organic EL display panel 50a of the first embodiment, the organic EL display panel 50b includes a plurality of peripheral photospacers 32b arranged in an island shape on the planarization film 22 via a conductive layer 31b.

[0086] Similarly to the organic EL display panel 50a of the first embodiment, the organic EL display panel 50b includes, in the frame region F, a plurality of extra-pixel TFTs 9d that constitute the gate drive circuit Ma and the source drive circuit Mb.

[0087] Furthermore, like the organic EL display panel 50a of the first embodiment described above, the organic EL display panel 50b is provided with a first dam wall 22d arranged in a frame shape to surround the display area D in the frame area F, and a second dam wall 22e arranged in a frame shape around the first dam wall 22d.

[0088] Furthermore, like the organic EL display panel 50a of the first embodiment described above, the organic EL display panel 50b has, in the frame region F, a plurality of first wiring numbers Na corresponding to a plurality of gate lines 18g and a plurality of second wiring numbers Nb corresponding to a plurality of source lines 20f.

[0089] The first wiring number Na is, for example, as shown in FIG. 7 , composed of multiple characters such as four-digit numbers and indicates the arrangement order of the multiple gate lines 18g for quality analysis, etc. Furthermore, as shown in FIG. 7 , the first wiring number Na is arranged entirely along a direction intersecting the extension direction of each gate line 18g. Furthermore, as shown in FIG. 7 , adjacent pairs of first wiring numbers Na among the multiple first wiring numbers Na are arranged to overlap when viewed from the substrate edge E of the resin substrate 10 along the pair of first wiring numbers Na toward the inside direction perpendicular to the substrate edge E. Specifically, as shown in FIG. 7 , the last two digits "01" of the first wiring number Na "0001" overlap the first two digits "00" of the adjacent first wiring number Na "0002" when viewed from the right side in the figure. Furthermore, the first wiring number Na corresponding to each gate line 18g is arranged on both sides of the extension direction of each gate line 18g. Here, the first wiring number Na includes semiconductor layer 12n, inorganic insulating layer 13n, inorganic insulating layer 15n, semiconductor layer 16n, inorganic insulating layer 17n, inorganic insulating layer 19n, and inorganic insulating layer 21n as appropriate, as in the first embodiment. Note that, as in the first embodiment, in the first wiring number Na, the combination of semiconductor layer 12n, inorganic insulating layer 13n, inorganic insulating layer 15n, semiconductor layer 16n, inorganic insulating layer 17n, inorganic insulating layer 19n, and inorganic insulating layer 21n can be selected or omitted, and some of them may be omitted.

[0090] The second wiring number Nb is composed of multiple characters, such as a four-digit number, as shown in FIG. 7, and indicates the arrangement order of the multiple source lines 20f for quality analysis, etc. Furthermore, as shown in FIG. 7, the second wiring number Nb is arranged entirely along a direction intersecting the direction in which each source 20f extends. Furthermore, as shown in FIG. 7, adjacent pairs of second wiring numbers Nb among the multiple second wiring numbers Nb are arranged to overlap when viewed from the substrate edge E of the resin substrate 10 along the pair of second wiring numbers Nb toward the inner direction perpendicular to the substrate edge E. Furthermore, the second wiring number Nb corresponding to each source 20f is arranged on one side in the direction in which each source 20f extends. Here, like the first wiring number Na, the second wiring number Na appropriately includes a semiconductor layer 12n, an inorganic insulating layer 13n, an inorganic insulating layer 15n, a semiconductor layer 16n, an inorganic insulating layer 17n, an inorganic insulating layer 19n, and an inorganic insulating layer 21n. As in the first embodiment described above, in the second wiring number Nb, the combination of semiconductor layer 12n, inorganic insulating layer 13n, inorganic insulating layer 15n, semiconductor layer 16n, inorganic insulating layer 17n, inorganic insulating layer 19n and inorganic insulating layer 21n can be selected or omitted, and some may be omitted.

[0091] In this embodiment, an organic EL display panel 50b is illustrated in which the extension direction of the formation region Rn of the first wiring number Na and the second wiring number Nb intersects with the substrate edge E at a relatively low acute angle (approximately 30°), but the organic EL display panel 50ba may also be configured in which the extension direction of the formation region Rn of the first wiring number Na and the second wiring number Nb intersects with the substrate edge E at a relatively high acute angle (approximately 60°).

[0092] 8, in the organic EL display panel 50ba, a pair of adjacent first wiring numbers Na (second wiring numbers Nb) among the plurality of first wiring numbers Na (second wiring numbers Nb) are arranged to overlap when viewed from the substrate edge E of the resin substrate 10 along the pair of first wiring numbers Na (second wiring numbers Nb) to the inside direction perpendicular to the substrate edge E. Specifically, as shown in FIG. 8, the last digit "1" of the first wiring number Na (second wiring number Nb) "0001" is arranged to overlap the first digit "0" of the adjacent first wiring number Na (second wiring number Nb) "0002" when viewed from the right side in the figure.

[0093] In addition, in this embodiment, an organic EL display panel 50b is exemplified in which the entire first wiring number Na and the second wiring number Nb are arranged along a direction intersecting the extension direction of each source 20f, but an organic EL display panel 50bb may also be used in which a portion of the first wiring number Na and the second wiring number Nb are arranged along a direction intersecting the extension direction of each source 20f.

[0094] In the organic EL display panel 50bb, as shown in Fig. 9, some (the hundreds and tens digits) of the first wiring numbers Na (second wiring numbers Nb) are arranged along a direction intersecting the direction in which each gate line 18g (each source line 20f) extends. In the organic EL display panel 50bb, as shown in Fig. 9, the last two digits "01" of the first wiring number Na (second wiring number Nb) "0001" are arranged so as to overlap the first two digits "00" of the adjacent first wiring number Na (second wiring number Nb) "0002", when viewed from the right side of the figure. Furthermore, the last two digits "01" of the first wiring number Na (second wiring number Nb) "0001" are arranged so as to overlap the first two digits "00" of the first wiring number Na (second wiring number Nb) "0002", when viewed from the right side of the figure.

[0095] The first wiring number Na and second wiring number Nb in the above configuration are not only used for analyzing quality, etc., but also, due to their annular structure surrounding the display area D, can stop cracks that occur at the edge E of the substrate due to, for example, the division of the resin substrate 10, thereby suppressing the progression of cracks to the display area D and improving water resistance reliability.

[0096] An organic EL display device including the organic EL display panel 50b having the above-described configuration is flexible, similar to the organic EL display device 60 of the first embodiment, and displays an image by appropriately causing the light-emitting layer 3 of the organic EL layer 33 to emit light in each sub-pixel P via the first intra-pixel TFT 9a and the second intra-pixel TFT 9b.

[0097] An organic EL display device including the organic EL display panel 50b of this embodiment can be manufactured by omitting the connecting line C and changing the pattern shapes of the first wiring number Na and the second wiring number Nb in the manufacturing method of the organic EL display device 60 of the first embodiment described above.

[0098] As described above, in an organic EL display device including the organic EL display panel 50b of this embodiment, a plurality of first wiring numbers Na and a plurality of second wiring numbers Nb are provided in the frame region F surrounding the display region D, corresponding to a plurality of gate lines 18g and a plurality of source lines 20f, and indicate their arrangement. Here, each of the first wiring numbers Na and each of the second wiring numbers Nb is composed of a plurality of numerals integrally formed by appropriately stacking the semiconductor layer 12n, the inorganic insulating layer 13n, the inorganic insulating layer 15n, the semiconductor layer 16n, the inorganic insulating layer 17n, the inorganic insulating layer 19n, and the inorganic insulating layer 21n, and at least a portion of each of the first wiring numbers Na and each of the second wiring numbers Nb is provided along a direction intersecting the extension direction of each of the gate lines 18g and the source lines 20f. Among the plurality of first wiring numbers Na (second wiring numbers Nb), adjacent pairs of first wiring numbers Na (second wiring numbers Nb) are arranged to overlap when viewed in an inward direction perpendicular to the substrate edge E along the pair of first wiring numbers Na (second wiring numbers Nb). As a result, a plurality of first wiring numbers Na and a plurality of second wiring numbers Nb formed by appropriately stacking semiconductor layers 12n, inorganic insulating layers 13n, inorganic insulating layers 15n, semiconductor layers 16n, inorganic insulating layers 17n, inorganic insulating layers 19n, and inorganic insulating layers 21n are arranged to surround the display region D. Therefore, even if a crack occurs at the substrate edge E due to, for example, division of the resin substrate 10, the crack can be stopped by the plurality of first wiring numbers Na and the plurality of second wiring numbers Nb. Moreover, the plurality of first wiring numbers Na and the plurality of second wiring numbers Nb are not only able to stop cracks that have occurred at the substrate edge E due to, for example, division of the resin substrate 10, but are also used to analyze quality, etc., so that the progression of cracks to the display region D can be suppressed at low cost.

[0099] Other Embodiments In the above-described embodiments, the organic EL layer has a five-layer laminated structure including a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. However, the organic EL layer may have a three-layer laminated structure including, for example, a hole injection layer / hole transport layer, a light-emitting layer, and an electron transport layer / electron injection layer.

[0100] In addition, in each of the above embodiments, an organic EL display device in which the first electrode is an anode and the second electrode is a cathode is exemplified, but the present invention can also be applied to an organic EL display device in which the layered structure of the organic EL layer is reversed, and the first electrode is a cathode and the second electrode is an anode.

[0101] Furthermore, in each of the above embodiments, an organic EL display device is exemplified in which the electrode of the TFT connected to the first electrode is used as the drain electrode, but the present invention can also be applied to an organic EL display device in which the electrode of the TFT connected to the first electrode is called the source electrode.

[0102] Furthermore, in each of the above embodiments, an organic EL display device has been exemplified as a display device, but the present invention can be applied not only to a liquid crystal display device but also to a display device including a plurality of light-emitting elements driven by current, and can also be applied to, for example, a display device including a QLED (Quantum-dot light emitting diode), which is a light-emitting element using a quantum dot-containing layer.

[0103] As described above, the present invention is useful for flexible display devices.

[0104] C Connecting line D Display area F Frame area Na First wiring number Nb Second wiring number P Sub-pixel 10 Resin substrate (base substrate) 11 Base coat film (inorganic insulating film) 12n Semiconductor layer 13 First gate insulating film (inorganic insulating film) 15 First interlayer insulating film (inorganic insulating film) 16n Semiconductor layer 17 Second gate insulating film (inorganic insulating film) 18g Gate line (first wiring) 19 Second interlayer insulating film (inorganic insulating film) 20f Source line (second wiring) 21 Protective insulating film (inorganic insulating film) 30 TFT layer (thin film transistor layer) 35 Organic EL element (organic electroluminescence element, light-emitting element) 40 Light-emitting element layer 45 Sealing film 60 Organic EL display device

Claims

1. A display device comprising: a flexible base substrate; and a thin film transistor layer provided on the base substrate, the thin film transistor layer including at least one inorganic insulating film, the thin film transistor layer having a plurality of first wirings formed thereon so as to extend parallel to one another in a display area; and a frame area surrounding the display area is provided with a plurality of first wiring numbers corresponding to the plurality of first wirings and indicating the arrangement order of the plurality of first wirings, the plurality of first wiring numbers being connected to one another via connecting lines provided along the periphery of the frame area, the plurality of first wiring numbers and the connecting lines including an inorganic insulating layer formed by the inorganic insulating film.

2. A display device according to claim 1, characterized in that each of the first wiring numbers is composed of a plurality of characters, a plurality of the connecting lines are provided corresponding to the plurality of characters, and the plurality of characters in each of the first wiring numbers are connected via the plurality of connecting lines.

3. A display device according to claim 2, characterized in that each of the first wiring numbers is provided along the direction in which each of the first wirings extends or along a direction intersecting the direction in which each of the first wirings extends.

4. A display device according to any one of claims 1 to 3, wherein the connecting lines are arranged in a rectangular frame shape, and the line width of the corners of the connecting lines is wider than the line width of the other parts of the connecting lines.

5. A display device according to any one of claims 1 to 4, characterized in that the thin film transistor layer includes a semiconductor film laminated on the inorganic insulating film, and the plurality of first wiring numbers and the connecting lines include a semiconductor layer formed by the semiconductor film.

6. A display device according to any one of claims 1 to 5, characterized in that the first wiring numbers corresponding to each of the first wirings are provided on both sides in the direction in which each of the first wirings extends.

7. A display device according to any one of claims 1 to 6, characterized in that the thin film transistor layer is provided with a plurality of second wirings extending parallel to each other in a direction intersecting the plurality of first wirings in the display area, the frame area is provided with a plurality of second wiring numbers corresponding to the plurality of second wirings and indicating the arrangement order of the plurality of second wirings, and the plurality of second wiring numbers include an inorganic insulating layer formed by the inorganic insulating film and are connected to each other via the connecting lines.

8. A display device according to claim 7, characterized in that the second wiring numbers corresponding to the respective second wirings are provided on one side in the direction in which the respective second wirings extend.

9. A display device according to claim 7 or 8, wherein each of the first wirings is a gate line, and each of the second wirings is a source line.

10. A display device comprising: a flexible base substrate; and a thin film transistor layer provided on the base substrate, including at least one inorganic insulating film, and having a plurality of first wirings formed in a display area so as to extend parallel to each other; wherein a plurality of first wiring numbers indicating the arrangement order of the plurality of first wirings are provided in a frame area surrounding the display area in correspondence with the plurality of first wirings, wherein each of the first wiring numbers is composed of a plurality of characters including an inorganic insulating layer formed by the inorganic insulating film, and at least a portion of the first wiring numbers are provided along a direction intersecting the extension direction of each of the first wirings; and a pair of adjacent first wiring numbers among the plurality of first wiring numbers are provided so as to overlap when viewed from an edge of the base substrate along the pair of first wiring numbers in an inward direction perpendicular to the edge.

11. A display device according to claim 10, wherein the thin film transistor layer includes a semiconductor film laminated on the inorganic insulating film, and the plurality of first wiring numbers include a semiconductor layer formed by the semiconductor film.

12. A display device according to claim 10 or 11, characterized in that the thin film transistor layer is provided with a plurality of second wirings extending parallel to each other in a direction intersecting the plurality of first wirings in the display area, the frame area is provided with a plurality of second wiring numbers corresponding to the plurality of second wirings and indicating the arrangement order of the plurality of second wirings, each of the second wiring numbers being composed of a plurality of characters including an inorganic insulating layer formed from the inorganic insulating film, at least a portion of which is provided along a direction intersecting the extension direction of each of the second wirings, and a pair of adjacent second wiring numbers among the plurality of second wiring numbers are arranged to overlap when viewed from an edge of the base substrate along the pair of second wiring numbers to an inner direction perpendicular to the edge.

13. The display device according to any one of claims 1 to 12, further comprising: a light emitting element layer provided on said thin film transistor layer, in which a plurality of light emitting elements are arranged corresponding to a plurality of sub-pixels constituting said display area; and a sealing film provided on said light emitting element layer.

14. The display device according to claim 13, wherein each of the light-emitting elements is an organic electroluminescence element.

Images