Silicon carbide-based heterogeneous composite substrate material

Abstract

The present application relates to the field of semiconductor radio frequency devices, and specifically relates to a silicon carbide-based heterogeneous composite substrate material, comprising a base layer, an intermediate layer and a surface layer. The base layer is made of silicon carbide, the intermediate layer is made of polycrystalline silicon and silicon dioxide, and the surface layer is made of lithium niobate or lithium tantalate; surface profile data of the silicon carbide-based heterogeneous composite substrate material is: Warp<50 μm and BOW<40 μm; the bonding strength is as high as 2 J / m2 or more. According to the present application, silicon carbide is selected to make a base layer to prepare a composite substrate material, and the characteristics such as mechanical properties, high chemical stability, high carrier mobility, high thermal conductivity, high sound velocity, high temperature resistance and corrosion resistance of silicon carbide can be utilized, so that a composite substrate has high sound velocity, high bandwidth and high power. The composite substrate prepared in the present application has low stress and high bonding strength.

Description

A silicon carbide-based heterogeneous composite substrate material Technical Field

[0001] The present application belongs to the field of semiconductor radio frequency devices, and specifically relates to a silicon carbide-based heterogeneous composite substrate material. Background Art

[0002] In recent years, with the development of 4G and 5G communication technologies, RF front-end chips have played an increasingly important role. Filters are one of the most important modules in the RF front-end. As the name suggests, their primary function is to filter—that is, to pass useful signals while blocking interference. In RF communication systems, spectrum is a very precious and congested resource. In addition to the 5G, 4G, Wi-Fi, GPS, and Bluetooth signals that are so integral to our lives, there are also signals from communication satellites, military satellites, and weather monitoring systems. Wireless signals are ubiquitous in real life, so RF filters are needed to filter out unwanted signals. In RF front-end systems, filters function as follows: during transmission, they filter out useful signals from noise; during reception, they filter out interference signals.

[0003] The filter substrates made of traditional materials have high stress and low bonding strength, resulting in low yield and poor overall performance, which in turn leads to problems such as small filter bandwidth, low frequency, and tight spectrum resources, making it increasingly difficult to meet the requirements of technological development.

[0004] Therefore, developing a substrate material with low stress and high bonding strength is an urgent problem that people in this field need to solve. Summary of the Invention

[0005] In order to solve the above problems, this application proposes a silicon carbide-based heterogeneous composite substrate material, which is a composite substrate with low stress and high bonding strength, achieving Warp < 50μm, BOW < 40μm, and bonding strength of 2J / m 2 above.

[0006] A silicon carbide-based heterogeneous composite substrate material, comprising a base layer, an intermediate layer, and a surface layer. The base layer is silicon carbide, the intermediate layer is polycrystalline silicon and silicon dioxide, and the surface layer is lithium niobate or lithium tantalate. The surface data of the silicon carbide-based heterogeneous composite substrate material are: Warp < 50μm, BOW < 40μm; and the bonding strength is as high as 2J / m 2 above.

[0007] Preferably, the surface data of the base layer are: TTV<5μm, LTV<3μm, Warp<50μm, BOW<40μm.

[0008] Preferably, the substrate layer has less than 10 scratches and less than 50 particles when inspected by KLA or SICA equipment.

[0009] Preferably, the surface roughness of the intermediate layer is Ra<1 nm, and the surface roughness of the surface layer is Ra<0.5 nm.

[0010] Preferably, the thickness of the intermediate layer is 1±0.1 μm, and the TTV of the intermediate layer is less than 0.1 μm.

[0011] Preferably, the base layer is semi-insulating; the resistivity is 1E4-1E12Ω·cm; the polymorphic area is less than 10%; and the microtubule density is less than 0.5 / cm 2 .

[0012] Preferably, the thickness specifications of the base layer are 350±25 μm and 500±25 μm; the main positioning edge size is 47.5 mm; and there is no secondary positioning edge.

[0013] Preferably, the diameter of the composite substrate is 150±0.2 mm or 200±0.2 mm.

[0014] Preferably, the specifications of the surface layer are: black flake SAW grade; metal ion content 90-130 ppm; thickness 600±50 nm; angle 42±0.3°; and Curie temperature 603±2°C.

[0015] Preferably, it can be applied to realize bonding between all homogeneous or heterogeneous semiconductor materials, as well as bonding between semiconductor materials and metals, and to prepare a variety of high-performance, high-quality composite substrate materials, such as silicon carbide-based silicon carbide films, silicon carbide-based gallium nitride films, etc.

[0016] The principle of this application is as follows: Silicon carbide substrates are the link with the largest cost share and the highest technical threshold in the entire silicon carbide industry, and play a decisive role in the expansion of the industry. Driven by downstream demand, silicon carbide substrates are advancing from 2 and 4 inches to 6 and 8 inches. The larger substrate size means that more chips can be produced from a single silicon carbide wafer, less wafer edge waste, and lower single-chip costs. However, as the size of silicon carbide substrates increases, the difficulty of substrate processing in actual production becomes greater, and more problems are faced.

[0017] TTV is the total thickness variation, and LTV is the local thickness variation. As the size of the silicon carbide substrate increases, the values ​​of TTV and LTV will increase, resulting in poor performance of the silicon carbide substrate, thereby affecting the bonding strength of the composite substrate.

[0018] The number of scratches and particles inspected by KLA or SICA equipment reflects the bonding strength of the silicon carbide substrate. The fewer the number of scratches and particles, the greater the bonding strength of the silicon carbide substrate, thereby increasing the bonding strength of the composite substrate.

[0019] Warp is the degree of warpage, and Bow is the degree of curvature. Small values ​​of Warp and BOW can avoid defects such as fragments when cutting wafers, reflecting that the stress of the silicon carbide substrate is small, thus making the composite substrate have the characteristics of low stress.

[0020] When a silicon carbide substrate is used as a base layer to further prepare a composite substrate, the TTV, LTV, Warp, and BOW values ​​of the overall composite substrate will become worse than the performance of the silicon carbide base layer. This is inevitable. Therefore, by controlling the conditions of each step in the preparation process of the composite substrate, the TTV, LTV, Warp, and BOW values ​​of the prepared composite substrate are kept consistent with those of the silicon carbide substrate, which has a very good effect on improving the performance of the composite substrate.

[0021] This application can bring the following beneficial effects:

[0022] 1. This application uses silicon carbide as the base layer to prepare the composite substrate material, which can utilize its outstanding mechanical properties, high chemical stability, high carrier mobility, high thermal conductivity, high sound speed, high temperature resistance, corrosion resistance and other characteristics, thereby making the composite substrate have a qualitative improvement in high sound speed, large bandwidth and high power.

[0023] 2. The intermediate layer of this application uses polysilicon and silicon dioxide, and full dielectric isolation is achieved through the intermediate layer, which will greatly reduce parasitic capacitance and leakage, and eliminate the latch effect. Therefore, SOI silicon wafers have the advantages of small parasitic capacitance, small short channel effect, low voltage and low power consumption, and high integration density.

[0024] 3. The surface data of the silicon carbide substrate selected in this application are: TTV < 5μm, LTV < 3μm, Warp < 50μm, BOW < 40μm. Under the inspection of KLA or SICA equipment: the number of scratches is < 10, and the number of particles is < 50. These data reflect that the silicon carbide substrate has low stress and high bonding strength. Only by ensuring the high bonding strength of the substrate layer can the prepared composite substrate have high bonding strength.

[0025] 4. This application selects the surface roughness of the intermediate layer Ra < 1nm for the following reasons: Wafer bonding technology refers to the process of tightly bonding two mirror-polished homogeneous or heterogeneous wafers together through chemical or physical action. After the wafers are bonded, the atoms at the interface react under the action of external forces to form covalent bonds that bind them together, and the bonding interface reaches a specific bonding strength. The bonding process is a reaction between surface molecules and atoms. The lower the surface roughness, the more complete the contact between surface atoms, the stronger the molecular bonds produced, and the fewer bonding defects. If the roughness value is greater than 1nm, the greater the surface roughness, the weaker the bonding strength, delamination will occur, and bonding may even be impossible.

[0026] 5. The surface roughness of the surface layer selected in this application is Ra < 0.5nm for the following reasons: If the surface layer is undulating and the roughness is too large, on the one hand, it will affect the integrity and continuity of the downstream microtube device structure; on the other hand, it will affect the propagation of sound waves on the surface, increase energy consumption, and reduce the Q value of the device.

[0027] 6. This application uses an intermediate layer with a thickness of 1±0.1 μm. The thickness difference within 10 nm effectively improves the flatness of the composite substrate. A smaller thickness difference indicates a smoother surface. During the bonding process, better contact between the two substrate surfaces enhances the bonding effect and reduces defects such as bonding voids.

[0028] 7. This application uses a base layer with a diameter of 150±0.2 mm, i.e. 6 inches, or 200±0.2 mm, i.e. 8 inches, in order to break through the barriers of existing technologies and manufacture a high-performance silicon carbide composite substrate material to meet downstream needs.

[0029] 8. The silicon carbide-based heterogeneous composite substrate material prepared in this application has low stress and high bonding strength, which can achieve Warp < 50μm, BOW < 40μm; the bonding strength is as high as 2J / m 2 Above; under KLA or SICA equipment inspection, the number of particles is less than 30, the number of scratches is less than 10; there is no void > 5mm, the number of voids 1mm < < 5mm does not exceed 1, and the number of voids < 1mm does not exceed 10; the surface roughness Ra is less than 0.2nm under atomic force microscope.

[0030] 9. The silicon carbide composite substrate material produced in this application can form a waveguide effect in its film during the use of downstream products. The energy is fully bound to the substrate surface, and the diffraction effect during the propagation of sound waves is small, which greatly improves the Q value of the device, has low insertion loss, and has efficient heat dissipation performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings in the specification, which constitute a part of this application, are used to provide further understanding of this application. The illustrative embodiments of this application and their descriptions are used to explain this application and do not constitute improper limitations on this application.

[0032] FIG1 is a schematic structural diagram of a silicon carbide composite substrate. DETAILED DESCRIPTION

[0033] In an exemplary embodiment of the present invention, a silicon carbide-based heterogeneous composite substrate material is composed of a base layer, an intermediate layer, and a surface layer. The base layer is silicon carbide, the intermediate layer is polycrystalline silicon and silicon dioxide, and the surface layer is lithium niobate or lithium tantalate. The surface data of the silicon carbide-based heterogeneous composite substrate material are: Warp < 50μm, BOW < 40μm; the bonding strength is as high as 2J / m 2 above.

[0034] In another exemplary embodiment of the present invention, the surface data of the base layer are: TTV<5 μm, LTV<3 μm, Warp<50 μm, BOW<40 μm.

[0035] In another exemplary embodiment of the present invention, the substrate layer is inspected by a KLA or SICA device and has: less than 10 scratches and less than 50 particles.

[0036] In another exemplary embodiment of the present invention, the surface roughness of the intermediate layer is Ra<1 nm, and the surface roughness of the surface layer is Ra<0.5 nm.

[0037] In another exemplary embodiment of the present invention, the thickness of the intermediate layer is 1±0.1 μm, and the TTV of the intermediate layer is less than 0.1 μm.

[0038] In another exemplary embodiment of the present invention, the base layer is semi-insulating; the resistivity is 1E4-1E12 Ω·cm; the polymorphic area is less than 10%; and the microtubule density is less than 0.5 / cm 2 .

[0039] In another exemplary embodiment of the present invention, the thickness specifications of the base layer are 350±25 μm and 500±25 μm; the main positioning edge size is 47.5 mm; and there is no secondary positioning edge.

[0040] In another exemplary embodiment of the present invention, the diameter of the base layer is 150±0.2 mm or 200±0.2 mm.

[0041] In another exemplary embodiment of the present invention, the specifications of the surface layer are: black flake SAW grade; metal ion content 90-130 ppm; thickness 600±50 nm; angle 42±0.3°; and Curie temperature 603±2°C.

[0042] Specifically, the parameters of the base layer, the middle layer, and the surface layer of Examples 1-3 and Comparative Examples 1-2 are shown in Table 1.

[0043] The preparation method of Examples 1-3 and Comparative Examples 1-2 is as follows: wet cleaning the base layer and the surface layer, growing an intermediate layer on the base layer using PECVD, first growing polysilicon, then growing silicon dioxide, plasma activation, hydration treatment, hot pressing bonding treatment, annealing, polishing, cleaning, and packaging to obtain a silicon carbide-based heterogeneous composite substrate material.

[0044] Table 1 Parameter settings for examples and comparative examples

[0045]

[0046] 1. Bond strength test of Examples 1-3 and Comparative Examples 1-2

[0047] The bonding strength testing equipment used is model BSD-300A, with a blade thickness of 0.1mm.

[0048] The test results are shown in Table 2:

[0049] Table 2 Bond strength test results

[0050]

[0051] 2. Surface data testing of Examples 1-3 and Comparative Examples 1-2

[0052] The test steps are as follows: take the prepared composite substrate and use FRT or Tropel equipment to test a 10mm*10mm range.

[0053] The test results are shown in Table 3:

[0054] Table 3 Surface data test results

[0055]

[0056] 3. Defect Detection of Examples 1-3 and Comparative Examples 1-2

[0057] The test steps are as follows: take the prepared composite substrate and inspect it using KLA or SICA equipment (equipment model: CS20 or SICA88), with edge removal of 3mm*3mm.

[0058] The test results are shown in Table 4:

[0059] Table 4 Defect test results

[0060]

[0061] 4. Void Detection of Examples 1-3 and Comparative Examples 1-2

[0062] The test steps are as follows: take the prepared composite substrate, use infrared detection equipment, and the light source is an infrared high-resolution CCD camera.

[0063] The test results are shown in Table 5:

[0064] Table 5 Void test results

[0065]

[0066] 5. Test results analysis:

[0067] From the bonding strength test results in Table 2, it can be seen that the bonding strength of Example 1 is the largest; although the various indicators of Example 2 are within the specified range, the parameters of the base layer TTV, LTV, Warp, BOW and the intermediate layer, surface layer Ra, TTV and other indicators are too large, and the surface bonding substrate is not optimal in terms of flatness, stress parameters, and surface roughness. Therefore, bonding voids and weak edge bonding are easily generated after bonding, and the bonding strength is weaker than that of Example 1; in Example 3, as the size of silicon carbide increases, the edge collapse effect of the 8-inch substrate becomes more and more obvious during processing, and the degree of fit with the upper substrate becomes worse, resulting in The overall bond strength deteriorates from the outside inward. In Comparative Example 1, the surface characteristics of the silicon carbide substrate, such as TTV, LTV, warp, and bow (BOW), exceeded the specified ranges. This data indicates that the substrate itself is subject to high stress, which can easily lead to defects such as voids during the bonding process, and even localized bonding failures, resulting in poor bonding strength. In Comparative Example 2, the TTV, LTV, warp, and BOW parameters of the base layer, as well as the Ra and TTV of the intermediate and surface layers, clearly exceeded the specified ranges. This indicates that the base, intermediate, and surface layers exhibited poor wafer flatness, substrate stress, and surface roughness. Consequently, numerous bonding defects and voids were present after bonding, and multiple areas at the substrate edges and center failed to bond, resulting in poor bonding quality and strength.

[0068] The surface profile test results in Table 3 show that Example 1 achieves optimal performance. The surface profile of the composite substrate is largely dependent on the stress of the SiC base layer and surface layer, exhibiting a high degree of "heritability." Selecting a substrate with low stress in the SiC base layer and surface layer can minimize stress increase during the bonding process, resulting in a composite substrate with better surface profile. In Example 2, the base layer Warp, BOW, TTV, and LTV parameters are relatively high, and due to certain "heritable" laws, the surface profile of the composite substrate is inferior to that of Example 1. In Example 3, most 8-inch SiC substrates for the base layer and surface layer are currently in the research and development stage, and technical challenges must be overcome in both crystal growth and processing. In particular, the stress problem of the 8-inch substrate itself has not been effectively solved. Although the test values ​​of Warp and Bow are small, the substrate may contain large growth stress, which will seriously affect the warping and bending values ​​of the composite substrate. In Comparative Example 1, the surface indicators of the silicon carbide substrate such as TTV, LTV, warp (Warp) and bow (BOW) exceed the specified range values, indicating that the substrate itself has large stress, which will be "inherited" to the final composite substrate during the bonding process, resulting in a poor surface shape of the composite substrate. In Comparative Example 2, the TTV, LTV, Warp, BOW of the base layer and the Ra, TTV of the intermediate layer and surface layer have obviously exceeded the specified range values. The values ​​indicate that the base layer, intermediate layer and surface layer are poor in flatness, substrate stress parameters and surface roughness. Therefore, many bonding defects and voids are generated after bonding, and many areas at the edge and center of the substrate cannot be bonded. Combined with the stress of the substrate itself, the surface shape value of the final composite substrate will be abnormally large.

[0069] It can be seen from the defect detection test results in Table 4 that Example 1 has the best performance and its composite substrate has high bonding strength.

[0070] It can be seen from the void detection test results in Table 5 that Example 1 has the best performance; in Example 2, the number of particles and scratches on the base layer is slightly higher, which will produce more bonding voids, inclusions, and strip defects. In addition, the roughness of the intermediate layer and the surface layer is relatively large, which will affect the tightness of the substrate surface adhesion, and thus it is also easy to produce bonding voids and other defects; the 8-inch substrate cleaning process in Example 3 is relatively mature at present, with fewer particles and contaminants, and the increase in size has little effect on bonding voids and other defects. Therefore, the composite substrate in this embodiment also has fewer voids and other defects; in Comparative Example 1, the particles and scratches on the base layer have obviously exceeded the specified standards, and after bonding, a large number of voids and defects are generated; in Comparative Example 2, the particles and scratches on the base layer and the roughness of the surface layer and the intermediate layer obviously exceed the specified standards. Therefore, after the combination of these two factors, the number of voids, inclusions, and strip defects generated is the largest.

[0071] The various embodiments in this specification are described in a progressive manner. Similar parts between the various embodiments can be referred to in conjunction with each other. Each embodiment focuses on the differences between the other embodiments. In particular, the system embodiments are generally similar to the method embodiments, so the description is relatively simple. For relevant parts, refer to the description of the method embodiments.

[0072] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

Claims

1. A silicon carbide-based heterogeneous composite substrate material, characterized in that: It comprises a base layer, an intermediate layer and a surface layer, wherein the base layer is silicon carbide, the intermediate layer is polycrystalline silicon and silicon dioxide, and the surface layer is lithium niobate or lithium tantalate; The surface data of the silicon carbide-based heterogeneous composite substrate material are: Warp < 50 μm, BOW < 40 μm; the bonding strength is as high as 2 J / m 2 above.

2. The silicon carbide-based heterogeneous composite substrate material according to claim 1, characterized in that: The surface data of the base layer are: TTV<5μm, LTV<3μm, Warp<50μm, BOW<40μm.

3. The silicon carbide-based heterogeneous composite substrate material according to claim 1, characterized in that: The substrate layer is inspected by KLA or SICA equipment: the number of scratches is less than 10, and the number of particles is less than 50.

4. The silicon carbide-based heterogeneous composite substrate material according to claim 1, characterized in that: The surface roughness of the intermediate layer is Ra<1 nm, and the surface roughness of the surface layer is Ra<0.5 nm.

5. The silicon carbide-based heterogeneous composite substrate material according to claim 1, characterized in that: The thickness of the intermediate layer is 1±0.1 μm, and the TTV of the intermediate layer is less than 0.1 μm.

6. The silicon carbide-based heterogeneous composite substrate material according to claim 1, characterized in that: The base layer is semi-insulating; the resistivity is 1E4~1E12Ω·cm; the polymorphic area is less than 10%; the microtubule density is less than 0.5 / cm 2 .

7. The silicon carbide-based heterogeneous composite substrate material according to claim 1, characterized in that: The thickness specifications of the base layer are 350±25μm and 500±25μm; the size of the main positioning edge is 47.5mm; and there is no secondary positioning edge.

8. The silicon carbide-based heterogeneous composite substrate material according to claim 1, characterized in that: The diameter of the composite substrate is 150±0.2 mm or 200±0.2 mm.

9. The silicon carbide-based heterogeneous composite substrate material according to claim 1, characterized in that: The index specifications of the surface layer are: black film SAW grade; metal ion content 90-130ppm; thickness 600±50nm; angle 42±0.3°; Curie temperature 603±2°C.

10. The silicon carbide-based heterogeneous composite substrate material according to any one of claims 1 to 9, characterized in that: It can be used for the preparation of high-performance filters, for achieving bonding between all homogeneous or heterogeneous semiconductor materials, and for bonding between semiconductor materials and metals, and for preparing high-performance, high-quality composite substrate materials; Preferably, the high-performance, high-quality composite substrate material includes: silicon carbide-based silicon carbide film, silicon carbide-based gallium nitride film or silicon-based diamond film.

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