Composite substrate, manufacturing method, and application

Abstract

A composite substrate, which comprises a monocrystalline silicon substrate plate (1), a polycrystalline silicon layer (2), a silicon dioxide layer (3) and a piezoelectric film (4), which are sequentially arranged in a stacked manner, wherein the thickness of the polysilicon layer (2) ranges from 0.05×λ to 3.0×λ, λ being the dominant-mode wavelength of acoustic waves of the composite substrate, and the thickness of the silicon dioxide layer (3) ranges from 0.05×λ to 1.0×λ. The stable electrical performance of the composite substrate is obtained by using a silicon material, and the composite substrate is suitable for a high-specification electrical component and has high efficiency.

Description

Composite substrate, manufacturing method and application Technical Field

[0001] The present disclosure relates to the field of semiconductors, and in particular to a composite substrate with a multi-layer structure, a manufacturing method thereof, and applications thereof. Background Art

[0002] At present, the processing technology of silicon materials is very mature, and it is also a semiconductor material with many industrial applications. Therefore, silicon materials have been widely used in electronic components. Because silicon materials themselves have a centrosymmetric crystal structure, silicon does not have a linear piezoelectric effect. Therefore, silicon materials cannot be directly used to prepare high-performance RF surface acoustic wave devices. The performance of RF surface acoustic wave devices such as SAW depends on the good piezoelectricity of the composite piezoelectric substrate. After the silicon material is converted into a silicon substrate after the grain structure is converted, the performance of RF surface acoustic wave devices can be provided. Therefore, how to use silicon materials to obtain substrate wafers with stable electrical properties, suitable for high-specification electrical components and high efficiency is an urgent problem to be solved.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field.

[0004] Summary of the Invention

[0005] To solve the above problems, the present disclosure provides a composite substrate, a manufacturing method thereof, and applications thereof.

[0006] In a first aspect, the present disclosure provides a composite substrate comprising a single crystal silicon substrate, a polycrystalline silicon layer, a silicon dioxide layer, and a piezoelectric film stacked in sequence; the thickness of the polycrystalline silicon layer is 0.05×λ to 3.0×λ, where λ is the main mode wavelength of the acoustic wave of the composite substrate; and the thickness of the silicon dioxide layer is 0.05×λ to 1.0×λ.

[0007] According to one embodiment of the present disclosure, the single crystal silicon substrate is a crystal cut having Euler angles of (45°±10°, 54°±10°, 0°±10°).

[0008] According to another embodiment of the present disclosure, the contact surface between the single crystal silicon substrate and the polysilicon layer is a first contact surface, and the contact surface between the polysilicon layer and the silicon dioxide layer is a second contact surface; the roughness of the first contact surface and the roughness of the second contact surface are both less than 25 nm.

[0009] According to another embodiment of the present disclosure, the roughness of the first contact surface and the roughness of the second contact surface are less than 15 nm and greater than 10 nm.

[0010] According to another embodiment of the present disclosure, the roughness of the first contact surface and the roughness of the second contact surface are both set to be less than 4 nm.

[0011] According to another embodiment of the present disclosure, the contact surface between the silicon dioxide layer and the piezoelectric film is a third contact surface, and the roughness of the third contact surface is less than 25 nm.

[0012] According to another embodiment of the present disclosure, the roughness of the third contact surface is less than 15 nm and greater than 10 nm.

[0013] According to another embodiment of the present disclosure, the roughness of the first contact surface, the roughness of the second contact surface, and the roughness of the third contact surface are the same.

[0014] According to another embodiment of the present disclosure, the roughness of the first contact surface, the roughness of the second contact surface, and the roughness of the third contact surface are different, and the roughness of the second contact surface is greater than the roughness of the first contact surface.

[0015] According to another embodiment of the present disclosure, the roughness of the third contact surface is smaller than the roughness of the second contact surface, and the roughness of the second contact surface is smaller than the roughness of the first contact surface.

[0016] The second aspect of the present disclosure provides a surface acoustic wave filter, comprising: the above-mentioned composite substrate and an interdigital transducer. The interdigital transducer is arranged on the surface of the composite substrate away from the single crystal silicon substrate, and includes a plurality of electrode fingers. The interdigital transducer includes a buffer layer and a metal layer. The buffer layer is arranged on the piezoelectric film, and the buffer layer includes metal titanium. When the wavelength of the elastic wave determined by the electrode period of the IDT electrode of the interdigital transducer is set to λ, the thickness of the buffer layer is less than 0.5%λ. The metal layer is arranged on the surface of the buffer layer away from the piezoelectric layer, and the metal layer includes aluminum. The thickness of the metal layer ranges from 1%λ to 30%λ, and the content of the aluminum is above 95wt%. The metal layer also includes one or more materials selected from Cu, W, Mo, Cr, Ag, Pt, Ga, Nb, Ta, Au, and Si.

[0017] According to one embodiment of the present disclosure, the aluminum content of the metal layer is greater than 97 wt %.

[0018] According to another embodiment of the present disclosure, the titanium content of the buffer layer is above 98%, and the buffer layer further includes one or more materials selected from Al, Si, and Mg.

[0019] According to another embodiment of the present disclosure, the average film thickness of the IDT is H, the acoustic wave wavelength responded to by the SAW filter is λ, and the average film thickness H and the acoustic wave wavelength λ satisfy 8.5%≤H / λ≤12.5%.

[0020] According to another embodiment of the present disclosure, an average duty cycle of the IDT is greater than or equal to 0.4 and less than or equal to 0.8.

[0021] The third aspect of the present disclosure provides a method for manufacturing a composite substrate, comprising: S1, generating the polysilicon layer by deposition on the single crystal silicon substrate; S2, thermally oxidizing the surface of the polysilicon layer to form the silicon dioxide layer; and S3, bonding the piezoelectric film to the surface of the silicon dioxide layer to form the composite substrate having a multi-layer structure.

[0022] According to one embodiment of the present disclosure, in the step S1 , the polysilicon layer is generated by physical deposition or chemical deposition.

[0023] According to another embodiment of the present disclosure, the physical deposition to generate the polysilicon layer includes: controlling the energy of ion implantation to 2J / cm 2 -10J / cm 2 , a destructive area is formed in a preset range; polysilicon is produced through the destructive area.

[0024] According to another embodiment of the present disclosure, the chemical deposition to form the polysilicon layer includes: generating the polysilicon layer by vapor deposition in a silane gas atmosphere with a temperature controlled at 600-680° C. and a pressure of 0.3 Torr.

[0025] According to another embodiment of the present disclosure, the S3 step includes: performing ion implantation on the piezoelectric single crystal substrate to form an ion implantation area; transferring the piezoelectric thin film layer formed in the ion implantation area toward the surface of the multilayer structure formed in the S2 step; and annealing the transferred multilayer structure to form the composite substrate.

[0026] According to another embodiment of the present disclosure, the method further includes: performing roughness treatment on the second contact surface and the third contact surface by laser annealing, and performing roughness treatment on the first contact surface by controlling ion implantation energy.

[0027] A fourth aspect of the present disclosure provides a radio frequency module, comprising one or more of a duplexer formed by the above-mentioned surface acoustic wave filter, a power amplifier, an antenna, a low-noise amplifier, and a switch.

[0028] The composite substrate disclosed herein utilizes silicon materials to achieve stable electrical performance. The composite substrate is also compatible with high-specification electrical components and has high efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other features and advantages of the present disclosure will become more apparent by describing in detail example embodiments thereof with reference to the accompanying drawings.

[0030] FIG1 is a schematic diagram of a composite substrate according to an embodiment of the present disclosure.

[0031] FIG2 is a schematic diagram explaining the contact surface roughness in this article.

[0032] FIG. 3 is a schematic diagram of a surface acoustic wave filter according to an embodiment of the present disclosure.

[0033] FIG4 is a schematic flow chart of a method for manufacturing a composite substrate according to an embodiment of the present disclosure.

[0034] The description of the accompanying drawings is as follows:

[0035] 1-single crystal silicon substrate; 2-polycrystalline silicon layer; 3-silicon dioxide layer; 12-first contact surface; 23-second contact surface; 34-third contact surface; 4-piezoelectric film; 5-IDT electrode; 51-buffer layer; 52-metal layer DETAILED DESCRIPTION

[0036] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be more comprehensive and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to provide a thorough understanding of the embodiments of the present disclosure.

[0037] In the drawings, the thickness of regions and layers may be exaggerated for clarity. The same reference numerals in the drawings denote the same or similar structures, and thus their detailed description will be omitted.

[0038] The described features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure can be practiced without one or more of the specific details, or other methods, components, materials, etc. can be adopted. In other cases, well-known structures, materials or operations are not shown or described in detail to avoid obscuring the main technical ideas of the present disclosure.

[0039] When a structure is “on” another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is “directly” disposed on the other structure, or that the structure is “indirectly” disposed on the other structure via another structure.

[0040] The terms "including" and "having" are intended to be inclusive and mean that there may be additional elements / components / etc. in addition to the listed elements / components / etc. The terms "first," "second," and "third," etc. are used merely as labels and do not limit the quantity of their objects.

[0041] As shown in Figure 1, the composite substrate disclosed in the present invention includes a single crystal silicon substrate 1, a polycrystalline silicon layer 2, a silicon dioxide layer 3 and a piezoelectric film 4 stacked in sequence. In this way, a composite substrate structure suitable for IHP-SAW is formed with strong stability. Among them, the use of polycrystalline silicon (Polycrystalline Silicon / poly-si) can achieve good electrical performance by virtue of its high purity and high crystal quality. By forming a buffer layer on the silicon substrate layer by doping polycrystalline silicon, the lattice mismatch can be reduced, thereby improving the crystal quality of the wafer. Covering its surface with silicon dioxide can protect the surface of the wafer.

[0042] In this composite substrate, the bottommost single-crystal silicon substrate 1 can also be replaced with glass. This single-crystal silicon can be implemented with a crystal cut according to the following Euler angles: (0°±10°, 0°±10°, 45°±10°); or (45°±10°, 54°±10°, 0°±10°). Because the Euler angles of the crystalline substrate material affect the preferred propagation direction of the acoustic mode within the selected substrate material, the crystal cut angle of the single-crystal silicon substrate is set as above to improve the signal propagation performance of the entire silicon-based composite substrate.

[0043] Furthermore, the polysilicon poly-si provided on the single crystal silicon substrate 1 is also called polycrystalline silicon or polycrystalline silicon. The polysilicon layer 2 generally includes a plurality of silicon grains (crystals) separated by grain boundaries (i.e., single-crystal silicon grains, which can be randomly oriented and have different crystal orientations. It can serve as a supplement to the single-crystal silicon substrate, improve the mechanical strength and stability of the wafer, reduce stress, and increase the reliability of the substrate. The thickness of the polysilicon layer 2 is preferably in the range of 0.05×λ to 13.0×λ, where λ is the wavelength of the main mode of the acoustic wave in the high acoustic velocity layer formed by the polysilicon layer, also known as the wavelength corresponding to the surface acoustic wave by the surface acoustic wave filter. Depending on the acoustic velocity in the high acoustic velocity layer, optimizing the thickness of the polysilicon layer 2 can produce the desired mode suppression to adapt to the high-specification device acoustic wave requirements. For the same effect, the silicon dioxide layer 3 is provided on the polysilicon layer 2. The thickness of the silicon dioxide layer 3 is in the range of 0.05×λ to 1.0×λ, thereby improving the compensation characteristics of the silicon dioxide layer 3. In addition, the silicon dioxide layer 3 can be a compound formed by adding fluorine, carbon, or boron to silicon dioxide.

[0044] In summary, this structure is designed to enhance the mechanical strength and stability of the wafer, while also improving its electrical performance. The combined effect of the single-crystal silicon substrate and the polycrystalline silicon layer improves the wafer's mechanical strength and stability, reduces stress, and contributes to a high-performance composite substrate.

[0045] Continuing with Figure 1, since the composite substrate disclosed herein has a four-layer structure, there are three contact surfaces: the contact surface between the single-crystalline silicon substrate 1 and the polycrystalline silicon layer 2, referred to as the first contact surface 12; the contact surface between the polycrystalline silicon layer 2 and the silicon dioxide layer 3, referred to as the second contact surface 23; and the contact surface between the silicon dioxide layer 3 and the piezoelectric film 4, referred to as the third contact surface 34. The roughness of each contact surface in the composite substrate significantly affects the performance of the resulting device. In particular, the surface roughness of the single-crystalline silicon substrate 1 in contact with the polycrystalline silicon layer 2 is typically relatively high. When used with high-acoustic-velocity devices, the edge of the silicon wafer is susceptible to the formation of large grains due to heat and nucleation mechanisms, resulting in increased power consumption and a significant impact on product performance.

[0046] The roughness of the contact surface herein refers to the distance between the lowest valleys of the two surface contours within the sampling length, as shown in Figure 2, where L is the roughness of the contact surface. In order to clearly show the contours of the two surfaces, Figure 2 is an enlarged schematic diagram. Specifically, the roughness of the first contact surface 12 is the distance between the lowest valley of the contour of the surface of the single-crystal silicon substrate 1 in contact with the polycrystalline silicon layer 2 and the lowest valley of the contour of the surface of the polycrystalline silicon layer 2 in contact with the single-crystal silicon substrate 1. Similarly, the roughness of the second contact surface is the distance between the lowest valley of the contour of the surface of the polycrystalline silicon layer 2 in contact with the silicon dioxide layer 3 and the lowest valley of the contour of the surface of the silicon dioxide layer 3 in contact with the polycrystalline silicon layer 2. The roughness of the third contact surface is the distance between the lowest valley of the contour of the surface of the silicon dioxide layer 3 in contact with the piezoelectric film 4 and the lowest valley of the contour of the surface of the piezoelectric film 4 in contact with the silicon dioxide layer 3.

[0047] In this paper, the roughness of the contact surface can be measured by AFM (atomic force microscope) to measure the roughness of the two surfaces, and then the roughness of the contact surface is obtained by adding the two. For example, the roughness of the surface of the contact between the single crystal silicon substrate 1 and the polycrystalline silicon layer 2 measured by AFM is Rz 11 The roughness Rz of the surface where the polysilicon layer 2 contacts the single crystal silicon substrate 1 is 21 , then the roughness of the first contact surface Rz 12 =Rz 11 +Rz 21 By analogy, the roughness of the surface where the polysilicon layer 2 contacts the silicon dioxide layer 3 is Rz 22 The roughness of the surface where the silicon dioxide layer 3 contacts the polysilicon layer 2 is Rz 31 , then the roughness of the second contact surface Rz 23 =Rz 22 +Rz 31 ; The roughness of the surface of the silicon dioxide layer 3 in contact with the piezoelectric film 4 is Rz 32 The roughness of the surface where the piezoelectric film 4 contacts the silicon dioxide layer 3 is Rz 41 , then the roughness of the third contact surface Rz 34 =Rz 32 +Rz 41 The roughness of the first contact surface 12, the second contact surface 23, and the third contact surface 34 is set to less than 25 nm. Within this roughness range, the roughness can also preferably be greater than 10 nm and less than 15 nm. Multiple machining experiences have shown that within this roughness range, unnecessary losses due to acoustic wave reflection can be reduced.

[0048] In addition, the roughness of the first contact surface 12 and the second contact surface 23 is set to a roughness range of less than 4 nm, so that the interface between the single crystal silicon substrate 1 and the polycrystalline silicon layer 2, and the polycrystalline silicon layer 2 and the silicon dioxide layer 3 can be more closely bonded to each other while ensuring the roughness requirements.

[0049] In an optional embodiment, the roughness of the first contact surface 12 , the second contact surface 23 , and the third contact surface 34 are the same.

[0050] In an optional embodiment, the roughness of the first contact surface 12, the second contact surface 23, and the third contact surface 34 are set to be different, and the roughness of the second contact surface 23 is greater than the roughness of the first contact surface 12. This is conducive to achieving a higher response sound velocity of the polysilicon layer 2 than that of the silicon dioxide layer 3.

[0051] Thus, roughness parameters that meet high-performance device requirements can be flexibly set according to different device requirements. For example, the roughness of the third contact surface 34 can be smaller than that of the second contact surface 23 , and the roughness of the second contact surface 33 can be smaller than that of the first contact surface 12 .

[0052] On the basis of the composite substrate, an IHP SAW device is formed, as shown in Figure 3. An interdigital transducer is provided on the composite substrate. The interdigital transducer includes an interdigital transducer electrode (IDT electrode), which includes a plurality of electrode fingers.

[0053] The IDT includes a buffer layer 51 disposed on a piezoelectric film 4 and a metal layer 52 disposed on the buffer layer 51. The buffer layer is titanium. When the wavelength of the elastic wave determined by the electrode period of the IDT electrode 5 is set to λ, the thickness of the buffer layer 51 is less than 0.5%λ. The metal layer 52 is aluminum, with the aluminum content in the metal layer 52 being greater than 95% by weight, preferably greater than 97% by weight. The thickness of the metal layer 52 ranges from 1%λ to 30%λ.

[0054] The titanium content in buffer layer 51 is greater than 98 wt%. Using titanium as buffer layer 51 facilitates the formation of a strong Al texture in the Al film of the overlying metal layer 52, enhancing the Al film's power handling capacity and reducing its resistivity. Using a titanium layer with a thickness of 0.5%λ as buffer layer 51 improves the density and smoothness of the Al film, enhancing surface acoustic wave (SAW) excitation, reducing insertion loss in SAW devices, and increasing the SAW maximum power handling capacity.

[0055] For example, when the wavelength λ of the elastic wave determined by the electrode period of the IDT electrode 5 is 2 μm, the thickness of the buffer layer 51 is 10 nm or less. In a preferred embodiment, the thickness of the buffer layer 51 can be set to 2 nm to further enhance the texture of the Al thin film subsequently formed thereon. The thickness of the titanium buffer layer directly affects the strength of the Al texture. After the titanium buffer layer is formed, the Al film thereon grows primarily in a layered mode, with Al forming a planar structure and the Al face being a low-energy surface, showing a tendency for preferential growth. The Al film grown on the titanium buffer layer exhibits a strong texture. However, when the titanium buffer layer reaches a certain thickness and forms a continuous film, the Al film deposition on the titanium buffer layer begins to primarily grow in an island-like mode, forming a polycrystalline structure without preferred orientation. Therefore, the thickness range of the titanium buffer layer that promotes the formation of Al texture is relatively narrow. A titanium buffer layer thickness of 10 nm or less, preferably 2 nm, can achieve a strong Al texture. The resulting Al film has a uniform and dense structure, an increased critical load, and significantly enhanced adhesion to the piezoelectric substrate.

[0056] Furthermore, the aluminum content in the metal layer 52 is greater than 95 wt%, and the metal layer 52 further includes one or more materials selected from Cu, W, Mo, Cr, Ag, Pt, Ga, Nb, Ta, Au, and Si. Doping the aluminum metal layer can further improve the piezoelectric effect of the Al film. A small amount of doping elements can enhance the Al's anti-electromigration properties and improve the orientation of the Al film. However, excessive doping concentrations can deteriorate the crystal quality of the Al film. An Al film with a metal aluminum content of greater than 97 wt%, a small amount of doping materials, and a good microstructure and surface morphology results in excellent and stable performance of the surface acoustic wave device.

[0057] Furthermore, the aluminum content in the metal layer can be above 98%, and the buffer layer can also include one or more materials selected from Al, Si, and Mg. The purity of the titanium buffer layer has a significant impact on the Al thin film subsequently formed thereon. When the titanium buffer layer is relatively thin (less than 0.5%λ), a higher purity titanium buffer layer is conducive to forming a strong texture in the Al thin film layer.

[0058] A titanium buffer layer 51 is formed between the Al metal layer 52 and the piezoelectric film 4, improving the interfacial bonding strength between the IDT electrode 5 and the composite substrate. This prevents the IHP SAW device from failing due to increased electrode finger vibration during high-frequency applications, which can easily cause the electrodes to fall off the substrate.

[0059] In an alternative embodiment, the average thickness of the IDT electrode 5 is H, the wavelength of the acoustic wave to which the series resonator responds is λ, and the relationship between the average thickness H and the wavelength of the acoustic wave λ satisfies 8.5% ≤ H / λ ≤ 12.5%. This relationship between the thickness of the IDT electrode 5 and the wavelength of the acoustic wave to which the series resonator responds can suppress frequency offset of the surface acoustic wave filter, thereby reducing insertion loss on the high-frequency side of the passband.

[0060] The average duty ratio of the IDT electrode 5 is defined as the ratio of the width of each of the plurality of electrode fingers to the sum of the width of each of the plurality of electrode fingers and the spacing between adjacent electrode fingers. In an alternative embodiment, the average duty ratio of the IDT electrode 5 may be greater than or equal to 0.4 and less than or equal to 0.8.

[0061] The present disclosure also discloses a radio frequency module, including a duplexer formed by the above-mentioned IHP SAW, one or more of a power amplifier, an antenna, a low noise amplifier, and a switch.

[0062] The composite substrate of the present disclosure can be manufactured by the steps shown in Figure 4. As shown in Figure 4, the steps include: S1, forming a polysilicon layer 2 by deposition on a single-crystal silicon substrate 1; S2, thermally oxidizing the surface of the polysilicon layer 2 to form a silicon dioxide layer 3; and S3, bonding a piezoelectric film 4 to the surface of the silicon dioxide layer 3 to form a composite substrate having a multilayer structure.

[0063] In step S1, a single crystal silicon substrate is prepared, and polycrystalline silicon is formed on the single crystal silicon substrate. The polycrystalline silicon layer 2 can be formed by physical deposition or chemical deposition. Physical deposition can include, but is not limited to, sputtering to form the polycrystalline silicon layer 2. The polycrystalline silicon layer 2 can also be formed by chemical deposition, such as chemical vapor deposition, or other appropriate methods.

[0064] The polysilicon layer 2 is formed by sputtering. The single crystal silicon substrate 1 is cleaned to obtain a single crystal silicon substrate with a clean surface. The cleaning method can be to remove particles and metal impurities on the surface of the single crystal silicon substrate by wet chemical cleaning, so as to avoid the conductive factors on the surface affecting the subsequent device performance. Then, defects are formed on the single crystal silicon substrate 1 by ion implantation, and high doses of gases such as hydrogen, inert gas (such as H + or He + ) ions. Control the ion injection energy to a fixed value, for example, the injection energy ranges from small to large 2J / cm 2 -10J / cm 2This creates a destructive region, resulting in a polysilicon layer 2. The processing temperature is controlled to be less than or equal to 1000°C during this stage. The polysilicon formed by implanting within this energy range enables the polysilicon layer 2 to be integrally formed with the single-crystal silicon substrate 1, resulting in a roughness between the two that is less than the roughness between the subsequent bonding between the polysilicon layer 2 and the silicon dioxide layer 3.

[0065] The polysilicon layer 2 is formed by chemical vapor deposition, for example but not limited to, in a silane gas atmosphere with a temperature of 600-680° C. and a pressure of 0.3 Torr.

[0066] In other embodiments, the polysilicon layer 2 can be formed by: preparing a trap-rich layer at the interface between the polysilicon layer and the single-crystalline silicon by ion implantation or by introducing a carbon- or nitrogen-containing gas, because the polysilicon layer is used to provide carrier traps and suppress the parasitic surface conductivity effect. The additional trap-rich layer added thereunder can prevent the trap density provided by the polysilicon layer from being insufficient. Compared to the polysilicon layer, the trap-rich layer can provide a greater defect density, enhance the capture of free carriers, and increase the resistivity of the surface acoustic wave device substrate. The thickness of the trap-rich layer can be 50nm to 200nm (in a certain proportional relationship with the polysilicon layer).

[0067] During processing, the thickness of polysilicon layer 2 is preferably within a range of 0.05×λ to 13.0×λ, where λ is the wavelength of the dominant acoustic mode within the high-acoustic-velocity layer formed by polysilicon layer 2, also known as the wavelength of the surface acoustic wave corresponding to the surface acoustic wave (SAW) filter. Optimizing the polysilicon thickness, depending on the acoustic velocity within the high-acoustic-velocity layer, can produce the desired mode suppression to meet the stringent acoustic wave requirements of the device.

[0068] In step S2, the surface of the polysilicon layer 2 is thermally oxidized to form a silicon dioxide layer 3. The oxidation time and temperature (e.g., 650°C to 800°C) of the polysilicon layer 2 are controlled to form a highly fused silicon dioxide layer 3 on the surface of the polysilicon layer 2, thereby enhancing the adhesion between the polysilicon and the silicon dioxide and preventing it from falling off during use. The silicon dioxide layer 3 provided on the polysilicon layer 2 is provided with a thickness range after oxidation, i.e., the thickness of the silicon dioxide layer 3 is within a range of 0.05×λ to 1.0×λ, thereby improving the compensation characteristics of the silicon dioxide layer 3. In addition, fluorine, carbon, or boron may be added to the silicon dioxide during processing, so that the silicon dioxide layer contains the compounds formed thereby.

[0069] In step S3, the piezoelectric film 4 is bonded to the multilayer structure formed in step S2. A piezoelectric single crystal substrate is prepared in advance. The piezoelectric single crystal can be a crystal with piezoelectric and photoelectric functions, such as lithium niobate crystal, lithium tantalate crystal, rubidium titanyl phosphate crystal, potassium titanyl phosphate crystal, silicon crystal, germanium crystal or gallium arsenide crystal. For example, a lithium niobate substrate can be used. A high dose of gas such as hydrogen or an inert gas (e.g., H2) is injected into the original lithium niobate substrate. + or He + ) ions. The original lithium niobate substrate can be adjusted to have a suitable tangent in advance. The dose and energy of the ions during implantation are adjusted according to the required film thickness. At this time, a damaged layer will be formed in the ion implantation area of ​​the lithium niobate substrate. The damaged layer is the piezoelectric film layer. It should be noted that the implanted ions are ions that can generate gas through heat treatment, such as hydrogen ions or helium ions. When implanting hydrogen ions, the implantation dose can be 3×10 16 ions / cm 2 -8×10 16 ions / cm 2 The injection energy can be 120KeV-400KeV; when injecting helium ions, the injection dose can be 1×10 16 ions / cm 2 -1×10 17 ions / cm 2 The implantation energy can be 50KeV-1000KeV. The thickness of the thin film layer can be adjusted by adjusting the depth of ion implantation. Specifically, the greater the depth of ion implantation, the thicker the prepared thin film layer; conversely, the smaller the depth of ion implantation, the thinner the prepared thin film layer.

[0070] Next, the piezoelectric thin film layer formed in the ion-implanted region of the lithium niobate substrate is transferred onto the multilayer structure formed in step S2. Specifically, the transfer method may involve molecular bonding to the multilayer structure formed in step S2, followed by separation at the level of the piezoelectric thin film to transfer the surface layer of the lithium niobate, i.e., the piezoelectric thin film layer, onto the multilayer structure formed in step S2. This allows the entire structure to be solidified without compromising the quality of the transferred piezoelectric thin film or the mechanical strength of the heterostructure after bonding.

[0071] Finally, the transferred multilayer structure is annealed as a whole. During the annealing process, the H + or He +Microbubbles form, and then these bubbles connect to form a single layer, allowing the lithium niobate wafer to be peeled off along the damaged layer. Excess lithium niobate is automatically separated, ultimately transferring the lithium niobate single crystal thin film, or piezoelectric film, to the multi-structure obtained in step S2. The resulting film has excellent uniformity, low defect density, and no corrosive fluid is generated. The hydrogen released is also non-toxic and harmless, eliminating environmental pollution issues, and the original substrate material can be recycled.

[0072] The roughness between the various contact surfaces can be controlled by laser annealing. The polysilicon / silicon dioxide surface is treated. The temperature of the laser annealing process is, for example, controlled at above 1200 degrees Celsius; and the laser annealing process time is not less than 3ns. After high-temperature annealing, the surface roughness of the polysilicon / silicon dioxide is significantly improved. In addition, energy can be transferred in the form of related light radiation (i.e., laser irradiation or laser annealing), or the laser source can be controlled in pulsed or continuous wave (CW) mode to shape and polarize the laser beam to heat the substrate more uniformly. The medium emitting the laser can be of different types (e.g., gas lasers, solid-state lasers, dye lasers, diode lasers, etc.) that generate radiation of different wavelengths. By adding laser annealing to the process control formed by integrating single crystal silicon and polycrystalline silicon, that is, reprocessing the polysilicon surface or the silicon dioxide surface according to the roughness requirements, the roughness relationship between the different contact surfaces of the composite substrate can be met.

[0073] For example, to obtain a first contact surface with a set roughness value, the roughness can be controlled by forming a damaged layer through ion implantation. The roughness of the second and third contact surfaces can be controlled to the set values ​​through laser annealing. The laser annealing parameters for the second and third contact surfaces do not need to be set to the same value; as long as the roughness values ​​obtained are within the set values, it will suffice.

[0074] It should be noted that although the various steps of the method in the present disclosure are described in a specific order in the accompanying drawings, this does not require or imply that these steps must be performed in this specific order, or that all the steps shown must be performed to achieve the desired results. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps, etc., which should all be considered part of the present disclosure. The preferred embodiments of the present disclosure disclosed above are only used to help illustrate the present disclosure. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to only the specific embodiments described. Obviously, many modifications and changes can be made based on the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present disclosure, so that those skilled in the art can better understand and utilize the present disclosure. The present disclosure is only limited by the claims and their full scope and equivalents.

Claims

1. A composite substrate, characterized in that: It includes a single crystal silicon substrate, a polycrystalline silicon layer, a silicon dioxide layer and a piezoelectric film which are stacked in sequence; The thickness of the polysilicon layer is 0.05×λ to 3.0×λ, wherein λ is the main mode wavelength of the acoustic wave of the composite substrate; the thickness of the silicon dioxide layer is 0.05×λ to 1.0×λ.

2. The composite substrate according to claim 1, characterized in that The single crystal silicon substrate is a crystal cut having Euler angles of (45°±10°, 54°±10°, 0°±10°).

3. The composite substrate according to claim 1, characterized in that The contact surface between the single crystal silicon substrate and the polysilicon layer is a first contact surface, and the contact surface between the polysilicon layer and the silicon dioxide layer is a second contact surface; the roughness of the first contact surface and the roughness of the second contact surface are both less than 25 nm.

4. The composite substrate according to claim 3, characterized in that The roughness of the first contact surface and the roughness of the second contact surface are less than 15 nm and greater than 10 nm.

5. The composite substrate according to claim 3, characterized in that The roughness of the first contact surface and the roughness of the second contact surface are both set to be less than 4 nm.

6. The composite substrate according to claim 3, characterized in that The contact surface between the silicon dioxide layer and the piezoelectric film is a third contact surface, and the roughness of the third contact surface is less than 25 nm.

7. The composite substrate according to claim 6, characterized in that The roughness of the third contact surface is less than 15 nm and greater than 10 nm.

8. The composite substrate according to claim 6, characterized in that The roughness of the first contact surface, the roughness of the second contact surface, and the roughness of the third contact surface are the same.

9. The composite substrate according to claim 6, characterized in that The roughness of the first contact surface, the roughness of the second contact surface, and the roughness of the third contact surface are different, and the roughness of the second contact surface is greater than the roughness of the first contact surface.

10. The composite substrate according to claim 6, characterized in that The roughness of the third contact surface is smaller than that of the second contact surface, and the roughness of the second contact surface is smaller than that of the first contact surface.

11. A surface acoustic wave filter, characterized in that: include: The composite substrate according to any one of claims 1 to 10; An interdigital transducer is arranged on a surface of the composite substrate away from the single crystal silicon substrate, and comprises a plurality of electrode fingers; Wherein, the interdigital transducer comprises: A buffer layer is disposed on the piezoelectric film, the buffer layer comprises metal titanium, and when the wavelength of the elastic wave determined by the electrode period of the IDT electrode of the interdigital transducer is set to λ, the thickness of the buffer layer is less than 0.5%λ; A metal layer is arranged on the surface of the buffer layer away from the piezoelectric layer, the metal layer includes aluminum, the thickness of the metal layer ranges from 1%λ to 30%λ, the content of the aluminum is above 95wt%, and the metal layer also includes one or more materials selected from Cu, W, Mo, Cr, Ag, Pt, Ga, Nb, Ta, Au, and Si.

12. The surface acoustic wave filter according to claim 11, characterized in that The aluminum content of the metal layer is above 97 wt %.

13. The surface acoustic wave filter according to claim 11, characterized in that: The titanium content of the buffer layer is above 98%, and the buffer layer further comprises one or more materials selected from Al, Si, and Mg.

14. The surface acoustic wave filter according to any one of claims 11 to 13, characterized in that: The average film thickness of the IDT is H, the wavelength of the acoustic wave to which the SAW filter responds is λ, and the average film thickness H and the wavelength of the acoustic wave λ satisfy 8.5%≤H / λ≤12.5%.

15. The surface acoustic wave filter according to claim 14, characterized in that: An average duty cycle of the IDT is greater than or equal to 0.4 and less than or equal to 0.

8.

16. A method for manufacturing a composite substrate according to any one of claims 1 to 10, characterized in that: include: S1, generating the polycrystalline silicon layer on the single crystal silicon substrate by deposition; S2, thermally oxidizing the surface of the polysilicon layer to form the silicon dioxide layer; as well as S3, bonding the piezoelectric film to the surface of the silicon dioxide layer to form the composite substrate with a multi-layer structure.

17. The method for manufacturing a composite substrate according to claim 16, characterized in that: In the step S1, the polysilicon layer is generated by physical deposition or chemical deposition.

18. The method for manufacturing a composite substrate according to claim 17, characterized in that: The physical deposition to generate the polysilicon layer comprises: The energy of ion implantation is controlled to be 2J / cm 2 -10J / cm 2 , forming a destructive area within a preset range; Polycrystalline silicon is produced through the destructive region.

19. The method for manufacturing a composite substrate according to claim 17, characterized in that: The chemical deposition to generate the polysilicon layer includes: generating the polysilicon layer by vapor deposition in a silane gas atmosphere with a temperature controlled at 600-680° C. and a pressure of 0.3 Torr.

20. The method for manufacturing a composite substrate according to claim 16, characterized in that: The S3 step includes: Performing ion implantation on the piezoelectric single crystal substrate to form an ion implantation region; Transferring the piezoelectric film layer formed in the ion implantation area toward the surface of the multilayer structure formed in step S2; and The transferred multilayer structure is annealed to form the composite substrate.

21. The method for manufacturing a composite substrate according to any one of claims 16 to 20, characterized in that: The method further comprises: The second contact surface and the third contact surface are roughened by laser annealing, and the first contact surface is roughened by controlling ion implantation energy.

22. A radio frequency module, characterized in that: It comprises one or more of a duplexer, a power amplifier, an antenna, a low noise amplifier, and a switch formed by the surface acoustic wave filter according to any one of claims 11 to 15.

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