Capacitor, electromechanical instrument, and capacitor manufacturing method

Abstract

Provided are: a capacitor that, in a practical size, can contribute to ensuring resistance in a severe environment; an electromechanical instrument; and a capacitor manufacturing method. In the capacitor, a laminate in which an alumina film is laminated on an impurity-doped silicon substrate is interposed between a pair of electrodes. The impurity-doped silicon substrate is a p-type silicon substrate. The rate of change in the capacitance in a state in which the temperature has risen to 100-500°C, with respect to the capacitance at room temperature before said temperature rise, is less than 20%. The change rate in the capacitance in a state in which the temperature has risen to 300°C by irradiation with X-rays at a cumulative dose of 5 MGy, with respect to the capacitance before said X-ray irradiation, is less than 20%.

Description

Capacitor, electrical equipment, and capacitor manufacturing method

[0001] [Description of Related Applications] The present invention is based on Japanese Patent Application No. 2023-134999 (filed August 22, 2023), the entire contents of which are incorporated herein by reference. The present invention relates to a capacitor, an electrical device, and a method for manufacturing a capacitor.

[0002] Because electronic devices are generally vulnerable to heat, they have often been installed far from the heat source they are intended to control. However, in recent years, they have begun to be installed closer to the heat source. For example, in the automotive field, ECUs (Electronic Control Units) have been relocated from the vehicle interior to the engine compartment. By installing electronic devices closer to the heat source, the distance between the electronic devices and sensors, actuators, etc. located at the heat source is reduced, improving the accuracy of feedback control. The ability to install electronic devices closer to the heat source is made possible by the improved heat resistance of electronic components built into electronic devices. Among electronic components, commercially available capacitors are often designed to meet standards (e.g., JIS C 5101-1:2019) and have an upper temperature limit of around 150°C (see, for example, Non-Patent Document 1).

[0003] Al as a dielectric material for capacitors that can operate in high-temperature environments ２ O ３ is a useful material. ２ O ３ It has been reported that the capacitance of a capacitor using Al does not change significantly from room temperature to 500°C. ２ O ３ Since the relative dielectric constant (8.5) of Al is small, ２ O ３ If a capacitor using Al is set to, for example, about 100 nF and the size of the electrode is simulated on a substrate of a normal thickness, the size of the electrode will be huge, about 27 cm in diameter, which is far from a practical size.２ O ３ In order to make the capacitor using Al into a practical size, Non-Patent Document 3 ２ O ３ A multilayer capacitor with multiple stacked electrodes has been reported.

[0004] JIS C 5101-1:2019 (https: / / kikakurui.com / c5 / C5101-1-2019-01.html) FY2019 Nuclear System Research and Development Project Results Report, Hokkaido University (https: / / www.nsystemkoubo.jp / result / achv_report / document / r13report.pdf) JH Klootwijk et al., "Ultrahigh Capacitance Density for Multiple ALD-Grown MIM Capacitor Stacks in 3-D Silicon," doi: 10.1109 / LED.2008.923205.

[0005] The following analysis is provided by the present inventors.

[0006] However, Al ２ O ３ Multilayer capacitors using this material require multiple layers to be made into a practical size, and impurities and dust (particles, etc.) get between the layers, reducing their resistance to harsh environments (high radiation environments, high temperature environments).

[0007] An object of the present invention is to provide a capacitor, an electrical device, and a method for manufacturing a capacitor that can contribute to ensuring durability in harsh environments with a practical size.

[0008] A capacitor according to a first aspect has a laminated body, in which an alumina film is laminated on an impurity-doped silicon substrate, interposed between a pair of electrodes.

[0009] An electrical device according to a second aspect includes the capacitor according to the first aspect.

[0010] A method for manufacturing a capacitor according to a third aspect includes the steps of forming an alumina film on an impurity-doped silicon substrate, and forming electrodes on the surfaces of the impurity-doped silicon substrate and the alumina film.

[0011] The first to third aspects mentioned above can contribute to ensuring durability in harsh environments with a practical size.

[0012] FIG. 1 is a cross-sectional view schematically showing an example of the configuration of a capacitor according to the present disclosure. FIG. 1 is a cross-sectional view schematically showing a modified example of the configuration of a capacitor according to the present disclosure. FIG. 2 is a process cross-sectional view schematically showing an example of a manufacturing method for a capacitor according to the present disclosure. FIG. 2 is a cross-sectional view schematically showing the configuration of a sample of a capacitor according to the present disclosure. FIG. 3 is a graph showing the temperature dependence of the capacitance of a sample of a capacitor according to the present disclosure. FIG. 4 is a graph showing the cumulative radiation dose dependence of the capacitance of a sample of a capacitor according to the present disclosure after irradiation with radiation. FIG. 5 is a graph showing the cumulative radiation dose dependence of the capacitance of a sample of a capacitor according to the present disclosure after irradiation with radiation and annealing. FIG. 6 is a graph showing the cumulative radiation dose dependence of the capacitance at 300° C. after irradiation with radiation. FIG. 7 is a schematic diagram showing the configuration of a measuring device used to measure the capacitance of a sample of a capacitor according to the present disclosure. FIG. 8 is a cross-sectional view schematically showing a second modified example of the configuration of a capacitor according to the present disclosure.

[0013] The following description of the embodiments will be made with reference to the drawings. Note that, when reference numerals are used in this application, they are intended solely to aid understanding and are not intended to limit the present invention to the illustrated embodiments. Furthermore, the following embodiments are merely examples and do not limit the present invention.

[0014] [Mode 1] A capacitor according to mode 1 will be described with reference to the drawings. Fig. 1 is a cross-sectional view schematically showing an example of the configuration of a capacitor according to the present disclosure. Fig. 2 is a cross-sectional view schematically showing a modified example of the configuration of a capacitor according to the present disclosure.

[0015] The capacitor 1 has a structure including a laminate 2 in which an impurity-doped silicon substrate 13 and an alumina film 14 are sandwiched between a pair of electrodes 12, 15 (see FIG. 1). The capacitor 1 is configured such that the surface of the laminate 2 facing the electrode 12 is bonded to a support plate 10 via an adhesive layer 11. Alternatively, the capacitor 1 may be configured such that the surface of the laminate 2 facing the electrode 15 is bonded to the support plate 10 via an adhesive layer 11, as shown in FIG. 2.

[0016] The capacitor 1 is configured to be able to withstand harsh environments, in addition to being used in a typical capacitor environment (room temperature to 150°C). The harsh environment referred to here includes, for example, a high-temperature environment of at least 150°C to 500°C, and may further include a radiation environment of at least 1 Gy to 5 MGy, and may be an environment exceeding these upper limit temperatures or upper limit radiation doses. The capacitor 1 is configured to be able to withstand a practical size (for example, an electrode area of ​​100 mm ２ The thickness of the capacitor 1 may be several hundred micrometers. The capacitor 1 may be configured such that the rate of change in capacitance at room temperature after heating to 100°C to 500°C (preferably 200°C to 500°C) is less than 20% (preferably less than 10%, more preferably less than 5%) compared to the capacitance at room temperature before heating. The capacitor 1 may be configured such that the rate of change in capacitance at room temperature after irradiating with an accumulated radiation dose of 5 MGy (0.001 MGy to 5 MGy) of X-rays and annealing at 100°C for 5 minutes is less than 20% (less than 10%, less than 5%) compared to the capacitance before X-ray irradiation. The capacitor 1 may be configured such that the rate of change in capacitance at room temperature after irradiating with an accumulated radiation dose of 5 MGy of X-rays and heating to 300°C is less than 20% (preferably less than 10%, more preferably less than 5%) compared to the capacitance before X-ray irradiation. The capacitor 1 can be incorporated into electrical machinery and equipment such as semiconductor devices, power electronics devices, high-frequency devices, communication equipment, sensing equipment, automobiles, power transmission and distribution equipment, devices for harsh environments, equipment for high-temperature environments, equipment for radiation environments, space equipment, and nuclear reactor equipment.

[0017] The support plate 10 is a substrate that supports the laminate 2 (see FIG. 1 ). For example, a mullite plate, an alumina plate, a sapphire plate, a magnesia plate, or a zirconia plate can be used as the support plate 10. Taking into consideration the thermal expansion coefficients of the impurity-doped silicon substrate 13 and the alumina film 14, it is preferable to use a mullite plate, an alumina plate, or a sapphire plate.

[0018] The adhesive layer 11 is a layer that adheres the laminate 2 to the support plate 10 (see FIG. 1 ). The adhesive layer 11 may be a conductive adhesive layer that protrudes from the area of ​​the laminate 2, in consideration of electrically connecting the electrodes 12 of the laminate 2 to the outside. For the adhesive layer 11, for example, a paste containing conductive particles of platinum, ruthenium, gold, silver, copper, nickel, carbon, or the like in a resin may be used, and in consideration of use in harsh environments, contact resistance, and the like, it is preferable to use a platinum paste.

[0019] The electrodes 12 and 15 are conductive layers for electrically connecting to the outside (see FIG. 1 ). The electrodes 12 and 15 can be made of, for example, Pt, Ru, Au, Al, Ti, Mo, Cu, Cr, Pb, or Zn. A combination of these materials (e.g., Ti / Mo / Au) may also be used to form a laminated electrode. Considering use in harsh environments and contact resistance, Pt and Ru are preferred. The electrodes 12 and 15 can be formed using, for example, radio frequency (RF) sputtering or electron beam (EB) deposition. Considering adhesion to the alumina film 14, RF sputtering is preferred. The electrodes 12 and 15 can be formed using a mask or resist, allowing for highly accurate patterning, thereby controlling the electrode area (i.e., capacitance).

[0020] The impurity-doped silicon substrate 13 is a substrate obtained by doping (adding) intrinsic silicon with impurities (e.g., p-type impurities such as boron and indium) (see FIG. 1). The impurity-doped silicon substrate 13 is chemically resistant, making it easy to clean. To minimize the impact on the performance of the capacitor, it is preferable to use a substrate with a low resistance (e.g., 1 to 100 Ω·cm, preferably 1 to 30 Ω·cm). In order to achieve the desired performance by forming a uniform alumina film 14 on the impurity-doped silicon substrate 13 during atomic layer deposition (ALD), if the surface of the impurity-doped silicon substrate 13 is rough, it is desirable to mirror-polish at least the surface facing the alumina film 14 (preferably both surfaces) to enhance surface flatness. The surface roughness Ra of the impurity-doped silicon substrate 13 can be less than 5 nm, preferably less than 1 nm. The impurity-doped silicon substrate 13 is preferably cleaned (e.g., acid-cleaned) to increase its cleanliness in order to prevent impurities and debris (particles, etc.) on the substrate surface from reducing the adhesion of the electrode 12 and the alumina film 14 and reducing their resistance in harsh environments. By increasing the surface flatness and cleanliness, the precision, reproducibility, and adhesion of the alumina film 14 formed by ALD can be improved. The surface of the impurity-doped silicon substrate 13 is preferably free of particles with a diameter of 10 μm or more immediately before the alumina film 14 is formed.

[0021] The alumina film 14 is made of alumina (Al ２ O ３ ) (see FIG. 1). The alumina film 14 can be single-crystal alumina that does not contain impurities. The alumina film 14 has a single-layer structure. The alumina film 14 can be formed by, for example, the ALD method. The thickness of the alumina film 14 is set according to the desired capacitance, and in principle can be one atomic layer or more thick, for example, 1 nm to 1000 nm.

[0022] Next, the capacitor according to the first embodiment will be described with reference to the drawings. 3A to 3C are cross-sectional views illustrating steps in an example of a method for manufacturing a capacitor according to the present disclosure.

[0023] First, an impurity-doped silicon substrate 13 is prepared, and polishing or cleaning is performed as necessary (for example, when the surface roughness Ra of the impurity-doped silicon substrate 13 is 5 nm or more, or when particles are attached and the cleanliness is low) (see FIG. 3A).

[0024] Next, the impurity-doped silicon substrate 13 is cut to a desired size (see FIG. 3(B)).

[0025] Next, an alumina film 14 is formed on the impurity-doped silicon substrate 13 by the ALD method (see FIG. 3C).

[0026] Next, electrodes 12 and 15 are formed on the surfaces of the impurity-doped silicon substrate 13 and the alumina film 14 (see FIG. 3C), thereby completing the stacked body 2. It does not matter which of the electrodes 12 and 15 is formed first.

[0027] Finally, the surface of the laminate 2 on the electrode 12 side is adhered to a support plate 10 via an adhesive layer 11 (see FIG. 1).

[0028] Next, a harsh environment resistance test for the capacitor according to embodiment 1 will be described with reference to the drawings. FIG. 4 is a cross-sectional view schematically illustrating the configuration of a sample of a capacitor according to the present disclosure. FIG. 5 is a graph illustrating the temperature dependence of the capacitance of a sample of a capacitor according to the present disclosure. FIG. 6 is a graph illustrating the cumulative radiation dose dependence of the capacitance of a sample of a capacitor according to the present disclosure after radiation exposure. FIG. 7 is a graph illustrating the cumulative radiation dose dependence of the capacitance of a sample of a capacitor according to the present disclosure after radiation exposure and annealing. FIG. 8 is a graph illustrating the cumulative radiation dose dependence of the capacitance of a sample of a capacitor according to the present disclosure at 300°C after radiation exposure. FIG. 9 is a schematic diagram illustrating the configuration of a measuring device used to measure the capacitance of a sample of a capacitor according to the present disclosure.

[0029] [Sample Fabrication] Capacitor samples were fabricated as follows so that the designed capacitance was about 100 nF (see FIG. 4).

[0030] In the capacitor sample, the impurity-doped silicon substrate 13 had a thickness of 520±20 μm, a diameter of 4 inches, a conduction type of p-type, a resistance value of 1 to 100 Ω·cm, a (100) orientation, a surface condition of the surface to be used that was mirror-polished, and cleaning that was performed with strong acid before the ALD process. The thickness of the impurity-doped silicon substrate 13 is not particularly limited, and it is sufficient if it has a certain degree of strength and is thick enough to connect the impurity-doped silicon substrate 13 to the electrodes 12.

[0031] The prepared impurity-doped silicon substrate 13 was cut into a 62.8 mm2 area using a diamond cutter. ２ The diamond cutter used was a blade cutter (Musashino Electronics Co., Ltd.: MPC-200), with the blade rotation speed set to 130 rpm and the sample moving speed set to 0.9 mm / min.

[0032] An alumina film 14 was formed on the cut impurity-doped silicon substrate 13 by the ALD method. The thickness of the alumina film 14 was set to 50 nm. For the film formation, an ALD apparatus (AV328-A9 manufactured by Suga Seisakusho Co., Ltd.) was used, the film formation temperature was set to 600° C., the number of cycles was set to 500, and the material used was H ２ O and TMA (Tri-Methyl Aluminum) were used, and the material temperature was set to 30°C.

[0033] Electrodes 12 and 15 were formed by RF sputtering on both sides of a stacked body formed by forming an alumina film 14 on an impurity-doped silicon substrate 13. The thickness of the electrodes 12 and 15 was set to 200 nm, the film formation temperature was set to 150° C., the pressure was set to about 1 Pa, and the material of the electrodes 12 and 15 was set to Pt.

[0034] The electrode 12 side of the laminate 2, which includes the electrode 12, impurity-doped silicon substrate 13, alumina film 14, and electrode 15, was bonded to a support plate 10 using an adhesive layer 11. A conductor 17 was bonded to the adhesive layer 11, and a conductor 18 was bonded to the electrode 15 using an adhesive layer 16, followed by firing. A SSAT square plate manufactured by Nikkato Corporation was used for the support plate 10. Pt paste (TR-7605 manufactured by Tanaka Kikinzoku Kogyo Co., Ltd.) was used for the adhesive layers 11 and 16, and the thickness of the adhesive layers 11 and 16 was approximately 1 mm. Pt wire was used for the conductor, and the Pt paste described above was used to bond the conductor. The firing conditions were 1000°C in air for 1 hour.

[0035] The samples prepared as described above were subjected to the following severe environment resistance test.

[0036] [Actual Capacitance] When the capacitance of samples prepared so as to have a designed capacitance of about 100 nF was measured in air at room temperature, the actual capacitance was 96 to 125 nF.

[0037] The capacitance was measured using a measuring device as shown in Figure 9. In the measuring device, a quartz chamber for accommodating the sample was placed in a vacuum displacement electric furnace (Furutech: FT-01VAC-50). The quartz chamber was filled with Ar gas (Ar: 95.14%, H ２ The chamber has an inlet through which Ar gas (4.86%) flows from a cylinder with its flow rate adjusted by a flow regulator, and an outlet through which the Ar gas in the quartz chamber is discharged to the outside air. Two coaxial cables (copper) electrically connected to an LCR meter (HIOKI Corporation: IM3536) extend into the quartz chamber and into the electric furnace, with their tips connected to leads 17 and 18 shown in Figure 4. Also within the quartz chamber, a K-type thermocouple electrically connected to a multimeter extends into the electric furnace, with its tip connected (contact, pressure welded) to the sample (support plate 10). The LCR meter charges the sample (capacitor) with a known current through the coaxial cables, measures the resulting voltage at a measurement frequency of 1 kHz, and calculates the capacitance.

[0038] [High-Temperature Resistance Test] In the high-temperature resistance test, the capacitance of the sample was measured in air without radiation exposure after heating from room temperature to 500°C. The measurement device shown in Figure 9 was used for the capacitance measurements. The temperature was changed at a rate of 10°C / min, and the temperature was allowed to stabilize for approximately 10 minutes before measurements were taken at each temperature. The capacitance of the sample after heating to each temperature was as shown in Figure 5. In other words, the rate of change in capacitance at each temperature relative to the initial value (capacitance at room temperature) was less than 20%. A rate of change of less than 20% is unlikely to pose a problem in the electronic circuits in which it is intended to be used. Looking at the overall trend, the capacitance at 100°C appears to be an irregular value, and the capacitance variation at each temperature from the initial value is expected to be less than 10%. If the stabilization time at each temperature is extended, the capacitance variation at each temperature from the initial value is expected to be less than 5%. This suggests that the sample can be applied to electronic devices that require precise control in high-temperature environments.

[0039] [Radiation Resistance Test] In the radiation resistance test, the capacitance of samples was measured after irradiation with cumulative radiation doses of 0 to 5 MGy in air at room temperature. Radiation was performed using an X-ray irradiation device (rigaku, 4037B: Cr target, voltage 20 kV, current 50 mA, dose rate 50 kGy / h). A cellulose triacetate (CTA) film dosimeter was used to measure the cumulative radiation dose. The capacitance was measured using the measuring device shown in Figure 9. The capacitance measurement results for samples irradiated with each cumulative radiation dose are shown in Figure 6. In other words, the capacitance decreased with increasing cumulative radiation dose. This decrease in capacitance after radiation exposure was temporary. When samples irradiated with each cumulative radiation dose were annealed in air at 100°C for 5 minutes, the capacitance recovered to approximately the capacitance at a cumulative radiation dose of 0 Gy (approximately the initial value shown in Figure 6), regardless of the cumulative radiation dose, as shown in Figure 7. The capacitance change rate at each integrated radiation dose relative to the capacitance at an integrated radiation dose of 0 Gy after recovery was less than 10%. A change rate of less than 10% is unlikely to pose a problem in the electronic circuits in which it is intended to be used. Looking at the overall trend, the capacitance at an integrated radiation dose of 1000 Gy appears to be an irregular value, and if the annealing time is extended, the capacitance change rate at each integrated radiation dose relative to the capacitance at an integrated radiation dose of 0 Gy after recovery is likely to be less than 5%. Therefore, even if exposed to radiation, annealing can be performed to restore the initial state, making it applicable to electronic devices that require precise control. Furthermore, when used in a high-temperature, radiation-sensitive environment, the device remains in a constantly annealed state, allowing for continued use without performance degradation.

[0040] [High-Temperature Radiation Resistance Test] In the high-temperature radiation resistance test, samples were irradiated with cumulative radiation doses of 0 to 5 MGy in air at room temperature, and then heated to 300°C in an Ar gas atmosphere. The capacitance of the samples was measured. The same X-ray irradiation device as described above was used for radiation irradiation. A cellulose triacetate film dosimeter was used to measure the cumulative radiation dose. The measurement device shown in Figure 9 was used to measure the capacitance. The capacitance measurement results for samples irradiated with each cumulative radiation dose and heated to 300°C are shown in Figure 8. That is, the capacitance change rate for each cumulative radiation dose relative to the capacitance at 300°C with a cumulative radiation dose of 0 Gy was less than 20%. A change rate of less than 20% is unlikely to pose a problem in the electronic circuits in which the samples are intended to be used. Looking at the overall trend, the capacitance at a cumulative radiation dose of 1000 Gy appears to be an irregular value, and the capacitance change rate for each cumulative radiation dose relative to the capacitance at 300°C with a cumulative radiation dose of 0 Gy is expected to be less than 10%. If the time of heating to 300°C is extended, the rate of change in capacitance at each integrated radiation dose relative to the capacitance at an integrated radiation dose of 0 Gy is thought to be less than 5%. This means that the device can be applied to electronic devices that require precise control in high-temperature environments where they are susceptible to radiation exposure.

[0041] According to the first aspect, it is possible to contribute to ensuring durability in harsh environments with a practical size by interposing the impurity-doped silicon substrate 13 between the alumina film 14 and the electrode 12. In other words, it is possible to realize a capacitor 1 that has a practical size, a sufficiently large capacitance, and operates stably in high-temperature and radiation environments.

[0042] Furthermore, according to the first aspect, by introducing a very simple process of depositing the alumina film 14 on the impurity-doped silicon substrate 13 by the ALD method, it is possible to manufacture the capacitor 1 at low cost and withstand harsh environments. In other words, it is possible to provide an electronic system that is robust against unprecedented high temperature conditions (e.g., 650°C), temperature fluctuations between high temperature and room temperature, and radiation (e.g., 5 MGy), and it can also be used in the nuclear and aerospace fields.

[0043] Furthermore, by increasing the upper limit of the operable temperature of the capacitor 1, it becomes possible to place the capacitor 1 closer to the heat generation source in a factory, an automobile, etc., thereby improving the accuracy of the feedback control.

[0044] Furthermore, according to the first embodiment, the dielectric layer has a single-layer structure of the alumina film 14, so that impurities and dust (particles, etc.) do not get between the layers as in a multilayer capacitor, and durability in harsh environments can be ensured. In other words, if impurities or dust are present between the layers, they may expand, react with surrounding materials, or degas, deteriorating the adhesion and electrical properties of the film. However, according to the first embodiment, impurities and dust can be prevented from getting between the layers, so stable adhesion and electrical properties of the film can be ensured, and durability in harsh environments can be ensured.

[0045] [Mode 2] A capacitor according to mode 2 will be described with reference to the drawings. Fig. 10 is a cross-sectional view schematically showing a second modified example of the configuration of a capacitor according to the present disclosure.

[0046] The capacitor 1 has a structure in which a laminate in which an alumina film 14 is laminated on an impurity-doped silicon substrate 13 is interposed between a pair of electrodes 12 and 15 .

[0047] According to the second aspect, by interposing the impurity-doped silicon substrate 13 between the alumina film 14 and the electrode 12, it is possible to contribute to ensuring durability in a harsh environment with a practical size.

[0048] Some or all of the above aspects may be described as, but are not limited to, the following supplementary notes.

[0049] [Appendix 1] A capacitor comprising a laminate in which an alumina film is laminated on an impurity-doped silicon substrate, interposed between a pair of electrodes. [Appendix 2] The capacitor according to Appendices 1, wherein the impurity-doped silicon substrate is a p-type silicon substrate. [Appendix 3] The capacitor according to Appendices 1 or 2, wherein the rate of change in capacitance when heated to 100°C to 500°C, relative to the capacitance at room temperature before heating, is less than 20%. [Appendix 4] The capacitor according to any one of Appendices 1 to 3, wherein the rate of change in capacitance at room temperature after irradiating with X-rays at an accumulated radiation dose of 5 MGy and annealing at 100°C for 5 minutes, relative to the capacitance before X-ray irradiation, is less than 20%. [Appendix 5] The capacitor according to any one of Appendices 1 to 4, wherein the rate of change in capacitance when irradiated with X-rays at an accumulated radiation dose of 5 MGy and heated to 300°C, relative to the capacitance before X-ray irradiation, is less than 20%. [Appendix 6] The capacitor according to any one of Appendices 1 to 5, wherein the alumina film has a thickness of 1 nm to 1000 nm. [Appendix 7] The capacitor according to any one of Appendices 1 to 6, wherein the impurity-doped silicon substrate has a surface roughness Ra of less than 5 nm. [Appendix 8] The capacitor according to any one of Appendices 1 to 7, wherein no particles having a diameter of 10 μm or more are present between the impurity-doped silicon substrate and the alumina film. [Appendix 9] The capacitor according to any one of Appendices 1 to 8, wherein the pair of electrodes are made of Pt or Ru. [Appendix 10] The capacitor according to any one of Appendices 1 to 9, wherein the alumina film is a film formed by an ALD method. [Appendix 11] The capacitor according to any one of Appendices 1 to 10, wherein the pair of electrodes are electrodes formed by an RF sputtering method. [Appendix 12] The capacitor according to any one of Appendices 1 to 11, comprising a support plate bonded to one of the pair of electrodes. [Supplementary Note 13] The capacitor according to Supplementary Note 12, wherein the support plate is an alumina substrate. [Supplementary Note 14] An electrical device comprising the capacitor according to any one of Supplements 1 to 13. [Supplementary Note 15] A method for manufacturing a capacitor, comprising: forming an alumina film on an impurity-doped silicon substrate; and forming electrodes on each surface of the impurity-doped silicon substrate and the alumina film.[Appendix 16] The method for manufacturing a capacitor according to appendix 15, further comprising the step of bonding the electrode on the surface of the impurity-doped silicon substrate or the alumina film to a support plate.

[0050] The disclosures of the above-mentioned non-patent documents are incorporated herein by reference and may be used as the basis or part of the present invention, as necessary. Modifications and adjustments of the embodiments and examples are possible within the scope of the entire disclosure of the present invention (including the claims and drawings), and further based on the basic technical concepts thereof. Furthermore, various combinations and selections (or non-selections, as necessary) of the various disclosed elements (including each element of each claim, each element of each embodiment or example, each element of each drawing, etc.) are possible within the scope of the entire disclosure of the present invention. In other words, the present invention naturally includes various modifications and alterations that would be possible by a person skilled in the art in accordance with the entire disclosure and technical concepts, including the claims and drawings. Furthermore, with regard to the numerical values ​​and numerical ranges described in this application, any intermediate values, lower values, and smaller ranges are deemed to be included, even if not explicitly stated. Furthermore, the disclosures of the above-cited documents, when used in part or in whole in combination with the disclosures herein as part of the disclosure of the present invention, are also deemed to be included in (belong to) the disclosures of this application, in accordance with the spirit of the present invention.

[0051] REFERENCE SIGNS LIST 1 capacitor 2 laminate 10 support plate 11, 16 adhesive layer 12, 15 electrode 13 impurity-doped silicon substrate 14 alumina film 17, 18 conducting wire

Claims

1. A capacitor in which a laminate of an alumina film on an impurity-doped silicon substrate is sandwiched between a pair of electrodes.

2. The capacitor of claim 1, wherein said impurity doped silicon substrate is a p-type silicon substrate.

3. The capacitor according to claim 1 or 2, in which the rate of change in capacitance when heated to 100° C. to 500° C. is less than 20% compared to the capacitance at room temperature before heating.

4. A capacitor according to any one of claims 1 to 3, in which the change in capacitance at room temperature after exposure to an accumulated dose of 5 MGy of X-rays and annealing at 100°C for 5 minutes is less than 20% compared to the capacitance before X-ray exposure.

5. A capacitor according to any one of claims 1 to 4, in which the rate of change in capacitance when irradiated with an accumulated dose of 5 MGy of X-rays and heated to 300°C is less than 20% compared to the capacitance before X-ray irradiation.

6. The capacitor according to any one of claims 1 to 5, wherein the alumina film has a thickness of 1 nm to 1000 nm.

7. The capacitor according to claim 1, wherein the impurity-doped silicon substrate has a surface roughness Ra of less than 5 nm.

8. The capacitor according to any one of claims 1 to 7, which is configured so that no particles having a diameter of 10 µm or more exist between said impurity-doped silicon substrate and said alumina film.

9. The capacitor according to any one of claims 1 to 8, wherein the pair of electrodes is made of Pt or Ru.

10. The capacitor according to any one of claims 1 to 9, wherein the alumina film is a film formed by an ALD method.

11. The capacitor according to any one of claims 1 to 10, wherein the pair of electrodes are electrodes formed by RF sputtering.

12. A capacitor as claimed in any one of claims 1 to 11, further comprising a support plate bonded to one of the pair of electrodes.

13. The capacitor of claim 12, wherein said support plate is an alumina substrate.

14. An electrical device comprising a capacitor according to any one of claims 1 to 13.

15. A method for manufacturing a capacitor, comprising: forming an alumina film on an impurity-doped silicon substrate; and forming electrodes on each surface of the impurity-doped silicon substrate and the alumina film.

16. The method of manufacturing a capacitor according to claim 15, further comprising the step of adhering said electrode on the surface of said impurity-doped silicon substrate or said alumina film to a support plate.

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