Cable state testing circuit

Abstract

A cable (105, 205) state testing circuit, comprising an on-die termination resistor module (101, 201), a termination discharge module (102, 202), a state testing signal sending module (103, 203) and a state testing signal sampling and determining module (104, 204), wherein the on-die termination resistor module (101, 201) provides termination resistance matching a transmission line; the termination discharge module (102, 202) discharges a high-speed interface of a chip to ground before the state of a cable (105, 205) is tested; the state testing signal sending module (103, 203) is responsible for sending a testing signal when the state of the cable (105, 205) is tested; and after the state testing signal sending module (103, 203) sends the testing signal, the state testing signal sampling and determining module (104, 204) samples a voltage state on the high-speed interface, determines the state of the cable (105, 205) on the basis of a sampling data result, and locates the position of a fault.

Description

A cable status detection circuit Technical Field

[0001] The present invention relates to a cable detection circuit, and in particular to locating open circuit, short circuit, and fault positions of a cable. Background Art

[0002] With the continuous development of the integrated circuit industry, the requirements for chip safety performance are becoming increasingly higher. In particular, with the explosion of automotive chips in recent years, automotive chips have higher requirements than ordinary commercial chips, and also have relatively high requirements for safety and self-detection. Especially for high-speed interfaces, cable status detection is particularly important. The more common cable status detection circuit is to add two low-speed interfaces on the chip in addition to the high-speed interface to detect the status of the high-speed signal line. This increases the cost for the already tight pin chip. In addition, this detection circuit cannot locate the fault location, but can only detect whether the output line is broken or shorted (to the power supply or to the ground).

[0003] Summary of the Invention

[0004] The technical problem to be solved by the present invention is to detect the status of the cable, including short circuit, open circuit and fault location, through a high-speed interface without adding a test pin in a high-speed signal transmission system.

[0005] The technical solution adopted by the present invention to solve its technical problem is:

[0006] A cable status detection circuit according to the present invention includes an on-chip termination resistor module, a termination discharge module, a status detection signal sending module, and a status detection signal sampling and judgment module. The on-chip termination resistor module is connected to the termination discharge module, the status detection signal sending module, and the status detection signal sampling and judgment module, and all are connected to a high-speed interface. The on-chip termination resistor module provides termination resistance, the termination discharge module can discharge the chip high-speed interface to ground, the status detection signal sending module can send a status detection signal, and the status detection signal sampling and judgment module can sample the high-speed interface voltage.

[0007] Preferably, the cable status detection circuit performs cable status detection only through the high-speed interface without relying on other interfaces.

[0008] Preferably, the termination resistor provided by the on-chip termination resistor module matches the cable impedance.

[0009] Preferably, the cable status detection circuit can operate in a coaxial or differential line transmission mode.

[0010] Preferably, the status detection signal sampling and judgment module includes a comparator, which compares the high-speed interface voltage sampling signal with a preset threshold voltage through the comparator and outputs the result, and judges the impedance matching degree between the cable resistance and the on-chip termination resistance module based on the output result, and then judges the type of cable fault.

[0011] Preferably, the cable fault type includes one or more of the following fault types: differential P-end short circuit, differential P-end open circuit, differential N-end short circuit, differential N-end open circuit, short circuit between differential P-end and N-end, coaxial P-end short circuit, coaxial P-end open circuit.

[0012] Preferably, the state detection signal sampling and judgment module locates the fault position according to the time interval at which the comparator output value changes.

[0013] Preferably, the cable status detection circuit can operate at a high-speed circuit transmitting end or a receiving end.

[0014] The beneficial effects of the present invention are that the state of the cable is directly detected through a high-speed interface, and the position where the cable fault occurs is located, and the circuit structure is simple and easy to integrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present invention will be further described below with reference to the accompanying drawings and examples.

[0016] FIG1 is an overall module diagram of the present invention

[0017] Figure 2 is a schematic diagram of fault injection at the P end of a differential cable.

[0018] Figure 3 is a schematic diagram of fault injection at the N end of a differential cable.

[0019] Figure 4 is a schematic diagram of fault injection between the P and N ends of a differential cable.

[0020] Figure 5 is a schematic diagram of fault injection at the P end of a coaxial cable.

[0021] Figure 6 is a schematic diagram of the comparator in the state detection signal sampling and judgment module

[0022] Figure 7 is a schematic diagram of the output of the state detection signal sampling and judgment module when the P / N terminal output is disconnected

[0023] Figure 8 is a schematic diagram of the output of the P / N terminal output signal sampling and judgment module under the power supply short circuit state

[0024] Figure 9 is a schematic diagram of the output of the status detection signal sampling and judgment module after the P terminal sends a status detection signal when the P terminal and N terminal output are short-circuited

[0025] Figure 10 is a schematic diagram of the output of the status detection signal sampling and judgment module after the N terminal sends a status detection signal when the P terminal and N terminal output are short-circuited

[0026] Wherein: 101 P-end on-chip termination resistor module 102 P-end termination discharge module 103 P-end status detection signal sending module 104 P-end status detection signal sampling and judgment module 105 P-end cable 106 P-end remote termination resistor 1 P-end termination discharge module control signal 2 P-end termination resistor, status detection signal sending module and status detection signal sampling and judgment module control signal C11 P-end proximal termination capacitor C12 P-end remote termination capacitor 201 N-end on-chip termination resistor module 202 N-end termination discharge module 203 N-end status detection signal sending module 204 N-end status detection signal sampling and judgment module 205 N-end cable 206 N-end remote termination resistor 3 N-end discharge module control signal 4 N-end termination resistor, status detection signal sending module and status detection signal sampling and judgment module control signal C21 N-end proximal termination capacitor C22 N-end remote termination capacitor RT N-end off-chip termination resistor when connecting coaxial line DETAILED DESCRIPTION

[0027] The present invention provides a cable status detection circuit, as shown in FIG1 .

[0028] The modules it contains are: on-chip termination resistor module 101 (201), termination discharge module 102

[0029] (202), status detection signal sending module 103 (203), status detection signal sampling and judgment module 104 (204).

[0030] Connection method: Control signal 1 (3) is connected to the termination discharge module 102 (202) to control the termination discharge module, and control signal 2 (4) is used to control the on-chip termination resistor module 101 (201), the state detection signal sending module 103 (203), and the state detection signal sampling and judgment module 104 (204). The on-chip termination resistor module 101 (201), the termination discharge module 102 (202), the state detection signal sending module 103 (203), and the state detection signal sampling and judgment module 104 (204) are simultaneously connected to the high-speed interface.

[0031] Working principle:

[0032] The characteristic impedance of a commonly used high-speed signal transmission line is 50Ω. The transmission line and the high-speed interface are connected by AC coupling through a capacitor. According to signal transmission theory, if the impedance is continuous, a voltage close to 1 / 2 of the power supply voltage will be seen at the high-speed interface. Therefore, the impedance of the on-chip termination resistor module 101 (201) used in this cable status detection circuit is 50Ω. When performing cable status detection, the output voltage of the high-speed interface is pulled to the ground through the termination discharge module 102 (202), and then the termination discharge module 102 (203) is turned on by the control signal 1 (3). 02) is turned off, and through the control signal 2 (4), the status detection signal sending module 103 (203) is turned on, and the on-chip termination resistor module 101 (201) is turned on, so that the 50Ω termination resistor is connected to the power supply. When the on-chip termination resistor module 101 (201) is turned on, the status detection signal sampling and judgment module 104 (204) is also enabled to sample and compare the voltage on the high-speed interface. The frequency of its sampling clock sa_clk can be determined according to the accuracy of locating the fault position as needed. The higher the frequency, the higher the accuracy. The state detection signal sampling and judgment module 104 (204) includes a comparator, which has two preset threshold voltages (as shown in FIG6 ), namely vref1 (less than 1 / 2 of the power supply voltage) and vref2 (greater than 1 / 2 of the power supply voltage), and different threshold voltages can be set according to actual applications. The state detection signal sampling and judgment module 104 (204) compares the high-speed interface voltage sampling value with the threshold voltage through the comparator and outputs the comparison result. The state detection signal sampling and judgment module 104 (204) judges the state of the cable according to the output value of the voltage comparator. If the characteristic impedance of the transmission line matches the on-chip termination resistor module 101 (201), the output of the comparator for sampling and comparing the state detection signal sampling and judgment module 104 (204) with vref1 is 1, and the output of the comparator for sampling and comparing the state detection signal sampling and judgment module 104 (204) with vref2 is 0. If the characteristic impedance of the transmission line is larger than that of the on-chip termination resistor module 101 (201), the comparator output of the state detection signal sampling and judgment module 104 (204) for sampling and comparison with vref1 is 1, and the comparator output for sampling and comparison with vref2 is 1. If the characteristic impedance of the transmission line is smaller than that of the on-chip termination resistor module 101 (201), the comparator output of the state detection signal sampling and judgment module 104 (204) for sampling and comparison with vref1 is 0, and the comparator output for sampling and comparison with vref2 is 0. For a specific transmission line material, its transmission delay is certain, so the location of the cable fault can be determined by the time interval of the comparator output value change in the state detection signal sampling and judgment module 104 (204). The longer the time interval of the comparator output value change, the farther the cable fault location is from the high-speed interface.

[0033] This cable status detection circuit can be applied to a high-speed interface connected via a coaxial cable, and can also be applied to a high-speed interface connected via a differential cable.

[0034] For different fault injections for differential cable connections, the application examples are as follows:

[0035] 1. As shown in FIG2 , a circuit-break fault is injected into the P-end transmission line 105. After the P-end on-chip termination resistor module 101 is connected to the power supply and the status detection signal sending module 103 sends a detection signal, the status detection signal sampling and judgment module 104 samples the voltage status on the high-speed interface in real time. Since the transmission line 105 is broken at this time, when the signal has not yet been transmitted to the fault injection point, the signal is still continuous. The voltage seen on the high-speed interface is close to 1 / 2 of the power supply voltage. Therefore, the comparator output compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 is 1, and the comparator output compared with the vref2 reference voltage is 0. When the signal is transmitted to the fault injection point, When the signal is reflected, the voltage seen on the high-speed interface is higher than the reference voltage vref2. At this time, the output of the comparator compared with the reference voltage vref1 in the status detection signal sampling and judgment module 104 is 1, and the output of the comparator compared with the reference voltage vref2 is 1. The position of the fault injection point can be determined by the time interval t1 between the moment when the output of the comparator compared with the reference voltage vref1 in the status detection signal sampling and judgment module 104 changes from 0 to 1 and the moment when the output of the comparator compared with the reference voltage vref2 changes from 0 to 1 (as shown in Figure 7). The larger t1 is, the farther the fault injection point is from the high-speed interface.

[0036] Second, as shown in FIG2 , a short circuit fault (short circuit with power supply or ground) is injected into the P-end transmission line 105. After the P-end on-chip termination resistor module 101 is connected to the power supply and the status detection signal sending module 103 sends a detection signal, the status detection signal sampling and judgment module 104 samples the voltage state on the high-speed interface in real time. Since the transmission line 105 is short-circuited at this time, when the signal has not yet been transmitted to the fault injection point, the signal is still continuous, and the voltage seen on the high-speed interface is close to 1 / 2 of the power supply voltage. Therefore, the comparator output compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 is 1, while the comparator output compared with the vref2 reference voltage is 0. When the signal is transmitted to the fault injection point, signal reflection occurs. At this time, the voltage seen on the high-speed interface is lower than the reference voltage vref1. At this time, the comparator output compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 is 0, while the comparator output compared with the vref2 reference voltage is 0. The position of the fault injection point can be determined by comparing the status detection signal sampling and judgment module 104 with the vref1 reference voltage. The time interval t1 from the time when the comparator output of the reference voltage comparison changes from 0 to 1 to the time when the comparator output of the reference comparison with vref1 changes from 1 to 0 is determined (as shown in Figure 8). The larger t1 is, the farther the fault injection point is from the high-speed interface.

[0037] Third, as shown in FIG3 , a circuit-breaking fault is injected into the N-terminal transmission line 205. After the N-terminal on-chip termination resistor module 201 is connected to the power supply and the status detection signal sending module 203 sends the detection signal, the status signal detection sampling module 204 samples the voltage status on the high-speed interface in real time. Since the transmission line 205 is broken at this time, when the signal has not yet been transmitted to the fault injection point, the signal is still continuous, and the voltage seen on the high-speed interface is close to 1 / 2 of the power supply voltage. Therefore, the comparator output compared with the vref1 reference voltage in the status detection signal sampling judgment module 204 is 1, and the comparator output compared with the vref2 reference voltage is 0. When the signal is transmitted to the fault injection point, When the signal is reflected, the voltage seen on the high-speed interface is higher than the reference voltage vref2. At this time, the output of the comparator compared with the reference voltage vref1 in the status detection signal sampling and judgment module 204 is 1, and the output of the comparator compared with the reference voltage vref2 is 1. The location of the fault injection point can be determined by the time interval t1 from the moment when the output of the comparator compared with the reference voltage vref1 in the status detection signal sampling and judgment module 204 changes from 0 to 1 to the moment when the output of the comparator compared with the reference voltage vref2 changes from 0 to 1 (as shown in Figure 7). The larger t1 is, the farther the fault injection point is from the high-speed interface.

[0038] Fourth, as shown in FIG3 , a short circuit fault (short circuit with power supply or ground) is injected into the N-end transmission line 205. After the N-end on-chip termination resistor module 201 is connected to the power supply and the status detection signal sending module 203 sends a detection signal, the status signal detection sampling module 204 samples the voltage status on the high-speed interface in real time. Since the transmission line 205 is short-circuited at this time, when the signal has not yet been transmitted to the fault injection point, the signal is still continuous. The voltage seen on the high-speed interface is close to 1 / 2 of the power supply voltage. Therefore, the comparator output compared with the vref1 reference voltage in the status detection signal sampling judgment module 204 is 1, and the comparator output compared with the vref2 reference voltage is 0. When the signal is transmitted to the fault injection point, the voltage on the high-speed interface is 0. When the fault injection point is reached, signal reflection occurs. At this time, the voltage seen on the high-speed interface is lower than the reference voltage vref1. At this time, the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 204 is 0, and the output of the comparator compared with the vref2 reference voltage is 0. The location of the fault injection point can be determined by the time interval t1 from the moment when the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 204 changes from 0 to 1 to the moment when the output of the comparator compared with the vref2 reference voltage changes from 1 to 0 (as shown in Figure 8). The larger t1 is, the farther the fault injection point is from the high-speed interface.

[0039] Fifth, as shown in FIG4 , a short circuit fault is injected between the P-end transmission line 105 and the N-end transmission line 205. After the P-end on-chip termination resistor module 101 is connected to the power supply and the status detection signal sending module 103 sends the detection signal, the status detection signal sampling and judgment module 104 samples the voltage status on the high-speed interface in real time. Since there is a short circuit between the transmission lines 105 and 205 at this time, when the signal has not yet been transmitted to the fault injection point, the signal is still continuous. The voltage seen on the high-speed interface is close to 1 / 2 of the power supply voltage. Therefore, the comparator output compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 is 1, while the comparator output compared with the vef2 reference voltage is 0. When the signal is transmitted to the fault injection point, a signal will be seen at the N end of the high-speed interface. At this time, the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 204 is 1, and the output of the comparator compared with the vref2 reference voltage is 0. The location of the fault injection point can be determined by the time interval t1 from the moment when the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 changes from 0 to 1 to the moment when the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 204 changes from 0 to 1 (as shown in Figure 9). The larger t1 is, the farther the fault injection point is from the high-speed interface.

[0040] 6. As shown in FIG4 , a short circuit fault is injected between the P-end transmission line 105 and the N-end transmission line 205. After the N-end on-chip termination resistor module 201 is connected to the power supply and the status detection signal sending module 203 sends the detection signal, the status detection signal sampling and judgment module 204 samples the voltage status on the high-speed interface in real time. Since there is a short circuit between the transmission lines 105 and 205 at this time, when the signal has not yet been transmitted to the fault injection point, the signal is still continuous. The voltage seen on the high-speed interface is close to 1 / 2 of the power supply voltage. Therefore, the comparator output of the status detection signal sampling and judgment module 204 that compares with the reference voltage vref1 is 1, while the comparator output of the status detection signal sampling and judgment module 204 that compares with the reference voltage vef2 is 0. When the signal is transmitted to the fault injection point, a signal will be seen at the P end of the high-speed interface. At this time, the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 is 1, while the output of the comparator compared with the vref2 reference voltage is 0. The location of the fault injection point can be determined by the time interval t1 from the moment when the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 204 changes from 0 to 1 to the moment when the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 changes from 0 to 1 (as shown in Figure 10). The larger t1 is, the farther the fault injection point is from the high-speed interface.

[0041] For different fault injections on coaxial line connections, the application examples are as follows:

[0042] 1. As shown in FIG5 , RT is a termination resistor used to match the termination resistor. A circuit-break fault is injected into the P-end transmission line 105. After the P-end on-chip termination resistor module 101 is connected to the power supply and the status detection signal sending module 103 sends a detection signal, the status detection signal sampling and judgment module 104 samples the voltage status on the high-speed interface in real time. Since the transmission line 105 is broken at this time, when the signal has not yet been transmitted to the fault injection point, the signal is still continuous. The voltage seen on the high-speed interface is close to 1 / 2 of the power supply voltage. Therefore, the comparator output compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 is 1, and the comparator output compared with the vref2 reference voltage is 0. When the signal is transmitted to the fault injection point, , signal reflection will occur. At this time, the voltage seen on the high-speed interface is higher than the reference voltage vref2. At this time, the output of the comparator compared with the reference voltage vref1 in the status detection signal sampling and judgment module 104 is 1, and the output of the comparator compared with the reference voltage vref2 is 1. The location of the fault injection point can be determined by the time interval t1 from the moment when the output of the comparator compared with the reference voltage vref1 in the status detection signal sampling and judgment module 104 changes from 0 to 1 to the moment when the output of the comparator compared with the reference voltage vref2 changes from 0 to 1 (as shown in Figure 7). The larger t1 is, the farther the fault injection point is from the high-speed interface.

[0043] Second, as shown in FIG5 , a short circuit fault (short circuit with power supply or ground) is injected into the P-end transmission line 105. After the P-end on-chip termination resistor module 101 is connected to the power supply and the status detection signal sending module 103 sends a detection signal, the status detection signal sampling and judgment module 104 samples the voltage state on the high-speed interface in real time. Since the transmission line 105 is short-circuited at this time, when the signal has not yet been transmitted to the fault injection point, the signal is still continuous. The voltage seen on the high-speed interface is close to 1 / 2 of the power supply voltage. Therefore, the comparator output compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 is 1, and the comparator output compared with the vref2 reference voltage is 0. When the signal is transmitted to When the fault injection point is reached, signal reflection occurs. At this time, the voltage seen on the high-speed interface is lower than the reference voltage vref1. At this time, the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 is 0, and the output of the comparator compared with the vref2 reference voltage is 0. The location of the fault injection point can be determined by the time interval t1 from the moment when the output of the comparator compared with the vref1 reference voltage in the status detection signal sampling and judgment module 104 changes from 0 to 1 to the moment when the output of the comparator compared with the vref1 reference voltage changes from 1 to 0 (as shown in Figure 8). The larger t1 is, the farther the fault injection point is from the high-speed interface.

[0044] The above description is merely a preferred embodiment of the present invention and does not constitute any form of limitation to the present invention. Any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention are still within the scope of the technical solution of the present invention.

[0045] In summary, the present invention fully meets the needs of industrial development in terms of structural design, practicality and cost-effectiveness. The disclosed structure also has an unprecedented innovative structure, is novel, creative and practical, and meets the requirements of relevant new patents. Therefore, an application is filed in accordance with the law.

Claims

1. A cable status detection circuit, comprising an on-chip termination resistor module, a termination discharge module, a status detection signal sending module, and a status detection signal sampling and judgment module, characterized in that: The on-chip termination resistor module is connected to the termination discharge module, the connection status detection signal sending module, and the connection status detection signal sampling and judgment module, and all are connected to the high-speed interface. The on-chip termination resistor module provides a termination resistor. The termination discharge module can discharge the chip high-speed interface to the ground. The state detection signal sending module can send a state detection signal, The state detection signal sampling and judging module can perform sampling and judging on the high-speed interface voltage.

2. A cable status detection circuit according to claim 1, characterized in that: The cable status detection circuit performs cable status detection only through the high-speed interface without relying on other interfaces.

3. A cable status detection circuit according to claim 1, characterized in that: The termination resistance provided by the on-chip termination resistance module matches the cable impedance.

4. A cable status detection circuit according to claim 1, characterized in that: The cable status detection circuit can operate in a coaxial or differential line transmission mode.

5. The cable status detection circuit according to claim 1, characterized in that: The state detection signal sampling and judgment module includes a comparator, The state detection signal sampling and judgment module compares the high-speed interface voltage sampling signal with the preset threshold voltage through a comparator and outputs the comparison, and judges the impedance matching degree between the cable resistance and the on-chip termination resistance module through the output result, and then judges the cable fault type.

6. A cable status detection circuit according to claim 5, characterized in that: The cable fault type includes one or more of the following fault types: differential P-terminal short circuit, differential P-terminal open circuit, differential N-terminal short circuit, differential N-terminal open circuit, short circuit between differential P-terminal and N-terminal, coaxial P-terminal short circuit, and coaxial P-terminal open circuit.

7. The cable status detection circuit according to claim 1, characterized in that: The state detection signal sampling and judgment module locates the fault position according to the time interval at which the comparator output value changes.

8. A cable status detection circuit according to claim 1 to 5 or 7, characterized in that: The cable status detection circuit can work at the transmitting end or the receiving end of the high-speed circuit.

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