Reconfigurable intelligent surface module and method of manufacturing thereof
By using organic semiconductor or metal oxide semiconductor layers to form active elements in RIS cells, the challenges of forming small RIS cells are addressed, reducing manufacturing complexity and effort while enhancing the performance and flexibility of RIS modules.
Patent Information
- Application Number
- PCT/JP2023/031986
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-31
- Publication Date
- 2025-03-06
AI Technical Summary
The existing technologies for forming small reconfigurable intelligent surface (RIS) cells are limited by the size and complexity of commercially available diodes, which require significant effort and processing, such as doping, to form active elements.
The proposed solution involves a reconfigurable intelligent surface module with RIS cells that include a resonator and an active element comprising a p-type semiconductor layer and an n-type semiconductor layer, which can be easily formed using organic semiconductor materials or metal oxide semiconductor materials, reducing the complexity and effort required in manufacturing.
This configuration reduces the effort and complexity in forming small RIS cells, enabling more efficient manufacturing processes and potentially improving the performance and flexibility of RIS modules in wireless communication applications.
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Figure JP2023031986_06032025_PF_FP_ABST
Abstract
Description
RECONFIGURABLE INTELLIGENT SURFACE MODULE AND METHOD OF MANUFACTURING THEREOF
[0001] The present invention relates to a reconfigurable intelligent surface module and a method of manufacturing thereof.
[0002] In recent years, reconfigurable intelligent surfaces (RIS) have been extensively studied (Non-Patent Document 1). The RIS is configured to allow at least one of the characteristics thereof to be modified. Modifiable characteristics, that is reconfigurable characteristics, include frequency response (switching, tuning, bandwidth variation, filtering, etc.), radiation diagram (beam steering, spatial filtering, beam or multibeam forming, etc.), and polarization of wave.
[0003] The RIS includes a plurality of RIS cells periodically arranged. Each RIS cell includes a combination of a resonator, such as a metamaterial cell, and at least one active element, such as a variable capacitance diode or a transistor. In the RIS, the capacitance of RIS cells is controlled per RIS cell or per group consisting of multiple RIS cells. This control allows the reconfiguration of the above characteristics.
[0004] Mengnan Jian, George C. Alexandropoulos, Ertugrul Basar, Chongwen Huang, Ruiqi Liu, Yuanwei Liu, and Chau Yuen. " Reconfigurable Intelligent Surfaces for Wireless Communications: Overview of Hardware Designs, Channel Models, and Estimation Techniques" ArXiv, arXiv:2203.03176 [cs.IT]
[0005] The sizes of the RIS cells depend on a wavelength of an incident electromagnetic wave to be controlled. For example, each RIS cell is formed to be less than half the size of the wavelength of the incident electromagnetic wave. When a high-frequency electromagnetic wave in the range of 30 to 500 GHz, which has been extensively studied in recent years, is used as the control object of the RIS (for example, when this high-frequency electromagnetic wave is used as a carrier wave for wireless communication), the RIS cells must also be small enough to accommodate it. However, the reduction of the sizes of the RIS cells is limited because commercially available diodes are generally used as active elements. Another possibility is to use covalent inorganic semiconductor-based diodes, but this requires doping of the substrate, which requires effort to form active elements.
[0006] An objective of the present invention is to reduce the effort required to form small RIS cells.
[0007] A reconfigurable intelligent surface (RIS) module according to the first aspect of the present invention, comprises: a substrate; and a plurality of RIS cells periodically arranged on the substrate. Each of the plurality of RIS cells includes a resonator including a first conductor and a second conductor separated by a gap and includes an active element electrically connected to the first conductor and the second conductor. The active element includes at least a p-type semiconductor layer and an n-type semiconductor layer, and is configured to change the capacitance of the RIS cell including this active element. The p-type semiconductor layer is an organic semiconductor layer or a metal oxide semiconductor layer, and the n-type semiconductor layer is an organic semiconductor layer or a metal oxide semiconductor layer.
[0008] A method of manufacturing the reconfigurable intelligent surface module according to the second aspect of the present invention, comprises: a first step of forming the resonator on the substrate; and a second step of forming the active element after forming the resonator. the second step includes a step of forming a stacked film by stacking a film of material of the n-type semiconductor layer and a film of material of the p-type semiconductor layer, and a step of etching a portion of the stacked film to thereby form the n-type semiconductor layer and the p-type semiconductor layer.
[0009] According to the above configuration reduces the effort required to form small RIS cells.
[0010] Fig. 1 is a plan view of a RIS cell included in a reconfigurable intelligent surface (RIS) module.Fig. 2 is a plan view of another example RIS cell.Fig. 3 is a plan view of another example RIS cell.Fig. 4 is a plan view of the RIS cell of Fig. 1 with circuit elements and dimensional parameters superimposed.Fig. 5 illustrates a schematic diagram of a RIS module.Fig. 6 illustrates a schematic diagram of the RIS module for another example.Fig. 7 illustrates a schematic diagram of the RIS module for another example.Fig. 8 illustrates a schematic diagram of the RIS module for another example.Fig. 9 is a configuration diagram of a device combining the RIS modules of Figs. 6 to 8.Fig. 10 is a configuration diagram illustrating an example of the use of the RIS module.Fig. 11 is a schematic perspective view of a variable capacitance diode.Fig. 12 is a plan view of the variable capacitance diode.Fig. 13 is a plan view of a variable capacitance diode for another example.
[0011] An embodiment and variations thereof of the invention will be described with reference to the drawings. In each drawing, the same or similar elements are marked with the same reference sign. For multiple same elements, only some of them are signed. In drawings, some features are simplified and / or exaggerated for ease of understanding.
[0012] Fig. 1 illustrates a RIS cell 20 of the reconfigurable intelligent surface (RIS) module 10 (Fig. 5) according to this embodiment. Fig. 2 and 3 illustrate RIS cells 20 according to other embodiments. As illustrated in Fig. 1 to 3, the RIS cell 20 includes a combination of a resonator 21, such as a metamaterial cell, and one or more variable capacitance diodes 22, such as varactor diodes. The resonator 21 includes a first conductive film 21A, a second conductive film 21B, and one or more gaps G separating the first conductive film 21A and the second conductive film 21B. For example, the conductive films 21A and 21B are metal films. The first end and the second end of each variable capacitance diode 22 are connected to an end of the first conductive film 21A and an end of the second conductive film 21B that are forming the gap G, respectively. In Fig. 1 to 3, the variable capacitance diodes 22 are depicted by circuit symbols.
[0013] As illustrated in Fig. 4, the conductive films 21A and 21B of the resonator 21 provide inductance L1 and L2, respectively, to the RIS cell 20, while each gap G introduce gap capacitance Cgto the RIS cell 20. Each variable capacitance diode introduces its own variable capacitance Cdto the RIS cell 20.
[0014] A bias line 31 provides the bias voltage potential necessary to dynamically change the variable capacitance Cdto the first end of the variable capacitance diode 22 through the first conductive film 21A. A ground line 32 grounds the second end of variable capacitance diode 22 through the second conductive film 21B. As a result, a bias voltage of the value of the bias voltage potential is applied to the variable capacitance diode 22. Here, the bias potential is a negative bias potential lower than the ground potential. When the bias potential is positive, the direction of the variable capacitance diode 22 is reversed.
[0015] The resonant frequency of the RIS cell 20 can be calculated from the following equation 1. In equation 1, “L” is the equivalent inductance of the RIS cell 20 (combined inductance of L1 and L2) and “Ctotal” is the equivalent capacitance of the RIS cell 20.
[0016] The equivalent inductance L is expressed by the following equation 2. In equation 2, “μ0” is the permeability of free space, “a” and “b” are the dimensions of the RIS cell 20, and “t” is the thickness of the conductive films 21A and 21B of the resonator 21.
[0017] The equivalent capacitance Ctotalis composed of the gap capacitance Cgand the variable capacitance Cdand can be expressed as the following equation 3. The gap capacitance Cgis expressed by the following equation 4. In equation 4, “ε0”and “εc” are permittivity of free space and effective permittivity of the material of the substrate on which the RIS cell 20 is formed, “w” is the width of the conductive films 21A and 21B of the resonator 21, and “g” is the gap length. When there are multiple gaps G as in Fig. 4, the equivalent capacitance Ctotalis the combination of Ctotalof each gap G.
[0018] As illustrated in equations 2 and 4, the inductance and capacitance are proportional to the size of the RIS cell 20. Thus, with the increase of the operating frequency (the increase of the resonant frequency), the general size of the RIS cell 20 is decreased. The resonant frequency and phase characteristics can be actively changed by either inductance or capacitance change. However, since the length of the conductive films 21A and 21B of the resonator 21 (that is the inductance) cannot be dynamically changed, the variation of the capacitance Cd, through the variable capacitance diodes 22, is utilized.
[0019] Fig. 5 illustrates a simplified schematic of the RIS module 10. The RIS module 10 has a substrate 50, a plurality of RIS cells 20 arranged in a periodic array (in this case, matrix) on the substrate 50, a plurality of input terminals 61, each configured to be input with a bias voltage potential, and a ground terminal 62 configured to be connected to ground. The input terminals 61 are provided for each column of the RIS cells 20. Terminals 61 and 62 are formed in the form of pads.
[0020] The RIS module 10 further includes a plurality of bias lines 31 connected to a plurality of the input terminals 61, respectively, and a plurality of ground lines 32 connected to the ground terminal 62. The plurality of RIS cells 20 in each column are provided on a pair of the bias line 31 and the ground line 32. Here, as illustrated in Fig. 1, etc., the bias lines 31 and ground lines 32 are intermittent lines, and a plurality of first conductive films 21A are each placed on a plurality of interrupted portions of bias line 31, and a plurality of second conductive films 21B are each placed on a plurality of interrupted portions of ground line 32.By the bias lines 31, the bias voltage potential input to the input terminal 61 is commonly applied to each of the first conductive films 21A of the RIS cells 20 belonging to the column corresponding to that input terminal 61. By the ground lines 32, the second conducting film 21B of each RIS cell 20 is grounded through ground pad 62. With this configuration, different voltages are applied to the variable capacitance diodes 22 for each column, and the resonant frequency, etc. of the RIS cell 20 is controlled on a column -by- column basis.
[0021] The RIS module 10 may have a multilayer structure. In this case. the circuit layers illustrated in Fig. 5 are repeatedly arranged in the thickness direction of the substrate 50.
[0022] Fig. 6 to 8 illustrate RIS modules 10A-10C of other types. The RIS modules 10A-10C are used as sub-modules that constitute a larger RIS. The RIS module 10A includes a ground terminal 62 at one end (top side) and multiple sets of connection terminals 64A and 64B provided at the other end (bottom side). A set of connection terminals 64A and 64B is provided per column of the RIS cells 20. The bias line 31 is connected to connection terminal 64A, and the ground line 32 is connected to connection terminal 64B. The RIS module 10B has connection terminals 64A and 64B at both ends. The RIS module 10C has a configuration in which the set of connection terminals 64A and 64B at one end (lower part) of the RIS module 10B is replaced by the input terminals 61.
[0023] The RIS modules 10A-10C are combined, for example, as shown in Fig. 9. The RIS modules 10A-10C are arranged on a carrier substrate or in a carrier frame. The modules are then connected to each other by bonding wires BW. For example, the ground terminals 62 are connected to each other, the connection terminals 64A are connected to each other, and the connection terminals 64B are connected to each other by bonding wire BW. Modules may be connected to each other by other methods such as a pad bonding. The carrier substrate requires low loss for the desired operating frequency (that is the frequency of the electromagnetic wave to be controlled) of the RIS to avoid any major attenuation in the RIS.
[0024] The main functionalities of the RIS module 10, etc. include beamforming by transmission or reflection of the electromagnetic (EM) wave, focusing of the EM wave, and change of the polarization of the EM wave, other functionalities, such as EM wave rotation, and EM wave filtration are also possible. The functionalities can be obtained by design of the resonator 21 and active control of the phase shift (more specifically, the resonant frequency) across the RIS module 10.
[0025] Fig. 10 illustrates the configuration for electromagnetic wave control by the RIS module 10. The RIS module 10 here is configured as a multilayer RIS module that includes, in each layer, a plurality of RIS cells 20 arranged in two dimensions. The incident electromagnetic wave radiated from a source 91, such as an antenna, pass through the RIS module 10 and are radiated from the RIS module 10. Each of the input terminals 61 (Fig.5) and the ground terminal 62 (Fig.5) are connected to a programmable controller C by wirings W. The controller C is configured to individually control the bias voltage potential applied to each of the 61 input terminals. By controlling the bias voltage potential, the controller C controls the capacitance Cd of each variable capacitance diode 22, thereby controlling the phase distribution of the output electromagnetic wave across the RIS module 10. This control allows the output electromagnetic wave to be directed in a desired direction. The controller C can, for example, use LiDAR, GPS, Wi-Fi, etc. to obtain the location information of the external terminal to which the output electromagnetic wave is to be directed.
[0026] The variable capacitance diodes 22 are, for example, an organic material-based varactor diodes that are integrated directly into the RIS cells 10. p-type or n-type conductivity of p-type and n-type organic semiconductor materials is obtained from their molecular structure. Therefore, the formation of semiconductor layers using p- and n-type organic semiconductor materials requires no additional doping or processing compared to semiconductor layers based on covalent inorganic semiconductors such as Si. Therefore, semiconductor layers using p-type and n-type organic semiconductor materials can be fabricated directly on all types of substrates, and miniaturization can be easily achieved by etching or other means. Therefore, the diode 22 including p-type and n-type semiconductor layers using p-type and n-type organic semiconductor materials is easy to form and reduction of the size.
[0027] As illustrated in Fig. 11 and 12, the variable capacitance diode 22 includes an anode electrode 22A, a p-type semiconductor layer 22B formed on the anode electrode 22A, an n-type semiconductor layer 22C formed on the p-type semiconductor layer 22B, and a cathode electrode 22D formed on the n-type semiconductor layer 22C. The diode 22 further includes a connection wiring 22E that electrically connects the anode electrode 22A to the first conductive film 21A of resonator 21 and a connection wiring 22F that electrically connects the cathode electrode 22D to the second conductive film 21B of resonator 21.
[0028] The anode electrode 22A is a gold (Au) electrode and has an estimated work function φAu= 5.1 eV. The cathode electrode 22D is an aluminum (Al) electrode and has an estimated work function φAl= 4.2 eV. Electrodes 22A and 22D are formed, for example, by electron beam (EB) evaporation. The material of the p-type semiconductor layer 22B is a p-type organic semiconductor material, for example, a p-type semiconductor polymer. Here, as the p-type semiconductor polymer, regioregular poly(3-hexylthiophene-2,5-diyl) (RR-P3HT) is used. The material of the n-type semiconductor layer 22C is a n-type organic semiconductor material, for example, a n-type semiconductor polymer. Here, as the n-type semiconductor polymer, poly{[N,N'-bis(2-octyldodecyl)naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5'-(2,2'-bithiophene)} (PNDI (2OD)2T, N2200) is used. P3HT and N2200 polymer molecules are illustrated in (a) and (b) below, respectively. The semiconductor layers 22B and 22C are formed using solution-processable methods such as spin coating, dip coating, and blade coating. Therefore, the semiconductor layers 22B and 22C are easy to form.
[0029] The capacitance Cj that is the total capacitance of the p-n junction of the variable capacitance diode 22 can be calculated using equation 5 below. In equation 5, “ε” is the permittivity of the semiconductor material, and “A” is the area of the junction (diode 22). “d” is the width of the depletion region that should be smaller than the distance between the anode electrode 22A and the cathode electrode 22B.
[0030] The relationship between the capacitance Cj and the bias voltage VRapplied to the variable capacitance diode 22 (here, VRis the reverse bias voltage, where the bias voltage potential from the bias line 31 is negative) is given by the following equation 6. In the equation 6, “C” is the capacitance of the variable capacitance diode 22 when no voltage is applied, “K” is a constant (usually 1), “Vb” is the barrier voltage potential, and “m” is a material-dependent constant.
[0031] In the fabrication of single-layer modules or multilayer RIS modules, multiple resonators 21 are first fabricated on a substrate 50 by standard photolithography method. Specifically, the photoresist is coated on the substrate 50, UV light is irradiated through a photomask, and the shape of each resonator 21 is developed. Thereafter, each resonator 21 is formed via the vapor deposition process of conductive material and the lift-off process. The bias lines 31, the ground lines 32, the input terminals 61, and the ground terminal 62 may be formed together with resonators 21.
[0032] The fabrication of the variable capacitance diodes 22 follows the fabrication of resonators 21. The anode electrodes 22A and connection wirings 22E are fabricated using the same standard photolithography method. Specifically, the photoresist is coated on the substrate 50, UV light is irradiated through a photomask, and the desired electrode and wiring shapes is developed. Thereafter, each anode electrode 22A and each connection wiring 22E are formed via the vapor deposition process of conductive material and the lift-off process. The anode electrode 22A and connection wirings 22E may be formed as one piece or separately. The p-type semiconductor polymer is then coated on the substrate 50 on which the resonator 21, anode electrode 22A, etc. are formed, and then the n-type semiconductor polymer is coated to the p-type semiconductor polymer film formed on the substrate 50. For each coating, a solution-processable method that is easy to implement, such as spin coating or blade coating, is employed. The dry etching method is then applied for the polymer stacked films to limit the semiconductor polymer area to the diode size. This forms the semiconductor layers 22B and 22C. The side of the semiconductor layers 22B and 22C is protected by another patterned photoresist film. The standard photolithography method is then applied to form the cathode electrodes 22D and connection wirings 22F of the diode 22, which after the vapor deposition and lift-off process finalizes the fabrication of a single layer RIS module 10. the cathode electrodes 22D and connection wirings 22F may be formed as one piece or separately. The connection wirings 22F may be supported by other insulating materials provided separately to avoid contact with the anode electrodes 22A. The bias lines 31, the ground lines 32, the input terminals 61, and the ground terminal 62 may be formed together with the anode electrodes 22A.
[0033] To obtain a multilayer RIS module, the process of coating the surface of the single-layer RIS module 10 with substrate material and forming RIS cells 20, etc., is repeated one or more times. The single-layer RIS module 10 may also be stacked to obtain a multilayer RIS module.
[0034] In the example in Fig. 12, the diode body consisting of elements 22A-22D of the variable capacitance diode 22 is located in the gap G. However, the diode body may be provided on the first conductive film 21A, as shown in Figure 13. In this case, elements 22B-22D may be formed directly on the first conductive film 21A. In this case, a portion of the first conductive film 21A (the portion where elements 22B to 22D are formed) functions as the anode electrode 22A. According to the example of Fig. 10, the step of forming the anode electrode 22A and the connection wiring 22E can be omitted.
[0035] Organic Schottky diodes including a single semiconductor polymer layer may be employed as the variable capacitance diodes 22.
[0036] The material of at least one of the semiconductor layers 22B and 22C of the variable capacitance diode 22 may be replaced from the organic semiconductor material to a metal oxide semiconductor (MOS) that is an inorganic polycrystalline material. The use of MOS allows for a decrease in the operating voltage of the variable capacitance diode 22, decreasing the power consumption. The use of MOS also allows the possible temperature of the fabrication process of the semiconductor layer to be raised above the level possible for the polymer material. MOS are valence compounds with a high degree of ionic bonding, as compared to the conventional covalent semiconductors, such as Si, GaAs, GaN, etc.
[0037] The common p-type MOS include nickel oxide (NiO), copper-based oxides, such as Cu2O, CuMO2 (M = Al, Ga, In), and tin oxide (SnO), etc. The common n-type MOS include indium oxide (In2O3), zinc oxide (ZnO), tin dioxide (SnO2), indium gallium zinc oxide (IGZO), etc.
[0038] The advantage of MOS over conventional inorganic covalent semiconductors is their processability and possible preparation by the means of different vapor deposition or solution-processable methods. Vapor deposition methods include magnetron sputtering, EB evaporation, chemical vapor deposition (CVD), etc. Solution-processable methods include the sol-gel process, spin coating, etc. MOS can be fabricated on various substrates, including transparent or flexible polymer substrates, allowing for easy integration into multilayer RIS modules 10. In addition, as above, the sizes of the RIS cells 20 can be easily reduced.
[0039] In the process of fabricating MOS semiconductor layers 22B and 22C after fabricating anode electrode 22A, first, an initial thin film of p-type MOS is formed on the substrate 50 by the vapor deposition method or solution processable method. Then, for example, the initial thin film is annealed in an oxygen atmosphere for a certain period to further oxidize the initial thin film and stabilize the semiconductor properties. Subsequently, the initial thin film of n-type MOS is formed by the above vapor deposition method or solution processable method and is annealed. The area outside of diode 22 of the n-type MOS and p-type MOS stacked film is then etched. This produces semiconductor layers 22B and 22C. The manufacturing method for the other elements of the RIS module 10 is the same as above.
[0040] When the RIS module is multilayered, the shape or size of each RIS cell 20 and the arrangement (periodicity) of the RIS cells may be different for each layer. By changing the design between layers, the total number of layers can be reduced, or the characteristics of the layers can be changed to make the module multifunctional.
[0041] In higher millimeter-wave frequency bands where the attenuation of the EM wave increases, the reduction of the number of layers in the RIS module is one of the solutions to decrease potential losses. By changing the design of resonator 21 in different layers of the RIS module, the phase variation between 0 and 2π can be achieved with a smaller number of layers.
[0042] Also, typical RIS modules usually exhibit one type of functionalities. By the change of the design of layers in the RIS, a different combination of functionalities can be obtained, e.g. reflection and transmission of EM waves in the same module, or transmission beamforming and polarization of the EM wave.
[0043] The substrate 50, resonator 21, electrodes 22A and 22D, and connecting wires 22E and 22F may be replaced with a polymer to allow for flexibility of the RIS module 10. Such RIS module 10 can be placed on a pole, column, or other curved surface that is generally cylindrical and may be used as a base surface for the RIS module 10.
[0044] The substrate 50 is composed of a non-conductive polymer with low dielectric constant εr and tangent loss δ, such as polyimide, benzocyclobutene, or polytetrafluoroethylene. The first and second conductive films 21A and 21B of the resonator 21 are fabricated from conductive polymers such as poly(3,4-ethylenedioxythiophene)-polystyrene sulfonate (PEDOT:PSS), doped polyacetylene, polypyrrole, polyaniline, or other highly conductive materials such as graphene, carbon nanotubes. Material of the anode electrode 22A is replaced by PEDOT:PSS or polyaniline, and material of the cathode electrode 22B is replaced by poly(3,4-ethylenedioxythiophene):tosylate (PEDOT:Tos), ethoxylated polyethyleneimine (PEIE), etc. The organic semiconductor material or MOS, which is the material of each of the semiconductor layers 22A and 22B, allow for flexibility, so no change is required.
[0045] Instead of the variable capacitance diode, other active elements such as transistors may be employed. The active element may be electrically connected to the first and second conductive films 21A and 21B to change the capacitance of the RIS cell 20 (capacitance that can change the resonant frequency of the RIS cell 20). When a transistor is employed, one of its drain and source is connected to the first conductive film 21A and the other to the second conductive film 21B. In addition, a wiring for supplying a control signal to change the capacitance is connected to the gate.
[0046] In this embodiment, by making each of the n-type and p-type semiconductor layers an organic semiconductor layer or a metal oxide semiconductor layer, the time and effort required to form a small RIS cell is reduced. By making both the n-type and p-type semiconductor layers organic semiconductor layers or both the n-type and p-type semiconductor layers metal oxide semiconductor layers, the labor required to form active devices is further reduced because each layer is formed by a similar manufacturing method.
[0047] Although the invention has been described above with reference to embodiments and variations, the invention is not limited to the above embodiments and variations. For example, the present invention includes various modifications to the above embodiments and variations that can be understood by those skilled in the art within the scope of the technical concept of the invention. Each of the configurations listed in the above embodiments and variations can be combined as appropriate to the extent that there is no contradiction.
[0048] 10...RIS module, 20...RIS cell, 21...resonator, 21A...first conductive film, 21B...second conductive film, 22...variable capacitance Diode, 22A...anode electrode, 22B...p-type semiconductor layer, 22C...n-type semiconductor layer, 22D...cathode electrode, 22E and 22F... connection wiring, 31 ...bias line, 32...ground line, 50...substrate, 61...input terminal, 62...ground terminal, 64A and 64B...connection terminals BW...bonding wire.
Claims
1. A reconfigurable intelligent surface (RIS) module comprising: a substrate; and a plurality of RIS cells periodically arranged on the substrate, wherein each of the plurality of RIS cells includes a resonator including a first conductor and a second conductor separated by a gap and includes an active element electrically connected to the first conductor and the second conductor, the active element includes at least a p-type semiconductor layer and an n-type semiconductor layer, and is configured to change the capacitance of the RIS cell including this active element, the p-type semiconductor layer is an organic semiconductor layer or a metal oxide semiconductor layer, and the n-type semiconductor layer is an organic semiconductor layer or a metal oxide semiconductor layer.
2. The reconfigurable intelligent surface module according to claim 1, wherein the active element is a variable capacitance diode.
3. The reconfigurable intelligent surface module according to claim 2, wherein the active element includes a first electrode and a second electrode that sandwich the p-type semiconductor layer and the n-type semiconductor layer, and the first electrode is a portion of the first conductor.
4. A method of manufacturing the reconfigurable intelligent surface module according to claim 1, comprising: a first step of forming the resonator on the substrate; and a second step of forming the active element after forming the resonator, wherein the second step includes a step of forming a stacked film by stacking a film of material of the n-type semiconductor layer and a film of material of the p-type semiconductor layer, and a step of etching a portion of the stacked film to thereby form the n-type semiconductor layer and the p-type semiconductor layer.
Citation Information
Patent Citations
Biasing structures
EP3944416A1
Semiconductor devices
GB1403239A
Reflection antenna
JP1996125434A
Electronic component and electronic apparatus
JP2020043238A
Access devices to correlated electron switch
WO2017109471A1
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