Semiconductor device, electronic apparatus, and method for manufacturing semiconductor device

Abstract

A semiconductor device according to one embodiment of the present disclosure comprises: a substrate; a pad provided to the outside of the substrate from a prescribed region of the substrate in plan view; and a guard ring provided to the substrate so as to surround the prescribed region while being positioned directly below the pad in plan view, the guard ring suppressing intrusion of moisture.

Description

Semiconductor device, electronic device, and method of manufacturing the semiconductor device

[0001] The present disclosure relates to a semiconductor device, an electronic device, and a method for manufacturing a semiconductor device.

[0002] In a typical semiconductor device, for example, a guard ring is formed outside a design area where a designer designs a chip (see, for example, Patent Document 1). The guard ring serves to suppress moisture absorption within the chip. Therefore, in addition to the design area, the guard ring width (the length from the inner circumferential surface to the outer circumferential surface of the guard ring) contributes to the chip size (size of the semiconductor device).

[0003] Japanese Patent Application Laid-Open No. 2015-216334

[0004] As mentioned above, the guard ring width contributes to the chip size. Furthermore, when a semiconductor device has pads, designers must design the pads while taking into account various design rules, which limits the chip size. For these reasons, it is difficult to reduce the chip size while suppressing moisture absorption.

[0005] Therefore, the present disclosure proposes a semiconductor device, an electronic device, and a method for manufacturing a semiconductor device that can achieve miniaturization while suppressing moisture absorption.

[0006] A semiconductor device according to one embodiment of the present disclosure comprises a substrate, a pad provided outside a predetermined region of the substrate in a planar view, and a guard ring provided on the substrate positioned directly below the pad in a planar view and surrounding the predetermined region, the guard ring preventing moisture from entering.

[0007] An electronic device according to one embodiment of the present disclosure includes a semiconductor device having a substrate, a pad provided outside a predetermined region of the substrate in a planar view, and a guard ring provided on the substrate positioned directly below the pad in a planar view and surrounding the predetermined region, to prevent moisture from entering.

[0008] A method for manufacturing a semiconductor device according to one embodiment of the present disclosure includes providing a pad outside a predetermined region of the substrate in a planar view, and providing a guard ring on the substrate that prevents moisture from entering, positioned directly below the pad and surrounding the predetermined region in a planar view.

[0009] FIG. 1 is a diagram illustrating a configuration example of an imaging device according to an embodiment of the present disclosure. FIG. 2 is a plan view illustrating a configuration example of an imaging device according to Example 1 of an embodiment of the present disclosure. FIG. 3 is a cross-sectional view illustrating a configuration example of an imaging device according to Example 1 of an embodiment of the present disclosure. FIG. 4 is a plan view illustrating a configuration example of an imaging device according to Comparative Example 1 of an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a configuration example of an imaging device according to Comparative Example 1 of an embodiment of the present disclosure. FIG. 6 is a plan view illustrating a configuration example of an imaging device according to Example 2 of an embodiment of the present disclosure. FIG. 7 is a cross-sectional view illustrating a configuration example of an imaging device according to Example 2 of an embodiment of the present disclosure. FIG. 8 is a cross-sectional view illustrating a configuration example of an imaging device according to Example 3 of an embodiment of the present disclosure. FIG. 9 is a diagram illustrating a manufacturing method of an imaging device according to an embodiment of the present disclosure. FIG. 10 is a diagram illustrating a manufacturing method of an imaging device according to an embodiment of the present disclosure. FIG. 11 is a diagram illustrating an application example using an imaging device according to any of Examples 1 to 3 of an embodiment of the present disclosure. FIG. 12 is a diagram illustrating a configuration example of an imaging device according to an application example. FIG. 13 is a diagram illustrating a configuration example of a ranging device according to an application example.

[0010] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the embodiments do not limit the devices, equipment, methods, etc. according to the present disclosure. Furthermore, in the following embodiments, essentially the same components are designated by the same reference numerals, and redundant explanations will be omitted. The following embodiments also include examples and modified examples.

[0011] One or more of the following embodiments can be implemented independently. However, at least a portion of the following embodiments may be implemented in appropriate combination with at least a portion of another embodiment. These embodiments may include novel features that are different from one another. Therefore, each embodiment may contribute to solving different purposes or problems, and may provide different effects. The effects of each embodiment are merely examples and are not intended to be limiting, and other effects may also be provided.

[0012] The present disclosure will be described in the following order: 1. Embodiment 1-1. Configuration example of imaging device 1-2. Example of imaging device 1-2-1. Example 1 1-2-2. Comparative example 1 1-2-3. Example 2 1-2-4. Example 3 1-3. Example of process of manufacturing method of imaging device 1-4. Actions and effects 2. Other embodiments 3. Application examples 3-1. Imaging device 3-2. Distance measuring device 4. Supplementary notes

[0013] <1. Embodiment> <1-1. Configuration Example of Imaging Device> An example of the configuration of an imaging device 10 according to this embodiment will be described with reference to Fig. 1. Fig. 1 is a diagram showing an example of the configuration of the imaging device 10 according to this embodiment. The imaging device 10 is an example of a semiconductor device.

[0014] 1, the imaging device 10 includes a pixel array unit 11, a vertical drive unit 12, a column signal processing unit 13, and a control unit 14. The imaging device 10 is, for example, a solid-state imaging device that generates image data of a subject.

[0015] The pixel array unit 11 is configured by arranging a plurality of pixels 100. In the example of FIG. 1, the pixels 100 are arranged in a two-dimensional matrix. Each pixel 100 includes a photoelectric conversion unit that performs photoelectric conversion of incident light, and generates an image signal of the subject based on the incident light that is irradiated. For example, a photodiode can be used as the photoelectric conversion unit.

[0016] A signal line 15 and a signal line 16 are connected to each pixel 100. The pixel 100 generates an image signal under control of a control signal transmitted through the signal line 15, and outputs the generated image signal to the column signal processing unit 13 via the signal line 16. The signal line 15 is arranged for each row of the two-dimensional matrix, and is commonly connected to multiple pixels 100 arranged in one row. The signal line 16 is arranged for each column of the two-dimensional matrix, and is commonly connected to multiple pixels 100 arranged in one column.

[0017] The vertical drive unit 12 generates control signals for the pixels 100. The vertical drive unit 12 generates a control signal for each row of the two-dimensional matrix of the pixel array unit 11, and outputs the generated control signals to each pixel 100 via each signal line 15.

[0018] The column signal processing unit 13 processes image signals generated by the pixels 100. The column signal processing unit 13 simultaneously processes image signals transmitted via signal lines 16 from each of the pixels 100 arranged in one row of the pixel array unit 11. Examples of this processing include analog-to-digital conversion, which converts analog image signals generated by the pixels 100 into digital image signals, and correlated double sampling (CDS), which removes offset errors in the image signals. The processed image signals are output to an external circuit or the like of the imaging device 10.

[0019] The control unit 14 controls the vertical drive unit 12 and the column signal processing unit 13. The control unit 14 generates control signals for controlling the vertical drive unit 12 and the column signal processing unit 13 based on data instructing a clock, an operation mode, etc., input from an external circuit, etc. The control unit 14 outputs control signals to the vertical drive unit 12 via a signal line 17 and to the column signal processing unit 13 via a signal line 18, thereby controlling the vertical drive unit 12 and the column signal processing unit 13.

[0020] <1-2. Examples of Imaging Device> Imaging devices 10 according to Examples 1 to 3 of this embodiment will be described, and all of the imaging devices 10 according to Examples 1 to 3 have the above-described configuration.

[0021] <1-2-1. Example 1> A configuration example of the imaging device 10 according to Example 1 of this embodiment will be described with reference to Fig. 2 and Fig. 3. Fig. 2 is a plan view showing the configuration example of the imaging device 10 according to Example 1 of this embodiment. Fig. 3 is a cross-sectional view (cross-sectional view taken along line Y1-Y1 in Fig. 2) showing the configuration example of the imaging device 10 according to Example 1 of this embodiment.

[0022] 2, the imaging device 10 has a substrate 20. The substrate 20 includes a pixel array section 11, a plurality of pads 30, and a guard ring 40. The substrate 20 may be, for example, a silicon substrate.

[0023] The pixel array unit 11 is provided in a central region of the substrate 20 in a planar view. The central region is a predetermined region that is set in advance, for example, at the time of design, and that includes the pixel array unit 11 in a planar view. This predetermined region may be provided in a region other than the central region of the substrate 20 in a planar view. In the example of FIG. 2 , the planar shape of the pixel array unit 11 is rectangular. Note that the planar shape of the pixel array unit 11 may be a shape other than a rectangle, such as a square, an ellipse, or a circle.

[0024] Each of the pads 30 functions as, for example, an electrode. These pads 30 are provided on the outer side of the substrate 20 than the pixel array section 11 in a plan view. In the example of FIG. 2, the pads 30 are arranged in a rectangular ring shape in a plan view so as to surround the pixel array section 11. In addition, in the example of FIG. 2, the planar shape of each of the pads 30 is, for example, rectangular. Note that the planar shape of each of the pads 30 may be a shape other than rectangular, such as a square, an ellipse, or a circle. Each of the pads 30 is formed of, for example, a metal material such as aluminum.

[0025] The guard ring 40 prevents moisture from entering and reduces moisture absorption within the imaging device 10. In a plan view, the guard ring 40 prevents moisture from entering the pixel array section 11 of the substrate 20 from the outer peripheral surface of the substrate 20. In the example of FIG. 2 , the guard ring 40 is positioned so as to pass directly below each pad 30 in a plan view and surround the pixel array section 11. The guard ring 40 has a rectangular ring shape in plan view. The guard ring 40 may have a ring shape other than a rectangle, such as a square, ellipse, or circle. The guard ring 40 is made of a metal material, such as copper. Metal materials are an example of moisture-resistant materials.

[0026] 3, the substrate 20 has a first substrate layer 21 and a second substrate layer 22. The first substrate layer 21 includes a guard ring 40 and a wiring portion 50. The second substrate layer 22 includes each pad 30, a silicon layer 22a, and an oxide layer 22b. The substrate 20 is also called a wafer.

[0027] The substrate 20 includes a design area A1, a guard ring area A2, and a scribe area A3. The design area A1 is an area on the substrate 20 where a designer designs circuits, wiring, etc. (an area where the designer designs a chip). The design area A1 includes the central area described above. The guard ring area A2 is an area on the substrate 20 where a guard ring 40 is installed. The scribe area A3 is an area on the substrate 20 where the substrate 20 is cut by scribing. Scribing is a process of forming grooves for cutting in the substrate 20 using a diamond tool, laser, or the like. In the example of FIG. 3 , the substrate 20 within the scribe area A3 is indicated by dotted lines and is actually removed by scribing (the same applies to other figures).

[0028] The substrate 20 also includes a pad opening region B1 and a silicon opening region B2. The pad opening region B1 is a region in the second substrate layer 22 where the oxide layer 22b does not exist in a planar view, i.e., a region of the exposed surface of the pad 30. The silicon opening region B2 is a region in the first substrate layer 21 where the silicon layer 22a does not exist in a planar view. A pad opening region B1 exists for each pad 30, and the silicon opening region B2 is a region having a rectangular ring shape in a planar view.

[0029] Each of the pads 30 has a connection via portion 30a. The connection via portion 30a connects the pad 30 to the wiring portion 50. The connection via portion 30a is formed, for example, from the same metal material as the pad 30. The silicon layer 22a includes the pixel array portion 11 and the like. The oxide layer 22b covers each of the pads 30 while exposing a portion of each of the pads 30.

[0030] The guard ring 40 is composed of a plurality of ring layers 40n (n=1, 2, 3, ...), where n is a positive integer. These ring layers 40n are stacked directly below the pad 30, and the guard ring 40, i.e., the guard ring region A2, is located directly below the pad 30. The guard ring region A2 is set within the design region A1, the silicon opening region B2, and the pad opening region B1.

[0031] Each ring layer 40n includes a plurality of dummy wiring layers 40m (m=1, 3, 5, ...) and a plurality of wall layers 40p (p=2, 3, 6, ...). m is a positive odd number, and p is a positive even number. The dummy wiring layers 40m are dummy wirings that are not used for signal transmission. The dummy wiring layers 40m and the wall layers 40p are alternately stacked. The wall layers 40p function as via portions that connect the lower dummy wiring layer 40m and the upper dummy wiring layer 40m.

[0032] The dummy wiring layer 40m and the wall layer 40p each have a rectangular ring shape in plan view. The dummy wiring layer 40m and the wall layer 40p each may have a ring shape other than a rectangle, such as a square, ellipse, or circle. The dummy wiring layer 40m and the wall layer 40p each are formed of a metal material such as copper. The dummy wiring layer 40m and the wall layer 40p may be formed of the same material or different materials.

[0033] Here, for example, the width from the inner peripheral surface to the outer peripheral surface of the guard ring 40 (the length in the left-right direction in FIG. 3 ) is smaller than the length from the inner end face to the outer end face of the pad 30 (the length in the left-right direction in FIG. 3 ), and is also smaller than the length from the inner edge to the outer edge of the exposed surface (the top surface in FIG. 3 ) of the pad 30 (the length in the left-right direction in FIG. 3 ). The left-right direction is the planar direction of the substrate 20. The inner end face of the pad 30 is the inner end face of the substrate 20 at the pad 30, and the outer end face of the pad 30 is the outer end face of the substrate 20 at the pad 30. The inner edge of the exposed surface of the pad 30 is the inner edge of the substrate 20 at the exposed surface of the pad 30, and the outer edge of the exposed surface of the pad 30 is the outer edge of the substrate 20 at the exposed surface of the pad 30.

[0034] A via portion 40a for preventing moisture penetration is provided between the pad 30 and the uppermost ring layer 40n (dummy wiring layer 40m) of each ring layer 40n of the guard ring 40. The planar shape of the via portion 40a is, for example, the same shape as each ring layer 40n (each dummy wiring layer 40m and each wall layer 40p), and is formed in a rectangular ring shape. The planar shape of the via portion 40a may be a ring shape other than a rectangle, such as a square, ellipse, or circle.

[0035] The via portion 40a is formed of, for example, a metal material such as copper, or an oxide layer (oxide film) such as silicon oxide (silica). The oxide layer may be formed by, for example, backside deep trench isolation (BDTI). The via portion 40a may be formed of the same material as each ring layer 40n (each dummy wiring layer 40m and each wall layer 40p) or may be formed of a different material.

[0036] The wiring section 50 is composed of a plurality of wiring layers 50n (n=1, 2, 3, ...). In the example of Fig. 3, the wiring section 50 is provided only directly below the pad 30, but in reality, wiring layers constituting the wiring section 50 are also provided in other locations within the design area A1 (for example, locations corresponding to the pixel array section 11, the vertical drive section 12, the column signal processing section 13, the control section 14, etc.).

[0037] The wiring layer 50n includes wiring and vias used for signal transmission. The wiring layer 50n may also include various circuits. The wiring layer 50n is formed of a metal material such as copper, aluminum, or tungsten. The wiring layer 50n and the ring layer 40n may be formed in the same manufacturing process. When the wiring layer 50n and the ring layer 40n are formed in the same manufacturing process, the ring layer 40n is formed of the same material as the wiring layer 50n.

[0038] <1-2-2. Comparative Example 1> A configuration example of an image capture device 10A according to Comparative Example 1 of this embodiment will be described with reference to Fig. 4 and Fig. 5. Fig. 4 is a plan view showing the configuration example of an image capture device 10A according to Comparative Example 1 of this embodiment. Fig. 5 is a cross-sectional view (cross-sectional view taken along line Y2-Y2 in Fig. 4) showing the configuration example of an image capture device 10A according to Comparative Example 1 of this embodiment.

[0039] 4, in the imaging device 10A according to the first comparative example, the guard ring 40 is provided to surround each of the pads 30 arranged in a rectangular ring shape in a plan view. The planar shape of this guard ring 40 is formed in a rectangular ring shape.

[0040] The guard ring area A2 in Comparative Example 1 is not set within the design area A1, but is set outside the design area A1 on the substrate 20. Therefore, the size of the substrate 20 (imaging device 10) in Comparative Example 1 is larger than that of the substrate 20 (imaging device 10) in Example 1.

[0041] That is, according to the above-described first embodiment, the guard ring region A2 is set within the design region A1, and the guard ring region A2, i.e., the guard ring 40, is located directly below the pad 30. This allows the substrate 20 (imaging device 10) of the first embodiment to be smaller than the substrate 20 (imaging device 10) of the first comparative example.

[0042] The image pickup device 10 is, for example, a back-illuminated sensor. In this case, the designer needs to design the pad 30 while taking into consideration the design rules (distances a1, a2, and a3 described below). This becomes a factor that restricts the size (chip size) of the image pickup device 10.

[0043] Distance a1 is the length from the outer peripheral surface of substrate 20 (the outer periphery of design area A1) to the outer edge of silicon opening area B2. Distance a2 is the length from the outer edge (or inner edge) of silicon opening area B2 to the outer edge (or inner edge) of pad 30. Distance a3 is the length from the outer edge (or inner edge) of pad 30 to the outer edge (or inner edge) of pad opening area B1.

[0044] A second embodiment that reduces the chip size constraints imposed by such design rules (distance a1, distance a2, distance a3) will be described below.

[0045] <1-2-3. Example 2> A configuration example of the imaging device 10 according to Example 2 of this embodiment will be described with reference to Fig. 6 and Fig. 7. Fig. 6 is a plan view showing the configuration example of the imaging device 10 according to Example 2 of this embodiment. Fig. 7 is a cross-sectional view (cross-sectional view taken along line Y3-Y3 in Fig. 6) showing the configuration example of the imaging device 10 according to Example 2 of this embodiment.

[0046] 6 and 7 , in Example 2, the outer peripheral surface of the substrate 20 (the end surface on the left side in FIG. 7 ) and the outer end surfaces of each pad 30 (the end surfaces on the left side in FIG. 7 ) are flush with each other. The outer peripheral surface of the substrate 20 is a scribed end surface formed by scribing. The outer end surfaces of each pad 30 are exposed surfaces exposed from the outer peripheral surface of the substrate 20.

[0047] Before scribing, a portion of the pad 30 and a portion of the oxide layer 22b are present in the scribe area A3. During scribing, the substrate 20 in the scribe area A3 is scribed together with a portion of the pad 30 and a portion of the oxide layer 22b in the scribe area A3. This causes the scribed end surface of the substrate 20 and the outer end surface of the pad 30 to be flush with each other.

[0048] According to Example 2, it is possible to reduce the size of the imaging device 10, similarly to the above-described Example 1. Furthermore, according to Example 2, it is not necessary to consider one side of the distance a1 and the distance a2 (the left side in FIG. 7 ), and one side of the distance a3 (the left side in FIG. 7 ) of the above-described Comparative Example 1, so that restrictions on the size (chip size) of the imaging device 10 are reduced, and the imaging device 10 can be further reduced in size.

[0049] 1-2-4. Example 3 An example of the configuration of the imaging device 10 according to Example 3 of this embodiment will be described with reference to Fig. 8. Fig. 8 is a cross-sectional view showing an example of the configuration of the imaging device 10 according to Example 3 of this embodiment.

[0050] As shown in FIG. 8 , in the third embodiment, the imaging device 10 includes a plurality of substrates 20 and 20A. These substrates 20 and 20A are connected, for example, by Cu-Cu bonding (CCC) and function as an integrated substrate 20B. The substrate 20 has a connection portion 60, and the substrate 20A has a connection portion 60A. These substrates 20 and 20A are connected, for example, by joining the connection portions 60 and 60A. In the example of FIG. 8 , two substrates 20 and 20A are shown, but the number of substrates may be three or more. The substrate 20 corresponds to the first substrate, and the substrate 20A corresponds to the second substrate. The connection portion 60 corresponds to the first connection portion, and the connection portion 60A corresponds to the second connection portion.

[0051] The substrate 20A has a guard ring 40A and a wiring portion 50A, similar to the substrate 20. The substrate 20 is stacked on the substrate 20A, and the pads 30 are provided on the substrate 20 located in the uppermost layer.

[0052] Guard ring 40A has, for example, a similar configuration to guard ring 40 and is provided directly below pad 30. Guard ring 40A and guard ring 40 are connected via connection portion 60 and connection portion 60A, and function as an integrated guard ring 40B. Guard ring 40 corresponds to the first guard ring, and guard ring 40A corresponds to the second guard ring.

[0053] The wiring section 50A has, for example, the same configuration as the wiring section 50, and is provided directly below the pad 30. The wiring section 50A and the wiring section 50 are also connected via the connection section 60 and the connection section 60A. In the example of FIG. 8 , the wiring section 50A is provided directly below the pad 30, but in reality, wiring layers constituting the wiring section 50A are also provided in other locations within the design area A1 (for example, locations corresponding to the vertical drive section 12, the column signal processing section 13, the control section 14, etc.).

[0054] The wiring section 50A may include, for example, a logic circuit. In this case, the substrate 20A is called a logic substrate, and the substrate 20 is called a pixel substrate. The substrate 20A and the substrate 20 are stacked to form the imaging device 10.

[0055] According to Example 3, it is possible to reduce the size of the imaging device 10, similarly to the above-described Example 1 or Example 2. Furthermore, according to Example 3, similarly to the above-described Example 2, it is possible to reduce the constraints on the size (chip size) of the imaging device 10, and to further reduce the size of the imaging device 10.

[0056] <1-3. Example of Processes in a Method for Manufacturing an Imaging Device> An example of processes in a method for manufacturing an imaging device 10 according to this embodiment will be described with reference to Fig. 9 to Fig. 11. Each of Fig. 9 to Fig. 11 is a cross-sectional view showing an example of processes in a method for manufacturing an imaging device 10 according to this embodiment. The examples of Fig. 9 to Fig. 11 show the manufacturing process of the imaging device 10 according to the above-mentioned Example 3.

[0057] 9, the stacked substrates 20 and 20A are prepared, and then etching is performed on the silicon layer 22a on the substrate 20. As a result, a silicon opening region B2 is formed in the substrate 20, where the silicon layer 22a is absent. Next, a via portion 40a connected to the guard ring 40 is formed in the substrate 20. This via portion 40a may be formed of a metal layer such as copper, or may be formed of an oxide layer (oxide film) such as silicon oxide.

[0058] 10 , an oxide layer 22b is provided on the silicon opening region B2 of the substrate 20. Next, holes H1 (plurality of holes H1) extending to the wiring portion 50 are formed in the oxide layer 22b. Next, pads 30 (plurality of pads 30) are provided on the oxide layer 22b. At this time, connection via portions 30a connected to the wiring portion 50 are formed in the holes H1.

[0059] As shown in FIG. 11 , an oxide layer 22b is embedded in the silicon opening region B2 of the substrate 20 so as to cover the pad 30 (plurality of pads 30) in the silicon opening region B2. Next, etching is performed on the oxide layer 22b. As a result, a pad opening region B1 without the oxide layer 22b is formed in the substrate 20. Next, scribing is performed on the substrate 20 and the substrate 20A. As a result, the substrate 20 and the substrate 20A in the scribe region A3 are removed, and the imaging device 10 is completed.

[0060] It should be noted that the method, apparatus, and conditions used in the manufacture of general semiconductor devices can be used as a method for manufacturing the image pickup device 10 according to the above-described embodiment. In other words, the image pickup device 10 according to this embodiment can be manufactured using an existing method for manufacturing a semiconductor device.

[0061] Examples of manufacturing methods that can be used include chemical vapor deposition (CVD), atomic layer deposition (ALD), and physical vapor deposition (PVD). Examples of PVD methods include vacuum deposition, electron beam (EB) deposition, various sputtering methods (magnetron sputtering, RF (Radio Frequency)-direct current (DC) coupled bias sputtering, electron cyclotron resonance (ECR) sputtering, facing target sputtering, and high frequency sputtering), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, metal organic (MO) CVD, and photo-CVD. Other methods that can be used include electrolytic plating, electroless plating, various printing methods, and various coating methods. Furthermore, examples of the patterning method include chemical etching such as shadow masking, laser transfer, and photolithography, and physical etching using ultraviolet light or a laser.

[0062] <1-4. Actions and Effects> As described above, the imaging device 10, which is an example of a semiconductor device according to this embodiment, includes a substrate 20, a pad 30 provided outside a predetermined region (e.g., a central region) of the substrate 20 in a plan view, and a guard ring 40 provided on the substrate 20, positioned directly below the pad 30 and surrounding the predetermined region in a plan view, to prevent moisture penetration (see FIGS. 2 and 3 ). As a result, the guard ring 40 is positioned directly below the pad 30, and the guard ring region A2 is within the design region A1 in a plan view. Therefore, the imaging device 10 can be made smaller than in Comparative Example 1 (see FIGS. 4 and 5 ), where the guard ring region A2 is set outside the substrate 20 relative to the design region A1. As a result, the imaging device 10 can be made smaller while suppressing moisture absorption within the imaging device 10.

[0063] Furthermore, a plurality of pads 30 may be provided, and the plurality of pads 30 may be arranged to surround a predetermined region in a plan view, and the guard ring 40 may be provided to pass directly below the plurality of pads 30 in a plan view (see, for example, FIGS. 2 and 3). This makes it possible to reduce the size of the imaging device 10 while suppressing moisture absorption within the imaging device 10, even when the plurality of pads 30 are arranged to surround a predetermined region in a plan view.

[0064] Furthermore, the outer peripheral surface of the substrate 20 and the outer end surfaces of the pads 30 may be flush with each other (see FIGS. 6 and 7, etc.), which reduces restrictions on the size of the imaging device 10 and allows the imaging device 10 to be made even smaller.

[0065] Furthermore, the width from the inner peripheral surface to the outer peripheral surface of the guard ring 40 may be smaller than the length from the inner end face to the outer end face of the pad 30 (see FIGS. 2 and 3, etc.), which ensures that the imaging device 10 can be made smaller.

[0066] Furthermore, the width from the inner circumferential surface to the outer circumferential surface of the guard ring 40 may be smaller than the length from the inner edge to the outer edge of the exposed surface of the pad 30 (see FIGS. 2 and 3, etc.), which ensures that the imaging device 10 can be made smaller.

[0067] The guard ring 40 is made up of a plurality of ring layers 40n (n = 1, 2, 3, ...), and the imaging device 10 may further include a via portion 40a that is provided between the pad 30 and the uppermost ring layer 40n (n = 1, 2, 3, ...) of the plurality of ring layers 40n (n = 1, 2, 3, ...) and that prevents moisture from entering (see Figures 2 and 3, etc.). This makes it possible to reliably prevent moisture absorption within the imaging device 10, thereby enabling the imaging device 10 to be miniaturized while reliably preventing moisture absorption within the imaging device 10.

[0068] The ring layer 40n may also be a metal layer (see FIGS. 2 and 3, etc.), which can reliably suppress moisture absorption within the imaging device 10.

[0069] The via portion 40a may also be formed of a metal layer (see FIGS. 2 and 3, etc.), which can reliably suppress moisture absorption within the imaging device 10. Also, for example, the via portion 40a can be formed in the same manufacturing process as the formation of the wiring portion 50.

[0070] The via portion 40a may also be formed of an oxide layer (see FIGS. 2 and 3, etc.), which can reliably suppress moisture absorption within the imaging device 10. Also, for example, the via portion 40a can be formed in the same manufacturing process as the formation of the oxide layer 22b.

[0071] Furthermore, the substrate 20B may be composed of a plurality of substrates 20, 20A (see FIG. 8). Even in this case, it is possible to reduce the size of the imaging device 10 while suppressing moisture absorption within the imaging device 10.

[0072] Furthermore, the pad 30 may be provided on the uppermost substrate 20 of the multiple substrates 20, 20A (see FIG. 8 ). Even in this case, it is possible to reduce the size of the imaging device 10 while suppressing moisture absorption within the imaging device 10.

[0073] Furthermore, the substrate 20B may have the substrate 20 and the substrate 20A, and the guard ring 40B may have a guard ring 40 that is positioned directly below the pad 30 in a plan view and is provided on the substrate 20 to surround a predetermined region and prevent moisture from entering, and a guard ring 40A that is positioned directly below the pad 30 in a plan view and is provided on the substrate 20A to surround a predetermined region and prevent moisture from entering (see FIG. 8). As a result, even when the substrate 20B is composed of the substrate 20 and the substrate 20A, it is possible to reduce the size of the imaging device 10 while preventing moisture absorption within the imaging device 10.

[0074] Alternatively, the guard ring 40 may have a connecting portion 60, and the guard ring 40A may have a connecting portion 60A, and the guard ring 40 and the guard ring 40A may be connected via the connecting portion 60 and the connecting portion 60A (see FIG. 8 ). This makes it possible to reliably suppress moisture absorption within the imaging device 10.

[0075] The imaging device 10 may further include a pixel array unit 11 provided in a predetermined region (see FIG. 2, etc.). Even in this case, it is possible to reduce the size of the imaging device 10 while suppressing moisture absorption by the pixel array unit 11 in the imaging device 10.

[0076] 2. Other Embodiments The configurations and processes according to the above-described embodiments (including examples and modified examples) may be implemented in various different forms other than the above-described embodiments. For example, the configurations and processes are not limited to the above-described examples and may be implemented in various forms. Furthermore, for example, the configurations, processing procedures, specific names, or information including various data and parameters shown in the above documents and drawings may be changed arbitrarily unless otherwise specified.

[0077] Furthermore, the components and processes according to the above-described embodiments (including examples and modifications) do not necessarily have to be physically configured as shown in the drawings. In other words, the specific form of distribution and integration of the components and processes is not limited to that shown in the drawings, and all or part of them may be functionally or physically distributed or integrated in any unit depending on various loads, usage conditions, etc.

[0078] Furthermore, the configurations and processes of the above-described embodiments (including examples and modified examples) may be combined as appropriate. For example, at least a part of an embodiment may be combined as appropriate with at least a part of another embodiment. Furthermore, the effects of the embodiments are merely examples and are not intended to be limiting, and other effects may also be obtained.

[0079] 3. Application Example An application example of the imaging device 10 according to any one of Examples 1 to 3 of this embodiment will be described with reference to Fig. 12. Fig. 12 is a diagram showing an application example in which the imaging device 10 according to any one of Examples 1 to 3 of this embodiment is used.

[0080] The imaging device 10 according to any one of the above-described Examples 1 to 3 can be used in various cases for sensing light such as visible light, infrared light, ultraviolet light, and X-rays, for example, as follows: For example, as shown in FIG. 12 , the imaging device 10 according to any one of the first to third embodiments described above can be used in: “a device for capturing images for viewing, such as a digital camera or a portable device with a camera function,” “a device for traffic use, such as an in-vehicle sensor for capturing images of the front, rear, surroundings, or interior of a vehicle for safe driving such as automatic stopping or for recognizing the driver's state, a surveillance camera for monitoring moving vehicles and roads, or a distance measuring sensor for measuring distances between vehicles,” “a device for home appliances such as a TV, refrigerator, or air conditioner for capturing images of a user's gestures and operating the device in accordance with the gestures,” “a device for medical or healthcare use, such as an endoscope or a device for capturing blood vessel images by receiving infrared light,” “a device for security use, such as a surveillance camera for crime prevention or a camera for person authentication,” “a device for beauty use, such as a skin measuring device for capturing images of the skin or a microscope for capturing images of the scalp,” “a device for sports use, such as an action camera or wearable camera for sports use,” or “a device for agriculture, such as a camera for monitoring the condition of fields or crops.”

[0081] The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as an electronic device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, a construction machine, or an agricultural machine (tractor). Furthermore, for example, the technology according to the present disclosure may be realized as an electronic device mounted on an endoscopic surgery system, a microsurgery system, or the like.

[0082] <3-1. Imaging Device> An imaging device 300 according to an application example will be described with reference to Fig. 13. Fig. 13 is a diagram showing an example of the configuration of the imaging device 300 according to an application example. This imaging device 300 is an example of an electronic device to which the imaging device 10 according to any one of the above-described first to third embodiments is applied. Examples of the imaging device 300 include electronic devices such as digital still cameras, video cameras, smartphones and mobile phones having an imaging function.

[0083] 13, the imaging device 300 includes an optical system 301, a shutter device 302, an imaging element (solid-state imaging device) 303, a control circuit (drive circuit) 304, a signal processing circuit 305, a monitor 306, and a memory 307. The imaging device 300 is capable of capturing still images and moving images.

[0084] The optical system 301 includes one or more lenses. The optical system 301 guides light from a subject (incident light) to the image sensor 303, and forms an image on the light receiving surface of the image sensor 303.

[0085] The shutter device 302 is disposed between the optical system 301 and the image sensor 303. The shutter device 302 controls the light irradiation period and the light blocking period for the image sensor 303 under the control of the control circuit 304.

[0086] The image sensor 303 accumulates signal charges for a certain period of time in response to light that is imaged on the light receiving surface via the optical system 301 and the shutter device 302. The signal charges accumulated in the image sensor 303 are transferred in accordance with a drive signal (timing signal) supplied from the control circuit 304. As the image sensor 303, for example, the image sensor 10 according to any one of the above-described first to third embodiments is used.

[0087] The control circuit 304 outputs a drive signal that controls the transfer operation of the image sensor 303 and the shutter operation of the shutter device 302 , thereby driving the image sensor 303 and the shutter device 302 .

[0088] The signal processing circuit 305 performs various signal processing on the signal charges output from the image sensor 303. The image (image data) obtained by the signal processing performed by the signal processing circuit 305 is supplied to a monitor 306 and also to a memory 307.

[0089] The monitor 306 displays moving or still images captured by the image sensor 303 based on the image data supplied from the signal processing circuit 305. As the monitor 306, for example, a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel is used.

[0090] The memory 307 stores image data supplied from the signal processing circuit 305 , that is, image data of moving images or still images captured by the image sensor 303 .

[0091] Even in the imaging device 300 configured in this manner, miniaturization can be achieved by applying the imaging device 10 according to any one of the above-described first to third embodiments to the imaging element 303.

[0092] <3-2. Distance Measuring Device> A distance measuring device 400 according to an application example will be described with reference to Fig. 14. Fig. 14 is a diagram showing an example of the configuration of the distance measuring device 400 according to an application example. This distance measuring device 400 is an example of an electronic device to which the imaging device 10 according to any one of the above-described first to third embodiments is applied.

[0093] 14, a distance measuring device (distance image sensor) 400 includes a light source unit 401, an optical system 402, an image sensor (solid-state image sensor) 403, a control circuit (drive circuit) 404, a signal processing circuit 405, a monitor 406, and a memory 407. This distance measuring device 400 projects light from the light source unit 401 toward an object and receives light (modulated light or pulsed light) reflected from the surface of the object, thereby obtaining a distance image corresponding to the distance to the object.

[0094] The light source unit 401 projects light toward the subject. For example, a vertical cavity surface emitting laser (VCSEL) array that emits laser light as a surface light source, or a laser diode array in which laser diodes are arranged in a line, is used as the light source unit 401. The laser diode array is supported by a predetermined drive unit (not shown) and scanned in a direction perpendicular to the direction in which the laser diodes are arranged.

[0095] The optical system 402 includes one or more lenses. The optical system 402 guides light from a subject (incident light) to the image sensor 403, and forms an image on the light receiving surface (sensor portion) of the image sensor 403.

[0096] The image sensor 403 accumulates signal charges in response to light that is imaged on the light receiving surface via the optical system 402. A distance signal indicating a distance determined from a light receiving signal (APD OUT) output from the image sensor 403 is supplied to a signal processing circuit 405. As the image sensor 403, for example, the image sensor 10 according to any one of the first to third embodiments described above is used.

[0097] The control circuit 404 outputs a drive signal (control signal) that controls the operation of the light source unit 401, the image sensor 403, etc., and drives the light source unit 401, the image sensor 403, etc.

[0098] The signal processing circuit 405 performs various signal processing on the distance signal supplied from the image sensor 403. For example, the signal processing circuit 405 performs image processing (e.g., histogram processing, peak detection processing, etc.) to construct a distance image based on the distance signal. The image (image data) obtained by the signal processing performed by the signal processing circuit 405 is supplied to a monitor 406 and also to a memory 407.

[0099] The monitor 406 displays the distance image captured by the image sensor 403 based on the image data supplied from the signal processing circuit 405. The monitor 406 may be, for example, a panel display device such as a liquid crystal panel or an organic EL panel.

[0100] The memory 407 stores the image data supplied from the signal processing circuit 405 , that is, the image data of the distance image captured by the image sensor 403 .

[0101] Even in the distance measuring device 400 configured in this way, miniaturization can be achieved by applying the imaging device 10 according to any one of the first to third embodiments to the imaging element 403.

[0102] As described above, the imaging device 10 according to any one of Examples 1 to 3 of this embodiment can be implemented in various electronic devices. For example, the imaging device 10 according to any one of Examples 1 to 3 described above may be installed in various electronic devices such as an HDD (hard disk drive), a notebook PC (personal computer), a mobile device (for example, a smartphone or tablet PC), a PDA (personal digital assistant), a wearable device, a game device, or a music device, in addition to the imaging device 300 or the distance measuring device 400.

[0103] <4. Supplementary Notes> The present technology may also be configured as follows. (1) A semiconductor device comprising: a substrate; a pad provided on the substrate outside a predetermined region of the substrate in a planar view; and a guard ring positioned directly below the pad in a planar view and provided on the substrate so as to surround the predetermined region, the guard ring preventing moisture from entering. (2) The semiconductor device according to (1), wherein a plurality of the pads are provided, the plurality of pads being arranged so as to surround the predetermined region in a planar view, and the guard ring is provided so as to pass directly below the plurality of pads in a planar view. (3) The semiconductor device according to (1) or (2), wherein an outer peripheral surface of the substrate and an outer end face of the pad are flush with each other. (4) The semiconductor device according to any one of (1) to (3), wherein a width from an inner peripheral surface to the outer peripheral surface of the guard ring is smaller than a length from an inner end face to an outer end face of the pad. (5) The semiconductor device according to (4), wherein the width from the inner peripheral surface to the outer peripheral surface of the guard ring is smaller than the length from the inner edge to the outer edge of the exposed surface of the pad. (6) The semiconductor device according to any one of (1) to (5), wherein the guard ring is composed of a plurality of ring layers, and further comprises a via portion provided between the pad and the ring layer that is the uppermost layer of the plurality of ring layers, for preventing moisture from entering. (7) The semiconductor device according to (6), wherein the ring layer is a metal layer. (8) The semiconductor device according to (6) or (7), wherein the via portion is formed of a metal layer. (9) The semiconductor device according to (6) or (7), wherein the via portion is formed of an oxide layer. (10) The semiconductor device according to any one of (1) to (5), wherein the substrate is composed of a plurality of substrates. (11) The semiconductor device according to (10), wherein the pad is provided on the substrate that is the uppermost layer of the plurality of substrates. (12) The semiconductor device according to (11), wherein the guard ring is composed of a plurality of ring layers, and further includes a via portion provided between the pad and the ring layer that is the uppermost layer of the plurality of ring layers, and that prevents moisture from entering.(13) The semiconductor device according to (12), wherein the ring layer is a metal layer. (14) The semiconductor device according to (12) or (13), wherein the via portion is formed of a metal layer. (15) The semiconductor device according to (12) or (13), wherein the via portion is formed of an oxide layer. (16) The semiconductor device according to any one of (10) to (15), wherein the substrate has a first substrate and a second substrate, and the guard rings include: a first guard ring that is positioned directly below the pad in a plan view and is provided on the first substrate to surround the predetermined region and prevent moisture from entering, and a second guard ring that is positioned directly below the pad in a plan view and is provided on the second substrate to surround the predetermined region and prevent moisture from entering. (17) The semiconductor device according to (16), wherein the first guard ring has a first connection portion, the second guard ring has a second connection portion, and the first guard ring and the second guard ring are connected via the first connection portion and the second connection portion. (18) The semiconductor device according to any one of (1) to (17), further comprising a pixel array portion provided in the predetermined region. (19) An electronic device comprising a semiconductor device, the semiconductor device having: a substrate; a pad provided on the substrate outside the predetermined region of the substrate in a planar view; and a guard ring provided on the substrate so as to be positioned directly below the pad in a planar view and surround the predetermined region, the guard ring preventing moisture from entering. (20) A method for manufacturing a semiconductor device, comprising: providing a pad outside the predetermined region of the substrate in a planar view; and providing a guard ring on the substrate so as to be positioned directly below the pad and surround the predetermined region in a planar view, the guard ring preventing moisture from entering. (21) An electronic device comprising the semiconductor device according to any one of (1) to (18). (22) A method for manufacturing a semiconductor device, the method comprising manufacturing the semiconductor device according to any one of (1) to (18).

[0104] REFERENCE SIGNS LIST 10 Imaging device 10A Imaging device 11 Pixel array section 12 Vertical drive section 13 Column signal processing section 14 Control section 15 Signal line 16 Signal line 17 Signal line 18 Signal line 20 Substrate 20A Substrate 20B Substrate 21 First substrate layer 22a Silicon layer 22 Second substrate layer 22b Oxide layer 30 Pad 30a Connection via section 40 Guard ring 40A Guard ring 40B Guard ring 40a Via section 40m Dummy wiring layer 40n Ring layer 40p Wall layer 50 Wiring section 50A Wiring section 50n Wiring layer 100 Pixel A1 Design area A2 Guard ring area A3 Scribe area B1 Pad opening area B2 Silicon opening area

Claims

1. A semiconductor device comprising: a substrate; a pad provided outside a predetermined region of the substrate in a planar view; and a guard ring provided on the substrate positioned directly below the pad in a planar view and surrounding the predetermined region, the guard ring preventing moisture from entering.

2. The semiconductor device according to claim 1, wherein a plurality of the pads are provided, the plurality of pads are arranged so as to surround the specified region in a planar view, and the guard ring is provided so as to pass directly below the plurality of pads in a planar view.

3. The semiconductor device according to claim 1, wherein the outer peripheral surface of the substrate and the outer end faces of the pads are flush with each other.

4. The semiconductor device according to claim 1, wherein the width from the inner circumferential surface to the outer circumferential surface of said guard ring is smaller than the length from the inner end face to the outer end face of said pad.

5. The semiconductor device according to claim 4, wherein the width from the inner circumferential surface to the outer circumferential surface of said guard ring is smaller than the length from the inner edge to the outer edge of the exposed surface of said pad.

6. The semiconductor device according to claim 1, wherein the guard ring is composed of a plurality of ring layers, and further comprises a via portion provided between the pad and the uppermost ring layer of the plurality of ring layers, for preventing the intrusion of moisture.

7. The semiconductor device according to claim 6, wherein the ring layer is a metal layer.

8. The semiconductor device according to claim 6, wherein the via portion is formed from a metal layer.

9. The semiconductor device according to claim 6, wherein the via portion is formed of an oxide layer.

10. The semiconductor device according to claim 1, wherein the substrate is made up of a plurality of substrates.

11. The semiconductor device according to claim 10, wherein the pad is provided on the substrate that is the uppermost layer of the plurality of substrates.

12. The semiconductor device according to claim 11, wherein the guard ring is composed of a plurality of ring layers, and further comprises a via portion provided between the pad and the uppermost ring layer of the plurality of ring layers, for preventing the intrusion of moisture.

13. The semiconductor device according to claim 12, wherein the ring layer is a metal layer.

14. The semiconductor device according to claim 12, wherein the via portion is formed of a metal layer.

15. The semiconductor device according to claim 12, wherein the via portion is formed of an oxide layer.

16. The semiconductor device according to claim 10, wherein the substrate comprises a first substrate and a second substrate, and the guard ring comprises: a first guard ring provided on the first substrate to be positioned directly below the pad in a planar view and to surround the specified region, preventing the intrusion of moisture; and a second guard ring provided on the second substrate to be positioned directly below the pad in a planar view and to surround the specified region, preventing the intrusion of moisture.

17. The semiconductor device described in claim 16, wherein the first guard ring has a first connection portion, the second guard ring has a second connection portion, and the first guard ring and the second guard ring are connected via the first connection portion and the second connection portion.

18. The semiconductor device according to claim 1, further comprising a pixel array section provided in the predetermined region.

19. An electronic device comprising a semiconductor device having: a substrate; a pad provided outside a predetermined region of the substrate in a planar view; and a guard ring provided on the substrate positioned directly below the pad in a planar view and surrounding the predetermined region, the guard ring preventing moisture from entering.

20. A method for manufacturing a semiconductor device, comprising: providing a pad outside a predetermined region of a substrate in a planar view; and providing a guard ring on the substrate to prevent moisture from entering, positioned directly below the pad in a planar view and surrounding the predetermined region.

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