Variable attenuator

Abstract

This variable attenuator comprises: a plurality of signal transmission paths in which attenuation amounts of transmission signals differ from one another; semiconductor switches which are respectively provided to the plurality of signal transmission paths, and switch the plurality of respective signal transmission paths to a transmission state or a non-transmission state; and an impedance correction circuit which is provided in one of the plurality of signal transmission paths having a relatively large attenuation amount, and corrects the impedance so as to reduce leakage of a transmission signal in an open semiconductor switch provided in one signal transmission path having the smallest attenuation amount among the plurality of signal transmission paths.

Description

Variable Attenuator

[0001] The present invention relates to a variable attenuator. This application claims priority to Japanese Patent Application No. 2023-142504 filed on September 1, 2023, and Japanese Patent Application No. 2024-084385 filed on May 23, 2024, the contents of which are incorporated herein by reference.

[0002] Patent Document 1 below discloses a transistor bridge attenuator. This transistor bridge attenuator is a variable attenuator that includes multiple transmission paths with different transmission attenuation amounts and variably sets the attenuation amount of a transmission signal by switching between the multiple transmission paths using transistors.

[0003] U.S. Pat. No. 1,063,742

[0004] The transistor in the above-described transistor bridge attenuator not only functions as an open / close switch for switching the transmission path, but also functions as a capacitance, i.e., a capacitor as a circuit element, in the OFF state (open state). That is, when the transistor is in the OFF state (open state), it blocks signal transmission if the transmission signal is a DC signal, but if the transmission signal is an AC signal, transmission leakage may occur. This transmission leakage increases as the frequency of the transmission signal increases. Therefore, in the background art, since transmission signal leakage may occur if the transmission signal is an AC signal, it is difficult to accurately set the attenuation amount when the transmission signal is an AC signal.

[0005] SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a variable attenuator that allows the amount of attenuation of an AC transmission signal to be set more accurately than ever before.

[0006] A variable attenuator according to a first aspect of the present invention comprises a plurality of signal transmission paths each having a different amount of attenuation of a transmission signal, a plurality of semiconductor switches provided in each of the plurality of signal transmission paths and switching each of the plurality of signal transmission paths between a transmission state and a non-transmission state, and an impedance compensation circuit provided in one of the plurality of signal transmission paths having a relatively large amount of attenuation and configured to compensate impedance in an open state so as to reduce leakage of the transmission signal at the semiconductor switch provided in one of the plurality of signal transmission paths having the smallest amount of attenuation.

[0007] A variable attenuator according to a second aspect of the present invention is the variable attenuator of the first aspect, wherein the impedance compensation circuit includes a first impedance compensation circuit that compensates for the input impedance of one of the plurality of signal transmission paths having a relatively large amount of attenuation, and a second impedance compensation circuit that compensates for the output impedance of one of the plurality of signal transmission paths having a relatively large amount of attenuation.

[0008] A variable attenuator according to a third aspect of the present invention is the variable attenuator of the first or second aspect, wherein the impedance correction circuit is provided in only one of the plurality of signal transmission paths having the largest amount of attenuation.

[0009] A fourth aspect of the present invention is the variable attenuator of any one of the first to third aspects, wherein the impedance correction circuit is a capacitor.

[0010] A variable attenuator according to a fifth aspect of the present invention is any one of the first to fourth aspects, wherein the plurality of signal transmission paths include an attenuation-free transmission path in which the attenuation is set to zero, and the attenuation-free transmission path includes, in addition to the semiconductor switch, a second semiconductor switch between the input terminal and ground potential, and the second semiconductor switch is set to an open state when the semiconductor switch of the attenuation-free transmission path is set to an open state.

[0011] A variable attenuator according to a sixth aspect of the present invention is any one of the second to fifth aspects, wherein the semiconductor switches are open / close switches provided on the input and output sides of each of the plurality of signal transmission paths, and the first impedance compensation circuit and the second impedance compensation circuit are provided between the open / close switches and attenuation circuits having the attenuation amounts provided between two of the open / close switches in each of the plurality of signal transmission paths.

[0012] A variable attenuator according to a seventh aspect of the present invention is any one of the first to sixth aspects, wherein the plurality of semiconductor switches put at least one of the plurality of signal transmission paths into a transmission state.

[0013] According to the present invention, it is possible to provide a variable attenuator that can set the amount of attenuation of an AC transmission signal more accurately than before.

[0014] Fig. 1 is a circuit diagram showing the configuration of a variable attenuator A1 according to a first embodiment of the present invention; Fig. 2 is a characteristic diagram showing the attenuation characteristics of the variable attenuator A1 according to the first embodiment of the present invention; Fig. 3 is a circuit diagram showing the configuration of a variable attenuator A2 according to a second embodiment of the present invention; Fig. 4 is a circuit diagram showing the configuration of a variable attenuator A3 according to a third embodiment of the present invention; Fig. 5 is a characteristic diagram showing additional features of the present invention;

[0015] Hereinafter, several embodiments of the present invention will be described with reference to the drawings. [First Embodiment] First, a variable attenuator A1 according to the first embodiment will be described. As shown in Figure 1, this variable attenuator A1 includes a first signal transmission path D1 and a second signal transmission path D2.

[0016] As shown in the figure, the first signal transmission path D1 and the second signal transmission path D2 are two lines provided in parallel between the input terminal Tin and the output terminal Tout. These first signal transmission path D1 and second signal transmission path D2 transmit a high-frequency signal of a predetermined frequency as an AC transmission signal from the input terminal Tin to the output terminal Tout.

[0017] As shown in the figure, the first signal transmission path D1 includes a first transistor 1, and is a transmission line for a transmission signal that runs from the input terminal Tin to the output terminal Tout via the first transistor 1. The first signal transmission path D1 has a different attenuation amount (first attenuation amount) for the transmission signal than the second signal transmission path D2.

[0018] The first signal transmission path D1 is a transmission line that transmits a high-frequency signal (AC transmission signal) without intentionally attenuating it, i.e., an attenuation-free transmission path in which the attenuation amount for the high-frequency signal is set to zero. That is, the variable attenuator A1 according to the first embodiment includes the attenuation-free transmission path (first signal transmission path D1).

[0019] In contrast, as shown in the figure, the second signal transmission path D2 includes a second transistor 2, a first capacitor 3, a first resistor 4, a second resistor 5, a third resistor 6, a fourth resistor 7, a second capacitor 8, and a third transistor 9. This second signal transmission path D2 is a transmission path for a transmission signal from the input terminal Tin to the output terminal Tout via the second transistor 2, the first capacitor 3, the first resistor 4, the second resistor 5, the third resistor 6, the fourth resistor 7, the second capacitor 8, and the third transistor 9.

[0020] The second signal transmission path D2 has a different attenuation amount for a transmission signal from the first signal transmission path D1. That is, the second signal transmission path D2 is a transmission line whose attenuation amount (second attenuation amount) is greater than the first attenuation amount of the first signal transmission path D1, i.e., a signal transmission path with a relatively large attenuation amount. For example, the second attenuation amount is greater than the first attenuation amount by 10 dB or more. The first resistor 4, the second resistor 5, the third resistor 6, and the fourth resistor 7 constitute a T-type resistive attenuation circuit having the second attenuation amount.

[0021] The input terminal Tin is connected to a predetermined signal supply source outside the variable attenuator A1, and is also connected inside the variable attenuator A1 to the drain terminal of the first transistor 1 and the drain terminal of the second transistor 2. A high-frequency signal (transmission signal) is input to this input terminal Tin from the signal supply source.

[0022] As shown in the figure, the first transistor 1 is an n-type MOS (Metal Oxide Semiconductor) transistor. The drain terminal of this first transistor 1 is connected to the input terminal Tin and the drain terminal of the second transistor 2, and the source terminal is connected to the output terminal Tout and the source terminal of the third transistor 9.

[0023] The gate terminal of the first transistor 1 is connected to a first output terminal of a control unit (not shown). The first transistor 1 is a semiconductor switch in which the drain terminal and the source terminal are brought into a conductive state (closed state) or a non-conductive state (open state) based on a first gate signal input from the control unit to the gate terminal.

[0024] As shown in the figure, the second transistor 2 is an n-type MOS (Metal Oxide Semiconductor) transistor and is provided on the input side of the second signal transmission path D2. The drain terminal of this second transistor 2 is connected to the input terminal Tin and the drain terminal of the first transistor 1, and the source terminal is connected to one end of the first capacitor 3 and one end of the first resistor 4 and the fourth resistor 7.

[0025] The gate terminal of the second transistor 2 is connected to the second output terminal of the control unit (not shown). The second transistor 2 is a semiconductor switch in which the drain terminal and the source terminal are brought into a conductive state (closed state) or a non-conductive state (open state) based on a second gate signal input from the control unit to the gate terminal.

[0026] The first capacitor 3 has a predetermined capacitance (first capacitance). One end of the first capacitor 3 is connected to the source terminal of the second transistor 2, one end of the first resistor 4, and one end of the fourth resistor 7, and the other end is connected to the other end of the second resistor 5, the other end of the second capacitor 8, and the ground terminal GND. That is, the first capacitor 3 is provided between the second transistor 2 and the T-type resistive attenuation circuit provided between the second transistor 2 and the third transistor 9 in the second signal transmission path D2.

[0027] The first capacitor 3 is provided on the second signal transmission path D2, which has a relatively large amount of attenuation, and serves as a first impedance compensation circuit that compensates the input impedance of the second signal transmission path D2 so as to reduce leakage of a high-frequency signal (AC transmission signal) from the open-state first transistor 1. The function (action) of the first capacitor 3 will be described in detail later in the operation description.

[0028] The first resistor 4 has a predetermined resistance value (first resistance value) and configures a T-type resistance attenuation circuit together with the second resistor 5, the third resistor 6, and the fourth resistor 7. One end of the first resistor 4 is connected to the source terminal of the second transistor 2, one end of the first capacitor 3, and one end of the fourth resistor 7, and the other end is connected to one end of the second resistor 5 and one end of the third resistor 6.

[0029] The second resistor 5 has a predetermined resistance value (second resistance value). One end of the second resistor 5 is connected to the other end of the first resistor 4 and one end of the third resistor 6, and the other end of the second resistor 5 is connected to the other end of the first capacitor 3, the other end of the second capacitor 8, and the ground terminal GND.

[0030] The third resistor 6 has a predetermined resistance value (third resistance value). One end of the third resistor 6 is connected to the other end of the first resistor 4 and one end of the second resistor 5, and the other end is connected to the other end of the fourth resistor 7, one end of the second capacitor 8, and the drain terminal of the third transistor 9.

[0031] The fourth resistor 7 has a predetermined resistance value (fourth resistance value). One end of the fourth resistor 7 is connected to the source terminal of the second transistor 2, one end of the first capacitor 3, and one end of the first resistor 4, and the other end is connected to the other end of the third resistor 6, one end of the second capacitor 8, and the drain terminal of the third transistor 9.

[0032] The second capacitor 8 has a predetermined capacitance (second capacitance). One end of the second capacitor 8 is connected to the other end of the third resistor 6, the other end of the fourth resistor 7, and the drain terminal of the third transistor 9, and the other end is connected to the other end of the first capacitor 3, the other end of the second resistor 5, and the ground terminal GND. That is, the second capacitor 8 is provided between the third transistor 9 and the T-type resistive attenuation circuit provided between the second transistor 2 and the third transistor 9 in the second signal transmission path D2.

[0033] The second capacitor 8 is provided on the second signal transmission path D2, which has a relatively large amount of attenuation like the first capacitor 3, and serves as a second impedance compensation circuit that compensates the output impedance of the second signal transmission path D2 so as to reduce leakage of high-frequency signals (AC transmission signals) from the first transistor 1 in the open state. The function (action) of the second capacitor 8 will be described in detail later in the operation description.

[0034] As shown in the figure, the third transistor 9 is an n-type MOS (Metal Oxide Semiconductor) transistor and is provided on the output side of the second signal transmission path D2. The drain terminal of this third transistor 9 is connected to the other end of the third resistor 6, the other end of the fourth resistor 7, and one end of the second capacitor 8, and the source terminal is connected to the source terminal of the first transistor 1 and the output terminal Tout.

[0035] The third transistor 9 has a gate terminal connected to the third output terminal of the control unit (not shown). The third transistor 9 is a semiconductor switch in which the drain terminal and the source terminal are brought into a conductive state (closed state) or a non-conductive state (open state) based on a third gate signal input from the control unit to the gate terminal.

[0036] That is, the second signal transmission path D2 includes a T-type resistive attenuation circuit between the second transistor 2 provided on the input side and the third transistor 9 provided on the output side, the T-type resistive attenuation circuit being composed of a first resistor 4, a second resistor 5, a third resistor 6, and a fourth resistor 7. The second signal transmission path D2 also includes a first capacitor 3 (first impedance compensation circuit) between the second transistor 2 and the T-type resistive attenuation circuit, i.e., on the input side, and a second capacitor 8 (second impedance compensation circuit) between the T-type resistive attenuation circuit and the third transistor 9, i.e., on the output side.

[0037] The ground terminal GND is connected to a ground potential outside the variable attenuator A1, and this ground terminal GND is connected to the other end of the first capacitor 3, the other end of the second resistor 5, and the other end of the second capacitor 8 inside the variable attenuator A1.

[0038] The output terminal Tout is connected to a predetermined subsequent circuit outside the variable attenuator A1, and is also connected to the source terminal of the first transistor 1 and the source terminal of the third transistor 9 inside the variable attenuator A1. The output terminal Tout outputs to the subsequent circuit a first attenuated signal that has been attenuated in the first signal transmission path D1 (first attenuation processing, non-attenuation processing in this embodiment) or a second attenuated signal that has been attenuated in the second signal transmission path D2 (second attenuation processing).

[0039] Next, the operation and circuit performance of the variable attenuator A1 according to the first embodiment will be described in detail with reference to FIG.

[0040] This variable attenuator A1 applies a first or second attenuation amount to a high-frequency signal (AC transmission signal) input to an input terminal Tin by alternatively selecting a first signal transmission path D1 or a second signal transmission path D2, and outputs the signal from an output terminal Tout. For example, when the high-frequency signal is to be attenuated by the first attenuation amount, the first transistor 1 is set to a conductive state (closed state), and the second transistor 2 and the third transistor 9 are set to a non-conductive state (open state).

[0041] When the first signal transmission path D1 is selected in this manner, the high-frequency signal input to the input terminal Tin is output to the outside from the output terminal Tout via the first transistor 1. That is, the high-frequency signal is output from the output terminal Tout with its amplitude attenuated by the first attenuation amount.

[0042] On the other hand, when the second attenuation amount is applied to the high-frequency signal, the first transistor 1 is set to a non-conductive state (open state), and the second transistor 2 and the third transistor 9 are set to a conductive state (closed state). In this case, the high-frequency signal input to the input terminal Tin first passes through the second transistor 2, then the T-type resistive attenuation circuit, and the third transistor 9, and is output to the outside from the output terminal Tout. In other words, the high-frequency signal is output from the output terminal Tout with its amplitude attenuated by the second attenuation amount.

[0043] When the second attenuation is applied to the high-frequency signal, the first transistor 1 is set to a non-conductive state (open state), but the first transistor 1 functions as a capacitor for the high-frequency signal. That is, the first transistor 1 cannot completely block the transmission of the high-frequency signal in the non-conductive state (open state).

[0044] Therefore, even though the first transistor 1 is set to a non-conductive state (open state), a portion of the high-frequency signal can be transmitted from the drain terminal to the source terminal of the first transistor 1. When such leakage of the high-frequency signal (AC transmission signal) occurs, the high-frequency signal output from the output terminal Tout has an attenuation different from the second attenuation amount.

[0045] To address this problem, the variable attenuator A1 compensates for the input impedance of the second signal transmission path D2 by providing a first capacitor 3 (first impedance compensation circuit) on the input side of the second signal transmission path D2, and compensates for the output impedance of the second signal transmission path D2 by providing a second capacitor 8 (second impedance compensation circuit) on the output side of the second signal transmission path D2.

[0046] That is, this variable attenuator A1 corrects the input impedance and output impedance of the second signal transmission path D2 to suppress leakage of high-frequency signals from the first transistor 1. By providing the first capacitor 3 (first impedance correction circuit) and the second capacitor 8 (second impedance correction circuit), the amount of attenuation acting on the high-frequency signal when the second signal transmission path D2 is selected becomes close to the second attenuation amount.

[0047] 2 is a characteristic diagram showing the circuit performance, i.e., attenuation characteristics, of such a variable attenuator A1. In this characteristic diagram, a first graph G1 shows the amount of attenuation acting on a high-frequency signal when the first signal transmission path D1 is selected. Also, a second graph G2 shows the amount of attenuation acting on a high-frequency signal when the second signal transmission path D2 is selected.

[0048] Furthermore, the third graph G3 is a reference example, and shows the amount of attenuation acting on the high-frequency signal when the first capacitor 3 (first impedance compensation circuit) and the second capacitor 8 (second impedance compensation circuit) are removed from the variable attenuator A1 and the second signal transmission path D2 is selected.

[0049] That is, the third graph G3 represents a case where high-frequency signal leakage occurs in the first transistor 1, and the S-parameter is larger than that of the second graph G2, i.e., the attenuation is smaller than that of the second graph G2. On the other hand, the second graph G2 represents a case where high-frequency signal leakage does not occur in the first transistor 1, and therefore the S-parameter is smaller than that of the second graph G2, i.e., the attenuation is larger than that of the second graph G2.

[0050] The variable attenuator A1 according to the first embodiment includes a first signal transmission path D1 and a second signal transmission path D2 (plurality of signal transmission paths) each having a different amount of attenuation for a high-frequency signal (AC transmission signal), a first transistor 1, a second transistor 2, and a third transistor 9 (plurality of semiconductor switches) that switch the first signal transmission path D1 and the second signal transmission path D2 between a transmission state and a non-transmission state, and a first capacitor 3 (first impedance compensation circuit) and a second capacitor 8 (second impedance compensation circuit) that are provided on the second signal transmission path D2 having a relatively large amount of attenuation and that compensate for impedance so as to reduce leakage of the transmission signal at the first transistor 1 in an open state. Therefore, according to the first embodiment, it is possible to provide a variable attenuator that allows the amount of attenuation of an AC signal to be set more accurately than conventional.

[0051] Second Embodiment Next, a variable attenuator A2 according to a second embodiment will be described. As shown in Fig. 3, this variable attenuator A2 is configured by adding a third signal transmission path D3 to the variable attenuator A1 according to the first embodiment. That is, this variable attenuator A2 includes three lines, namely, a first signal transmission path D1, a second signal transmission path D2, and a third signal transmission path D3, arranged in parallel between the input terminal Tin and the output terminal Tout.

[0052] As shown in the figure, the third signal transmission path D3 includes a fourth transistor 10, a third capacitor 11, a fifth resistor 12, a sixth resistor 13, a seventh resistor 14, an eighth resistor 15, a fourth capacitor 16, and a fifth transistor 17. The third signal transmission path D3 is a path that runs from the input terminal Tin to the output terminal Tout via the fourth transistor 10, the third capacitor 11, the fifth resistor 12, the sixth resistor 13, the seventh resistor 14, the eighth resistor 15, the fourth capacitor 16, and the fifth transistor 17.

[0053] The third signal transmission path D3 has a different amount of attenuation for a transmission signal from the first signal transmission path D1 and the second signal transmission path D2. That is, the third signal transmission path D3 is a transmission line whose amount of attenuation (third attenuation) is greater than the second attenuation of the second signal transmission path D2, that is, the signal transmission path with the greatest amount of attenuation.

[0054] As shown in the figure, the fourth transistor 10 is an n-type MOS (Metal Oxide Semiconductor) transistor and is provided on the input side of the second signal transmission path D2. The drain terminal of this fourth transistor 10 is connected to the input terminal Tin, the drain terminal of the first transistor 1, and the drain terminal of the second transistor 2, and the source terminal is connected to one end of the third capacitor 11 and one ends of the fifth resistor 12 and eighth resistor 15.

[0055] The gate terminal of the fourth transistor 10 is connected to the fourth output terminal of the control unit (not shown). The fourth transistor 10 is a semiconductor switch in which the drain terminal and the source terminal are brought into a conductive state (closed state) or a non-conductive state (open state) based on a fourth gate signal input from the control unit to the gate terminal.

[0056] The third capacitor 11 has a predetermined capacitance (third capacitance). One end of the third capacitor 11 is connected to the source terminal of the fourth transistor 10, one end of the fifth resistor 12, and one end of the eighth resistor 15, and the other end of the third capacitor 11 is connected to the other end of the sixth resistor 13, the other end of the fourth capacitor 16, and the ground terminal GND.

[0057] This third capacitor 11 is provided on the third signal transmission path D3, which has the largest attenuation, and is a third impedance compensation circuit that compensates the input impedance of the third signal transmission path D3 so as to reduce leakage of the high-frequency signal (transmission signal) in the first transistor 1 in the open state.

[0058] The fifth resistor 12 has a predetermined resistance value (fifth resistance value) and configures a second T-type resistive attenuation circuit together with the sixth resistor 13, the seventh resistor 14, and the eighth resistor 15. One end of the fifth resistor 12 is connected to the source terminal of the fourth transistor 10, one end of the third capacitor 11, and one end of the eighth resistor 15, and the other end is connected to one end of the sixth resistor 13 and one end of the seventh resistor 14.

[0059] The sixth resistor 13 has a predetermined resistance value (sixth resistance value). One end of the sixth resistor 13 is connected to the other end of the fifth resistor 12 and one end of the seventh resistor 14, and the other end of the sixth resistor 13 is connected to the other end of the third capacitor 11, the other end of the fourth capacitor 16, and the ground terminal GND.

[0060] The seventh resistor 14 has a predetermined resistance value (seventh resistance value). One end of the seventh resistor 14 is connected to the other end of the fifth resistor 12 and one end of the sixth resistor 13, and the other end is connected to the other end of the eighth resistor 15, one end of the fourth capacitor 16, and the drain terminal of the fifth transistor 17.

[0061] The eighth resistor 15 has a predetermined resistance value (eighth resistance value). One end of the eighth resistor 15 is connected to the source terminal of the fourth transistor 10, one end of the third capacitor 11, and one end of the fifth resistor 12, and the other end is connected to the other end of the seventh resistor 14, one end of the fourth capacitor 16, and the drain terminal of the fifth transistor 17.

[0062] The fourth capacitor 16 has a predetermined capacitance (fourth capacitance). One end of the fourth capacitor 16 is connected to the other end of the seventh resistor 14, the other end of the eighth resistor 15, and the drain terminal of the fifth transistor 17, and the other end of the fourth capacitor 16 is connected to the other end of the third capacitor 11, the other end of the sixth resistor 13, and the ground terminal GND.

[0063] This fourth capacitor 16, like the third capacitor 11, is provided on the third signal transmission path D3, which has the largest attenuation, and is a fourth impedance compensation circuit that compensates the output impedance of the third signal transmission path D3 so as to reduce leakage of the high-frequency signal (AC transmission signal) from the first transistor 1 in the open state.

[0064] The fifth transistor 17 is an n-type MOS (Metal Oxide Semiconductor) transistor, and is provided on the output side of the third signal transmission path D3. The drain terminal of the fifth transistor 17 is connected to the other end of the seventh resistor 14, the other end of the eighth resistor 15, and one end of the fourth capacitor 16, and the source terminal is connected to the source terminal of the first transistor 1, the source terminal of the third transistor 9, and the output terminal Tout.

[0065] The fifth transistor 17 has a gate terminal connected to the fifth output terminal of the control unit (not shown). The fifth transistor 17 is a semiconductor switch in which the drain terminal and the source terminal are brought into a conductive state (closed state) or a non-conductive state (open state) based on a fifth gate signal input from the control unit to the gate terminal.

[0066] That is, the third signal transmission path D3 includes a second T-type resistive attenuation circuit consisting of a fifth resistor 12, a sixth resistor 13, a seventh resistor 14, and an eighth resistor 15 between a fourth transistor 10 provided on the input side and a fifth transistor 17 provided on the output side.

[0067] The third signal transmission path D3 also includes a third capacitor 11 (third impedance compensation circuit) between the fourth transistor 10 and the second T-type resistance attenuation circuit, i.e., on the input side, and a fourth capacitor 16 (fourth impedance compensation circuit) between the second T-type resistance attenuation circuit and the fifth transistor 17, i.e., on the output side.

[0068] Next, the operation and circuit performance of the variable attenuator A2 according to the second embodiment will be described. The variable attenuator A2 selectively selects one of the first signal transmission path D1, the second signal transmission path D2, and the third signal transmission path D3 to apply a first attenuation amount, a second attenuation amount, or a third attenuation amount to a high-frequency signal (AC transmission signal) input to the input terminal Tin and output the signal from the output terminal Tout.

[0069] For example, when a first attenuation amount is applied to a high-frequency signal, the first transistor 1 of the first signal transmission path D1 is set to a conductive state (closed state), the second transistor 2 and the third transistor 9 of the second signal transmission path D2 are set to a non-conductive state (open state), and the fourth transistor 10 and the fifth transistor 17 of the third signal transmission path D3 are set to a non-conductive state (open state).

[0070] In this state, the high-frequency signal (AC transmission signal) input to the input terminal Tin is output to the outside from the output terminal Tout via the first transistor 1 of the first signal transmission path D1. That is, the high-frequency signal is output from the output terminal Tout with its amplitude attenuated by the first attenuation amount.

[0071] On the other hand, when the second attenuation amount is applied to the high-frequency signal, the first transistor 1 of the first signal transmission path D1 is set to a non-conductive state (open state), the fourth transistor 10 and the fifth transistor 17 of the third signal transmission path D3 are set to a non-conductive state (open state), and the second transistor 2 and the third transistor 9 are set to a conductive state (closed state).

[0072] In this case, a high-frequency signal input to the input terminal Tin is output to the outside from the output terminal Tout via the second transistor 2, then the T-type resistive attenuation circuit, and the third transistor 9. That is, the high-frequency signal is output from the output terminal Tout with its amplitude attenuated by the second attenuation amount.

[0073] When the second attenuation is applied to the high-frequency signal, the first transistor 1 of the first signal transmission path D1 is set to a non-conductive state (open state), but the first transistor 1 functions as a capacitor for the high-frequency signal. That is, the first transistor 1 cannot completely block the transmission of the high-frequency signal in the non-conductive state (open state).

[0074] However, the variable attenuator A2 according to the second embodiment includes a first capacitor 3 (first impedance compensation circuit) on the input side of the second signal transmission path D2, thereby compensating for the input impedance of the second signal transmission path D2, and also includes a second capacitor 8 (second impedance compensation circuit) on the output side of the second signal transmission path D2, thereby compensating for the output impedance of the second signal transmission path D2.

[0075] That is, like the variable attenuator A1 according to the first embodiment, the variable attenuator A2 suppresses leakage of high-frequency signals from the first transistor 1. Therefore, in the variable attenuator A2, when the second signal transmission path D2 is selected, the attenuation acting on the high-frequency signal becomes close to the second attenuation.

[0076] Furthermore, when the third attenuation amount is applied to the high-frequency signal, the first transistor 1 of the first signal transmission path D1 is set to a non-conductive state (open state), the second transistor 2 and the third transistor 9 of the second signal transmission path D2 are set to a non-conductive state (open state), and the fourth transistor 10 and the fifth transistor 17 are set to a conductive state (closed state).

[0077] In this case, a high-frequency signal input to the input terminal Tin is output to the outside from the output terminal Tout via first the fourth transistor 10, then the second T-type resistive attenuation circuit, and the fifth transistor 17. That is, the high-frequency signal is output from the output terminal Tout with its amplitude attenuated by the third attenuation amount.

[0078] When the third attenuation is applied to the high-frequency signal, the first transistor 1 of the first signal transmission path D1 is set to a non-conductive state (open state), but the first transistor 1 functions as a capacitor for the high-frequency signal. That is, the first transistor 1 cannot completely block the transmission of the high-frequency signal in the non-conductive state (open state).

[0079] However, the variable attenuator A2 according to the second embodiment includes a third capacitor 11 (third impedance compensation circuit) on the input side of the third signal transmission path D3, thereby compensating the input impedance of the third signal transmission path D3, and the variable attenuator A3 includes a fourth capacitor 16 (fourth impedance compensation circuit) on the output side of the third signal transmission path D3, thereby compensating the output impedance of the third signal transmission path D3.

[0080] That is, even when the third signal transmission path D3 is selected, the variable attenuator A2 suppresses leakage of the high-frequency signal from the first transistor 1. Therefore, in the variable attenuator A2, when the third signal transmission path D3 is selected, the attenuation acting on the high-frequency signal becomes close to the third attenuation.

[0081] According to the variable attenuator A2 of the second embodiment, when the second signal transmission path D2 or the third signal transmission path D3 is selected and the first signal transmission path D1 is not selected, that is, when the first transistor 1 is set to the open state, leakage of the high-frequency signal (transmission signal) is reduced, so that the attenuation amount of the AC signal can be set more accurately than before.

[0082] Third Embodiment Next, a variable attenuator A3 according to a third embodiment will be described. As shown in Fig. 4, the variable attenuator A3 is the variable attenuator A2 according to the second embodiment, except that the first capacitor 3 (first impedance compensation circuit) and the second capacitor 8 (second impedance compensation circuit) are omitted.

[0083] That is, in this variable attenuator A3, the third signal transmission path D3, which has the larger (largest) attenuation amount, is provided with the third capacitor 11 (third impedance compensation circuit) and the fourth capacitor 16 (fourth impedance compensation circuit) in the second signal transmission path D2, which has the smaller attenuation amount, while the first capacitor 3 (first impedance compensation circuit) and the second capacitor 8 (second impedance compensation circuit) are omitted from the second signal transmission path D2, which has the smaller attenuation amount.

[0084] According to the variable attenuator A3 of the third embodiment, when the second signal transmission path D2 is selected, leakage of the high-frequency signal (transmission signal) in the first transistor 1 is not reduced, but when the third signal transmission path D3, which has a larger amount of attenuation than the second signal transmission path D2, is selected, leakage of the transmission signal in the first transistor 1 can be reduced. Therefore, according to the third embodiment, it is possible to set the amount of attenuation of the AC signal more accurately than in the past.

[0085] [Fourth Embodiment] Next, a variable attenuator A4 according to a fourth embodiment will be described. As shown in Fig. 5, the variable attenuator A4 is configured by adding a sixth transistor 18 to the variable attenuator A2 according to the second embodiment.

[0086] As shown in the figure, the sixth transistor 18 is an n-type MOS (Metal Oxide Semiconductor) transistor. The drain terminal of this sixth transistor 18 is connected to the input terminal Tin, the drain terminal of the first transistor 1, the drain terminal of the second transistor 2, and the drain terminal of the fourth transistor 10, and the source terminal is connected to the ground terminal GND.

[0087] The gate terminal of the sixth transistor 18 is connected to a sixth output terminal of a control unit (not shown). The sixth transistor 18 is a second semiconductor switch in which the drain terminal and the source terminal are brought into a conductive state (closed state) or a non-conductive state (open state) based on a sixth gate signal input from the control unit to the gate terminal.

[0088] In such a variable attenuator A4, when the second signal transmission path D2 or the third signal transmission path D3 is selected and the first signal transmission path D1 is not selected, that is, when the first transistor 1 is set to a non-conductive state (open state), the sixth transistor 18 is also set to a non-conductive state (open state).

[0089] That is, when the first transistor 1 functions as a capacitor for a high-frequency signal (transmission signal), the sixth transistor 18 also functions as a capacitor for the high-frequency signal. By the sixth transistor 18 functioning as a capacitor, leakage of the high-frequency signal (transmission signal) from the drain terminal to the source terminal of the first transistor 1 is reduced compared to when the sixth transistor 18 is not provided.

[0090] Therefore, according to the variable attenuator A4 of the fourth embodiment, in addition to the first capacitor 3 (first impedance compensation circuit) and the second capacitor 8 (second impedance compensation circuit) provided in the second signal transmission path D2 and the third capacitor 11 (third impedance compensation circuit) and the fourth capacitor 16 (fourth impedance compensation circuit) provided in the third signal transmission path D3, the sixth transistor 18 is provided in the first signal transmission path D1. This makes it possible to more effectively reduce leakage of high-frequency signals (transmission signals) from the first transistor 1 in the non-conducting state (open state). Therefore, according to the fourth embodiment, it is possible to set the attenuation amount of AC signals more accurately than conventional techniques.

[0091] The present invention is not limited to the above first to fourth embodiments, and the following modifications are possible, for example. (1) In the above embodiments, the cases where the number of signal transmission paths is two or three have been described. The first embodiment is the case where the number of signal transmission paths is two, and the second to fourth embodiments are the cases where the number of signal transmission paths is three. However, the number of signal transmission paths in the present invention is not limited to two or three. In other words, the present invention is applicable to cases where the number of signal transmission paths is two or more, that is, cases where multiple signal transmission paths are provided.

[0092] (2) Although the first capacitor 3 (first impedance compensation circuit) and the second capacitor 8 (second impedance compensation circuit) are provided, the present invention is not limited to this. In other words, if some leakage of high-frequency signals from the first transistor 1 is tolerable, for example, the second capacitor 8 (second impedance compensation circuit) may be omitted from the first capacitor 3 (first impedance compensation circuit) and the second capacitor 8 (second impedance compensation circuit).

[0093] (2) In the above embodiment, the first capacitor 3 is used as the first impedance compensation circuit and the second capacitor 8 is used as the second impedance compensation circuit, but the present invention is not limited to this. The impedance compensation circuit of the present invention may be a circuit element other than a capacitor or a circuit consisting of two or more circuit elements.

[0094] (3) In the above embodiment, a T-type resistive attenuation circuit is used as an attenuation circuit for attenuating a high-frequency signal (AC transmission signal), but the present invention is not limited to this. For example, a π-type resistive attenuation circuit or another resistive attenuation circuit may be used instead of the T-type resistive attenuation circuit.

[0095] [Additional Features] Below, additional features of the present invention will be described with reference to Figure 6. In the second to fourth embodiments described above, the case where one of the first to third signal transmission paths D1 to D3 is alternatively selected has been described, but the present invention is not limited to this. That is, in the variable attenuators A2 to A4 according to the second to fourth embodiments, the second to fifth transistors 2, 9, 10, and 17 may set at least one of the second and third signal transmission paths D2 and D3 to a transmission state.

[0096] For example, two or three of the first to third signal transmission paths D1 to D3 may be set to the transmission state. That is, in addition to the first transistor 1 of the first signal transmission path D1, the second transistor 2 and the third transistor 9 of the second signal transmission path D2 are set to the closed state (conductive state), and the fourth transistor 10 and the fifth transistor 17 of the third signal transmission path D3 are set to the open state (non-conductive state), thereby putting the first signal transmission path D1 and the second signal transmission path D2 into the transmission state.

[0097] In this case, a high-frequency signal input from an external device to the input terminal Tin is transmitted to the output terminal Tout via the first signal transmission path D1 and the second signal transmission path D2. The attenuation of the high-frequency signal in this case is a first composite attenuation that corresponds to the attenuation between the first attenuation of the first signal transmission path D1 and the second attenuation of the second signal transmission path D2.

[0098] Furthermore, in addition to the first transistor 1 of the first signal transmission path D1, the fourth transistor 10 and the fifth transistor 17 of the third signal transmission path D3 may be set to a closed state (conducting state), and the second transistor 2 and the third transistor 9 of the second signal transmission path D2 may be set to an open state (non-conducting state), so that the first signal transmission path D1 and the third signal transmission path D3 are in a transmitting state.

[0099] In this case, a high-frequency signal input from an external device to the input terminal Tin is transmitted to the output terminal Tout via the first signal transmission path D1 and the third signal transmission path D3. The attenuation of the high-frequency signal in this case is a second composite attenuation that corresponds to the attenuation between the first attenuation of the first signal transmission path D1 and the third attenuation of the third signal transmission path D3.

[0100] Furthermore, with the first transistor 1 of the first signal transmission path D1 set to an open state (non-conducting state), the second transistor 2 and third transistor 9 of the second signal transmission path D2, as well as the fourth transistor 10 and fifth transistor 17 of the third signal transmission path D3, may be set to a closed state (conducting state), thereby placing the second signal transmission path D2 and the third signal transmission path D3 in a transmitting state.

[0101] In this case, a high-frequency signal input from an external device to the input terminal Tin is transmitted to the output terminal Tout via the second signal transmission path D2 and the third signal transmission path D3. The attenuation of the high-frequency signal in this case is a third composite attenuation that corresponds to the attenuation between the second attenuation of the second signal transmission path D2 and the third attenuation of the third signal transmission path D3.

[0102] Furthermore, by setting the first transistor 1 of the first signal transmission path D1, the second transistor 2 and the third transistor 9 of the second signal transmission path D2, and the fourth transistor 10 and the fifth transistor 17 of the third signal transmission path D3 to a closed state (conducting state), all of the first signal transmission path D1 to the third signal transmission path D3 may be put into a transmission state.

[0103] In this case, a high-frequency signal input from an external device to the input terminal Tin is transmitted to the output terminal Tout via the first signal transmission path D1, the second signal transmission path D2, and the third signal transmission path D3. The attenuation of the high-frequency signal in this case is a fourth composite attenuation that is a combination of the first attenuation of the first signal transmission path D1, the second attenuation of the second signal transmission path D2, and the third attenuation of the third signal transmission path D3.

[0104] That is, by allowing the selection of two or three of the first to third signal transmission paths D1 to D3, a total of seven different attenuation amounts can be set. Fig. 6 shows an example of how the attenuation amount changes according to the selection pattern (signal circuit selection pattern) when such a selection of two or three signal transmission paths is allowed. As shown in Fig. 6, the attenuation amounts of the variable attenuators A2 to A4 according to the second to fourth embodiments can be switched to seven different attenuation amounts by allowing the selection of two or three signal transmission paths.

[0105] According to this additional feature, it is possible to switch the attenuation amount more precisely than when one of a plurality of signal transmission paths is selected alternatively. Note that in the present invention, the number of signal transmission paths is not limited to three, so by setting the number of signal transmission paths to four or more, it is possible to switch the attenuation amount more precisely.

[0106] A1 to A4 variable attenuators, D1 first signal transmission path, D2 second signal transmission path, GND ground terminal, Tin input terminal, Tout output terminal, 1 first transistor, 2 second transistor, 3 first capacitor, 4 first resistor, 5 second resistor, 6 third resistor, 7 fourth resistor, 8 second capacitor, 9 third transistor, 10 fourth transistor, 11 third capacitor, 12 fifth resistor, 13 sixth resistor, 14 seventh resistor, 15 eighth resistor, 16 fourth capacitor, 17 fifth transistor, 18 sixth transistor

Claims

1. A variable attenuator comprising: a plurality of signal transmission paths each having a different amount of attenuation of a transmission signal; a semiconductor switch provided in each of the plurality of signal transmission paths for switching each of the plurality of signal transmission paths between a transmission state or a non-transmission state; and an impedance compensation circuit provided in one of the plurality of signal transmission paths having a relatively large amount of attenuation for compensating impedance so as to reduce leakage of the transmission signal at the semiconductor switch in an open state provided in the one of the plurality of signal transmission paths having the smallest amount of attenuation.

2. The variable attenuator according to claim 1, wherein the impedance compensation circuit comprises: a first impedance compensation circuit that compensates for an input impedance of one of the plurality of signal transmission paths having a relatively large amount of attenuation; and a second impedance compensation circuit that compensates for an output impedance of one of the plurality of signal transmission paths having a relatively large amount of attenuation.

3. The variable attenuator according to claim 1 or 2, wherein the impedance correction circuit is provided in only one of the plurality of signal transmission paths having the largest amount of attenuation.

4. A variable attenuator according to claim 1 or 2, wherein the impedance compensation circuit is a capacitor.

5. A variable attenuator as claimed in claim 1 or 2, wherein the plurality of signal transmission paths include an attenuation-free transmission path in which the attenuation is set to zero, the attenuation-free transmission path having, in addition to the semiconductor switch, a second semiconductor switch between the input end and ground potential, the second semiconductor switch being set to an open state when the semiconductor switch of the attenuation-free transmission path is set to an open state.

6. A variable attenuator as claimed in claim 2, wherein the semiconductor switch is an open / close switch provided on the input side and the output side of each of the plurality of signal transmission paths, and the first impedance compensation circuit and the second impedance compensation circuit are provided between the open / close switch and an attenuation circuit having the attenuation amount provided between the two open / close switches in each of the plurality of signal transmission paths.

7. A variable attenuator according to claim 1 or 2, wherein the plurality of semiconductor switches place at least one of the plurality of signal transmission paths in a transmitting state.

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