Balun and front end circuit

Abstract

The present invention comprises: a dielectric substrate (Sb1); a ground electrode (GND), an unbalanced terminal (TU1), and a pair of balanced terminals including a first balanced terminal (TB1) that are provided on the dielectric substrate; a main line (ML1) in which one end (Es1) is connected to the unbalanced terminal and the other end (Ee1) is open; a first sub line (SL1) in which one end (Ee2) is connected to the first balanced terminal and the other end (Es2) is connected to the ground electrode; a first line (CL1) in which one end (Ee2) is connected to the first balanced terminal and the other end (Ec1) is open; and a second line (CL2) in which one end (Es2) is connected to the ground electrode and the other end (Ec2) is open, wherein the first sub line (SL1) is positioned between the first line (CL1) and the main line (ML1) and between the second line (CL2) and the main line (ML1), and the other end (Ec1) of the first line faces the other end (Ec2) of the second line.

Description

Balun, front-end circuit

[0001] The present invention relates to a balun that converts a signal between an unbalanced terminal and a balanced terminal, and more particularly to a structure for improving the characteristics of a balun.

[0002] A balun is a converter used to convert between unbalanced and balanced signals. Balanced signals are a pair of signals with equal amplitude and opposite phase. They are used in differential amplifier circuits and antennas and are less susceptible to noise. On the other hand, unbalanced signals are used in transmission systems that transmit changes in potential relative to a ground electrode. Although they are less expensive than balanced signals, they are more susceptible to noise than balanced signals.

[0003] Japanese Patent Application Laid-Open Publication No. 2017-158174 (Patent Document 1) discloses a Marchand balun that uses a so-called coupled line, in which two lines connected to balanced terminals and each having a length of λ / 4 are coupled to a line connected to an unbalanced terminal and having a length of 1 / 2 the wavelength λ (λ / 2).

[0004] Apart from baluns, there are other types of transformers that convert unbalanced signals to balanced signals and vice versa, such as MCT (Magnetic Coupled Transformer) elements, which use magnetic coupling between a primary transformer and a secondary transformer. The size of MCT elements and Marchand baluns is generally determined based on the wavelength λ. Because MCT elements use shorter lines than those used in Marchand baluns, the size of equipment can be made smaller than when a Marchand balun is used. However, in the sub-terahertz band, the parasitic capacitance between the transformer wires increases, resulting in degradation of performance.

[0005] At high frequencies such as sub-terahertz, the line length can be shortened dramatically, making it possible to miniaturize devices and achieve low loss even when a Marchand balun is used. Therefore, in recent years, the Marchand balun has attracted attention as a converter applicable to high-frequency signals such as sub-terahertz.

[0006] JP 2017-158174 A

[0007] A device equipped with such a Marchand balun may handle frequency bands other than the sub-terahertz band (e.g., a band from 60 GHz to 90 GHz) in addition to the sub-terahertz frequency band. In this case, there may be a need for the Marchand balun to pass signals in a desired sub-terahertz frequency band (pass band) while blocking signals in a specific frequency band other than the sub-terahertz band (attenuation band).

[0008] By connecting a notch filter, which consists of an inductor and a capacitor connected in series, to a Marchand balun, it is possible to block the passage of specific frequency bands other than the sub-terahertz range. However, the installation of a notch filter can affect the pass characteristics of the Marchand balun. Furthermore, the need to install separate inductors and capacitors to configure the notch filter increases the number of components, which can hinder efforts to miniaturize the device.

[0009] Another possible means for blocking specific frequency bands is to use a SAW (Surface Acoustic Wave) filter, but using a SAW filter increases loss when passing high-frequency signals such as sub-terahertz signals.

[0010] The present disclosure has been made to solve such problems, and its purpose is to improve the attenuation characteristics of non-passbands in a balun used in a communication device while maintaining the pass characteristics in a desired passband.

[0011] A balun according to the present disclosure includes a dielectric substrate, a pair of balanced terminals including a ground electrode provided on the dielectric substrate, an unbalanced terminal, and a first balanced terminal, a main line having one end connected to the unbalanced terminal and the other end open, a first sub-line having one end connected to the first balanced terminal and the other end connected to the ground electrode, a first line having one end connected to the first balanced terminal and the other end open, and a second line having one end connected to the ground electrode and the other end open, wherein the other end of the first line faces the other end of the second line.

[0012] According to one aspect, a balun having a first frequency band as a pass band and a second frequency band as an attenuation band includes: a dielectric substrate; a pair of balanced terminals including a ground electrode provided on the dielectric substrate, an unbalanced terminal, and a first balanced terminal; a main line having one end connected to the unbalanced terminal and the other end open; a first sub-line having one end connected to the first balanced terminal and the other end connected to the ground electrode; a first line having one end connected to the first balanced terminal and the other end open; a second line having one end connected to the ground electrode and the other end open; and a first capacitor connected between the other end of the first line and the other end of the second line. The resonant frequency of an LC series resonator formed by the first capacitor, the first line, and the second line is the center frequency of the second frequency band, and the resonant frequency of an LC parallel resonator formed by the first capacitor and the first sub-line is the center frequency of the first frequency band.

[0013] According to the present invention, a balun includes a first sub-line connected to a ground electrode and a second line connected to the balanced terminal, in addition to a first sub-line connected to the balanced terminal. Capacitive coupling occurs between the first line and the second line by arranging an end of the first line and an end of the second line facing each other. The first sub-line is used as part of a Marchand balun for signals in the pass band, and an LC series resonator formed by the first line and the second line operates as a notch filter for signals in the non-pass band. This allows a balun used in a communication device to maintain pass characteristics in a desired pass band while improving attenuation characteristics in the non-pass band.

[0014] 11 is a block diagram of a communication device including a front-end circuit to which a balun according to a first embodiment is applied. FIG. 12 is an example of a circuit diagram of the balun in FIG. 1. FIG. 13 is a plan view of the balun according to the first embodiment. FIG. 14 is a perspective view for explaining the shape of an end portion. FIG. 15 is a cross-sectional view for explaining the shape of an end portion. FIG. 16 is an example of a circuit diagram of a balun according to a comparative example. FIG. 17 is a plan view of a balun according to a comparative example. FIG. 18 is a diagram for comparing the attenuation characteristics of the balun according to the first embodiment with those of a balun according to a comparative example. FIG. 19 is a diagram for comparing the pass characteristics of the balun according to the first embodiment with those of a balun according to a comparative example. FIG. 19 is a diagram for explaining the attenuation characteristics when the capacitance value of a capacitor is changed. FIG. 19 is a diagram for explaining the pass characteristics of the balun shown in FIG. 10. FIG. 19 is a cross-sectional view of a line. FIG. 20 is a diagram for explaining electric field coupling between wiring patterns in the balun according to the comparative example. FIG. 21 is a diagram for explaining electric field coupling between wiring patterns in the balun according to the first embodiment. FIG. 22 is a plan view of a balun according to a second embodiment. FIG. 23 is a schematic configuration diagram of a communication device according to a third embodiment. FIG. 24 is a schematic configuration diagram of a communication device according to a fourth embodiment. FIG. 25 is a schematic configuration diagram of a communication device according to a fifth embodiment.

[0015] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals and description thereof will not be repeated.

[0016] First Embodiment A schematic configuration of a balun 100 and a front-end circuit 10 according to a first embodiment will be described with reference to FIG.

[0017] 1 is a block diagram of a communication device 1000 including a front-end circuit 10 to which a balun 100 according to embodiment 1 is applied. Referring to FIG. 1, in addition to front-end circuit 10, communication device 1000 includes an antenna ANT and an RFIC 20 which is a signal processing circuit.

[0018] The RFIC 20 outputs a high-frequency signal to be radiated from the antenna ANT to the front-end circuit 10. The front-end circuit 10 includes a matching circuit 50 and a power amplifier PA in addition to the balun 100. The balun 100, the matching circuit 50, and the power amplifier PA are arranged within the same dielectric substrate Sb1.

[0019] The base material of the dielectric substrate Sb1 is a compound semiconductor. The compound semiconductor is manufactured by an integrated circuit process using a semiconductor material whose main component is, for example, a compound of a group III element and a group V element. The semiconductor is, for example, a semiconductor whose main component is GaAs (gallium arsenide).

[0020] The power amplifier PA amplifies the high-frequency signal transmitted from the RFIC 20 and outputs the amplified signal to the matching circuit 50. The matching circuit 50 is provided between the power amplifier PA and the balun 100, and performs impedance matching between the power amplifier PA and the balun 100. The high-frequency signal matched by the matching circuit 50 is transmitted to the balun 100.

[0021] Balun 100 is a converter that converts signals between unbalanced and balanced signals, and in the first embodiment, converts unbalanced signals to balanced signals. Balanced signals are a pair of signals with equal amplitudes and opposite phases, and unbalanced signals are signals used in a transmission system that transmits changes in potential relative to a ground electrode. The high-frequency signal converted from an unbalanced signal to a balanced signal by balun 100 is transmitted to antenna ANT. Antenna ANT is, for example, a patch antenna having feed points Fp1 and Fp2.

[0022] The balun 100 has an unbalanced terminal TU1 and two balanced terminals (balanced terminal TB1 and TB2). The balanced signal converted by the balun 100 and output from the balanced terminal TB1 is supplied to a feed point Fp1 of the antenna ANT. The balanced signal output from the balanced terminal TB2 is supplied to a feed point Fp2 of the antenna ANT. The feed points Fp1 and Fp2 are offset in opposite directions in the polarization direction from the center of the radiation electrode of the antenna ANT, which is a patch antenna. The balun 100 feeds two signals with opposite phases in the same polarization direction to the antenna ANT.

[0023] <Balun Configuration> Figure 2 is an example circuit diagram of the balun 100 in Figure 1. The balun 100 is a so-called Marchand balun in which two sub-lines SL1 and SL2, each with a length of λ / 4, are coupled to a main line ML1 connected to an unbalanced terminal and having a length of ½ the wavelength λ (λ / 2). In this way, in a Marchand balun, the lengths of the main line ML1 and the sub-lines SL1 and SL2 are appropriately set based on the wavelength λ of the high-frequency signal to be passed.

[0024] 2, the balun 100 includes an unbalanced terminal TU1, balanced terminals TB1 and TB2, a main line ML1, sub-lines SL1 and SL2, and lines CL1 to CL4. As described above, when the wavelength of the high-frequency signal to be passed is λ, the main line ML1 has an electrical length of λ / 2. Each of the sub-lines SL1 and SL2 has an electrical length of λ / 4. In contrast, each of the lines CL1 to CL4 has an electrical length of λ / 8.

[0025] In the first embodiment, an example will be described in which an unbalanced signal is converted into a balanced signal using the unbalanced terminal TU1 as an input terminal and the balanced terminals TB1 and TB2 as output terminals in the balun 100. Note that the balun 100 can also be used in cases in which a balanced signal input to the balanced terminals TB1 and TB2 is converted into an unbalanced signal and output from the unbalanced terminal TU1.

[0026] The pass band of balun 100 in the first embodiment is a band of 120 GHz to 140 GHz. In some aspects, the pass band of balun 100 may be another band, for example, a band of 130 GHz to 150 GHz or a band of 140 GHz to 160 GHz.

[0027] Furthermore, balun 100 according to the first embodiment has a non-pass band that attenuates signals in a specific band. In the example of the first embodiment, the non-pass band (attenuation band) is a band from 60 GHz to 90 GHz. However, in some aspects, the non-pass band of balun 100 may be another band, such as a band from 50 GHz to 80 GHz or a band from 70 GHz to 100 GHz.

[0028] As shown in Fig. 2, one end of the main line ML1 is connected to the unbalanced terminal TU1, and the other end is open. A sub-line SL1 is connected between the balanced terminal TB1 and a ground electrode (reference potential). The sub-line SL1 is arranged so as to be electromagnetically coupled to the main line ML1. Similarly, a sub-line SL2 is connected between the balanced terminal TB2 and a ground electrode. The sub-line SL2 is arranged so as to be electromagnetically coupled to the main line ML1.

[0029] The sub-lines SL1 and SL2 are connected to the ground electrode and the balanced terminals TB1 and TB2 so that the phase of the high-frequency signal output via the sub-line SL1 is inverted from the phase of the high-frequency signal output via the sub-line SL2. In a Marchand balun having this configuration, a high-frequency signal input to the unbalanced terminal TU1 (input terminal) is transmitted to the two balanced terminals by electromagnetic coupling and output as balanced signals from the balanced terminals TB1 (output terminal) and TB2 (output terminal).

[0030] As shown in Fig. 2, a line CL1, a capacitor C1, and a line CL2 are connected in series in this order between the balanced terminal TB1 and the ground electrode. An LC series resonator is formed by the inductance components of the lines CL1 and CL2 and the capacitor C1. As shown in Fig. 2, the series-connected line CL1, capacitor C1, and line CL2 are connected in parallel to the sub-line SL1 between the balanced terminal TB1 and the ground electrode. An LC parallel resonator is formed by the inductance component of the sub-line SL1 and the capacitor C1.

[0031] Similarly, a line CL3, a capacitor C2, and a line CL4 are connected in series in this order between the balanced terminal TB2 and the ground electrode. An LC series resonator is formed by the inductance components of the lines CL3 and CL4 and the capacitor C2. As shown in Fig. 2, the line CL3, the capacitor C2, and the line CL4 are connected in parallel to the sub-line SL2 between the balanced terminal TB2 and the ground electrode. An LC parallel resonator is formed by the inductance component of the sub-line SL2 and the capacitor C2.

[0032] 2, the distance between the sub-line SL2 and the main line ML1 and the distance between the sub-line SL1 and the main line ML1 are each a distance D1. Also, the distance between the sub-line SL2 and the line CL4 and the distance between the sub-line SL2 and the line CL3 are each a distance D2. The distance between the sub-line SL1 and the line CL1 and the distance between the sub-line SL1 and the line CL2 are also each a distance D2.

[0033] In the balun 100 according to the first embodiment, the lines CL1 to CL4 and capacitors C1 and C2 shown in FIG. 2 are provided, thereby improving the attenuation characteristics in the non-pass bands while maintaining the pass characteristics in the pass bands. The main line ML1 may correspond to the "main line" in this disclosure. The sub-lines SL1 and SL2 may correspond to the "first sub-line" and "second sub-line," respectively, in this disclosure. The lines CL to CL4 may correspond to the "first line" to "fourth line," respectively, in this disclosure.

[0034] Furthermore, the balanced terminal TB1 may correspond to the "first balanced terminal" in the present disclosure. The balanced terminal TB2 may correspond to the "second balanced terminal" in the present disclosure. The pass band (120 GHz to 140 GHz in the first embodiment) may correspond to the "first frequency band" in the present disclosure. The non-pass band (60 GHz to 90 GHz in the first embodiment) may correspond to the "second frequency band" in the present disclosure.

[0035] Next, the shape of the balun 100 shown in FIG. 2 will be described in detail using FIGS. 3 to 5. FIG. 3 is a plan view of the balun 100 according to the first embodiment. FIG. 3 shows the balun 100 formed on the main surface Sf2 of the dielectric substrate Sb1. In FIGS. 3 to 5, the normal direction to the main surface Sf2 is the Z-axis, a direction within the main surface Sf2 is the X-axis, and a direction perpendicular to the X-axis is the Y-axis. That is, FIG. 3 shows the main surface Sf2 of the dielectric substrate Sb1 as viewed from the positive direction of the Z-axis. In the first embodiment, the dielectric substrate Sb1 is a multilayer substrate in which multiple layers are stacked in the Z-axis direction. That is, the Z-axis direction is the stacking direction of the dielectric substrate Sb1. Note that in some aspects, the dielectric substrate Sb1 may be a single-layer substrate.

[0036] The main line ML1, sub-lines SL1 and SL2, and lines CL1 to CL4 included in the balun 100 are formed on the main surface Sf2 of the dielectric substrate Sb1. Point Cp1 is a point within the main surface Sf2. The main line ML1, sub-lines SL1 and SL2, and lines CL1 to CL4 are arranged with point Cp1 as their center. The balun 100 is configured to include wiring patterns Pt1, Pt2, and Pt3.

[0037] First, the wiring pattern Pt1 will be described. The main line ML1 described in FIG. 2 is realized by the wiring pattern Pt1 shown in FIG. 3. The wiring pattern Pt1 is a wiring pattern including an end portion Es1 and an end portion Ee1. The wiring pattern Pt1 is connected to the unbalanced terminal TU1 at the end portion Es1. As shown in FIG. 3, the main line ML1 extends from the end portion Es1 toward the negative side in the X-axis direction, and then is wound counterclockwise around the Z-axis passing through point Cp1 as the winding axis.

[0038] In other words, the main line ML1 has a shape wound around the Z axis that passes through point Cp1 when the dielectric substrate Sb1 is viewed in plan. This allows the balun 100 to be made more compact than if the main line ML1 were straight and not wound. The end Ee1 is an open end. The wiring pattern Pt1 is located closest to point Cp1 among the wiring patterns Pt1 to Pt3. In other words, the wiring pattern Pt1 is located at the innermost position in the balun 100.

[0039] Next, the wiring patterns Pt2 and Pt3 will be described. The wiring pattern Pt2 is arranged on the positive side of the Y axis relative to the wiring pattern Pt1. The sub-line SL1 and the lines CL1 and CL2 described in Fig. 2 are each realized by the wiring pattern Pt2 shown in Fig. 3. The wiring pattern Pt2 has an end Es2 and an end Ee2.

[0040] The wiring pattern Pt3 is disposed on the negative side of the Y axis relative to the wiring pattern Pt1. The sub-line SL2 and the lines CL3 and CL4 described in Fig. 2 are each realized by the wiring pattern Pt3 shown in Fig. 3. The wiring pattern Pt3 has an end Es3 and an end Ee3.

[0041] In the balun 100, the wiring pattern Pt1 is disposed between the wiring patterns Pt2 and Pt3. The wiring patterns Pt2 and Pt3 have shapes that are symmetrical with respect to the line Lx1 shown in FIG. 3 . The line Lx1 is a line in the X-axis direction that passes through the point Cp1. The line Ly1 is a line in the Y-axis direction that passes through the point Cp1.

[0042] The wiring pattern Pt2 is connected to the ground electrode GND at the end Es2. As shown in FIG. 3 , the sub-line SL1 is arranged along the main line ML1, which is arranged on the positive side of the Y-axis relative to the line Lx1. In other words, the sub-line SL1 has a substantially U-shape. In further other words, the sub-line SL1 has a shape similar to a semicircular arc. The sub-line SL1 is electromagnetically coupled to the main line ML1, which is arranged on the positive side of the Y-axis relative to the line Lx1. The distance between the sub-line SL1 and the main line ML1 is a gap D1.

[0043] As an example, the distance D1 is equal to or greater than 5 μm and less than 6 μm. As shown in FIG. 3 , the distance D1 is shown as the distance between the sub-line SL1 and the main line ML1 in the Y-axis direction, but the distance between the sub-line SL1 and the main line ML1 in the X-axis direction and at the curved portion is also the distance D1. That is, the sub-line SL1 and the main line ML1 are arranged so that the distance between the sub-line SL1 and the main line ML1 in each direction is all uniformly the distance D1. In other words, the distance D1 is the shortest distance from the side edge of the sub-line SL1 to the side edge of the main line ML1.

[0044] The line CL1 has an end Ee2 shared with the sub-line SL1 and an end Ec1. As shown in Fig. 3, the line CL1 extends from a point Rt1 at the end Ee2 toward the positive side of the Y-axis, bending toward the positive side of the X-axis. The line CL1 is connected to a balanced terminal TB1 at the end Ee2. The end Ec1 is an open end. The shape of the end Ec1 will be described in detail below with reference to Figs. 4 and 5.

[0045] The line CL1 is arranged along the sub-line SL1, which is arranged on the negative side of the X-axis relative to the line Ly1. That is, the line CL1 has a shape similar to an arc of a quadrant. The distance between the line CL1 and the sub-line SL1 is a gap D2. The gap D2 is, for example, 3 μm or more and less than 5 μm.

[0046] The distance between the line CL1 and the sub-line SL1 in not only the Y-axis direction but also the X-axis direction and at the curved portion is the distance D2. That is, the line CL1 and the sub-line SL1 are arranged so that the distance between the line CL1 and the sub-line SL1 in each direction is the same as the distance D2. In other words, the distance D2 is the shortest distance from the edge of the side surface of the line CL1 to the edge of the side surface of the sub-line SL1.

[0047] The line CL2 has an end Es2 shared with the sub-line SL1 and an end Ec2. As shown in FIG. 3 , the line CL2 extends from a point Rt2 at the end Es2 toward the positive side of the Y axis, curving toward the negative side of the X axis. The line CL2 is connected to the ground electrode GND at the end Es2. The end Ec2 is an open end. The shape of the end Ec2 will be described in detail below with reference to FIGS. 4 and 5 .

[0048] The line CL2 is arranged along the sub-line SL1, which is arranged on the positive side of the X-axis from the line Ly1. The line CL2 has a shape similar to the arc of a quadrant. The distance between the line CL2 and the sub-line SL1 is the interval D2, similar to the distance between the line CL1 and the sub-line SL1. In other words, the line CL2 and the sub-line SL1 are arranged so that the distance between the line CL2 and the sub-line SL1 in each direction is the uniform interval D2. In other words, the interval D2 is the shortest distance from the edge of the side surface of the line CL2 to the edge of the side surface of the sub-line SL1.

[0049] In this way, the sub-line SL1 is arranged along the main line ML1, and further, the lines CL1 and CL2 are arranged along a portion of the sub-line SL1. As a result, the sub-line SL1 is arranged between the lines CL1 and CL2 and the main line ML1. Because the sub-line SL1 is arranged between the main line ML1 and the lines CL1 and CL2, the degree of coupling between the lines CL1 and CL2 and the main line ML1 is weaker than the degree of coupling between the sub-line SL1 and the main line ML1.

[0050] The wiring pattern Pt2 is formed so that the interval D2 is shorter than the interval D1. The wiring pattern Pt2 is connected to the balanced terminal TB1 at the end Ee2. This allows the combined electrical length of the line CL1 and the line CL2 to approach the electrical length of the sub-line SL1. Because the lines CL1 and CL2 are arranged outside the sub-line SL1, the wider the interval D2, the longer the electrical lengths of the lines CL1 and CL2, and the greater the difference between the combined electrical length of the lines CL1 and CL2 and the electrical length of the sub-line SL1.

[0051] In the first embodiment, the difference between the electrical length of the sub-line SL1 and the combined electrical length of the lines CL1 and CL2 is reduced by making the interval D2 narrower than the interval D1, which prevents the electrical length of the sub-line SL1 from deviating from λ / 4 and also prevents the lengths of the lines CL1 and CL2 from deviating from λ / 8.

[0052] In the balun 100 shown in FIG. 3 , the length of the line CL1 in the extension direction is the same as the length of the line CL2 in the extension direction. Specifically, the length of the line CL1 extending from point Rt1 to the tip of end Ec1 is the same as the length of the line CL2 extending from point Rt2 to the tip of end Ec2. This makes the magnitude of the inductance component of the line CL1 and the magnitude of the inductance component of the line CL2 approximately the same, facilitating the design of the LC series resonator formed by the lines CL1, CL2, and capacitor C1 described in FIG. 2 . Note that, in some aspects, the length of the line CL1 in the extension direction may be different from the length of the line CL2 in the extension direction.

[0053] The wiring pattern Pt3 has a shape that is symmetrical to the wiring pattern Pt2 with respect to the line Lx1 as the center line. The distance between the sub-line SL2 and the main line ML1 is the interval D1, similar to the wiring pattern Pt2.

[0054] The line CL3 is arranged along the sub-line SL2, which is arranged on the negative side of the X-axis relative to the line Ly1. The distance between the line CL3 and the sub-line SL2 is a gap D2. The line CL3 is connected to the balanced terminal TB2 at an end Ee3. The end Ec3 is an open end. The line CL4 is arranged along the sub-line SL2, which is arranged on the positive side of the X-axis relative to the line Ly1. The distance between the line CL4 and the sub-line SL2 is a gap D2. The line CL4 is connected to the ground electrode GND at an end Es3. The end Ec4 is an open end.

[0055] The width of the main line ML1 is the length of width WM1. The width of the sub-line SL1 is the length of width WM1, just like the main line ML1. Although not shown, the width of the sub-line SL2 is also the length of width WM1. On the other hand, the width of each of the lines CL1 and CL2 is the length of width W1. Although not shown, the width of each of the lines CL3 and CL4 is also the length of width W1. Note that width refers to the length of the line in a direction perpendicular to the extension direction of the line.

[0056] <Shapes of Ends Ec1 and Ec2 of Lines CL1 and CL2> Fig. 4 is a perspective view for explaining the shapes of the ends Ec1 and Ec2. The shapes of the ends Ec3 and Ec4 in Fig. 3 are similar to the shapes of the ends Ec1 and Ec2. Therefore, for ease of explanation, the following description will be given using the ends Ec1 and Ec2 as an example.

[0057] As shown in Figure 4, the line CL1 is configured by stacking two layers of electrodes, including a layer Ly1U and a layer Ly1D. The layer Ly1U is disposed on the positive side of the layer Ly1D in the Z-axis direction. The width of the layer Ly1U is smaller than the width W1. The line CL1 has a shape in which the end of the layer Ly1D protrudes further in the positive side of the X-axis direction than the end of the layer Ly1U.

[0058] On the other hand, the line CL2 is configured by stacking two layers of electrodes, including a layer Ly2U and a layer Ly2D. The layer Ly2U is disposed on the positive side of the layer Ly2D along the Z axis. The width of the layer Ly2U is smaller than the width W1 and is the same as that of the layer Ly1U. Unlike the line CL1, the end of the layer Ly2U of the line CL2 protrudes further toward the negative side of the X axis than the end of the layer Ly2D.

[0059] Fig. 5 is a cross-sectional view illustrating the shapes of the ends Ec1 and Ec2. Fig. 5 shows the ends Ec1 and Ec2 as viewed from the negative side of the Y axis. As shown in Fig. 5, only a portion of the layer Ly2U on the positive side of the Z axis protrudes from the layer Ly2D toward the negative side of the X axis.

[0060] As a result, the end Ec2 of the line CL2 and the end Ec1 of the line CL1 are not in direct contact with each other, but are spaced apart by a distance Dx1. The region Ar1 at the end Ec1 of the line CL1 faces the region Ar2 at the end Ec2 of the line CL2 in the Z-axis direction. In other words, the end Ec1 of the line CL1 faces the end Ec2 of the line CL2. The capacitor C1 described in FIG. 2 is generated in this distance Dx1.

[0061] In the above example, the capacitor C1 is generated when the region Ar1 and the region Ar2 oppose each other in the Z-axis direction. However, the capacitor C1 may also be generated when the lines CL1 and CL2 have other structures. For example, in some cases, the layer of the line CL1 and the layer of the line CL2, which are arranged on the same layer, may be closer to each other, causing them to oppose each other in the X-axis direction, generating the capacitor C1. That is, the capacitor C1 is generated when the end Ec1 and the end Ec2 oppose each other. The direction in which the end Ec1 and the end Ec2 oppose each other may be the stacking direction or an in-plane direction of the main surface Sf2 perpendicular to the stacking direction. Furthermore, to increase the capacitance of the capacitor C1, the shapes of the end Ec1 and the end Ec2 may be modified to increase the opposing area. In the balun 100 of the first embodiment, the lines CL3 and CL4 also have shapes similar to those described in FIGS. 4 and 5 , generating the capacitor C2.

[0062] <Comparative Example> Fig. 6 is an example of a circuit diagram of a balun 100Z in a comparative example. The balun 100Z in Fig. 6 is a general Marchand balun, and has a configuration in which the lines CL1 to CL4 are removed from the balun 100 of the first embodiment.

[0063] 7 is a plan view of the balun 100Z of the comparative example. As shown in FIG. 7, the wiring patterns Pt2 and Pt3 of the comparative example have a shape obtained by removing the lines CL1 to CL4 from the wiring patterns Pt2 and Pt3 of the first embodiment. That is, the wiring patterns Pt2 and Pt3 of the comparative example balun 100Z each have only the sub-lines SL1 and SL2.

[0064] <Comparison of Attenuation Characteristics and Pass Characteristics> Fig. 8 is a diagram for comparing the attenuation characteristics of the balun 100 of the first embodiment and the balun 100Z of the comparative example. Fig. 9 is a diagram for comparing the pass characteristics of the balun 100 of the first embodiment and the balun 100Z of the comparative example. Fig. 9 shows an enlarged view of the insertion loss near the pass band of Fig. 8. In Figs. 8 and 9, the horizontal axis represents frequency, and the vertical axis represents the insertion loss of the baluns 100 and 100Z.

[0065] 8 and 9, the line LN1 indicates the insertion loss in the balun 100 of the first embodiment (FIGS. 2 to 5). The line LN1 is a solid line. The line LN1Z indicates the insertion loss in the balun 100Z of the comparative example (FIGS. 6 and 7). The line LN1Z is a dashed line.

[0066] The capacitance value of capacitor C1 of balun 100 of embodiment 1, indicated by line LN1, is adjusted so that the resonant frequency of the LC series resonator formed by capacitor C1 and lines CL1 and CL2 described in Fig. 2 is 83.5 GHz. Similarly to capacitor C1, the capacitance value of capacitor C2 of balun 100, indicated by line LN1, is adjusted so that the resonant frequency of the LC series resonator formed by capacitor C2 and lines CL3 and CL4 described in Fig. 2 is 83.5 GHz.

[0067] As a result, when a signal having the same frequency as the resonant frequency of the LC series resonator passes through balun 100, the signal flows to the ground electrode via the LC series resonator and is not transmitted to the output terminal. In other words, the LC series resonator formed by capacitor C2 and lines CL3 and CL4 functions as a notch filter, and an attenuation pole occurs at 83.5 GHz as shown in FIG.

[0068] In the first embodiment, the lines CL1 and CL2 and the capacitor C1 form an LC series resonator, which can attenuate signals in a band centered on the resonant frequency of the LC series resonator. Furthermore, as shown by the line LN1Z in FIG. 8 , the balun 100Z of the comparative example has a smaller attenuation in the attenuation band of 60 GHz to 90 GHz than the balun of the first embodiment.

[0069] As described above, the balun 100 of the first embodiment can improve the attenuation characteristics in a specific frequency band compared to the balun 100 of the comparative example, but as shown in Fig. 9 , there is no significant difference in the pass characteristics between the balun 100Z of the comparative example and the balun 100 of the first embodiment. In the balun 100 of the first embodiment, as described with reference to Fig. 2 , the resonant frequency of the LC parallel resonator formed by the capacitor C1 and the sub-line SL1 is adjusted to 130 GHz. Similarly, the resonant frequency of the LC parallel resonator formed by the capacitor C2 and the sub-line SL2 is adjusted to 130 GHz.

[0070] As a result, in the balun 100 of the first embodiment, the impedance of the balanced terminal TB1 is opened due to the resonance of the LC parallel resonator, and it is possible to prevent the above-mentioned LC series resonator from functioning as a notch filter when a signal in the pass band passes through the balun 100. That is, in the balun 100 of the first embodiment, it is possible to prevent signals in the pass band from being attenuated even when the Q value of the LC series resonant circuit is small and the attenuation band attenuated by the LC series resonant circuit is wide.

[0071] As described above, the balun 100 of the first embodiment can improve the attenuation characteristics in non-passbands while maintaining the pass characteristics in the desired passband. Furthermore, in the first embodiment, the sub-line SL1 that functions as a sub-line in the Marchand balun is used to realize an LC series resonator and an LC parallel resonator. This makes it possible to suppress an increase in the number of components required to configure the balun 100 of the first embodiment.

[0072] Fig. 10 is a diagram illustrating the attenuation characteristics when the capacitance values ​​of capacitors C1 and C2 are changed. Fig. 11 is a diagram illustrating the pass characteristics of the balun 100 shown in Fig. 10. In Fig. 10, lines LN2 and LN3 show the insertion loss when the capacitance values ​​of capacitors C1 and C2 of the balun 100 showing the characteristics of line LN1 are changed. Line LN2 is a dashed line. Line LN3 is a solid line.

[0073] The capacitance value of capacitor C1 of balun 100 indicated by line LN2 is adjusted so that the resonant frequency of the LC series resonator formed by capacitor C1 and lines CL1 and CL2 is 73.5 GHz. Similarly, the capacitance value of capacitor C2 of balun 100 indicated by line LN2 is adjusted so that the resonant frequency of the LC series resonator formed by capacitor C2 and lines CL3 and CL4 is 73.5 GHz. This allows the balun 100 indicated by line LN2 to have an attenuation pole near 73.5 GHz.

[0074] Furthermore, the capacitance value of capacitor C1 of balun 100, shown by line LN3, is adjusted so that the resonant frequency of the LC series resonator formed by capacitor C1 and lines CL1 and CL2 is 73.5 GHz. Meanwhile, the capacitance value of capacitor C2 of balun 100, shown by line LN3, is adjusted so that the resonant frequency of the LC series resonator formed by capacitor C2 and lines CL3 and CL4 is 83.5 GHz. As a result, balun 100, shown by line LN3, attenuates two bands: the 71 GHz to 76 GHz band and the 81 GHz to 86 GHz band. In other words, the attenuation characteristic shown by line LN3 shows two attenuation poles near 73.5 GHz and 83.5 GHz. As shown in FIG. 11 , there is no significant difference in the pass characteristics between balun 100, shown by lines LN2 and LN3, and balun 100Z, shown by line LN1Z.

[0075] <Coupling Coefficient of Electric Field Coupling> The following describes the electric field coupling between the wiring patterns Pt1 and Pt2. FIG. 12 is a cross-sectional view of the line CL1. FIG. 12 shows a cross-sectional view of the line CL1 as viewed from the negative side of the X-axis. In the balun 100 of the first embodiment, a ground electrode Mk1 is arranged on the main surface Sf1, which is the back side of the main surface Sf2 of the dielectric substrate Sb1. The ground electrode Mk1 is formed, for example, by plating. The ground electrode Mk1 is arranged over the entire main surface Sf1, and is also arranged on the negative side of the Z-axis of the main line ML1, sub-lines SL1 and SL2, and lines CL2 to CL4, which are not shown in FIG. 12.

[0076] In other words, the main line ML1, the sub-lines SL1 and SL2, and the lines CL1 to CL4 each overlap the ground electrode Mk1 when the main surface Sf1 is viewed in plan. That is, capacitive coupling occurs between the main line ML1 and the ground electrode Mk1. Capacitive coupling also occurs between the sub-line SL1 and the ground electrode Mk1, and capacitive coupling also occurs between the sub-line SL2 and the ground electrode Mk1. Furthermore, capacitive coupling also occurs between each of the lines CL1 to CL4 and the ground electrode Mk1.

[0077] The magnitude of these capacitive couplings increases as the widths of the main line ML1, sub-lines SL1 and SL2, and lines CL1 to CL4 shown in Fig. 3 increase. That is, in the example of Fig. 3, because width W1 is narrower than width WM1, the magnitude of the capacitance component between the lines CL1 to CL4 and the ground electrode Mk1 is smaller than the magnitude of the capacitance component between each of the main line ML1 and sub-lines SL1 and SL2 and the ground electrode Mk1.

[0078] 13 is a diagram illustrating the electric field coupling between the wiring patterns Pt1 and Pt2 in the comparative example balun 100Z. The above-described wiring patterns Pt1 and Pt2 are electric field coupled to each other. The coupling coefficient k of the electric field coupling between the wiring patterns is generally determined by the wiring capacitance Cs1 between the main line ML1 and the sub-line SL1 and the inter-line capacitance Cm1 between the main line ML1 and the sub-line SL1, as shown in FIG.

[0079] The inter-line capacitance Cm1 is a capacitance component between the sub-line SL1 and the main line ML1. As described above, in the comparative example, the width of the main line ML1 and the width of the sub-line SL1 are both width WM1. Therefore, the wiring capacitance of the main line ML1 and the wiring capacitance of the sub-line SL1 are both wiring capacitance Cs1. The wiring capacitance of the main line ML1 is a capacitance component between the main line ML1 and the ground electrode Mk1. Furthermore, the wiring capacitance of the sub-line SL1 is a capacitance component between the sub-line SL1 and the ground electrode Mk1.

[0080] As shown in Figure 13, in the balun 100Z in the comparative example, the coupling coefficient k between the wiring pattern Pt1 and the wiring pattern Pt2 is the value obtained by dividing the inter-wiring capacitance Cm1 between the sub-line SL1 and the main line ML1 by the sum of the inter-wiring capacitance Cm1 and the two wiring capacitances Cs1.

[0081] Next, electric field coupling in the first embodiment will be described. FIG. 14 is a diagram for explaining electric field coupling between wiring patterns in the first embodiment. The balun 100 of the first embodiment is provided with lines CL1 and CL2. The wiring capacitance Cs3 is a capacitance component between each of the lines CL1 and CL2 and the ground electrode Mk1. The coupling coefficient k between the wiring patterns Pt1 and Pt2 is calculated by dividing the inter-wiring capacitance Cm1 between the sub-line SL1 and the main line ML1 by the sum of the inter-wiring capacitance Cm1, the two wiring capacitances Cs1, and the wiring capacitance Cs3.

[0082] As described above, in the first embodiment, the width W1 of the lines CL1 and CL2 is smaller than the width WM1 of the main line ML1 and the sub-line SL1. Therefore, the wiring capacitance Cs3 in FIG. 14 is smaller than the wiring capacitance Cs1. As shown in FIG. 14 , when the value of the wiring capacitance Cs3 is small, the value of the coupling coefficient k increases compared to when the value of the wiring capacitance Cs3 is large. In the balun 100 of the first embodiment, the width W1 is smaller than the width WM1, thereby suppressing an increase in the value of the wiring capacitance Cs3 and increasing the coupling coefficient k. As a result, in the first embodiment, the pass characteristics of the balun 100 can be improved while suppressing a decrease in the coupling coefficient k.

[0083] In the above example, the wiring patterns Pt1 to Pt3 are arranged on the same layer on the dielectric substrate Sb1, but this is not limiting, and the wiring patterns Pt1 to Pt3 may be provided on different layers within the multi-layer dielectric substrate Sb1. That is, in the first embodiment, it is sufficient that the end Ec1 and the end Ec2 face each other to generate the capacitor C1, and the layers on which the main line ML1, the sub-lines SL1 and SL2, the lines CL1 to CL4, the ground electrode Mk1, the balanced terminals TB1 and TB2, and the unbalanced terminal TU1 are formed may be different layers.

[0084] More specifically, if the dielectric substrate Sb1 is formed by stacking four layers, namely, a first layer, a second layer, a third layer, and a fourth layer, the ground electrode Mk1 may be formed on the first layer, the main line ML1 may be formed on the second layer, the sub-lines SL1 and SL2 may be formed on the third layer, and the lines CL1 to CL4 may be formed on the fourth layer. Even in this case, the sub-line SL1 is formed between the main line ML1 and the lines CL1 and CL2, so that the degree of coupling between the lines CL1 and CL2 and the main line ML1 is weaker than the degree of coupling between the sub-line SL1 and the main line ML1.

[0085] [Embodiment 2] The configuration of a balun 100A according to embodiment 2 will be described with reference to Fig. 15. Fig. 15 is a plan view of balun 100A according to embodiment 2. In embodiment 3, the description of the same configuration as in embodiment 1 will not be repeated.

[0086] In the second embodiment, the main line ML1 has a linear shape as shown in Fig. 15. The sub-lines SL1 and SL2 are arranged along the main line ML1 and therefore have a linear shape similar to the main line ML1. Even with this shape, the balun 100A of the second embodiment can improve the attenuation characteristics in non-pass bands while maintaining the pass characteristics in the desired pass bands by providing the lines CL1 to CL4.

[0087] Furthermore, in the second embodiment, since the sub-lines SL1 and SL2 and the lines CL1 and CL2 also have linear shapes, it is not necessary to make the distance between the sub-line SL1 and the lines CL1 and CL2 smaller than the distance between the main line ML1 and the sub-line SL1. Therefore, as shown in Fig. 15, in the second embodiment, the distance between each of the lines CL1 and CL2 and the sub-line SL1 is the same distance D5 as the distance between the main line ML1 and the sub-line SL1.

[0088] Furthermore, in the second embodiment, the main line ML1 has a linear shape extending in the Y-axis direction, so the length of the balun 100A as a whole in the X-axis direction is reduced. As shown in the first and second embodiments, by changing the shapes of the main line ML1 and the sub-lines SL1 and SL2, the degree of freedom in designing the balun 100 can be improved.

[0089] [Third Embodiment] The schematic configuration of a balun 100 and a front-end circuit 10A according to a third embodiment will be described with reference to Fig. 16. Fig. 16 is a schematic configuration diagram of a communication device 1000A according to the third embodiment. In the third embodiment, the description of the same configuration as in the first embodiment will not be repeated.

[0090] The communication device 1000A of the third embodiment has a converter 110 configured with an MCT element or a balun between the RFIC 20 and the front-end circuit 10A. The converter 110 converts an unbalanced signal into a balanced signal and outputs the balanced signal to the front-end circuit 10A.

[0091] The front-end circuit 10A of the third embodiment includes power amplifiers PA1 and PA2 and matching circuits 50A and 50B. The power amplifiers PA1 and PA2 amplify the unbalanced signal converted by the converter 110 and output the amplified signal to the matching circuits 50A and 50B, respectively.

[0092] Matching circuit 50A is provided between power amplifier PA1 and balun 100 and performs impedance matching between power amplifier PA1 and balun 100. Matching circuit 50B is provided between power amplifier PA2 and balun 100 and performs impedance matching between power amplifier PA2 and balun 100. In the third embodiment, balun 100, unlike in the first embodiment, performs conversion from a balanced signal to an unbalanced signal. The high-frequency signal converted from a balanced signal to an unbalanced signal by balun 100 of the third embodiment is transmitted to feed point Fp1 of antenna ANT.

[0093] In this way, the balun 100 of this embodiment can also be applied to a balun 100 that converts a balanced signal to an unbalanced signal. In the third embodiment, the lines CL1 to CL4 are provided, so that the pass characteristics in the desired pass band are maintained while the attenuation characteristics in the non-pass bands are improved.

[0094] [Fourth Embodiment] The schematic configuration of baluns 100B and 100C according to a fourth embodiment will be described with reference to Fig. 17. Fig. 17 is a schematic configuration diagram of a communication device 1000B according to the fourth embodiment. In the third embodiment, the description of the same configuration as in the first embodiment will not be repeated.

[0095] A communication device 1000B of the fourth embodiment includes baluns 100B and 100C of the present embodiment and a balun 100Z of the comparative example. The output terminal of amplifier PA1 is connected to a balanced terminal TB1 of the balun 100B. The output terminal of amplifier PA2 is connected to a balanced terminal TB2 of the balun 100B. The balun 100B converts the output signals of amplifier PA1 and amplifier PA2 into unbalanced signals and outputs them from unbalanced terminal TU1.

[0096] The power supply terminal Vdd1 is a terminal to which a power supply voltage supplied from an external source to the power amplifiers PA1 and PA2 is input. The power supply terminal Vdd1 is connected to a ground terminal via bypass capacitors C11 and C12. The power supply voltage from the power supply terminal Vdd1 is supplied to the output terminal of the power amplifier PA1 via the sub-line SL1 of the balun 100B, and is also supplied to the output terminal of the power amplifier PA1 via the sub-line SL2 of the balun 100B. In this way, the power supply terminal Vdd1 is connected to the end Es2 of the sub-line SL1 and the end Es3 of the sub-line SL2 of the balun 100B.

[0097] The output terminal of the amplifier PA4 is connected to the balanced terminal TB1 of the balun 100C. The output terminal of the amplifier PA3 is connected to the balanced terminal TB2 of the balun 100C. The balun 100C converts the output signals of the amplifiers PA3 and PA4 into unbalanced signals and outputs them from the unbalanced terminal TU1.

[0098] The power supply terminal Vdd2 is a terminal to which a power supply voltage supplied from an external source to the power amplifiers PA3 and PA4 is input. The power supply terminal Vdd2 is connected to a ground terminal via bypass capacitors C21 and C22. The power supply voltage from the power supply terminal Vdd2 is supplied to the output terminal of the power amplifier PA4 via the sub-line SL1 of the balun 100C, and to the output terminal of the power amplifier PA3 via the sub-line SL2 of the balun 100C. In this way, the power supply terminal Vdd2 is connected to the end Es2 of the sub-line SL1 and the end Es3 of the sub-line SL2 of the balun 100C.

[0099] One of the balanced terminals of the balun 100Z is connected to the unbalanced terminal TU1 of the balun 100B. The other of the balanced terminals of the balun 100Z is connected to the unbalanced terminal TU1 of the balun 100C. The balun 100Z converts the signal output from the unbalanced terminal TU1 of the balun 100B and the signal output from the unbalanced terminal TU1 of the balun 100C into unbalanced signals and outputs them to the antenna ANT.

[0100] As described above, the communication device 1000B of the fourth embodiment includes two baluns 100B and 100C. The resonant frequency of the LC series resonator formed by the capacitor C1 and the lines CL1 and CL2 in the balun 100B is the same as the resonant frequency of the LC series resonator formed by the capacitor C1 and the lines CL1 and CL2 in the balun 100C. The resonant frequency of the LC series resonator formed by the capacitor C2 and the lines CL3 and CL4 in the balun 100B is the same as the resonant frequency of the LC series resonator formed by the capacitor C2 and the lines CL3 and CL4 in the balun 100C. Thus, by providing the lines CL1 to CL4 in each of the baluns 100B and 100C of the fourth embodiment, the attenuation characteristics in the non-pass bands can be improved while maintaining the pass characteristics in the desired pass bands.

[0101] [Fifth Embodiment] The schematic configuration of a balun 100D according to a fifth embodiment will be described with reference to Fig. 18. Fig. 18 is a schematic configuration diagram of a communication device 1000C according to the fifth embodiment. In the fifth embodiment, the description of the same configuration as in the first and fourth embodiments will not be repeated.

[0102] 18 , the communication device 1000C includes baluns 100Z1 and 100Z2 of the comparative example and a balun 100D of the present embodiment. The balun 100Z1 converts the balanced signals output from the power amplifiers PA1 and PA2 into unbalanced signals and outputs them to the balanced terminal TB1 of the balun 100D. The balun 100Z2 converts the balanced signals output from the power amplifiers PA3 and PA4 into unbalanced signals and outputs them to the balanced terminal TB2 of the balun 100D. The balun 100D converts the signals input from the balanced terminals TB1 and TB2 into unbalanced signals and outputs them to the antenna ANT.

[0103] In the fifth embodiment, the balun 100D also includes the lines CL1 to CL4, thereby improving the attenuation characteristics in non-passbands while maintaining the pass characteristics in the desired passband. Furthermore, the fifth embodiment can reduce the number of components compared to the fourth embodiment, thereby suppressing increases in costs. In the example of FIG. 18 , in the comparative balun 100Z1, the power supply terminal Vdd1 is connected to the end Es2 of the sub-line SL1 and the end Es3 of the sub-line SL2. In some aspects, the power supply terminal Vdd1 may be connected to the end Ee2 of the sub-line SL1 and the end Ee3 of the sub-line SL2.

[0104] <Supplementary Note 1> A balun comprising: a dielectric substrate; a pair of balanced terminals including a ground electrode, an unbalanced terminal, and a first balanced terminal provided on the dielectric substrate; a main line having one end connected to the unbalanced terminal and the other end open; a first sub-line having one end connected to the first balanced terminal and the other end connected to the ground electrode; a first line having one end connected to the first balanced terminal and the other end open; and a second line having one end connected to the ground electrode and the other end open, wherein the first sub-line is arranged between the first line and the main line, and between the second line and the main line, and the other end of the first line faces the other end of the second line.

[0105] <Supplementary Note 2> The balun according to Supplementary Note 1, wherein the length of the first line in the extension direction is the same as the length of the second line in the extension direction.

[0106] <Supplementary Note 3> The balun according to Supplementary Note 1 or Supplementary Note 2, wherein the main line has a shape wound around a winding axis when the main surface of the dielectric substrate is viewed in plan.

[0107] <Supplementary Note 4> The balun according to Supplementary Note 3, wherein a shortest distance between the main line and the first sub-line is longer than a shortest distance between the first sub-line and the first line and a shortest distance between the first sub-line and the second line.

[0108] <Supplementary Note 5> The balun according to Supplementary Note 1 or Supplementary Note 2, wherein the main line has a linear shape when the main surface of the dielectric substrate is viewed in plan.

[0109] <Supplementary Note 6> The balun according to Supplementary Note 5, wherein the shortest distance between the main line and the first sub-line, the shortest distance between the first sub-line and the first line, and the shortest distance between the first sub-line and the second line are all the same length.

[0110] <Supplementary Note 7> The balun according to any one of Supplementary Notes 1 to 6, wherein the first sub-line is arranged along the main line between the first line and the second line and the main line, and a width of the first line and a width of the second line when the main surface of the dielectric substrate is viewed in a plane.

[0111] <Supplementary Note 8> The balun according to any one of Supplementary Note 1 to Supplementary Note 7, wherein a base material of the dielectric substrate is a compound semiconductor.

[0112] <Supplementary Note 9> The balun according to any one of Supplementary Notes 1 to 8, wherein the pair of balanced terminals includes a second balanced terminal provided on the dielectric substrate, and the balun comprises: a second sub-line having one end connected to the second balanced terminal and the other end connected to the ground electrode; a third line having one end connected to the second balanced terminal and the other end open; and a fourth line having one end connected to the ground electrode and the other end open, the second sub-line being arranged between the third line and the main line, and between the fourth line and the main line, and the other end of the third line facing the other end of the fourth line.

[0113] <Supplementary Note 10> A front-end circuit comprising: the balun according to Supplementary Note 9; and an amplifier connected to at least one of the first balanced terminal, the second balanced terminal, and the unbalanced terminal, wherein the amplifier is formed on the dielectric substrate.

[0114] <Supplementary Note 11> The front-end circuit according to Supplementary Note 10, further comprising a power supply terminal to which power to be supplied to the amplifier is input, the power supply terminal being connected to the other end of the first sub-line.

[0115] a first capacitor connected between the other end of the first line and the other end of the second line, wherein a resonant frequency of an LC series resonator formed by the first capacitor, the first line, and the second line is a center frequency of the second frequency band, and a resonant frequency of an LC parallel resonator formed by the first capacitor and the first sub-line is a center frequency of the first frequency band.

[0116] <Supplementary Note 13> The balun according to Supplementary Note 12, wherein the first frequency band is a frequency band between 120 and 140 GHz.

[0117] <Supplementary Note 14> The balun according to Supplementary Note 12 or Supplementary Note 13, wherein the second frequency band is a frequency band between 60 and 90 GHz.

[0118] <Supplementary Note 15> The balun according to any one of Supplementary Notes 12 to 14, wherein the pair of balanced terminals includes a second balanced terminal provided on the dielectric substrate, and the balun comprises: a second sub-line having one end connected to the second balanced terminal and the other end connected to the ground electrode; a third line having one end connected to the second balanced terminal and the other end open; a fourth line having one end connected to the ground electrode and the other end open; and a second capacitor connected between the other end of the third line and the other end of the fourth line, wherein a resonant frequency of an LC series resonator formed by the second capacitor, the third line, and the fourth line is a center frequency of a third frequency band different from the second frequency band, and wherein a resonant frequency of an LC parallel resonator formed by the second capacitor and the second sub-line is a center frequency of the first frequency band.

[0119] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0120] ANT antenna, Ar1, Ar2 area, C1, C2, C11, C12, C21, C22 capacitor, CL, CL1 to CL4 line, Cm1 capacitance between lines, Cp1, Rt1, Rt2 point, Cs1 to Cs3 line capacitance, D1, D2, D5, Dx1 spacing, Ec1 to Ec4, Ee1 to Ee3, Es1 to Es3 end, Fp1, Fp2 feeding point, Mk1 ground electrode, LN1, LN1Z, LN2, LN3, Lx1, Ly1 line, Ly1D, Ly1U, Ly2U, Ly2D layer, ML1 main line, PA, PA1 to PA4 power amplifier, Pt1 to Pt3 wiring pattern, SL1, SL2 sub line, Sb1 Dielectric substrate, Sf1, Sf2 main surfaces, TB1, TB2 balanced terminals, TU1 unbalanced terminal, Vdd1, Vdd2 power supply terminals, W1, WM1 width.

Claims

1. A balun comprising: a dielectric substrate; a pair of balanced terminals including a ground electrode, an unbalanced terminal, and a first balanced terminal provided on the dielectric substrate; a main line having one end connected to the unbalanced terminal and the other end open; a first sub-line having one end connected to the first balanced terminal and the other end connected to the ground electrode; a first line having one end connected to the first balanced terminal and the other end open; and a second line having one end connected to the ground electrode and the other end open, wherein the first sub-line is disposed between the first line and the main line, and between the second line and the main line, and the other end of the first line faces the other end of the second line.

2. The balun according to claim 1, wherein the length of the first line in the extension direction is the same as the length of the second line in the extension direction.

3. A balun as claimed in claim 1 or 2, wherein the main line has a shape wound around a winding axis when the main surface of the dielectric substrate is viewed in plan.

4. The balun of claim 3, wherein the shortest distance between the main line and the first sub-line is longer than the shortest distance between the first sub-line and the first line and the shortest distance between the first sub-line and the second line.

5. The balun according to claim 1 or 2, wherein the main line has a linear shape when the main surface of the dielectric substrate is viewed in a plan view.

6. The balun of claim 5, wherein the shortest distance between the main line and the first sub-line, the shortest distance between the first sub-line and the first line, and the shortest distance between the first sub-line and the second line are each the same length.

7. A balun as claimed in any one of claims 1 to 6, wherein the first sub-line is arranged along the main line between the first line and the second line and the main line, and the width of the first line and the width of the second line when viewed in a plan view of the main surface of the dielectric substrate is smaller than the width of the first sub-line.

8. A balun according to any one of claims 1 to 7, wherein the base material of the dielectric substrate is a compound semiconductor.

9. The balun according to any one of claims 1 to 8, wherein the pair of balanced terminals includes a second balanced terminal provided on the dielectric substrate, and the balun comprises: a second sub-line having one end connected to the second balanced terminal and the other end connected to the ground electrode, a third line having one end connected to the second balanced terminal and the other end open, and a fourth line having one end connected to the ground electrode and the other end open, the second sub-line being disposed between the third line and the main line, and between the fourth line and the main line, and the other end of the third line faces the other end of the fourth line.

10. A front-end circuit comprising: a balun as claimed in claim 9; and an amplifier connected to at least one of the first balanced terminal, the second balanced terminal, and the unbalanced terminal, the amplifier being formed on the dielectric substrate.

11. The front-end circuit according to claim 10, further comprising a power supply terminal to which power supplied to said amplifier is input, said power supply terminal being connected to the other end of said first sub-line.

12. A balun having a first frequency band as a pass band and a second frequency band as an attenuation band, comprising: a dielectric substrate; a pair of balanced terminals including a ground electrode, an unbalanced terminal, and a first balanced terminal provided on the dielectric substrate; a main line having one end connected to the unbalanced terminal and the other end open; a first sub-line having one end connected to the first balanced terminal and the other end connected to the ground electrode; a first line having one end connected to the first balanced terminal and the other end open; a second line having one end connected to the ground electrode and the other end open; and a first capacitor connected between the other end of the first line and the other end of the second line, wherein a resonant frequency of an LC series resonator formed by the first capacitor, the first line, and the second line is a center frequency of the second frequency band, and a resonant frequency of an LC parallel resonator formed by the first capacitor and the first sub-line is the center frequency of the first frequency band.

13. The balun of claim 12, wherein the first frequency band is a frequency band between 120 and 140 GHz.

14. A balun as claimed in claim 12 or 13, wherein the second frequency band is a frequency band between 60 and 90 GHz.

15. The balun according to any one of claims 12 to 14, wherein the pair of balanced terminals includes a second balanced terminal provided on the dielectric substrate, the balun comprising: a second sub-line having one end connected to the second balanced terminal and the other end connected to the ground electrode; a third line having one end connected to the second balanced terminal and the other end open; a fourth line having one end connected to the ground electrode and the other end open; and a second capacitor connected between the other end of the third line and the other end of the fourth line, wherein a resonant frequency of an LC series resonator formed by the second capacitor, the third line, and the fourth line is a center frequency of a third frequency band different from the second frequency band, and wherein a resonant frequency of an LC parallel resonator formed by the second capacitor and the second sub-line is a center frequency of the first frequency band.

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