Through-electrode substrate and method for manufacturing through-electrode substrate

WO2025047976A1PCT designated stage expired Publication Date: 2025-03-06DAI NIPPON PRINTING CO LTD
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Patent Information

Application Number
PCT/JP2024/031400
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-08-30
Filing Date
2024-08-30
Publication Date
2025-03-06

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Abstract

This through-electrode substrate may include: a substrate including a first surface and a second surface positioned on the opposite side to the first surface, the substrate being provided with a through-hole including a wall surface extending from the first surface to the second surface; a through-electrode that includes a first end surface positioned on the first surface and a second end surface positioned on the second surface, and that fills the through-hole; and an adhesion layer positioned between the through-electrode and the wall surface of the through-hole. The through-electrode may include a first layer that includes the first end surface, and a second layer that includes the second end surface and is in contact with the first layer at the interface. The adhesion layer may extend toward the second surface along the wall surface so as not to reach the second surface. The adhesion layer may include a second end at which an extension toward the second surface is terminated. The interface may be positioned between the first surface and the second end of the adhesion layer or between the second surface and the second end of the adhesion layer in the thickness direction of the substrate.
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Description

Through-electrode substrate and method for manufacturing the same

[0001] FIELD Embodiments of the present disclosure relate to a through hole electrode substrate and a method for manufacturing a through hole electrode substrate.

[0002] Through-hole electrode substrates are used in a variety of applications. A through-hole electrode substrate comprises a substrate having a through-hole formed therein and an electrode located in the through-hole. The through-hole penetrates from a first surface to a second surface of the substrate. The through-hole electrode substrate is used to electrically connect an electrical element located on the first surface with an electrical element located on the second surface. The through-hole electrode substrate is also referred to as an interposer. In the following description, an electrode located inside a through-hole is referred to as a through-hole electrode.

[0003] Known examples of through electrodes include filled vias and conformal vias. Filled vias include a conductive material such as copper filled inside a through hole. Conformal vias include a conductive layer extending along the wall surface of the through hole. Filled vias are preferred from the viewpoint of reducing electrical resistance.

[0004] When forming a filled via by plating, voids are likely to occur. Voids are hole defects that occur inside the filled via. Voids occur when the growth rate of plating inside the through hole is not properly controlled. Patent Document 1 proposes suppressing voids by disposing a seed layer on only a portion of the wall surface of the through hole, rather than the entire wall surface.

[0005] International Publication No. 2023 / 085366

[0006] In areas where the sheet layer is not provided, the through electrode contacts the wall surface of the through hole. The adhesion between the wall surface and the through electrode is weaker than the adhesion between the seed layer and the wall surface. If the adhesion is insufficient, a gap will form between the through electrode and the wall surface, reducing the stability of the through electrode.

[0007] The embodiments of the present disclosure have been made in consideration of these points, and have an object to provide a through electrode substrate in which the stability of the through electrodes is improved.

[0008] Embodiments of the present disclosure relate to the following [1] to

[23] : [1] A through electrode substrate comprising: a substrate including a first surface and a second surface located opposite to the first surface, the substrate having a through hole including a wall surface extending from the first surface to the second surface; a through electrode including a first end surface located on the first surface and a second end surface located on the second surface, the through hole being filled; and an adhesion layer located between the through electrode and the wall surface of the through hole, the through electrode including a first layer including the first end surface and a second layer including the second end surface and in contact with the first layer at an interface, the adhesion layer extending along the wall surface toward the second surface so as not to reach the second surface, the adhesion layer including a second end where the extension toward the second surface terminates, the interface being located between the first surface and the second end of the adhesion layer in a thickness direction of the substrate,

[0009] [2] In the through hole electrode substrate according to [1], the interface may be located between the second surface and the second end of the adhesion layer in the thickness direction.

[0010] [3] In the through hole electrode substrate according to [2], a distance between the first surface and the second end of the adhesive layer in the thickness direction may be 2 μm or more and 250 μm or less.

[0011] [4] In the through electrode substrate according to [2] or [3], the ratio of the distance between the first surface and the interface in the thickness direction to the thickness of the substrate may be 0.002 or more and 0.500 or less.

[0012] [5] In the through electrode substrate according to any one of [2] to [4], the ratio of the distance between the first surface and the interface in the thickness direction to the thickness of the substrate may be 0.05 or more and 0.95 or less.

[0013] [6] In the through electrode substrate according to any one of [2] to [5], the distance between the first surface and the second end of the adhesion layer in the thickness direction may be 5 μm or more, and the ratio of the distance between the second surface and the interface in the thickness direction to the thickness of the substrate may be greater than the ratio of the distance between the first surface and the interface in the thickness direction to the thickness of the substrate.

[0014] [7] In the through hole electrode substrate according to [1], the interface may be located between the first surface and the second end of the adhesion layer in the thickness direction.

[0015] [8] In the through hole electrode substrate according to [7], a distance between the first surface and the interface in the thickness direction may be 5 μm or more and 250 μm or less.

[0016] [9] In the through electrode substrate according to [7] or [8], the ratio of the distance between the first surface and the interface in the thickness direction to the thickness of the substrate may be 0.010 or more and 0.500 or less.

[0017]

[10] In the through electrode substrate according to any one of [7] to [9], the ratio of the distance between the first surface and the second end of the adhesion layer in the thickness direction to the thickness of the substrate may be 0.05 or more and 0.95 or less.

[0018]

[11] In the through electrode substrate according to any one of [7] to

[10] , the distance between the first surface and the interface in the thickness direction may be 10 μm or more, and the ratio of the distance between the second surface and the second end of the adhesion layer in the thickness direction to the thickness of the substrate may be greater than the ratio of the distance between the first surface and the second end of the adhesion layer in the thickness direction to the thickness of the substrate.

[0019]

[12] In the through hole electrode substrate according to any one of [1] to

[11] , the adhesion layer may contain titanium, a titanium compound, chromium, or a chromium compound.

[0020]

[13] In the through electrode substrate according to any one of [1] to

[12] , the through electrode may contain copper.

[0021]

[14] In the through hole electrode substrate according to any one of [1] to

[13] , the substrate may include glass and have a thickness of 300 μm or more and 1200 μm or less.

[0022]

[15] The through-hole electrode substrate according to any one of [1] to

[14] may include at least one of a first wiring layer located on the first surface and a second wiring layer located on the second surface. The first wiring layer may include a first conductive layer and a first insulating layer. The second wiring layer may include a second conductive layer and a second insulating layer.

[0023]

[16] The through electrode substrate according to

[15] may include a semiconductor element including a terminal electrically connected to the through electrode.

[0024]

[17] In the through electrode substrate described in

[15] , the through electrode may include a seed layer located on the adhesion layer, and the distance in the thickness direction between the interface and an end of the seed layer may be 50 nm or less.

[0025]

[18] A method for manufacturing a through-hole electrode substrate, comprising: a step of preparing a substrate including a first surface and a second surface located opposite to the first surface, and having a through hole provided therein, the through-hole including a wall surface extending from the first surface to the second surface; a step of forming an adhesion layer on the wall surface; and a through-hole electrode forming step of forming a through-hole electrode in the through-hole, wherein the adhesion layer extends toward the second surface along the wall surface so as not to reach the second surface, and the adhesion layer includes a second end where the extension toward the second surface terminates, and the through-hole electrode forming step comprises: a step of forming a seed layer including at least a portion located on the adhesion layer; a first electrolytic plating step of forming a first layer covering the seed layer by electrolytic plating; and a second electrolytic plating step of forming a second layer in contact with the first layer at an interface,

[0026]

[19] In the method for manufacturing a through-hole electrode substrate described in

[18] , the seed layer may be located only on the adhesion layer, and the interface may be located between the first surface and the second end of the adhesion layer in the thickness direction.

[0027]

[20] In the manufacturing method of a through-hole electrode substrate described in

[18] , the seed layer may be located on the adhesion layer and on the wall surface so as to cover the second end of the adhesion layer, and the interface may be located between the second surface and the second end of the adhesion layer in the thickness direction.

[0028]

[21] In the method for manufacturing a through hole electrode substrate according to any one of

[18] to

[20] , the adhesion layer may be formed by chemical vapor deposition.

[0029]

[22] In the method for manufacturing a through hole electrode substrate according to any one of

[18] to

[21] , the adhesion layer may be formed by atomic layer deposition.

[0030]

[23] In the method for manufacturing a through hole electrode substrate according to any one of

[18] to

[22] , the seed layer may be formed by a physical film formation method.

[0031] According to the embodiments of the present disclosure, it is possible to provide a through electrode substrate including through electrodes in which voids are suppressed.

[0032] 1 is a cross-sectional view showing a through electrode substrate. FIG. 1 is a cross-sectional view showing a through hole of the through electrode substrate according to the first embodiment. FIG. 2 is a cross-sectional view showing an example of a second end of an adhesion layer. FIG. 3 is a view showing a first surface of the through electrode substrate. FIG. 4 is a view showing a second surface of the through electrode substrate. FIG. 5 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 6 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 7 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 8 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 9 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 10 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 11 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 12 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 13 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 14 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. FIG. 15 is a cross-sectional view showing a manufacturing process of the through electrode substrate according to the first embodiment. 1 is a cross-sectional view showing a modified example of a through electrode substrate. FIG. 1 is a cross-sectional view showing a modified example of a through electrode substrate. FIG. 2 is a cross-sectional view showing a modified example of a through electrode substrate. FIG. 3 is a cross-sectional view showing an example of a through electrode substrate provided with a wiring layer. FIG. 4 is a cross-sectional view showing an example of a through electrode substrate provided with a wiring layer. FIG. 5 is a cross-sectional view showing an example of a through electrode substrate provided with a wiring layer. FIG. 6 is a diagram showing an example of a product on which a through electrode substrate is mounted. FIG. 7 is a cross-sectional view showing a through hole of a through electrode substrate according to a second embodiment. FIG. 8 is a cross-sectional view showing a manufacturing process of a through electrode substrate according to a second embodiment. FIG. 9 is a cross-sectional view showing a manufacturing process of a through electrode substrate according to a second embodiment. FIG. 10 is a cross-sectional view showing a manufacturing process of a through electrode substrate according to a second embodiment. FIG. 11 is a cross-sectional view showing a manufacturing process of a through electrode substrate according to a second embodiment. FIG. 12 is a diagram for explaining the effect of a through electrode substrate according to a second embodiment. FIG. 13 is a table showing evaluation results of Examples A1 to A10 and Comparative Example A1. FIG. 14 is a table showing evaluation results of Examples B1 to B10 and Comparative Example B1. FIG. 15 is a diagram showing the observation position of a through hole in Example B11. FIG. 16 is an image showing the observation result of a through hole in Example B11.1 is an image showing the observation results of the through hole in Example B11. FIG. 1 is an image showing the observation results of the through hole in Example B11. FIG. 1 is an image showing the observation results of the through hole in Example B11. FIG. 1 is an image showing the observation results of the through electrode in Example B12. FIG. 1 is an image showing the observation results of the through electrode in Example B12.

[0033] The configurations of a through electrode substrate and a mounting substrate according to a first embodiment of the present disclosure, and a manufacturing method thereof, will be described in detail with reference to the drawings. The embodiments shown below are examples of embodiments of the present disclosure, and the present disclosure should not be interpreted as being limited to these embodiments. As used in this specification, terms specifying shapes, geometric conditions, and their degrees, such as "parallel" and "orthogonal," and values ​​of lengths and angles, are not limited to their strict meanings and are interpreted to include a range within which similar functions can be expected.

[0034] In this specification, when multiple upper limit value candidates and multiple lower limit value candidates are listed for a certain parameter, the numerical range of the parameter may be constructed by combining any one upper limit value candidate with any one lower limit value candidate. For example, consider a description that reads, "Parameter B is, for example, A1 or more, or may be A2 or more, or may be A3 or more. Parameter B is, for example, A4 or less, or may be A5 or less, or may be A6 or less." In this case, the numerical range of parameter B may be A1 or more and A4 or less, A1 or more and A5 or less, A1 or more and A6 or less, A2 or more and A4 or less, A2 or more and A5 or less, A2 or more and A6 or less, A3 or more and A4 or less, A3 or more and A5 or less, or A3 or more and A6 or less.

[0035] In the drawings referred to in the embodiments, the same or similar reference numerals are used to designate the same parts or parts having similar functions, and repeated explanations thereof may be omitted. In addition, the dimensional ratios of the drawings may differ from the actual ratios for the sake of explanation, and some components may be omitted from the drawings.

[0036] 1 is a cross-sectional view showing an example of a through electrode substrate 10. The through electrode substrate 10 includes a substrate 12 and a plurality of through electrodes 20.

[0037] (Substrate) The substrate 12 includes a first surface 13 and a second surface 14. The second surface 14 is located on the opposite side of the first surface 13.

[0038] The substrate 12 is provided with a plurality of through holes 15 that penetrate the substrate 12 from the first surface 13 to the second surface 14. The through holes 15 include wall surfaces 16 that extend from the first surface 13 to the second surface 14. In the following description, the direction from the first surface 13 to the second surface 14 is also referred to as the thickness direction D3. The thickness direction D3 may be parallel to the normal direction of the first surface 13. The direction in which the first surface 13 extends is also referred to as the surface direction. The first direction D1 in FIG. 1 is one of the surface directions. The first direction D1 is defined as the direction in which the largest number of through electrodes 20 are arranged.

[0039] The substrate 12 is made of an insulating inorganic material. For example, the substrate 12 contains glass, quartz, sapphire, resin, silicon, silicon carbide, alumina (Al2O3), aluminum nitride (AlN), zirconium oxide (ZrO2), or the like as a main component. A main component is a component with a content of 51 mass% or more.

[0040] When the substrate 12 contains silicon, the surfaces of the substrate 12, such as the first surface 13, the second surface 14, and the wall surface 16, may be made of an insulating film. The insulating film is formed, for example, by subjecting the substrate 12, in which the through-holes 15 are formed, to an oxidation treatment at high temperature.

[0041] The substrate 12 may be rectangular in plan view. A rectangular substrate 12 is also referred to as a panel. The substrate 12 may be circular in plan view. A circular substrate 12 is also referred to as a wafer. A plan view means viewing an object along the thickness direction D3 of the first surface 13.

[0042] The thickness T0 of the substrate 12 is, for example, 100 μm or more, and may be 200 μm or more, or 300 μm or more. By having the thickness T0 be 100 μm or more, it is possible to prevent the substrate 12 from warping too much. This prevents the substrate 12 from becoming difficult to handle during the manufacturing process and from warping due to internal stress of layers formed on the substrate 12. The thickness T0 of the substrate 12 is, for example, 1200 μm or less, and may be 1000 μm or less, or 500 μm or less. By having the thickness T0 be 1200 μm or less, it is possible to prevent the time required for the process of forming the through holes 15 in the substrate 12 from becoming too long.

[0043] (Through Electrode) The through electrode 20 is a conductive member located inside the through hole 15. The through electrode 20 fills the through hole 15. The through electrode 20 is a so-called filled via.

[0044] 1 , the through electrode 20 includes a first end face 201 and a second end face 202. The first end face 201 is located on the first surface 13. The second end face 202 is located on the second surface 14. The first end face 201 may extend on the same plane as the first surface 13. The second end face 202 may extend on the same plane as the second surface 14.

[0045] The through hole 15 has a dimension R1 at the first surface 13. The through hole 15 has a dimension R2 at the second surface 14. The dimension R1 may be the same as the dimension R2. The dimension R1 may be different from the dimension R2. For example, the dimension R1 may be greater than the dimension R2 or less than the dimension R2.

[0046] The dimension R1 is, for example, 5 μm or more, or may be 10 μm or more, or 20 μm or more. The dimension R1 is, for example, 100 μm or less, or may be 80 μm or less, or may be 60 μm or less. The numerical range of the dimension R2 may be the same as the numerical range of the dimension R1.

[0047] The through holes 15 may have a high aspect ratio. The aspect ratio is the ratio of the thickness T0 of the substrate 12 to the minimum dimension of the through holes 15 in the surface direction. When the dimensions of the through holes 15 are uniform in the thickness direction D3, the aspect ratio is calculated by T0 / R1. The aspect ratio is, for example, 3.0 or more, 4.0 or more, or 5.0 or more. The aspect ratio is, for example, 25.0 or less, 20.0 or less, or 15.0 or less. For example, the aspect ratio may be 3.0 or more and 25.0 or less. An aspect ratio of 3.0 or more can prevent the through holes 15 on the first surface 13 from being unblocked by the through electrodes 20. An aspect ratio of 25.0 or less can reduce the time required to form the through electrodes 20 by plating.

[0048] The shape of the through hole 15 in plan view is not particularly limited. For example, the shape of the through hole 15 in plan view may be circular or not. If the shape of the through hole 15 in plan view is circular, the above-mentioned dimensions R1 and R2 are the diameter of the through hole 15 at the first surface 13 and the diameter of the through hole 15 at the second surface 14. If the shape of the through hole 15 in plan view is not circular, the above-mentioned dimensions R1 and R2 are defined in the direction in which the dimension of the through hole 15 in plan view is maximized. For example, if the shape of the through hole 15 in plan view is elliptical, the above-mentioned dimensions R1 and R2 are defined in the direction of the major axis of the ellipse.

[0049] The internal structure of the through hole 15 will be described in detail. Fig. 2A is a cross-sectional view showing an example of the through hole 15. The through electrode substrate 10 includes an adhesion layer 31 located between the through electrode 20 and the wall surface 16. The adhesion layer 31 may be in contact with the wall surface 16.

[0050] As shown in FIG. 2A , the through electrode 20 includes a first layer 21, a second layer 22, and a seed layer 24. The first layer 21 includes a first end surface 201. The second layer 22 includes a second end surface 202. The first layer 21 and the second layer 22 are stacked in the thickness direction D3. The seed layer 24 is located between the first layer 21 and the through hole 15. In the example shown in FIG. 2A , the seed layer 24 is located between the first layer 21 and the adhesion layer 31. The seed layer 24 may be in contact with the adhesion layer 31. The seed layer 24 may be in contact with the first layer 21.

[0051] As will be described later, the first layer 21 is formed by a first electrolytic plating process. The second layer 22 is formed by a second electrolytic plating process that is performed after the first electrolytic plating process. The second layer 22 contacts the first layer 21 at an interface 23 in the thickness direction D3. The interface 23 crosses the through hole 15. The interface 23 may be formed by a crystal grain boundary of the material that constitutes the first layer 21.

[0052] The adhesion layer 31 will be described in detail. The adhesion layer 31 is a layer for increasing the adhesion of the through electrode 20 to the wall surface 16. For example, the adhesion layer 31 can suppress the occurrence of a gap between the through electrode 20 and the wall surface 16.

[0053] On the other hand, if the adhesion of the through electrode 20 to the wall surface 16 is too high, damage such as cracks may occur in the substrate 12 due to the difference in the thermal expansion coefficient between the through electrode 20 and the substrate 12. In consideration of this problem, the present embodiment proposes arranging the adhesion layer 31 on a part of the wall surface 16 rather than on the entire area thereof.

[0054] 2A , the adhesion layer 31 extends in the thickness direction D3 along the wall surface 16 toward the second surface 14 so as not to reach the second surface 14. For example, the adhesion layer 31 has a cylindrical shape. The adhesion layer 31 includes a first end 311 and a second end 312. The first end 311 may be located on the first surface 13. The first end 311 may be spaced apart from the first surface 13 in the thickness direction D3. The second end 312 is located on the opposite side of the first end 311 in the thickness direction D3. The extension of the adhesion layer 31 from the first end 311 toward the second surface 14 terminates at the second end 312. The second end 312 is not covered by the seed layer 24 and the first layer 21.

[0055] 2B is a cross-sectional view showing an example of the second end 312 of the adhesive layer 31. The second end 312 of the adhesive layer 31 is the end of the continuous extension of the adhesive layer 31 from the first surface 13 to the second surface 14. The portion of the adhesive layer 31 that continuously extends from the first surface 13 to the second surface 14 and terminates at the second end 312 is also referred to as a main portion. As shown in FIG. 2B , the adhesive layer 31 may include a portion separate from the main portion. The portion separate from the main portion is also referred to as a separation portion. The second end 312 of the adhesive layer 31 is the end of the main portion.

[0056] The adhesion layer 31 includes a material that adheres to the wall surface 16. For example, titanium (Ti), molybdenum (Mo), tungsten (W), tantalum (Ta), nickel (Ni), chromium (Cr), aluminum (Al), compounds thereof, or alloys thereof can be used. The compound may be a metal oxide such as titanium oxide (TiO), indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), tin oxide (SnO), or chromium oxide. The adhesion layer 31 may also include an organic substance such as a silane coupling agent. When the through electrode 20 includes copper (Cu), the adhesion layer 31 may also include a material that suppresses Cu diffusion. For example, the adhesion layer 31 may include a metal nitride such as titanium nitride (TiN), molybdenum nitride (MoN), tantalum nitride (TaN), or chromium nitride.

[0057] The material of the adhesion layer 31 may be selected depending on the material or shape of the substrate 12. For example, if the substrate 12 is a wafer, the adhesion layer 31 may contain Cr or a compound thereof. For example, if the substrate 12 is a panel, the adhesion layer 31 may contain Ti or a compound thereof.

[0058] The seed layer 24 will be described in detail. The seed layer 24 is a layer that functions as a cathode in the first electrolytic plating step. In the first electrolytic plating step, the material that constitutes the first layer 21 is first deposited on the seed layer 24. The seed layer 24 has adhesion to the first layer 21. For example, the adhesion between the seed layer 24 and the through electrode 20 is higher than the adhesion between the wall surface 16 and the through electrode 20.

[0059] The seed layer 24 extends in the thickness direction D3 along the wall surface 16 toward the second surface 14 so as not to reach the second surface 14. For example, the seed layer 24 has a cylindrical shape. The seed layer 24 includes a third end 241 and a fourth end 242. The third end 241 may be located on the first surface 13. The third end 241 may be spaced apart from the first surface 13 in the thickness direction D3. The fourth end 242 is located on the opposite side of the third end 241 in the thickness direction D3. The extension of the seed layer 24 from the third end 241 toward the second surface 14 terminates at the fourth end 242.

[0060] 2A , the fourth end 242 of the seed layer 24 is located closer to the first surface 13 than the second end 312 of the adhesion layer 31. In other words, the fourth end 242 is located between the first surface 13 and the second end 312 in the thickness direction D3. In this case, the seed layer 24 is located only on the adhesion layer 31.

[0061] The material of the seed layer 24 is selected so that the first layer 21 can be deposited on the seed layer 24. The material of the seed layer 24 may be the same as or different from the material of the first layer 21. The seed layer 24 may include a metallic material such as Cu, TiCr, Ni, or gold (Au). The seed layer 24 may also include a compound of these metallic materials. For example, the seed layer 24 may include TiN. The seed layer 24 may include multiple layers. For example, the seed layer 24 may include a layer of TiN and a layer of Cu.

[0062] The first layer 21 is formed by a deposition reaction using an electric charge supplied from the seed layer 24. In the through-hole 15, the first layer 21 covers the seed layer 24. For example, the first layer 21 extends in the thickness direction D3 from the first surface 13 to a position on the second surface 14 side of the seed layer 24.

[0063] The second layer 22 contacts the first layer 21 at the interface 23. The second layer 22 extends in the thickness direction D3 from the interface 23 to the second surface 14.

[0064] The first layer 21 and the second layer 22 may contain a metal material such as Cu, Au, silver (Ag), platinum (Pt), rhodium (Rh), Ni, Cr, palladium (Pd), etc. The first layer 21 and the second layer 22 may also contain a compound of these metal materials.

[0065] The interface 23 may not be flat. For example, the interface 23 may include a depression 232 recessed toward the first surface 13. The depth K of the depression 232 is, for example, 1.5 μm or more, or may be 3.0 μm or more, or 5.0 μm or more. The depth K of the depression 232 is, for example, less than 15 μm, or may be less than 12 μm, or may be less than 10 μm. For example, the depth K of the depression 232 may be 1.5 μm or more and less than 15 μm.

[0066] Growth of the second layer 22 may be more likely to proceed in the center of the through hole 15 in plan view than in the vicinity of the wall surface 16 of the through hole 15. Including the depression 232 in the interface 23 can prevent the second layer 22 from excessively protruding from the second surface 14 in the center of the through hole 15 in plan view. Setting the depth K of the depression 232 to less than 15 μm can prevent defects such as voids from occurring during the growth of the second layer 22.

[0067] 3 is a diagram showing the first surface 13 of the through hole electrode substrate 10. On the first surface 13, an adhesion layer 31 and a seed layer 24 are disposed between the wall surface 16 of the through hole 15 and the first layer 21. If the material of the seed layer 24 is the same as the material of the first layer 21, the boundary between the seed layer 24 and the first layer 21 may not appear clearly. The through hole 15 has a dimension R1 on the first surface 13. The dimension R1 is the maximum dimension of the through hole 15 on the first surface 13.

[0068] 4 is a diagram showing the second surface 14 of the through hole electrode substrate 10. On the second surface 14, the adhesion layer 31 and the seed layer 24 are not disposed between the wall surface 16 of the through hole 15 and the second layer 22. The through hole 15 has a dimension R2 on the second surface 14. The dimension R2 is the maximum dimension of the through hole 15 on the second surface 14.

[0069] The position of the interface 23 in the thickness direction D3 will be described. The interface 23 has an interface end 231. The interface end 231 is the outer edge of the interface 23 in a plan view. The interface end 231 is close to a fourth end 242 of the seed layer 24 in the thickness direction D3. Based on the position of the interface end 231, the position of the fourth end 242 of the seed layer 24 can be estimated.

[0070] In the example shown in FIG. 2A , the interface 23 is located between the first surface 13 and the second end 312 of the adhesive layer 31 in the thickness direction D3. The through electrode 20 is divided into an intermediate portion, a first portion P1, and a second portion P2 in the thickness direction D3 based on the interface end 231 of the interface 23 and the second end 312 of the adhesive layer 31. The intermediate portion is a portion of the through electrode 20 located between the interface end 231 of the interface 23 and the second end 312 of the adhesive layer 31 in the thickness direction D3. When the interface end 231 of the interface 23 is located between the first surface 13 and the second end 312 of the adhesive layer 31 as shown in FIG. 2A , the intermediate portion is particularly referred to as a first intermediate portion and is represented by the symbol Pm1. The first portion P1 is a portion of the through electrode 20 located between the first surface 13 and the first intermediate portion Pm1 in the thickness direction D3. 2A , the first portion P1 is located between the first surface 13 and the interface end 231 of the interface 23. The second portion P2 is a portion of the through electrode 20 located between the second surface 14 and the first intermediate portion Pm1 in the thickness direction D3. In the example shown in FIG. 2A , the second portion P2 is located between the second surface 14 and the second end 312 of the adhesion layer 31.

[0071] In most of the first portion P1, an adhesion layer 31 and a seed layer 24 are disposed between the through electrode 20 and the wall surface 16. In the first intermediate portion Pm1, an adhesion layer 31 is disposed between the through electrode 20 and the wall surface 16. In the second portion P2, neither the adhesion layer 31 nor the seed layer 24 is disposed between the through electrode 20 and the wall surface 16.

[0072] The adhesion of the adhesion layer 31 to the wall surface 16 is higher than the adhesion of the through electrode 20 to the wall surface 16. Therefore, the adhesion force between the wall surface 16 and the through electrode 20 in the first intermediate portion Pm1 is higher than the adhesion force between the wall surface 16 and the through electrode 20 in the second portion P2.

[0073] The adhesion of the through electrode 20 to the seed layer 24 and the adhesion of the seed layer 24 to the adhesion layer 31 are higher than the adhesion of the through electrode 20 to the adhesion layer 31. Therefore, the adhesion force between the wall surface 16 and the through electrode 20 in the first portion P1 is higher than the adhesion force between the wall surface 16 and the through electrode 20 in the first intermediate portion Pm1.

[0074] The first portion P1 has a high adhesive strength, and can enhance the stability of the through electrode 20.

[0075] The adhesion force of the second portion P2 is lower than the adhesion force of the first portion P1 and the adhesion force of the first intermediate portion Pm1. Therefore, compared to the first portion P1 and the first intermediate portion Pm1, thermal stress caused by the difference in thermal expansion coefficient between the through electrode 20 and the substrate 12 is less likely to occur in the second portion P2. Therefore, the second portion P2 can absorb, for example, some of the thermal stress generated in the first portion P1. For example, the second portion P2 can distribute the thermal stress generated in the first portion P1 in the thickness direction D3 or the surface direction within the second portion P2.

[0076] The adhesion force of the first intermediate portion Pm1 is higher than that of the first portion P1 but lower than that of the second portion P2. The first intermediate portion Pm1 is located between the first portion P1 and the second portion P2 in the thickness direction D3. The first intermediate portion Pm1 can suppress a sudden change in thermal stress between the first portion P1 and the second portion P2. This suppresses damage such as cracks from occurring in the substrate 12 or the through electrode 20.

[0077] The first intermediate portion Pm1 has a thickness Hm1. The thickness Hm1 is the distance between the interface end 231 of the interface 23 and the second end 312 of the adhesive layer 31 in the thickness direction D3. The first portion P1 has a thickness H1. In the example shown in FIG. 2A , the thickness H1 is the distance between the first surface 13 and the interface end 231 of the interface 23 in the thickness direction D3. The second portion P2 has a thickness H2. In the example shown in FIG. 2A , the thickness H2 is the distance between the second surface 14 and the second end 312 of the adhesive layer 31 in the thickness direction D3.

[0078] The thickness H1 of the first portion P1 is, for example, 5 μm or more, and may be 10 μm or more, 30 μm or more, 50 μm or more, or 100 μm or more. When the thickness H1 is a predetermined value or more, the adhesion between the through electrode 20 and the wall surface 16 can be appropriately increased. The thickness H1 is, for example, 250 μm or less, 200 μm or less, 150 μm or less, 130 μm or less, 100 μm or less, 50 μm or less, or 40 μm or less. When the thickness H1 is 250 μm or less, the adhesion of the through electrode 20 to the wall surface 16 can be prevented from becoming excessively high.

[0079] The thickness H1 of the first portion P1 may be determined relative to the thickness T0 of the substrate 12. The ratio of the thickness H1 to the thickness T0, H1 / T0, may be, for example, 0.005 or more, 0.010 or more, 0.025 or more, 0.050 or more, 0.075 or more, 0.10 or more, 0.15 or more, or 0.20 or more. H1 / T0 may be, for example, 0.50 or less, 0.40 or less, 0.30 or less, 0.25 or less, 0.20 or less, 0.15 or less, 0.10 or less, or 0.075 or less.

[0080] The thickness H2 of the second portion P2 is, for example, 50 μm or more, and may be 100 μm or more, 200 μm or more, or 300 μm or more. When the thickness H2 is 50 μm or more, it is possible to appropriately distribute the thermal stress of the through electrode 20. The thickness H2 is, for example, 950 μm or less, and may be 500 μm or less, 350 μm or less, 250 μm or less, or 200 μm or less.

[0081] The thickness H2 of the second portion P2 may be determined relative to the thickness T0 of the substrate 12. The ratio H2 / T0 of the thickness H2 to the thickness T0 may be, for example, 0.10 or more, 0.15 or more, 0.20 or more, 0.40 or more, 0.60 or more, or 0.80 or more. H2 / T0 may be, for example, 0.95 or less, 0.90 or less, 0.85 or less, 0.70 or less, 0.60 or less, 0.50 or less, 0.40 or less, or 0.30 or less.

[0082] The thickness Hm1 of the first intermediate portion Pm1 is, for example, 30 μm or more, and may be 40 μm or more, 50 μm or more, or 100 μm or more. Having the thickness Hm1 equal to or greater than a predetermined value can suppress a sudden change in thermal stress between the first portion P1 and the second portion P2. The thickness Hm1 is, for example, 250 μm or less, and may be 200 μm or less, 150 μm or less, 100 μm or less, 50 μm or less, or 40 μm or less.

[0083] The thickness Hm1 of the first intermediate portion Pm1 may be determined relative to the thickness T0 of the substrate 12. Hm1 / T0, which is the ratio of the thickness Hm1 to the thickness T0, is, for example, 0.030 or more, 0.040 or more, 0.050 or more, 0.075 or more, 0.10 or more, 0.15 or more, or 0.20 or more. Hm1 / T0 is, for example, 0.50 or less, 0.40 or less, 0.30 or less, 0.25 or less, 0.20 or less, 0.15 or less, 0.10 or less, or 0.075 or less.

[0084] The thickness H1 of the first portion P1, the thickness H2 of the second portion P2, and the thickness Hm1 of the first intermediate portion Pm1 may be set so as to ensure a balance between the three layers. For example, the difference between the maximum and minimum values ​​of H1 / T0, H2 / T0, and Hm1 / T0 may be 0.40 or less, 0.30 or less, or 0.20 or less.

[0085] 2A , the symbol H3 represents the distance in the thickness direction D3 between the first surface 13 and the end of the first intermediate portion Pm1 on the second surface 14 side. In the example shown in FIG. 2A , the distance H3 is the distance in the thickness direction D3 between the first surface 13 and the second end 312 of the adhesion layer 31. H3 / T0, which is the ratio of the distance H3 to the thickness T0 of the substrate 12, is, for example, 0.05 or more, 0.10 or more, 0.15 or more, 0.30 or more, 0.50 or more, 0.70 or more, 0.75 or more, or 0.80 or more. H3 / T0 is, for example, 0.95 or less, 0.92 or less, 0.90 or less, 0.80 or less, 0.60 or less, 0.40 or less, or 0.20 or less.

[0086] The ratio H2 / T0 of the thickness H2 to the thickness T0 may be greater than the ratio H3 / T0 of the distance H3 to the thickness T0. In other words, the second portion P2 may occupy more than half of the space of the through hole 15 in the thickness direction D3. As described above, the second portion P2 is less susceptible to thermal stress caused by the difference in the thermal expansion coefficient between the through electrode 20 and the substrate 12 than the first portion P1 and the first intermediate portion Pm1. By setting the thickness H1 of the first portion P1 to a predetermined value or more and increasing the occupancy rate of the second portion P2 in the through hole 15, the second portion P2 can more reliably absorb the thermal stress generated in the first portion P1.

[0087] The value obtained by subtracting H3 from H2 is represented by ΔH23. ΔH23 / T0, which is the ratio of the difference ΔH23 to the thickness T0, is, for example, 0.10 or more, or may be 0.20 or more, or may be 0.25 or more, or may be 0.30 or more. ΔH23 / T0 is, for example, 0.90 or less, or may be 0.80 or less, or may be 0.75 or less, or may be 0.70 or less.

[0088] Dimensions such as the thickness of each layer located in the through holes 15 are calculated based on cross-sectional images of the multiple through holes 15 acquired by an electron microscope. Five through holes 15 aligned in the first direction D1 at positions closest to the center point of the through electrode substrate 10 in a plan view are extracted as the through holes 15 to be measured. The cross-sectional images are acquired so that the dimensions of the through holes 15 in the first direction D1 are maximized. The dimensions of each layer are calculated by averaging the measurement results for the five through holes 15.

[0089] (Method for Manufacturing the Through Electrode Substrate) An example of a method for manufacturing the through electrode substrate 10 will be described with reference to FIGS.

[0090] (Through-hole forming process) First, the substrate 12 is prepared. Next, a resist layer is provided on at least one of the first surface 13 and the second surface 14. After that, openings are provided in the resist layer at positions corresponding to the through-holes 15. Next, the substrate 12 is processed through the openings in the resist layer. As a result, the through-holes 15 are formed in the substrate 12 as shown in FIG. 5 . Methods that can be used to process the substrate 12 include dry etching and wet etching. Dry etching methods include reactive ion etching and deep reactive ion etching.

[0091] The through holes 15 may be formed in the substrate 12 by irradiating the substrate 12 with a laser. In this case, a resist layer does not need to be provided. The laser may be an excimer laser, an Nd:YAG laser, a femtosecond laser, or the like. When an Nd:YAG laser is used, a fundamental wave with a wavelength of 1064 nm, a second harmonic with a wavelength of 532 nm, or a third harmonic with a wavelength of 355 nm may be used.

[0092] Alternatively, laser irradiation and wet etching can be combined as appropriate. Specifically, first, an altered layer is formed in the region of the substrate 12 where the through-hole 15 is to be formed by laser irradiation. Next, the substrate 12 is immersed in hydrogen fluoride or the like to etch the altered layer. As a result, the through-hole 15 is formed in the substrate 12.

[0093] Alternatively, the through holes 15 may be formed in the substrate 12 by blasting the substrate 12 with an abrasive material.

[0094] (Adhesion Layer Forming Step) Next, as shown in Fig. 6, an adhesion layer forming step is carried out to form an adhesion layer 31. The adhesion layer 31 is formed at least on the wall surface 16 of the through hole 15. The adhesion layer 31 may be formed on the first surface 13. Although not shown, the adhesion layer 31 may also be formed on the second surface 14.

[0095] As shown in FIG. 6 , the adhesion layer 31 on the wall surface 16 is formed so as not to reach the second surface 14 in the thickness direction D3. For example, a resist layer is formed on the portion of the wall surface 16 located between the second end 312 of the adhesion layer 31 and the second surface 14. After the adhesion layer formation process, the resist layer is removed. This prevents the adhesion layer 31 from being formed on the portion of the wall surface 16 located between the second end 312 of the adhesion layer 31 and the second surface 14. Alternatively, after the adhesion layer 31 is formed over the entire wall surface 16, a resist layer is formed on the portion of the adhesion layer 31 having the desired dimension T11. Next, an etching solution is supplied into the through hole 15 from the second surface 14 side. This removes the portion of the adhesion layer 31 not covered by the resist layer.

[0096] A dimension T11 of the adhesion layer 31 located at the through hole 15 in the thickness direction D3 is smaller than the thickness T0 of the substrate 12. The numerical range of T11 / T0, which is the ratio of the dimension T11 to the thickness T0 of the substrate 12, may be the same as the numerical range of H3 / T0 described above.

[0097] The thickness T12 of the adhesion layer 31 is, for example, 5 nm or more, or may be 10 nm or more, or 20 nm or more. The thickness T12 is, for example, 300 nm or less, or may be 100 nm or less, or may be 50 nm or less. The thickness T12 of the adhesion layer 31 is determined at the center of the adhesion layer 31 in the thickness direction D3.

[0098] The adhesion layer 31 may be formed by a physical film formation method or a chemical vapor deposition method. Examples of the physical film formation method include evaporation, sputtering, and ion plating. Examples of the chemical vapor deposition method include atomic layer deposition. The adhesion layer 31 may be formed by a chemical vapor deposition method other than atomic layer deposition.

[0099] An example of the adhesion layer formation process when the adhesion layer 31 is formed by atomic layer deposition will be described. The adhesion layer formation process includes multiple film formation processes. Each film formation process includes a first supply process, a first purge process, a second supply process, and a second purge process.

[0100] In the first supply process, a source gas containing a first reactant is supplied to the substrate 12. The first reactant is also called a precursor. The first reactant is, for example, a compound containing a metal that constitutes the metal oxide of the adhesion layer 31. The first reactant may be a compound of a metal that constitutes the metal oxide of the adhesion layer 31 and an organic substance.

[0101] The first reactant reacts with the surface of the substrate 12 in a self-limiting manner. For example, the reaction of the first reactant occurs only at a plurality of reactive sites on the surface of the substrate 12. The reaction of the first reactant forms a film of the first reactant on the surface of the substrate 12. When all of the reactive sites on the surface of the substrate 12 are filled with the first reactant, the growth of the film stops.

[0102] Subsequently, a first purge process is performed to remove the first reactant remaining around the substrate 12. For example, a source gas containing the first reactant is exhausted to the outside of a chamber of a film formation apparatus for performing a film formation process.

[0103] Subsequently, a second supply process is performed. In the second supply process, a source gas containing a second reactant is supplied to the substrate 12. The second reactant may be oxygen molecules, water molecules, or the like. The second reactant may include reactive oxygen radicals.

[0104] In the second supply process, the surface ligands of the first reactant that constitutes the film are replaced by oxygen, i.e., an oxidation reaction occurs. As a result, a metal oxide film is formed on the surface of the substrate 12. When all the surface ligands have been replaced by oxygen, the oxidation reaction stops.

[0105] Subsequently, a second purge process is performed to remove the second reactant remaining around the substrate 12. For example, a source gas containing the second reactant is exhausted to the outside of a chamber of a film formation apparatus for performing a film formation process.

[0106] The thickness of the metal oxide film formed by one film formation process is, for example, 0.20 nm or less, or may be 0.15 nm or less, or may be 0.10 nm or less. The thickness of the adhesion layer 31 can be controlled by controlling the number of film formation processes.

[0107] As described above, atomic layer deposition realizes self-regulation of the reaction, thereby suppressing defects such as pinholes and providing a uniform and dense adhesion layer 31. Furthermore, reactions occur between the adhesion layer 31 and multiple reactive sites on the surface of the substrate 12, thereby improving the adhesion of the adhesion layer 31 to the substrate 12.

[0108] Atomic layer deposition also has the advantage that the adhesion layer 31 can be formed at a lower temperature than other chemical vapor deposition methods such as plasma CVD. Atomic layer deposition also has the advantage that the adhesion layer 31 can be formed on the wall surface 16 of the through-hole 15 having a high aspect ratio than other chemical vapor deposition methods such as plasma CVD. For example, atomic layer deposition can form the adhesion layer 31 on the wall surface 16 of the through-hole 15 having an aspect ratio of 100 or more.

[0109] (Seed Layer Forming Step) Next, a through electrode forming step is performed to form the through electrode 20 in the through hole 15. First, as shown in Fig. 7, a seed layer forming step is performed to form a seed layer 24. The seed layer 24 is formed at least on the adhesion layer 31 located in the through hole 15. The seed layer 24 may be formed on the first surface 13.

[0110] The seed layer 24 is formed by a physical film formation method such as vapor deposition, sputtering, or ion plating. As shown in Fig. 7 , the seed layer 24 located in the through hole 15 is formed so as not to reach the second surface 14 in the thickness direction D3. In the example shown in Fig. 7 , the seed layer 24 is formed so that the fourth end 242 is located on the adhesion layer 31.

[0111] A dimension T21 of the seed layer 24 located in the through hole 15 in the thickness direction D3 is smaller than a dimension T11 of the adhesion layer 31. The numerical range of the dimension T21 may be the same as the numerical range of the thickness H1 described above. The numerical range of T21 / T0, which is the ratio of the dimension T21 to the thickness T0 of the substrate 12, may be the same as the numerical range of H1 / T0 described above.

[0112] An example of a method for adjusting the dimension T21 of the seed layer 24 will be described.

[0113] A case where the seed layer 24 is formed using a vapor deposition method will be described. In the vapor deposition method, the material that constitutes the seed layer 24 is sprayed toward the first surface 13. As a result, as shown in FIG. 7 , the seed layer 24 is formed, spreading along the wall surface 16 from the first surface 13 toward the second surface 14. The seed layer 24 is also formed on the first surface 13. By adjusting the time for performing the vapor deposition method, the spray angle, etc., it is possible to control the depth to which the seed layer 24 penetrates from the first surface 13 into the through hole 15, i.e., the dimension T21 of the seed layer 24.

[0114] Forming the seed layer 24 using sputtering or ion plating will be described. First, the seed layer 24 is formed on the first surface 13 side by sputtering or ion plating. As a result, the seed layer 24 is also formed inside the through hole 15, spreading along the wall surface 16 from the first surface 13 toward the second surface 14. The dimension of the seed layer 24 in the thickness direction D3 is larger than the desired dimension T21. Next, a resist layer is formed on the portion of the seed layer 24 located inside the through hole 15 and having the desired dimension T21. Next, an etching solution is supplied into the through hole 15 from the second surface 14 side. This removes the portion of the seed layer 24 not covered by the resist layer. In this manner, the seed layer 24 having the desired dimension T21 is formed inside the through hole 15.

[0115] The thickness T22 of the seed layer 24 is, for example, 5 nm or more, and may be 10 nm or more, 15 nm or more, or 20 nm or more. The thickness T22 of the seed layer 24 is, for example, 50 nm or less, 40 nm or less, or 30 nm or less. When the thickness T22 of the seed layer 24 is 5 nm or more, defects such as pinholes can be suppressed from occurring in the seed layer 24. When the thickness T22 of the seed layer 24 is 50 nm or less, the thickness of the first layer 21 can be suppressed from becoming non-uniform. This suppresses the generation of depressions 232. The thickness T12 of the seed layer 24 is defined at the center of the first layer 21 in the thickness direction D3.

[0116] (First Electrolytic Plating Step) Subsequently, a first electrolytic plating step is performed to form a first layer 21 by electrolytic plating. In the first electrolytic plating step, a first plating solution is supplied to the first surface 13. As shown in FIG. 8 , the first layer 21 that covers the seed layer 24 is formed by electrolytic plating. The seed layer 24 functions as a cathode. The first layer 21 is formed not only inside the through hole 15 but also on the first surface 13.

[0117] The first layer 21 includes an interface 23 located inside the through-hole 15. The interface 23 may include a depression 232 recessed toward the first surface 13.

[0118] As shown in FIG. 8 , the first layer 21 covers the fourth end 242 of the seed layer 24 in the thickness direction D3. The symbol ΔT21 represents the distance in the thickness direction D3 between the fourth end 242 of the seed layer 24 and the interface end 231 of the interface 23. The distance ΔT21 is, for example, 50 nm or less, and may be 40 nm or less, or 30 nm or less. Thus, the distance ΔT21 is smaller than the thickness T0 of the substrate 12. Based on the position of the interface end 231, the position of the fourth end 242 of the seed layer 24 can be estimated. The position of the interface 23 can be detected based on an image of the cross section of the through-hole 15.

[0119] The first electrolytic plating step is performed so that the through-holes 15 are filled with the first layer 21 on the first surface 13. The interface 23 extends across the through-holes 15.

[0120] The first plating solution may contain a conductive material such as Cu, Au, Ag, Pt, Rh, Ni, Cr, Nb, Pb, Ta, Sn, In, or Al. The concentration of the elements constituting the conductive material contained in the first layer 21 in the first plating solution is also referred to as a first concentration. The current supplied to the seed layer 24 in the first electrolytic plating step is also referred to as a first current.

[0121] The first plating solution may contain an accelerator that accelerates the precipitation reaction, or may contain an inhibitor that inhibits the precipitation reaction.

[0122] (Second Electrolytic Plating Step) Subsequently, a second electrolytic plating step is carried out to form the second layer 22 by electrolytic plating. In the second electrolytic plating step, a second plating solution is supplied to the second surface 14. FIGS. 9 to 11 are diagrams showing how the second layer 22 grows.

[0123] Between the first layer 21 and the second surface 14, no seed layer is provided on the adhesion layer 31 and the wall surface 16. In this case, the second layer 22 grows in the thickness direction D3 from the first layer 21 toward the second surface 14. Therefore, the occurrence of defects such as voids in the second layer 22 can be suppressed compared to when the second layer 22 grows in the planar direction from the wall surface 16 toward the center of the through hole 15. Figure 11 is a cross-sectional view showing a state in which the growth of the second layer 22 has progressed onto the second surface 14.

[0124] Like the first plating solution, the second plating solution may contain a conductive material such as Cu, Au, Ag, Pt, Rh, Ni, Cr, Nb, Pb, Ta, Sn, In, or Al. The concentration of the element constituting the conductive material contained in the second layer 22 in the second plating solution is also referred to as the second concentration. The current supplied to the seed layer 24 in the second electrolytic plating step is also referred to as the second current.

[0125] The second concentration may be lower than the first concentration, which can prevent defects such as voids from occurring in the second layer 22.

[0126] The second current may be lower than the first current, which can prevent defects such as voids from occurring in the second layer 22.

[0127] The second plating solution may contain an accelerator for accelerating the deposition reaction, and the concentration of the accelerator in the second plating solution may be lower than the concentration of the accelerator in the first plating solution.

[0128] The second plating solution may contain an inhibitor that inhibits a deposition reaction, and the concentration of the inhibitor in the second plating solution may be higher than the concentration of the inhibitor in the first plating solution.

[0129] (Removal Step) Subsequently, a removal step may be performed to remove unnecessary layers, resulting in a through hole electrode substrate 10 including an adhesion layer 31, a seed layer 24, a first layer 21, and a second layer 22 located inside the through hole 15, as shown in FIG.

[0130] 12 , a first removal step may be performed to remove the first layer 21 located on the first surface 13. The first removal step may involve removing the first layer 21 on the first surface 13 by chemical mechanical polishing. The first removal step may involve removing the seed layer 24 on the first surface 13. The first removal step may involve removing the adhesion layer 31 on the first surface 13. The first removal step may result in a first end surface 201 that is flush with the first surface 13.

[0131] 12 , a second removal step may be performed to remove the second layer 22 located on the second surface 14. The second removal step may be performed by chemical mechanical polishing to remove the second layer 22 on the second surface 14. The second removal step may result in a second end surface 202 that is flush with the second surface 14.

[0132] 13 is a diagram illustrating an example of the effect of the through electrode substrate 10. In FIG. 13, symbols F1, Fm, and F2 represent thermal stress occurring in the first portion P1, thermal stress occurring in the first intermediate portion Pm1, and thermal stress occurring in the second portion P2, respectively. The thermal stress Fm occurring in the first intermediate portion Pm1 is expected to be smaller than the thermal stress F1 occurring in the first portion P1. The thermal stress F2 occurring in the second portion P2 is expected to be smaller than the thermal stress Fm occurring in the first intermediate portion Pm1. Since the thermal stress occurring in the through electrode 20 is gradually reduced along the thickness direction D3, damage such as cracks is suppressed from occurring in the substrate 12 or the through electrode 20.

[0133] Fig. 14 is a diagram showing a through hole electrode substrate 10 according to a first comparative example. The through hole electrode substrate 10 shown in Fig. 14 differs from the through hole electrode substrate 10 shown in Fig. 13 in that the adhesive layer 31 is disposed over the entire wall surface 16.

[0134] 14, a relatively large thermal stress occurs throughout the second layer 22. Therefore, the thermal stress occurring in the first layer 21 may not be properly dispersed in the second layer 22. In contrast, in the through hole electrode substrate 10 shown in FIG. 13, the second portion P2 can properly disperse the thermal stress occurring in the first portion P1.

[0135] Fig. 15 is a diagram showing a through hole electrode substrate 10 according to a second comparative embodiment. The through hole electrode substrate 10 shown in Fig. 12 differs from the through hole electrode substrate 10 shown in Fig. 13 in that the seed layer 24 is disposed over the entire wall surface 16.

[0136] 15 , in the electrolytic plating process, the through electrode 20 grows in the plane direction from the wall surface 16 toward the center of the through hole 15 in the plane direction throughout the entire area of ​​the through hole 15. As a result, defects such as voids are likely to occur in the through electrode 20. In contrast, in the through electrode substrate 10 shown in FIG. 13 , the second layer 22 grows in the thickness direction D3 from the first layer 21 toward the second surface 14, so that the occurrence of defects such as voids in the second layer 22 can be suppressed.

[0137] 15, a relatively large thermal stress occurs in the through electrode 20 even in a position where the adhesion layer 31 is not arranged. As a result, the thermal stress occurring in the through electrode 20 at a position where the adhesion layer 31 is arranged may not be appropriately dispersed. In contrast, in the through electrode substrate 10 shown in FIG. 13, the second portion P2 can appropriately disperse the thermal stress occurring in the first portion P1.

[0138] Fig. 16 is a diagram showing a through hole electrode substrate 10 according to a third comparative example. The through hole electrode substrate 10 shown in Fig. 16 differs from the through hole electrode substrate 10 shown in Fig. 13 in that both the adhesion layer 31 and the seed layer 24 are covered by the first layer 21.

[0139] 16, a relatively small thermal stress occurs throughout the entire second layer 22. As a result, the thermal stress may change suddenly between the first layer 21 and the second layer 22. In contrast, in the through hole electrode substrate 10 shown in FIG. 13, the first intermediate portion Pm1 can suppress the sudden change in thermal stress.

[0140] Various modifications can be made to the above-described embodiment. Modifications will be described with reference to the drawings as necessary. In the following description and the drawings used in the following description, parts that can be configured similarly to the above-described embodiment will be designated by the same reference numerals as those used for the corresponding parts in the first embodiment, and duplicated explanations will be omitted. Furthermore, if it is clear that the effects obtained in the above-described embodiment can also be obtained in the modification, the explanations may be omitted.

[0141] (First Modification) Fig. 17 is a cross-sectional view showing a modification of through hole 15. A dimension R1 of through hole 15 on first surface 13 may be smaller than a dimension R2 of through hole 15 on second surface 14. The dimension of through hole 15 may increase from first surface 13 toward second surface 14. In the example shown in Fig. 17, the aspect ratio of through hole 15 is calculated by T0 / R1.

[0142] (Second Modification) Fig. 18 is a cross-sectional view showing a modification of through hole 15. A dimension R1 of through hole 15 on first surface 13 may be larger than a dimension R2 of through hole 15 on second surface 14. The dimension of through hole 15 may decrease from first surface 13 toward second surface 14. In the example shown in Fig. 18, the aspect ratio of through hole 15 is calculated by T0 / R2.

[0143] (Third Modification) FIG. 19 is a cross-sectional view showing a modification of the through hole 15. The through hole 15 may include a portion whose dimensions change depending on the position in the thickness direction D3. For example, the through hole 15 may include a portion whose dimensions decrease from the first surface 13 toward the center position of the substrate 12 in the thickness direction D3. The through hole 15 may also include a portion whose dimensions decrease from the second surface 14 toward the center position of the substrate 12 in the thickness direction D3. In this case, the dimension of the through hole 15 is smallest at the central portion 161 of the substrate 12 in the thickness direction D3. The "center position" refers to a position in the thickness direction D3 that is equidistant from the first surface 13 and the second surface 14. The distance from the first surface 13 to the center position in the thickness direction D3 is equal to the distance from the second surface 14 to the center position in the thickness direction D3. The "central portion" includes the central position of the substrate 12 in the thickness direction D3, as well as a range from the central position to 0.1 x T0 toward the first surface 13, and a range from the central position to 0.1 x T0 toward the second surface 14. The minimum value of the dimension of the through hole 15 is represented by the symbol R3. In the example shown in Figure 19, the aspect ratio of the through hole 15 is calculated by T0 / R3.

[0144] 20 is a cross-sectional view showing a fourth modified example of the through hole 15. The through hole 15 may include a portion whose dimension increases from the first surface 13 toward the center of the substrate 12 in the thickness direction D3. The through hole 15 may also include a portion whose dimension increases from the second surface 14 toward the center of the substrate 12 in the thickness direction D3. In this case, the dimension of the through hole 15 reaches a maximum value R4 at the center portion 161 of the substrate 12 in the thickness direction D3. The minimum dimension of the through hole 15 may be the dimension R1 of the through hole 15 at the first surface 13 or the dimension R2 of the through hole 15 at the second surface 14.

[0145] 21 is a cross-sectional view showing a modified example of the through electrode substrate 10. The through electrode substrate 10 may include a first conductive layer 41 connected to the first end surface 201 of the through electrode 20. The first conductive layer 41 may be located on the first surface 13. The first conductive layer 41 may form a wiring extending in one direction along the surface direction. The first conductive layer 41 may include a metal material such as Cu, Au, Ag, Pt, Rh, Ni, Cr, or Pd. The first conductive layer 41 may also include a compound of these metal materials.

[0146] The through electrode substrate 10 may include a second conductive layer 51 connected to the second end surface 202 of the through electrode 20. The second conductive layer 51 may be located on the second surface 14. The second conductive layer 51 may form wiring extending in one direction along the surface. The second conductive layer 51 may contain a metal material such as Cu, Au, Ag, Pt, Rh, Ni, Cr, or Pd. The second conductive layer 51 may also contain a compound of these metal materials.

[0147] 22 , the through hole electrode substrate 10 may include a first insulating layer 42 overlapping the first conductive layer 41 in the thickness direction D3. The first insulating layer 42 may include an opening 421 overlapping the first conductive layer 41. The laminated structure including the first conductive layer 41 and the first insulating layer 42 is also referred to as a first wiring layer 40. The first wiring layer 40 is located on the first surface 13.

[0148] 22 , the through hole electrode substrate 10 may include a second insulating layer 52 overlapping the second conductive layer 51 in the thickness direction D3. The second insulating layer 52 may include an opening 521 overlapping the second conductive layer 51. The laminated structure including the second conductive layer 51 and the second insulating layer 52 is also referred to as a second wiring layer 50. The second wiring layer 50 is located on the second surface 14.

[0149] 23 is a cross-sectional view showing a modified example of the through electrode substrate 10. The first insulating layer 42 may be located on the first surface 13. The first insulating layer 42 may include an opening 421 that overlaps with the through electrode 20.

[0150] The second insulating layer 52 may be located on the second surface 14. The second insulating layer 52 may include an opening 521 that overlaps the through electrode 20.

[0151] 24 , the first conductive layer 41 may be located on the first insulating layer 42. The first conductive layer 41 may include a portion located in an opening 421 of the first insulating layer 42. The portion of the first conductive layer 41 located in the opening 421 of the first insulating layer 42 may be connected to the first end surface 201 of the through electrode 20.

[0152] 24 , the second conductive layer 51 may be located on the second insulating layer 52. The second conductive layer 51 may include a portion located in an opening 521 of the second insulating layer 52. The portion of the second conductive layer 51 located in the opening 521 of the second insulating layer 52 may be connected to the second end surface 202 of the through electrode 20.

[0153] 25 is a cross-sectional view showing a modified example of the through hole electrode substrate 10. The first wiring layer 40 may include a plurality of first conductive layers 41 and first insulating layers 42 stacked in the thickness direction D3. The second wiring layer 50 may include a plurality of second conductive layers 51 and second insulating layers 52 stacked in the thickness direction D3.

[0154] (Eighth Modification) Fig. 26 is a cross-sectional view showing one modification of the through hole electrode substrate 10. The through hole electrode substrate 10 may include at least one semiconductor element 60. The through hole electrode substrate 10 may include a plurality of semiconductor elements 60. The semiconductor element 60 may be an LSI chip such as a logic IC or a memory IC. The semiconductor element 60 may be a MEMS (Micro Electro Mechanical Systems) chip. A MEMS chip is an electronic device in which mechanical components, sensors, actuators, electronic circuits, etc. are integrated on a single substrate.

[0155] 26 , the semiconductor element 60 may be disposed so as to face the second surface 14. Although not shown, the semiconductor element 60 may be disposed so as to face the first surface 13. The semiconductor element 60 may be covered with a mold resin 63.

[0156] The semiconductor element 60 includes a terminal 61. The terminal 61 may be electrically connected to the through electrode 20. For example, the terminal 61 may be electrically connected to the through electrode 20 via a bump 62 and a second conductive layer 51 of the second wiring layer 50.

[0157] 27 is a cross-sectional view showing a modified example of the through hole electrode substrate 10. The through hole electrode substrate 10 may include a plurality of bumps 72. The bumps 72 may be located on the opposite side to the semiconductor element 60 in the thickness direction D3. For example, when the semiconductor element 60 is located on the second wiring layer 50, the bumps 72 may be located on the first wiring layer 40. The bumps 72 may be connected to the first conductive layer 41 of the first wiring layer 40.

[0158] The plurality of bumps 72 may form a ball grid array. The through hole electrode substrate 10 including the plurality of bumps 72 may form a semiconductor package. The semiconductor package formed by the through hole electrode substrate 10 may be mounted on a motherboard 80 via the plurality of bumps 72.

[0159] 28 is a diagram showing an example of a product in which the through hole electrode substrate 10 according to the embodiment of the present disclosure can be mounted. The through hole electrode substrate 10 according to the embodiment of the present disclosure can be used in a variety of products. For example, it can be mounted in a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smartphone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, etc.

[0160] Although several modifications of the first embodiment have been described, it is of course possible to combine a plurality of modifications as appropriate and apply them to the first embodiment.

[0161] Second Embodiment A second embodiment of the present disclosure will be described with reference to Figures 29 to 33. Duplicate descriptions will be omitted for components of the second embodiment that can be configured similarly to the first embodiment. Where it is clear that the effects obtained in the first embodiment can also be obtained in the second embodiment, duplicate descriptions will be omitted.

[0162] 29 is a cross-sectional view showing an example of a through hole 15. As in the first embodiment, the adhesion layer 31 extends in the thickness direction D3 along the wall surface 16 toward the second surface 14 so as not to reach the second surface 14. As in the first embodiment, the seed layer 24 extends in the thickness direction D3 along the wall surface 16 toward the second surface 14 so as not to reach the second surface 14.

[0163] Unlike the first embodiment, the seed layer 24 of the through electrode 20 is located closer to the second surface 14 than the second end 312 of the adhesion layer 31. In other words, the fourth end 242 is located between the second surface 14 and the second end 312 in the thickness direction D3. The seed layer 24 covers the second end 312 of the adhesion layer 31.

[0164] The interface 23 between the first layer 21 and the second layer 22 is located between the second surface 14 and the second end 312 of the adhesive layer 31 in the thickness direction D3. The through electrode 20 is divided into a second intermediate portion Pm2, a first portion P1, and a second portion P2 in the thickness direction D3 based on the interface end 231 of the interface 23 and the second end 312 of the adhesive layer 31. Like the first intermediate portion Pm1, the second intermediate portion Pm2 is a portion of the through electrode 20 located between the interface end 231 of the interface 23 and the second end 312 of the adhesive layer 31 in the thickness direction D3. The first portion P1 is a portion of the through electrode 20 located between the first surface 13 and the second intermediate portion Pm2 in the thickness direction D3. In the example shown in FIG. 29 , the first portion P1 is located between the first surface 13 and the second end 312 of the adhesive layer 31. The second portion P2 is a portion of the through electrode 20 located between the second surface 14 and the second intermediate portion Pm2 in the thickness direction D3. In the example shown in FIG. 29 , the second portion P2 is located between the second surface 14 and the interface end 231 of the interface 23.

[0165] In the first portion P1, an adhesion layer 31 and a seed layer 24 are disposed between the through electrode 20 and the wall surface 16. In most of the second intermediate portion Pm2, the seed layer 24 is disposed between the through electrode 20 and the wall surface 16. In the second portion P2, neither the adhesion layer 31 nor the seed layer 24 is disposed between the through electrode 20 and the wall surface 16.

[0166] The adhesion of the through electrode 20 to the seed layer 24 is higher than the adhesion of the through electrode 20 to the wall surface 16. Therefore, the adhesion force between the wall surface 16 and the through electrode 20 in the second intermediate portion Pm2 is higher than the adhesion force between the wall surface 16 and the through electrode 20 in the second portion P2.

[0167] The adhesion of the adhesion layer 31 to the wall surface 16 is higher than the adhesion of the seed layer 24 to the wall surface 16. Therefore, the adhesion force between the wall surface 16 and the through electrode 20 in the first portion P1 is higher than the adhesion force A between the wall surface 16 and the through electrode 20 in the second intermediate portion Pm2.

[0168] The second intermediate portion Pm2 has a thickness Hm2. The thickness Hm2 is the distance between the interface end 231 of the interface 23 and the second end 312 of the adhesion layer 31 in the thickness direction D3. The first portion P1 has a thickness H1. In the example shown in FIG. 29 , the thickness H1 is the distance between the first surface 13 and the second end 312 of the adhesion layer 31 in the thickness direction D3. The second portion P2 has a thickness H2. In the example shown in FIG. 29 , the thickness H2 is the distance between the second surface 14 and the interface end 231 of the interface 23 in the thickness direction D3.

[0169] The thickness H1 of the first portion P1 is, for example, 2 μm or more, and may be 5 μm or more, 10 μm or more, 30 μm or more, 50 μm or more, or 100 μm or more. When the thickness H1 is a predetermined value or more, the adhesion between the through electrode 20 and the wall surface 16 can be appropriately increased. The thickness H1 is, for example, 250 μm or less, 200 μm or less, 150 μm or less, 130 μm or less, 100 μm or less, 50 μm or less, or 40 μm or less. When the thickness H1 is 250 μm or less, the adhesion of the through electrode 20 to the wall surface 16 can be prevented from becoming excessively high.

[0170] The thickness H1 of the first portion P1 may be determined relative to the thickness T0 of the substrate 12. The ratio of the thickness H1 to the thickness T0, H1 / T0, may be, for example, 0.005 or more, 0.010 or more, 0.025 or more, 0.050 or more, 0.075 or more, 0.10 or more, 0.15 or more, or 0.20 or more. H1 / T0 may be, for example, 0.50 or less, 0.40 or less, 0.30 or less, 0.25 or less, 0.20 or less, 0.15 or less, 0.10 or less, or 0.075 or less.

[0171] The thickness H2 of the second portion P2 is, for example, 50 μm or more, and may be 100 μm or more, 200 μm or more, or 300 μm or more. The thickness H2 being 50 μm or more allows the thermal stress of the through electrode 20 to be appropriately dispersed. The thickness H2 is, for example, 995 μm or less, may be 950 μm or less, 500 μm or less, 350 μm or less, 250 μm or less, or 200 μm or less.

[0172] The thickness H2 of the second portion P2 may be determined relative to the thickness T0 of the substrate 12. The ratio H2 / T0 of the thickness H2 to the thickness T0 may be, for example, 0.10 or more, 0.15 or more, 0.20 or more, 0.40 or more, 0.60 or more, or 0.75 or more. H2 / T0 may be, for example, 0.995 or less, 0.99 or less, 0.95 or less, 0.85 or less, 0.70 or less, 0.60 or less, 0.50 or less, 0.40 or less, or 0.30 or less.

[0173] The thickness Hm2 of the second intermediate portion Pm2 is, for example, 3 μm or more, and may be 5 μm or more, 10 μm or more, 20 μm or more, 50 μm or more, or 100 μm or more. Having the thickness Hm2 equal to or greater than a predetermined value can suppress a sudden change in thermal stress between the first portion P1 and the second portion P2. The thickness Hm2 is, for example, 250 μm or less, or may be 200 μm or less, 150 μm or less, 100 μm or less, 50 μm or less, or 40 μm or less.

[0174] The thickness Hm2 of the second intermediate portion Pm2 may be determined relative to the thickness T0 of the substrate 12. Hm2 / T0, which is the ratio of the thickness Hm2 to the thickness T0, is, for example, 0.003 or more, or may be 0.005 or more, or 0.010 or more, or 0.020 or more, or 0.050 or more, or 0.075 or more, or 0.10 or more, or 0.15 or more, or 0.20 or more. Hm2 / T0 is, for example, 0.50 or less, or 0.40 or less, or 0.30 or less.

[0175] The thickness H1 of the first portion P1, the thickness H2 of the second portion P2, and the thickness Hm2 of the second intermediate portion Pm2 may be set so as to ensure a balance between the three layers. For example, the difference between the maximum and minimum values ​​of H1 / T0, H2 / T0, and Hm2 / T0 may be 0.40 or less, 0.30 or less, or 0.20 or less.

[0176] 29 , the symbol H4 represents the distance in the thickness direction D3 between the first surface 13 and the end of the second intermediate portion Pm2 on the second surface 14 side in the thickness direction D3. In the example shown in FIG. 29 , the distance H4 is the distance in the thickness direction D3 between the first surface 13 and the interface edge 231 of the interface 23. H4 / T0, which is the ratio of the distance H4 to the thickness T0 of the substrate 12, is, for example, 0.005 or more, and may be 0.01 or more, 0.02 or more, 0.05 or more, 0.10 or more, 0.15 or more, 0.30 or more, 0.50 or more, 0.70 or more, 0.75 or more, or 0.80 or more. H4 / T0 is, for example, 0.95 or less, may be 0.92 or less, may be 0.90 or less, may be 0.80 or less, may be 0.60 or less, may be 0.40 or less, may be 0.25 or less, or may be 0.15 or less.

[0177] The ratio H2 / T0 of the thickness H2 to the thickness T0 may be greater than the ratio H4 / T0 of the distance H4 to the thickness T0. In other words, the second portion P2 may occupy more than half of the space of the through hole 15 in the thickness direction D3. Thermal stress caused by the difference between the thermal expansion coefficient of the through electrode 20 and the thermal expansion coefficient of the substrate 12 is less likely to occur in the second portion P2 than in the first portion P1 and the second intermediate portion Pm2. By setting the thickness H1 of the first portion P1 to a predetermined value or more and increasing the occupancy rate of the second portion P2 in the through hole 15, the second portion P2 can more reliably absorb the thermal stress generated in the first portion P1.

[0178] The value obtained by subtracting H4 from H2 is represented by ΔH24. ΔH24 / T0, which is the ratio of the difference ΔH23 to the thickness T0, is, for example, 0.10 or more, or may be 0.20 or more, or 0.25 or more, or 0.30 or more, or 0.50 or more. ΔH24 / T0 is, for example, 0.99 or less, or may be 0.98 or less, or 0.95 or less, or 0.90 or less, or 0.80 or less, or 0.75 or less, or 0.70 or less.

[0179] (Method for Manufacturing the Through Hole Electrode Substrate) An example of a method for manufacturing the through hole electrode substrate 10 will be described with reference to FIGS.

[0180] As in the first embodiment, a substrate 12 having a through hole 15 is prepared. Subsequently, as shown in FIG. 30 , an adhesion layer forming step is performed to form an adhesion layer 31. A dimension T11 of the adhesion layer 31 located at the through hole 15 in the thickness direction D3 is smaller than the thickness T0 of the substrate 12. The numerical range of the dimension T11 may be the same as the numerical range of H1 described above. The numerical range of T11 / T0, which is the ratio of the dimension T11 to the thickness T0 of the substrate 12, may be the same as the numerical range of H1 / T0 described above.

[0181] 31 , a seed layer formation step is performed to form a seed layer 24. The seed layer 24 is formed on the adhesion layer 31 and on the wall surface 16 so as to cover the second end 312 of the adhesion layer 31. A dimension T21 of the seed layer 24 located at the through hole 15 in the thickness direction D3 is larger than a dimension T11 of the adhesion layer 31. The numerical range of T21 / T0, which is the ratio of the dimension T21 to the thickness T0 of the substrate 12, may be the same as the numerical range of H4 / T0 described above.

[0182] 32, a first electrolytic plating step is carried out to form the first layer 21 by electrolytic plating. The first layer 21 covering the seed layer 24 is formed by electrolytic plating.

[0183] Subsequently, the second electrolytic plating step and the removal step are carried out in the same manner as in the first embodiment, resulting in a through hole electrode substrate 10 including the adhesion layer 31, the seed layer 24, the first layer 21, and the second layer 22 located inside the through hole 15.

[0184] FIG. 33 is a diagram illustrating an example of the effect of the through-hole electrode substrate 10. In FIG. 33, symbols F1, Fm, and F2 represent thermal stress occurring in the first portion P1, thermal stress occurring in the second intermediate portion Pm2, and thermal stress occurring in the second portion P2, respectively. The thermal stress Fm occurring in the second intermediate portion Pm2 is expected to be smaller than the thermal stress F1 occurring in the first portion P1. The thermal stress F2 occurring in the second portion P2 is expected to be smaller than the thermal stress Fm occurring in the second intermediate portion Pm2. Since the thermal stress occurring in the through-hole electrode 20 is gradually reduced along the thickness direction D3, damage such as cracks is suppressed from occurring in the substrate 12 or the through-hole electrode 20.

[0185] The above-described first to tenth modified examples of the first embodiment may be applied to the second embodiment. A plurality of modified examples may be appropriately combined and applied to the second embodiment.

[0186] Next, the embodiments of the present disclosure will be described more specifically with reference to examples. However, the embodiments of the present disclosure are not limited to the description of the following examples as long as they do not depart from the gist of the present disclosure.

[0187] Example A1 A glass substrate having a thickness T0 of 400 μm was prepared as the substrate 12. Subsequently, the through-hole 15 shown in FIG. 2A was formed in the substrate 12. The dimension of the through-hole 15 in the first direction D1 was 70 μm.

[0188] Next, the adhesion layer 31 and the through electrode 20 shown in the first embodiment described above were formed in the through hole 15. As a result, the through electrode substrate 10 was obtained. The through electrode 20 includes a first portion P1, a second portion P2, and a first intermediate portion Pm1. The interface 23 between the first layer 21 and the second layer 22 is located between the first surface 13 and the second end 312 of the adhesion layer 31 in the thickness direction D3.

[0189] The thickness H1 of the first portion P1 was 5 μm. The thickness Hm1 of the first intermediate portion Pm1 was 45 μm. The distance H3 in the thickness direction D3 between the first surface 13 and the second end 312 of the adhesive layer 31 was 50 μm. The thickness H2 of the second portion P2 was 350 μm.

[0190] The reliability of the through electrode substrate 10 was evaluated.

[0191] In the reliability evaluation, the appearance of the through electrode substrate 10 is observed after 1000 thermal cycles are applied to the through electrode substrate 10. Specifically, it is confirmed whether defects such as cracks or gaps have occurred in the appearance of the through electrodes 20 of the through electrode substrate 10. If defects such as cracks or gaps have occurred, the through electrode substrate 10 to be evaluated is judged as "No Good". If defects such as cracks or gaps have not occurred, the through electrode substrate 10 is subjected to another 1000 thermal cycles, and then the appearance of the through electrode substrate 10 is observed. If defects such as cracks or gaps have occurred after a total of 2000 thermal cycles, the through electrode substrate 10 to be evaluated is judged as "Good". If defects such as cracks or gaps have not occurred after a total of 2000 thermal cycles, the through electrode substrate 10 to be evaluated is judged as "Excellent".

[0192] One thermal cycle includes a temperature increase step, a high-temperature holding step, a temperature decrease step, and a low-temperature holding step. The temperature increase step is a step of changing the ambient environment of the through-hole electrode substrate 10 from -55°C to +125°C over 30 minutes. The high-temperature holding step is a step of holding the ambient environment of the through-hole electrode substrate 10 at +125°C for 30 minutes. The temperature increase step is a step of changing the ambient environment of the through-hole electrode substrate 10 from +125°C to -55°C over 30 minutes. The low-temperature holding step is a step of holding the ambient environment of the through-hole electrode substrate 10 at -55°C for 30 minutes.

[0193] In the through hole electrode substrate 10 of Example A1, no defects occurred after 1000 heat cycles, but defects occurred after 2000 heat cycles. The through hole electrode substrate 10 of Example A1 is judged to be "Good."

[0194] (Examples A2 to A10) At least one of the thickness H1 of the first portion P1, the thickness Hm1 of the first intermediate portion Pm1, the thickness H2 of the second portion P2, and the thickness T0 of the substrate 12 was changed from the value in Example A1 to fabricate a through hole electrode substrate 10. Subsequently, the reliability of the through hole electrode substrate 10 was evaluated in the same manner as in Example A1. The results are shown in FIG.

[0195] (Comparative Example A1) The through electrode 20 was formed in the through hole 15 without providing the adhesion layer 31 in the through hole 15. In Comparative Example A1, the dimension of the seed layer 24 in the thickness direction D3 was measured as a distance H3. Subsequently, similar to the case of Example A1, the reliability of the through electrode substrate 10 was evaluated.

[0196] In the through electrode substrate 10 of Comparative Example A1, after 1000 heat cycles, a gap was generated between the wall surface 16 of the through hole 15 and the through electrode 20. The through electrode substrate 10 of Comparative Example A1 is judged as "No Good."

[0197] 34, defects such as cracks and gaps could be suppressed by the through electrode 20 including the first portion P1, the second portion P2, and the first intermediate portion Pm1. In particular, as shown in Examples A2 to A4 and A7 to A9, when the thickness H1 of the first portion P1 was 10 μm or more and H2 / T0 was larger than H3 / T0, the through electrode substrate 10 could withstand 2000 thermal cycles.

[0198] Example B1 A glass substrate having a thickness T0 of 400 μm was prepared as the substrate 12. Subsequently, a through hole 15 shown in Fig. 29 was formed in the substrate 12. The dimension of the through hole 15 in the first direction D1 was 70 μm.

[0199] Next, the adhesion layer 31 and the through electrode 20 shown in the second embodiment described above were formed in the through hole 15. As a result, the through electrode substrate 10 was obtained. The through electrode 20 includes a first portion P1, a second portion P2, and a second intermediate portion Pm2. The interface 23 between the first layer 21 and the second layer 22 is located between the second surface 14 and the second end 312 of the adhesion layer 31 in the thickness direction D3.

[0200] The thickness H1 of the first portion P1 was 2 μm. The thickness Hm2 of the second intermediate portion Pm2 was 3 μm. The distance H4 in the thickness direction D3 between the first surface 13 and the interface edge 231 of the interface 23 was 5 μm. The thickness H2 of the second portion P2 was 395 μm.

[0201] Subsequently, the reliability of the through hole electrode substrate 10 was evaluated in the same manner as in Example A1. In the through hole electrode substrate 10 of Example B1, no defects occurred after 1000 thermal cycles, but defects occurred after 2000 thermal cycles. The through hole electrode substrate 10 of Example B1 was judged to be "Good."

[0202] (Examples B2 to B10) At least one of the thickness H1 of the first portion P1, the thickness Hm2 of the second intermediate portion Pm2, the thickness H2 of the second portion P2, and the thickness T0 of the substrate 12 was changed from the value in Example B1 to fabricate a through hole electrode substrate 10. Subsequently, the reliability of the through hole electrode substrate 10 was evaluated in the same manner as in Example A1. The results are shown in FIG.

[0203] Comparative Example B1 The through electrode 20 was formed in the through hole 15 without providing the adhesive layer 31 in the through hole 15. Subsequently, the reliability of the through electrode substrate 10 was evaluated in the same manner as in Example A1.

[0204] In the through electrode substrate 10 of Comparative Example B1, after 1000 heat cycles, a gap was generated between the wall surface 16 of the through hole 15 and the through electrode 20. The through electrode substrate 10 of Comparative Example B1 was judged to be "No Good."

[0205] 35, defects such as cracks and gaps could be suppressed by the through electrode 20 including the first portion P1, the second portion P2, and the second intermediate portion Pm2. In particular, as shown in Examples B2 to B4 and B7 to B9, when the thickness H1 of the first portion P1 was 5 μm or more and H2 / T0 was larger than H4 / T0, the through electrode substrate 10 could withstand 2000 thermal cycles.

[0206] (Example B11) As in the case of Example B1, after a through hole 15 was formed in a substrate 12, an adhesion layer 31 and a seed layer 24 shown in the second embodiment were formed in the through hole 15. Subsequently, the adhesion layer 31 and the seed layer 24 in the through hole 15 were observed using an electron microscope. Figure 36 is a cross-sectional view showing the observation position.

[0207] 37 is an image showing the results of observing the adhesion layer 31 and the seed layer 24 in the vicinity of the first surface 13. The observation conditions are as follows: Observation device: H-9500 transmission electron microscope Magnification: 100,000 times Acceleration voltage: 200 kV

[0208] 37 , in the vicinity of the first surface 13, an adhesion layer 31 was formed on the wall surface 16, and a seed layer 24 was formed on the adhesion layer 31. The adhesion layer 31 extended continuously at least up to a distance Y1 (see FIG. 36 ) from the first surface 13 in the thickness direction D3. The distance Y1 was 15.4 μm.

[0209] Figure 38 is an image showing the results of observing the through-hole 15 in the thickness direction D3, with the center at a position a distance Y2 (see Figure 36) from the first surface 13. The distance Y2 is 26.2 µm. The observation conditions are as follows: Observation device: JSM-7800F Schottky field emission scanning electron microscope Magnification: 5000x Acceleration voltage: 5 kV

[0210] Figure 39 is an image showing the results of observing the through-hole 15 in the square region marked "PhotoA-6" in Figure 38. The observation conditions were as follows: Observation device: JSM-7800F Schottky field emission scanning electron microscope Magnification: 20,000 times Acceleration voltage: 5 kV

[0211] 39, at a position 26.2 μm away from the first surface 13 in the thickness direction D3, the seed layer 24 was formed on the wall surface 16. No adhesion layer 31 was observed.

[0212] Figure 40 is an image showing the results of observing the through-hole 15 in the thickness direction D3, with the center at a position a distance Y3 (see Figure 36) from the first surface 13. The distance Y3 is 155 µm. The observation conditions are as follows: Observation device: JSM-7800F Schottky field emission scanning electron microscope Magnification: 5000x Acceleration voltage: 5 kV

[0213] As shown in FIG. 40, the adhesion layer 31 and the seed layer 24 were not observed at a position 155 μm away from the first surface 13 in the thickness direction D3.

[0214] (Example B12) As in Example B1, a through hole 15 was formed in the substrate 12, and then an adhesion layer 31 and a through electrode 20 as shown in the second embodiment were formed in the through hole 15. Subsequently, the through electrode 20 was observed using an electron microscope. The observation conditions were as follows: Observation device: JSM-7800F Schottky field emission scanning electron microscope Measurement area: 90 μm × 500 μm Measurement step: 0.6 μm Sample tilt: 70° Acceleration voltage: 20 kV

[0215] Fig. 41 is an image showing an inverse pole figure orientation map created based on the observation results. Fig. 42 is a diagram in which a line and a symbol indicating the interface 23 between the first layer 21 and the second layer 22 are added to the image of Fig. 41.

[0216] REFERENCE SIGNS LIST 10 through electrode substrate 12 substrate 13 first surface 14 second surface 15 through hole 16 wall surface 20 through electrode 201 first end surface 202 second end surface 21 first layer 22 second layer 23 interface 231 interface edge 232 recess 24 seed layer 241 third end 242 fourth end 31 adhesion layer 311 first end 312 second end 40 first wiring layer 41 first conductive layer 42 first insulating layer 50 second wiring layer 51 second conductive layer 52 second insulating layer 60 semiconductor element 61 terminal 62 bump 72 bump 80 motherboard P1 first portion P2 second portion Pm1 first intermediate portion Pm2 second intermediate portion

Claims

1. A through electrode substrate comprising: a substrate including a first surface and a second surface located opposite to the first surface, the substrate being provided with a through hole including a wall surface extending from the first surface to the second surface; a through electrode including a first end surface located on the first surface and a second end surface located on the second surface, the through hole being filled with the through hole; and an adhesion layer located between the through electrode and the wall surface of the through hole, the through electrode including a first layer including the first end surface and a second layer including the second end surface and in contact with the first layer at an interface, the adhesion layer extending along the wall surface toward the second surface so as not to reach the second surface, the adhesion layer including a second end at which the extension toward the second surface terminates, and the interface being located in a thickness direction of the substrate between the first surface and the second end of the adhesion layer, or between the second surface and the second end of the adhesion layer.

2. The through hole electrode substrate according to claim 1, wherein the interface is located between the second surface and the second end of the adhesion layer in the thickness direction.

3. The through electrode substrate according to claim 2, wherein the distance between the first surface and the second end of the adhesion layer in the thickness direction is 2 μm or more and 250 μm or less.

4. The through electrode substrate according to claim 2, wherein a ratio of a distance between the first surface and the interface in the thickness direction to a thickness of the substrate is 0.002 or more and 0.500 or less.

5. The through electrode substrate according to claim 2, wherein the ratio of the distance between the first surface and the interface in the thickness direction to the thickness of the substrate is 0.05 or more and 0.95 or less.

6. The through electrode substrate according to claim 2, wherein the distance between the first surface and the second end of the adhesion layer in the thickness direction is 5 μm or more, and the ratio of the distance between the second surface and the interface in the thickness direction to the thickness of the substrate is greater than the ratio of the distance between the first surface and the interface in the thickness direction to the thickness of the substrate.

7. The through hole electrode substrate according to claim 1, wherein the interface is located between the first surface and the second end of the adhesion layer in the thickness direction.

8. The through hole electrode substrate according to claim 7, wherein the distance between the first surface and the interface in the thickness direction is 5 μm or more and 250 μm or less.

9. The through hole electrode substrate according to claim 7, wherein a ratio of a distance between the first surface and the interface in the thickness direction to a thickness of the substrate is not less than 0.010 and not more than 0.

500.

10. The through electrode substrate according to claim 7, wherein the ratio of the distance between the first surface and the second end of the adhesion layer in the thickness direction to the thickness of the substrate is 0.05 or more and 0.95 or less.

11. A through electrode substrate as described in claim 7, wherein the distance between the first surface and the interface in the thickness direction is 10 μm or more, and the ratio of the distance between the second surface and the second end of the adhesion layer in the thickness direction to the thickness of the substrate is greater than the ratio of the distance between the first surface and the second end of the adhesion layer in the thickness direction to the thickness of the substrate.

12. The through hole electrode substrate according to any one of claims 1 to 11, wherein the adhesion layer contains titanium, a titanium compound, chromium, or a chromium compound.

13. The through electrode substrate of claim 12, wherein the through electrode comprises copper.

14. The through hole electrode substrate according to any one of claims 1 to 11, wherein the substrate comprises glass and has a thickness of 300 μm or more and 1200 μm or less.

15. A through electrode substrate according to any one of claims 1 to 11, comprising at least one of a first wiring layer located on the first surface or a second wiring layer located on the second surface, the first wiring layer including a first conductive layer and a first insulating layer, and the second wiring layer including a second conductive layer and a second insulating layer.

16. The through electrode substrate of claim 15, comprising a semiconductor element including a terminal electrically connected to said through electrode.

17. A through electrode substrate according to any one of claims 1 to 11, wherein the through electrode includes a seed layer located on the adhesion layer, and the distance in the thickness direction between the interface and an end of the seed layer is 50 nm or less.

18. A method for manufacturing a through electrode substrate, comprising the steps of: preparing a substrate including a first surface and a second surface located opposite to the first surface, and having a through hole including a wall surface extending from the first surface to the second surface; forming an adhesion layer on the wall surface; and forming a through electrode in the through hole, wherein the adhesion layer extends along the wall surface toward the second surface so as not to reach the second surface, and the adhesion layer includes a second end at which its extension toward the second surface terminates, and the through electrode forming step comprises the steps of: forming a seed layer including at least a portion located on the adhesion layer; a first electrolytic plating step of forming a first layer covering the seed layer by electrolytic plating; and a second electrolytic plating step of forming a second layer in contact with the first layer at an interface, wherein the interface is located in the thickness direction of the substrate between the first surface and the second end of the adhesion layer, or between the second surface and the second end of the adhesion layer.

19. A method for manufacturing a through electrode substrate as described in claim 18, wherein the seed layer is located on the adhesion layer and on the wall surface so as to cover the second end of the adhesion layer, and the interface is located between the second surface and the second end of the adhesion layer in the thickness direction.

20. A method for manufacturing a through-hole electrode substrate as described in claim 18, wherein the seed layer is located only on the adhesion layer, and the interface is located between the first surface and the second end of the adhesion layer in the thickness direction.

21. The method for manufacturing a through hole electrode substrate according to any one of claims 18 to 20, wherein the adhesion layer is formed by chemical vapor deposition.

22. The method for manufacturing a through hole electrode substrate according to claim 21, wherein the adhesion layer is formed by atomic layer deposition.

23. The method for manufacturing a through hole electrode substrate according to any one of claims 18 to 20, wherein the seed layer is formed by a physical film formation method.

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