Voltage-controlled oscillator circuit for NB-iot chip

Abstract

The present application provides a voltage-controlled oscillator circuit for an NB-IoT chip, for use in solving the technical problem of excessive phase noise. The voltage-controlled oscillator circuit comprises a positive feedback circuit, a resonance circuit, and a feedback loop. A first circuit connection node and a second circuit connection node are present between the positive feedback circuit and the resonance circuit. A third circuit connection node, a fourth circuit connection node, and a fifth circuit connection node are present between the positive feedback circuit and the feedback loop. The first circuit connection node is a first output end. The second circuit connection node is a second output end. The third circuit connection node is a first output end of the feedback loop. The fourth circuit connection node is a second output end of the feedback loop. The fifth circuit connection node is a third output end. The current of the positive feedback circuit is regulated and controlled through the feedback loop, so that the ratio of the output voltage to the frequency is ensured to be constant, and the voltage-controlled oscillator is insensitive to external interference so as to reduce phase noise.

Description

A voltage-controlled oscillator circuit for NB-IOT chips Technical Field

[0001] The present application relates to the technical field of integrated circuit design, and in particular to a voltage-controlled oscillator circuit applied to an NB-IOT chip. Background Art

[0002] With the growing demand for the Internet of Things (IoT), NB-IoT (Narrowband IoT) technology has become a key component of the Internet of Everything (IoE). Built on cellular networks, NB-IoT can be directly deployed on GSM, UMTS, or LTE networks, reducing deployment costs and enabling smooth upgrades. Many companies predict that the number of global IoT connections will reach hundreds of billions in the future. Numerous connections between things are already being made, mostly via short-range communication technologies such as Bluetooth, Wi-Fi, and Zigbee. However, the application scope of NB-IoT overlaps significantly with these short-range communication technologies. NB-IoT chips, like other communication chips, contain both a radio frequency module and a baseband module. The radio frequency module consists of a receiver, a transmitter, and a phase-locked loop (PLL). The PLL consists of a phase frequency detector (PFD), a loop filter, and a voltage-controlled oscillator (VCO) in the forward path, and a frequency divider in the frequency and phase feedback path.

[0003] The existing voltage-controlled oscillator circuit uses resistors and capacitors to filter out noise interference caused by the mirror current.

[0004] In implementing the prior art, the inventors found that:

[0005] Increasing the resistance and capacitance values ​​requires sacrificing chip area and does not improve the current noise generated by the MOS field-effect transistor.

[0006] Therefore, it is necessary to provide a voltage-controlled oscillator circuit applied to NB-IOT chips to solve the technical problem of excessive phase noise. Summary of the Invention

[0007] The embodiment of the present application needs to provide a voltage-controlled oscillator circuit applied to the NB-IOT chip to solve the technical problem of excessive phase noise.

[0008] Specifically, a voltage-controlled oscillator circuit applied to an NB-IOT chip includes:

[0009] Positive feedback circuit;

[0010] A resonant circuit connected to the positive feedback circuit is used to control the resonant frequency of the voltage controlled oscillator;

[0011] A feedback loop connected to the positive feedback circuit is used to control the positive feedback circuit to reduce the phase noise of the voltage controlled oscillator;

[0012] There are a first circuit connection node and a second circuit connection node between the positive feedback circuit and the resonant circuit;

[0013] There are a third circuit connection node, a fourth circuit connection node, and a fifth circuit connection node between the positive feedback circuit and the feedback loop;

[0014] Wherein, the first circuit connection node is the first output terminal of the voltage-controlled oscillator circuit; the second circuit connection node is the second output terminal of the voltage-controlled oscillator circuit;

[0015] The third circuit connection node is the first output end of the feedback loop; the fourth circuit connection node is the second output end of the feedback loop; and the fifth circuit connection node is the third output end of the feedback loop.

[0016] Furthermore, the positive feedback circuit includes a variable resistor R1, a MOS field effect transistor PM1, a MOS field effect transistor PM2, a first capacitor, and a second capacitor;

[0017] One end of the variable resistor R1 is connected to the first power supply, and the other end is connected to the fifth circuit connection node;

[0018] The MOS field effect transistor PM1 has a source connected to the fifth circuit connection node, a gate connected to one end of the second capacitor, and a drain connected to the first circuit connection node; the other end of the second capacitor is connected to the second circuit connection node;

[0019] The source of the MOS field effect transistor PM2 is connected to the fifth circuit connection node, the gate is connected to one end of the first capacitor, and the drain is connected to the second circuit connection node; the other end of the first capacitor is connected to the first circuit connection node.

[0020] Furthermore, the feedback loop includes: a MOS field effect transistor PM3, a MOS field effect transistor PM4, and a circuit mirror circuit;

[0021] The MOS field effect transistor PM3 has a source connected to the second power supply, a gate connected to the fifth circuit connection node, and a drain connected to the circuit mirror circuit;

[0022] The MOS field effect transistor PM4 has a source connected to the second power supply, a gate connected to the fifth circuit connection node, and a drain connected to the circuit mirror circuit.

[0023] Furthermore, the circuit mirror circuit includes: a MOS field effect transistor NM1, a MOS field effect transistor NM2, and a MOS field effect transistor NM3;

[0024] The drain of the MOS field effect transistor PM3 is connected to the drain of the MOS field effect transistor NM1;

[0025] The drain of the MOS field effect transistor PM4 is connected to the drain of the MOS field effect transistor NM2;

[0026] The sources of the MOS field effect transistor NM1 and the MOS field effect transistor NM2 are grounded, and the gates are connected to the gate and drain of the MOS field effect transistor NM3 respectively;

[0027] The source of the MOS field effect transistor NM3 is grounded, and the drain is also connected to a third power supply;

[0028] The MOS field effect transistor NM3 outputs a mirror current to the MOS field effect transistor NM1 and the MOS field effect transistor NM2.

[0029] Furthermore, the voltage-controlled oscillator circuit further includes a first resistor and a second resistor;

[0030] One end of the first resistor is connected to the third circuit connection node, and the other end is connected to the drain of the MOS field effect transistor PM3; one end of the second resistor is connected to the fourth circuit connection node, and the other end is connected to the drain of the MOS field effect transistor PM4.

[0031] Furthermore, the resonant circuit includes a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an inductor L1, a third resistor, and a fourth resistor;

[0032] One end of the third capacitor is connected to the first circuit connection node, and the other end is connected to one end of the fifth capacitor and one end of the third resistor respectively; the other end of the fifth capacitor is connected to the output voltage terminal of the loop filter; the other end of the third resistor is grounded;

[0033] One end of the fourth capacitor is connected to the second circuit connection node, and the other end is respectively connected to one end of the sixth capacitor and one end of the fourth resistor; the other end of the sixth capacitor is connected to the output voltage terminal of the loop filter; the other end of the fourth resistor is grounded;

[0034] The inductor L1 and the seventh capacitor each have one end connected to the first circuit connection node and the other end connected to the second circuit connection node;

[0035] Wherein, the output voltage end of the loop filter is the input end of the voltage-controlled oscillator circuit.

[0036] Furthermore, the third capacitor and the fourth capacitor are low-sensitivity capacitors.

[0037] Furthermore, the MOS field effect transistor PM1 , the MOS field effect transistor PM2 , the MOS field effect transistor PM3 , and the MOS field effect transistor PM4 operate in a saturation region.

[0038] Furthermore, the MOS field effect transistor NM1 , the MOS field effect transistor NM2 , and the MOS field effect transistor NM3 operate in a saturation region.

[0039] Furthermore, the voltage-controlled oscillator circuit is applied to a phase-locked loop.

[0040] The technical solutions provided in the embodiments of the present application have at least the following beneficial effects:

[0041] Through the feedback loop, the current of the positive feedback circuit is regulated to ensure a constant ratio of output voltage to frequency, making the voltage-controlled oscillator insensitive to external interference and reducing phase noise. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0043] FIG1 is a circuit diagram of a voltage-controlled oscillator applied to an NB-IOT chip according to an embodiment of the present application;

[0044] FIG2 is a flow chart of feedback when the VF voltage increases according to an embodiment of the present application;

[0045] FIG3 is a flow chart of feedback when the VF voltage decreases according to an embodiment of the present application;

[0046] FIG4 is a circuit diagram of a conventional voltage-controlled oscillator provided in an embodiment of the present application;

[0047] FIG5 is a diagram of a phase-locked loop structure provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] To make the purpose, technical solutions, and advantages of this application more clear, the technical solutions of this application will be clearly and completely described below in conjunction with the specific embodiments of this application and the corresponding drawings. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0049] It is understood that a voltage-controlled oscillator (VCO) refers to a device whose output frequency is controlled by an input voltage and changes with changes in the input voltage. The VCO is a critical component of radio frequency circuits and is widely used in communication system circuits. The VCO circuit provided in this application is applied to an NB-IOT chip. The NB-IOT chip can be understood as a communication chip, comprising a radio frequency module and a baseband module. The radio frequency module is divided into a receiver, a transmitter, and a phase-locked loop (PLL). Specifically, the VCO circuit is applied to a PLL. The PLL is a key module in the NB-IOT chip, generating a precise high-frequency clock signal, or local oscillator (LO), for the receiver and transmitter. In the receiver, the received high-frequency useful signal is mixed with the LO signal to generate a low-frequency signal, which is then transmitted to the baseband module for subsequent processing. In the transmitter, the baseband signal is mixed with the LO signal, up-converted to a high frequency, and transmitted via the antenna. Since heat and other noise sources within the oscillator circuit cause phase noise, timing jitter appears in the phase-locked loop time domain, which manifests as time interval errors.

[0050] Referring to FIG1 , in order to reduce phase noise, the present application provides a voltage-controlled oscillator circuit for an NB-IOT chip, comprising:

[0051] Positive feedback circuit;

[0052] A resonant circuit connected to the positive feedback circuit is used to control the resonant frequency of the voltage controlled oscillator;

[0053] A feedback loop connected to the positive feedback circuit is used to control the positive feedback circuit to reduce the phase noise of the voltage controlled oscillator;

[0054] There are a first circuit connection node and a second circuit connection node between the positive feedback circuit and the resonant circuit;

[0055] There are a third circuit connection node, a fourth circuit connection node, and a fifth circuit connection node between the positive feedback circuit and the feedback loop;

[0056] Wherein, the first circuit connection node is the first output terminal of the voltage-controlled oscillator circuit; the second circuit connection node is the second output terminal of the voltage-controlled oscillator circuit;

[0057] The third circuit connection node is the first output end of the feedback loop; the fourth circuit connection node is the second output end of the feedback loop; and the fifth circuit connection node is the third output end of the feedback loop.

[0058] In the present application, the input terminal of the voltage-controlled oscillator circuit applied to the NB-IOT chip is Vc. The first output terminal is OUTP; and the second output terminal is OUTN.

[0059] Furthermore, in a preferred embodiment provided in the present application, the positive feedback circuit includes a variable resistor R1, a MOS field effect transistor PM1, a MOS field effect transistor PM2, a first capacitor, and a second capacitor;

[0060] One end of the variable resistor R1 is connected to the first power supply, and the other end is connected to the fifth circuit connection node;

[0061] The MOS field effect transistor PM1 has a source connected to the fifth circuit connection node, a gate connected to one end of the second capacitor, and a drain connected to the first circuit connection node; the other end of the second capacitor is connected to the second circuit connection node;

[0062] The source of the MOS field effect transistor PM2 is connected to the fifth circuit connection node, the gate is connected to one end of the first capacitor, and the drain is connected to the second circuit connection node; the other end of the first capacitor is connected to the first circuit connection node.

[0063] In this application, the positive feedback circuit and the resonant circuit constitute the main circuit. The main circuit and the feedback loop form a voltage-controlled oscillator circuit. The first capacitor is C1, and the second capacitor is C2. The first capacitor C1 and the second capacitor C2 can be acceleration capacitors used to accelerate the flipping speed of the op amp.

[0064] It is understandable that the mobility of a PMOS transistor is lower than that of an NMOS transistor, so a PMOS transistor of the same size has lower flicker noise than an NMOS transistor. Therefore, the MOS field effect transistor of the positive feedback circuit is a PMOS transistor.

[0065] Furthermore, to reduce low-frequency phase noise caused by 1 / f noise, the voltage-controlled oscillator circuit does not employ a tail current source structure, which exhibits high low-frequency phase noise. Instead, the current bias is controlled by variable resistor R1. This is because resistors, which have no 1 / f noise, exhibit lower low-frequency phase noise than MOS field-effect transistor current sources.

[0066] The resistance of the variable resistor R1 determines the current of the voltage-controlled oscillator.

[0067] Furthermore, in a preferred embodiment provided in the present application, the feedback loop includes: a MOS field effect transistor PM3, a MOS field effect transistor PM4, and a circuit mirror circuit;

[0068] The MOS field effect transistor PM3 has a source connected to the second power supply, a gate connected to the fifth circuit connection node, and a drain connected to the circuit mirror circuit;

[0069] The MOS field effect transistor PM4 has a source connected to the second power supply, a gate connected to the fifth circuit connection node, and a drain connected to the circuit mirror circuit.

[0070] It will be understood that the current mirror is a circuit block whose function is to generate a copy of the current flowing into or out of the input terminal by replicating the current in the output terminal.

[0071] Furthermore, in a preferred embodiment provided in the present application, the circuit mirror circuit includes: a MOS field effect transistor NM1, a MOS field effect transistor NM2, and a MOS field effect transistor NM3;

[0072] The drain of the MOS field effect transistor PM3 is connected to the drain of the MOS field effect transistor NM1;

[0073] The drain of the MOS field effect transistor PM4 is connected to the drain of the MOS field effect transistor NM2;

[0074] The sources of the MOS field effect transistor NM1 and the MOS field effect transistor NM2 are grounded, and the gates are connected to the gate and drain of the MOS field effect transistor NM3 respectively;

[0075] The source of the MOS field effect transistor NM3 is grounded, and the drain is also connected to a third power supply;

[0076] The MOS field effect transistor NM3 outputs a mirror current to the MOS field effect transistor NM1 and the MOS field effect transistor NM2.

[0077] Furthermore, in a preferred embodiment provided in the present application, the voltage-controlled oscillator circuit further includes a first resistor and a second resistor;

[0078] One end of the first resistor is connected to the third circuit connection node, and the other end is connected to the drain of the MOS field effect transistor PM3; one end of the second resistor is connected to the fourth circuit connection node, and the other end is connected to the drain of the MOS field effect transistor PM4.

[0079] The first resistor is R1 and the second resistor is R2.

[0080] Furthermore, in a preferred embodiment provided in the present application, the resonant circuit includes a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an inductor L1, a third resistor, and a fourth resistor;

[0081] One end of the third capacitor is connected to the first circuit connection node, and the other end is connected to one end of the fifth capacitor and one end of the third resistor respectively; the other end of the fifth capacitor is connected to the output voltage terminal of the loop filter; the other end of the third resistor is grounded;

[0082] One end of the fourth capacitor is connected to the second circuit connection node, and the other end is respectively connected to one end of the sixth capacitor and one end of the fourth resistor; the other end of the sixth capacitor is connected to the output voltage terminal of the loop filter; the other end of the fourth resistor is grounded;

[0083] The inductor L1 and the seventh capacitor each have one end connected to the first circuit connection node and the other end connected to the second circuit connection node;

[0084] Wherein, the output voltage end of the loop filter is the input end of the voltage-controlled oscillator circuit.

[0085] The third capacitor is C3, the fourth capacitor is C4, the seventh capacitor is C7, the third resistor is R3, and the fourth resistor is R4. It is worth noting that the fifth capacitor is a variable capacitor C5, and the sixth capacitor is a variable capacitor C6. The capacitance formed by variable capacitors C5 and C6, as well as the third capacitor C3 and the fourth capacitor C4, is equivalent to a total capacitance Ce. Capacitor Ce, the seventh capacitor C7, and the inductor L1 form a resonant circuit for controlling the resonant frequency of the voltage-controlled oscillator.

[0086] Furthermore, in a preferred embodiment provided in the present application, the third capacitor and the fourth capacitor are low-sensitivity capacitors.

[0087] The low-sensitivity capacitor can be understood as capacitor desensitization. Specifically, capacitor desensitization refers to reducing the circuit's sensitivity to the external environment by changing the capacitor's parameters. It is understood that circuit performance may be affected by external factors such as temperature, humidity, and mechanical vibration. These factors may lead to reduced circuit stability and reliability. To mitigate this impact, low-sensitivity capacitors can be used to reduce the circuit's sensitivity to the external environment and improve circuit stability.

[0088] Furthermore, in a preferred embodiment provided in the present application, the MOS field effect transistor PM1 , the MOS field effect transistor PM2 , the MOS field effect transistor PM3 , and the MOS field effect transistor PM4 operate in a saturation region.

[0089] Furthermore, in a preferred embodiment provided in the present application, the MOS field effect transistor NM1 , the MOS field effect transistor NM2 , and the MOS field effect transistor NM3 operate in a saturation region.

[0090] It's understood that the output voltage of the voltage-controlled oscillator is proportional to the frequency, and the ratio needs to be constant. When the voltage at point VF increases, some feedback is needed to reduce it until the ratio remains constant, making the voltage-controlled oscillator insensitive to external interference and reducing phase noise.

[0091] Please refer to Figure 2, which is a feedback flow chart when the VF voltage increases. The VF voltage point is the fifth circuit connection node and is also the third output end of the feedback loop.

[0092] The gate bias voltages of MOS FETs PM1 and PM2 in the positive feedback circuit are determined by the feedback loop. When the voltage at point VF increases due to external noise in the positive feedback circuit, the gate voltages of MOS FETs PM3 and PM4 also increase. Consequently, the VGS of MOS FETs PM3 and PM4 decreases, causing the drain voltages of MOS FETs PM3 and PM4 to decrease. Because the drains of MOS FETs PM3 and PM4 are connected to the gates of MOS FETs PM1 and PM2, the gate voltages of MOS FETs PM1 and PM2 decrease, increasing the VGS of MOS FETs PM1 and PM2. Consequently, the currents flowing through MOS FETs PM1 and PM2 increase, increasing the current flowing through variable resistor R1 and lowering the voltage at point VF. VGS is the gate voltage relative to the source.

[0093] Please refer to Figure 3, which is a feedback flow chart when the VF voltage decreases.

[0094] When external noise in the positive feedback circuit causes the voltage at point VF to decrease, the gate voltages of MOS FETs PM3 and PM4 also decrease. This increases the VGS of MOS FETs PM3 and PM4, which in turn increases the drain voltage of MOS FETs PM3 and PM4. Because the drains of MOS FETs PM3 and PM4 are connected to the gates of MOS FETs PM1 and PM2, the gate voltages of MOS FETs PM1 and PM2 increase, reducing the VGS of MOS FETs PM1 and PM2. Consequently, the currents flowing through MOS FETs PM1 and PM2 decrease, and the current flowing through variable resistor R1 decreases, lowering the voltage at point VF. VGS is the voltage of the gate of a MOS FET relative to its source.

[0095] The positive feedback circuit and resonant circuit can be collectively referred to as the main circuit. The above analysis of the feedback process shows that the negative feedback network formed by the feedback loop and the main circuit can maintain a constant voltage at point VF, making it insensitive to other external interference (such as noise from MOS field-effect transistors PM1 and PM2), thereby reducing the phase noise of the voltage-controlled oscillator.

[0096] Understandably, NB-IoT chips have certain requirements for phase noise output when the phase-locked loop is locked. One of the main sources of phase noise is the voltage-controlled oscillator (VCO). Therefore, it is necessary to reduce the VCO's phase noise. Existing VCOs can be understood as negative transconductance VCOs.

[0097] Please refer to Figure 4, which shows a circuit diagram of a conventional voltage-controlled oscillator. The positive feedback circuit consists of MOS field-effect transistor NM1, MOS field-effect transistor NM2, capacitor C4, and capacitor C5. The drain of MOS field-effect transistor NM1 is connected to the gate of MOS field-effect transistor NM2 via capacitor C4. The drain of MOS field-effect transistor NM2 is connected to the gate of MOS field-effect transistor NM1 via capacitor C5. The resonant circuit consists of capacitor V1, capacitor V2, capacitor C2, capacitor C3, capacitor C1, and inductor L1. The current mirror circuit consists of MOS field-effect transistor NM3, MOS field-effect transistor NM4, resistor R1, and capacitor C6.

[0098] MOS field-effect transistors NM1 and NM2 form a positive feedback circuit, connected back-to-back and in a cross-positive feedback loop. The equivalent conductance, viewed from the drain terminals, is -2 / gm. Here, gm represents the transconductance of the MOS transistor. Because the connection is a negative feedback loop, the equivalent conductance is negative. Once oscillation is established, the two MOS field-effect transistors cross-conduct, causing the voltage signals at the two output terminals to fluctuate alternately. The loop filter's output voltage, namely power supply Vc, controls the capacitance of variable capacitors V1 and V2. By controlling the VC voltage, the capacitance of variable capacitors V1 and V2 is varied, thereby controlling the gain of the voltage-controlled oscillator. The output frequency of the voltage-controlled oscillator is determined by inductor L1, capacitors C1, C2, and C3, and variable capacitors V1 and V2. The voltage-controlled oscillator circuit is determined by MOS field-effect transistor NM3. The current generated by MOS field-effect transistor NM4 is mirrored from the current in MOS field-effect transistor NM4. The current source has an important impact on the overall phase noise of the oscillator, so the noise interference caused by the mirror current is filtered out by resistors R1 and C6.

[0099] Based on the existing negative transconductance voltage-controlled oscillator circuit, there are several solutions to reduce phase noise.

[0100] The first method is to increase the current of the voltage-controlled oscillator (VCO). Increasing the VCO current is the most direct and effective way to reduce VCO phase noise. As we all know, the design of NB-IoT chips adheres to four key principles: wide coverage, low power consumption, high connectivity, and low cost. Therefore, directly increasing the VCO current goes against the original design objectives of NB-IoT chips.

[0101] The second option is to increase the resistance of resistor R1 and the capacitance of C6 to reduce the pole of the first-order low-pass filter they form. As you can understand, a larger resistor increases the length. Therefore, increasing the resistance and capacitance values ​​requires sacrificing chip area and does not improve the current noise generated by MOSFET NM3.

[0102] The third option is to replace MOS FET NM3 with a resistor. Resistors can reduce phase noise to a certain extent, but the voltage at VF will fluctuate with the voltages of MOS FETs NM1 and NM2, introducing some noise.

[0103] Unlike the above three solutions, this application utilizes a feedback loop to reduce the phase noise of the voltage-controlled oscillator. The gate bias voltages of MOS field-effect transistors PM1 and PM2 in the positive feedback circuit are determined by the feedback loop. Furthermore, the current mirror circuit in this application utilizes three MOS field-effect transistors. MOS field-effect transistor NM3 outputs a mirrored current to MOS field-effect transistors NM1 and NM2. This eliminates the need for resistors and capacitors to filter out noise interference caused by the mirrored current.

[0104] Furthermore, in a preferred embodiment provided in the present application, the voltage-controlled oscillator circuit is applied to a phase-locked loop.

[0105] Please refer to Figure 5, which is a diagram of the phase-locked loop structure.

[0106] A phase-locked loop (PLL) consists of a phase frequency detector (PFD), a loop filter, and a voltage-controlled oscillator (VCO) in the forward path, while a frequency divider forms the frequency and phase feedback path. The PLL operates by detecting the phase difference between the reference clock signal and the VCO output signal after passing through the frequency divider. The phase detector converts this phase difference into a voltage signal for output. After filtering through a low-pass filter, it forms the control voltage for the VCO, controlling the frequency of the VCO output signal. The input of the VCO disclosed in this application is the output of the loop filter.

[0107] In summary, the voltage-controlled oscillator circuit for NB-IOT chips disclosed in this application connects the gates of MOS field-effect transistors PM1 and PM2 through the gates of MOS field-effect transistors PM3 and PM4 in the feedback loop, so that the gate voltages of PM1 and PM2 change accordingly, that is, PM3 and PM4 can regulate the VGS of PM1 and PM2, thereby regulating the currents of PM1 and PM2 to regulate the voltage of VF, so that the ratio of voltage to frequency is constant, thereby being insensitive to external interference and reducing the phase noise of the voltage-controlled oscillator. On the other hand, the current mirror circuit of this application uses a combination of MOS field-effect transistors NM1, NM2, and NM3 to effectively filter out the noise interference caused by the mirror current. On the other hand, the third capacitor R3 and the fourth capacitor R4 in the resonant circuit are set as low-sensitivity capacitors, which reduces the circuit's sensitivity to the external environment and improves the stability and reliability of the circuit. On the other hand, in order to reduce the low-frequency phase noise caused by 1 / f noise, the voltage-controlled oscillator circuit does not adopt a tail current source structure with high low-frequency phase noise. Instead, the voltage-controlled oscillator current is determined by the resistance of variable resistor R1. This is because resistors have no 1 / f noise and, compared to MOS field-effect transistor current sources, have low frequency and phase noise.

[0108] It should be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, product, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, product, or apparatus. In the absence of further limitations, the phrase "comprises a..." to define an element does not preclude the presence of other identical elements in the process, method, product, or apparatus that includes the element.

[0109] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

Claims

1. A voltage-controlled oscillator circuit applied to an NB-IOT chip, characterized in that: include: Positive feedback circuit; A resonant circuit connected to the positive feedback circuit is used to control the resonant frequency of the voltage controlled oscillator; A feedback loop connected to the positive feedback circuit is used to control the positive feedback circuit to reduce the phase noise of the voltage controlled oscillator; There are a first circuit connection node and a second circuit connection node between the positive feedback circuit and the resonant circuit; There are a third circuit connection node, a fourth circuit connection node, and a fifth circuit connection node between the positive feedback circuit and the feedback loop; Wherein, the first circuit connection node is a first output terminal of the voltage-controlled oscillator circuit; the second circuit connection node is a second output terminal of the voltage-controlled oscillator circuit; The third circuit connection node is the first output end of the feedback loop; the fourth circuit connection node is the second output end of the feedback loop; and the fifth circuit connection node is the third output end of the feedback loop.

2. The voltage-controlled oscillator circuit according to claim 1, characterized in that: The positive feedback circuit includes a variable resistor R1, a MOS field effect transistor PM1, a MOS field effect transistor PM2, a first capacitor, and a second capacitor; One end of the variable resistor R1 is connected to the first power supply, and the other end is connected to the fifth circuit connection node; The source of the MOS field effect transistor PM1 is connected to the fifth circuit connection node, the gate is connected to one end of the second capacitor, and the drain is connected to the first circuit connection node; the other end of the second capacitor is connected to the second circuit connection node; The source of the MOS field effect transistor PM2 is connected to the fifth circuit connection node, the gate is connected to one end of the first capacitor, and the drain is connected to the second circuit connection node; the other end of the first capacitor is connected to the first circuit connection node.

3. The voltage-controlled oscillator circuit according to claim 1, wherein: The feedback loop includes: MOS field effect transistor PM3, MOS field effect transistor PM4, and a circuit mirror circuit; The MOS field effect transistor PM3 has a source connected to the second power supply, a gate connected to the fifth circuit connection node, and a drain connected to the circuit mirror circuit; The MOS field effect transistor PM4 has a source connected to the second power supply, a gate connected to the fifth circuit connection node, and a drain connected to the circuit mirror circuit.

4. The voltage-controlled oscillator circuit according to claim 3, characterized in that: The circuit mirror circuit comprises: a MOS field effect transistor NM1, a MOS field effect transistor NM2, and a MOS field effect transistor NM3; The drain of the MOS field effect transistor PM3 is connected to the drain of the MOS field effect transistor NM1; The drain of the MOS field effect transistor PM4 is connected to the drain of the MOS field effect transistor NM2; The sources of the MOS field effect transistor NM1 and the MOS field effect transistor NM2 are grounded, and the gates are respectively connected to the gate and drain of the MOS field effect transistor NM3; The source of the MOS field effect transistor NM3 is grounded, and the drain is also connected to a third power supply; The MOS field effect transistor NM3 outputs a mirror current to the MOS field effect transistor NM1 and the MOS field effect transistor NM2.

5. The voltage controlled oscillator circuit according to claim 1, wherein: The voltage-controlled oscillator circuit also includes a first resistor and a second resistor; One end of the first resistor is connected to the third circuit connection node, and the other end is connected to the drain of the MOS field effect transistor PM3; one end of the second resistor is connected to the fourth circuit connection node, and the other end is connected to the drain of the MOS field effect transistor PM4.

6. The voltage-controlled oscillator circuit according to claim 1, wherein: The resonant circuit includes a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an inductor L1, a third resistor, and a fourth resistor; One end of the third capacitor is connected to the first circuit connection node, and the other end is respectively connected to one end of the fifth capacitor and one end of the third resistor; the other end of the fifth capacitor is connected to the output voltage end of the loop filter; the other end of the third resistor is grounded; One end of the fourth capacitor is connected to the second circuit connection node, and the other end is respectively connected to one end of the sixth capacitor and one end of the fourth resistor; the other end of the sixth capacitor is connected to the output voltage end of the loop filter; the other end of the fourth resistor is grounded; The inductor L1 and the seventh capacitor each have one end connected to the first circuit connection node and the other end connected to the second circuit connection node; Wherein, the output voltage end of the loop filter is the input end of the voltage-controlled oscillator circuit.

7. The voltage controlled oscillator circuit according to claim 1, characterized in that: The third capacitor and the fourth capacitor are low-sensitivity capacitors.

8. The voltage-controlled oscillator circuit according to claim 1, wherein: The MOS field effect transistor PM1, MOS field effect transistor PM2, MOS field effect transistor PM3, and MOS field effect transistor PM4 operate in a saturation region.

9. The voltage controlled oscillator circuit according to claim 1, characterized in that: The MOS field effect transistor NM1 , the MOS field effect transistor NM2 , and the MOS field effect transistor NM3 operate in a saturation region.

10. The voltage controlled oscillator circuit according to claim 1, characterized in that: The voltage controlled oscillator circuit is applied to a phase locked loop.

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