Method and apparatus for determining popularity of memory page, and device, chip and processor

By updating the memory address in the address window of the memory page, the problem of inaccurate memory page popularity recognition in the prior art is solved, and accurate identification of memory page popularity and improvement of memory hierarchical access performance is achieved.

WO2025055431A1PCT designated stage expired Publication Date: 2025-03-20HUAWEI TECH CO LTD
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Patent Information

Application Number
PCT/CN2024/098992
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-10-20
Filing Date
2024-06-13
Publication Date
2025-03-20

AI Technical Summary

Technical Problem

When identifying the popularity of memory pages, the prior art cannot accurately determine the actual number of visits to memory pages within one scan cycle, resulting in inaccurate identification of hot and cold pages.

Method used

By using the address window to store the memory addresses visited in the latest time period, update the address window based on the acquired memory address, and accurately identify the popularity of the memory page.

Benefits of technology

It realizes accurate identification of memory page popularity and improves memory hierarchical access performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

A method and apparatus for determining the popularity of a memory page, and a device, a chip and a processor, which belong to the technical field of communications. In the method, when a memory address, which is accessed by an access request for a storage medium, is acquired, a memory address, which is stored in an address window, is updated on the basis of the acquired memory address, and with the continuous update of the memory address in the address window, the updated address window can store memory addresses in the storage medium that have been accessed within the latest period of time, and thus the popularity of memory pages in the storage medium that have been accessed within the latest period of time can be accurately identified on the basis of the memory addresses in the updated address window.
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Description

Method, device, equipment, chip and processor for determining the heat of a memory page

[0001] This application claims priority to Chinese patent application No. 202311184807.0 filed on September 13, 2023, entitled “Method for determining page status of memory page, method for counting access, device and apparatus”, the entire contents of which are incorporated by reference into this application.

[0002] This application claims priority to Chinese patent application No. 202311371380.5 filed on October 20, 2023, entitled “Method, device, equipment, chip and processor for determining the heat of a memory page,” the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of communication technology, and in particular to a method, apparatus, device, chip, and processor for determining the heat of a memory page. Background Art

[0004] In memory hierarchical storage technology, how to quickly and accurately identify the cold pages and hot pages in the memory pages recorded in the page table determines the performance of memory hierarchical access. In the related art, the software used for cold and hot page identification can count the number of accesses to the memory page by periodically scanning the access (A) flag in the page table entry (PTE). The value of the A flag is used to indicate whether the memory page indicated by the PTE has been accessed. If the software identifies that the A flag in a certain PTE is 1 during the periodic scanning, it is considered that the memory page indicated by the PTE has been accessed within the scanning cycle. If the A flag is 0, it is considered that the memory page has not been accessed within the scanning cycle. Afterwards, the software can identify the memory page as a hot page or a cold page based on the access count of the memory page in multiple scanning cycles.

[0005] Since the value of the A flag indicates whether the memory page has been accessed within a scanning cycle, if the memory page is accessed multiple times within a scanning cycle, the A flag cannot accurately determine the actual number of times the memory page is accessed within this scanning cycle, resulting in inaccurate results in the final identification of hot and cold pages, that is, inaccurate identification of the heat of the accessed memory page.

[0006] Summary of the Invention

[0007] This application provides a method, apparatus, device, chip, and processor for determining the heat of a memory page, which can accurately identify the heat of an accessed memory page. The technical solution is as follows:

[0008] In a first aspect, a method for determining the heat of a memory page is provided. The method involves an address window, which is used to store memory addresses in a storage medium that have been accessed in a recent time period. In the method, a first memory address accessed by an access request for the storage medium is first obtained, and then, based on the first memory address, the memory address stored in the address window is updated to obtain an updated address window; based on the memory address in the updated address window, the heat of the memory page in the storage medium is determined.

[0009] The method obtains the memory address accessed for a storage access request and updates the memory address stored in the address window according to the obtained memory address. As the memory address in the address window is continuously updated, the updated address window can store the memory addresses accessed in the storage medium in the most recent time period. Then, based on the memory addresses in the updated address window, the heat of the memory pages accessed in the storage medium in the most recent time period can be accurately identified.

[0010] In one possible implementation, the address window is a local address window. Based on this, the above process of updating the memory address stored in the address window according to the first memory address includes: if M second memory addresses have been stored in the address window, and the first memory address does not exist among the M second memory addresses, determining the third memory address based on the first access count of the M second memory addresses; and then updating the third memory address in the address window to the first memory address; wherein the third memory address is the memory address with the lowest access popularity among the M second memory addresses, and M is the address capacity of the address window.

[0011] Based on the above possible implementation method, after obtaining the memory address accessed for the storage access request, if the address window is full of memory addresses that have been accessed by the storage medium, and there is no newly acquired memory address in the address window, then based on the number of accesses to the memory address in the address window, the memory address with the lowest access popularity in the address window is identified, and the number of accesses to the memory address with the lowest access popularity in the address window is updated to the newly acquired memory address to eliminate the memory address with the lowest access popularity in the address window. By continuously eliminating memory addresses with low access popularity in the address window, the memory address with the highest access popularity during the access statistics process can be retained in the address window, and then based on the memory address with the highest access popularity during the access statistics process, the hot pages in the storage medium can be accurately identified.

[0012] In one possible implementation, the process of determining the third memory address includes: first attenuating the first access counts of M second memory addresses; if the first access count of any second memory address decays to a first access threshold, then determining any second memory address as the third memory address.

[0013] Based on the above possible implementation, it is sufficient to query whether the first access count after decay exists in the first access count after decay, without sorting the first access count after decay. The implementation is simple and the third memory address can be determined quickly.

[0014] In a possible implementation, the step of determining the third memory address includes: first querying the minimum access count among the first access counts of the M second memory addresses; and then determining the second memory address to which the minimum access count belongs as the third memory address.

[0015] Based on the above possible implementation methods, the minimum number of accesses can be accurately queried, and then the memory address with the lowest access popularity can be accurately determined, so that the number of accesses to the memory address with the lowest access popularity can be replaced with the number of accesses to the newly obtained memory address, so as to accurately eliminate the memory address with the lowest access popularity.

[0016] In one possible implementation, the address window is a global address window. Based on this, the method further includes the following steps: if the first memory address does not exist in the memory addresses stored in the address window, and there is no unused address entry in the address window, a first interrupt message is sent to the processor core, and the first interrupt message indicates that all address entries in the address window have been used, resulting in an access statistics interruption, and the address entry is used to record a memory address that has been accessed in the storage medium.

[0017] Based on the above possible implementation, the processor core can read the memory address in the address window as quickly as possible, so as to initialize the address window as quickly as possible, and then based on the initialized address window, the subsequently obtained memory address can be recorded as quickly as possible.

[0018] In one possible implementation, the address window includes multiple address entries, and the address entry is used to record a memory address that has been accessed in the storage medium. The above process of updating the memory address stored in the address window based on the first memory address includes the following steps: if the first memory address does not exist in the memory addresses stored in the address window, and there is an unused address entry in the address window, fill the unused address entry with the first memory address.

[0019] Based on the above possible implementation, by filling the first memory address in the unused address entry, the newly collected memory address is recorded through the address window, avoiding missing the accessed memory address, so as to determine the correctness of the statistical result.

[0020] In one possible implementation, the address window corresponds to an access statistics window, the access statistics window contains multiple access times, and the address entry corresponds to an access time in the access statistics window. The method also includes the following steps: updating the access times stored in the access statistics window according to the first memory address to obtain an updated access statistics window; determining the heat of the memory page in the storage medium according to the memory address in the updated address window and the access times in the updated access statistics window.

[0021] In one possible implementation, the method further includes the following steps: if there is an access number greater than or equal to a second number threshold among the multiple access numbers, a second interrupt message is sent to the processor core, and the second interrupt message indicates that an access statistics interruption occurs due to a memory address with an access number greater than or equal to the second number threshold.

[0022] Based on the above possible implementation method, after the number of accesses reaches the second threshold in the access statistics window, an interrupt message is sent to the processor core to notify the processor core that the access statistics of the storage medium have been interrupted, so that the processor core can read the memory address in the address window and the number of accesses in the access statistics window as soon as possible, so that the processing core can determine the hot data in the storage medium based on the number of accesses reaching the second threshold, without the processor core having to wait for the access statistics cycle to end or wait for the address table to be filled, thereby improving the efficiency of the processor core in determining hot data.

[0023] In one possible implementation, the method further includes the following steps: receiving an information read request from a processor core; and sending access statistics to the processor core based on each memory address in an address window and the number of accesses to each memory address, wherein the information read request indicates reading access statistics of a storage medium.

[0024] Based on the above possible implementation, access statistics are sent to the processor core so that the processor core can accurately determine the heat of the memory page in the storage medium based on the number of accesses to each memory address in the access statistics.

[0025] In a possible implementation, the address window is implemented by a content addressable memory (CAM).

[0026] Compared with associative memories of other associative structures, CAM can store more data with a smaller chip area. Therefore, the chip area occupied by the address window can be reduced based on the above possible implementation.

[0027] On the second aspect, a method for counting accesses to a storage medium is provided. The method involves an address window, which is used to store memory addresses in the storage medium that have been accessed in a recent time period. In the method, a first memory address accessed by an access request for the storage medium is first obtained. Then, based on the first memory address, the memory address stored in the address window is updated to obtain an updated address window, so as to realize counting of memory addresses accessed by the storage medium.

[0028] The method obtains the memory address accessed for a storage access request and updates the memory address stored in the address window according to the obtained memory address. As the memory address in the address window is continuously updated, the updated address window can store the memory addresses accessed in the storage medium in the most recent time period, thereby accurately counting the memory addresses accessed in the storage medium in the most recent time period.

[0029] In one possible implementation, the address window is a local address window. Based on this, the above process of updating the memory address stored in the address window according to the first memory address includes: if M second memory addresses have been stored in the address window, and the first memory address does not exist among the M second memory addresses, determining the third memory address based on the first access count of the M second memory addresses; and then updating the third memory address in the address window to the first memory address; wherein the third memory address is the memory address with the lowest access popularity among the M second memory addresses, and M is the address capacity of the address window.

[0030] In one possible implementation, the process of determining the third memory address includes: first attenuating the first access counts of M second memory addresses; if the first access count of any second memory address decays to a first access threshold, then determining any second memory address as the third memory address.

[0031] In a possible implementation, the step of determining the third memory address includes: first querying the minimum access count among the first access counts of the M second memory addresses; and then determining the second memory address to which the minimum access count belongs as the third memory address.

[0032] In one possible implementation, the address window is a global address window. Based on this, the method further includes the following steps: if the first memory address does not exist in the memory addresses stored in the address window, and there is no unused address entry in the address window, a first interrupt message is sent to the processor core, and the first interrupt message indicates that all address entries in the address window have been used, resulting in an access statistics interruption, and the address entry is used to record a memory address that has been accessed in the storage medium.

[0033] In one possible implementation, the address window includes multiple address entries, and the address entry is used to record a memory address that has been accessed in the storage medium. The above process of updating the memory address stored in the address window based on the first memory address includes the following steps: if the first memory address does not exist in the memory addresses stored in the address window, and there is an unused address entry in the address window, fill the unused address entry with the first memory address.

[0034] In one possible implementation, the address window corresponds to an access statistics window, the access statistics window contains multiple access times, and the address entry corresponds to an access time in the access statistics window. The method also includes the following steps: according to the first memory address, updating the access times stored in the access statistics window to obtain an updated access statistics window.

[0035] In one possible implementation, the method further includes the following steps: if there is an access number greater than or equal to a second number threshold among the multiple access numbers, a second interrupt message is sent to the processor core, and the second interrupt message indicates that an access statistics interruption occurs due to a memory address with an access number greater than or equal to the second number threshold.

[0036] In one possible implementation, the method further includes the following steps: receiving an information read request from a processor core; and sending access statistics to the processor core based on each memory address in an address window and the number of accesses to each memory address, wherein the information read request indicates reading access statistics of a storage medium.

[0037] In a possible implementation, the address window is implemented by a content addressable memory (CAM).

[0038] According to a third aspect, a method for determining the page status of a memory page is provided, wherein the storage medium is a memory or a cache of the memory. In the method, a mapping relationship between memory addresses accessed by the storage medium and the number of accesses is known. After obtaining the first memory address accessed by the access request for the storage medium, the first memory address obtained is queried from the mapping relationship between memory addresses accessed by the storage medium and the number of accesses. If the first memory address is found to exist in the memory addresses accessed by the storage medium, the number of accesses in the mapping relationship where the first memory address is located is updated. After a first period of time, the page status of the memory page to which the memory address belongs is determined based on the latest number of accesses to the memory addresses accessed by the storage medium. The page status is used to indicate the access popularity of the memory page.

[0039] The method records the access count of the accessed memory address through a mapping relationship between the memory address of the storage medium and the access count. After obtaining the memory address accessed by the access request for the storage medium, the obtained memory address is queried from the mapping relationship. If the obtained memory address exists among the memory addresses of the storage medium, the access count of the memory address in the mapping relationship is updated to obtain the latest access count of the memory address. As the obtained memory address increases, the actual access count of the memory address of the storage medium can be accurately obtained. Based on the actual access count of the memory address of the storage medium, the page status of the memory page accessed by the storage medium can be accurately identified.

[0040] In a possible implementation, the memory addresses of the storage medium that have been accessed are recorded in an address table, and the number of times the memory addresses have been accessed is recorded in an access statistics table. The address table corresponds to the access statistics table.

[0041] Based on the above possible implementation methods, based on the address table and the access statistics table, the mapping relationship between the memory addresses of the storage medium that have been accessed and the number of access times is maintained, so as to quickly query in the address table whether the first memory address is an accessed memory address, thereby improving the query efficiency of the first memory address.

[0042] In one possible implementation, the access statistics table contains multiple access counts, the address table contains multiple address entries, the address entry is used to record a memory address that has been accessed in the storage medium, and the address entry corresponds to an access count in the access statistics table. The method also includes the following steps: if the first memory address does not exist in the memory addresses that have been accessed in the storage medium, and there is an unused address entry in the address table, the first memory address is filled in the unused address entry, and the access count corresponding to the unused address entry in the access statistics table is updated.

[0043] Based on the above possible implementation method, by filling the first memory address in the unused address entry, the number of accesses corresponding to the unused address entry in the access statistics table becomes the number of accesses to the first memory address, and by updating the number of accesses, the access count of the first memory address is performed.

[0044] In one possible implementation, the method further includes the following steps: if the first memory address does not exist in the memory addresses accessed by the storage medium, and there is no unused address entry in the address table, multiple access times are decayed to obtain multiple access times after decay; if any access times after decay are less than or equal to the first number threshold, the memory address in the address entry corresponding to any access time is updated to the first memory address, and any access times after decay are updated.

[0045] Based on the above possible implementation method, the newly obtained memory address is used to eliminate the memory addresses with low access counts in the address table. After this elimination operation, the memory addresses in the address table are all memory addresses with higher access counts relative to the eliminated memory addresses, so that the hot pages with the highest access frequency in the storage medium can be determined based on the access counts of the memory addresses with higher access counts.

[0046] In a fourth aspect, a method for counting accesses to a storage medium is provided, wherein the storage medium is a memory or a cache of the memory. In the method, a mapping relationship between memory addresses accessed by the storage medium and the number of accesses is known. After obtaining the first memory address accessed by the access request for the storage medium, the first memory address obtained is queried from the mapping relationship between memory addresses accessed by the storage medium and the number of accesses; if the first memory address is found to be among the memory addresses accessed by the storage medium, the number of accesses in the mapping relationship where the first memory address is located is updated.

[0047] The method records the access count of the accessed memory addresses through a mapping relationship between the memory addresses of the storage medium and the access counts. After obtaining the memory address accessed by the access request for the storage medium, the obtained memory address is queried from the mapping relationship. If the obtained memory address exists among the memory addresses of the storage medium, the access count of the memory address in the mapping relationship is updated to obtain the latest access count of the memory address. As the number of obtained memory addresses increases, the actual access count of the memory addresses of the storage medium can be accurately obtained.

[0048] In one possible implementation, the memory addresses of the storage medium that have been accessed are recorded in an address table, and the number of accesses to the accessed memory addresses is recorded in an access statistics table. The access statistics table contains multiple access counts, and the address table contains multiple address entries. The address entry is used to record a memory address that has been accessed in the storage medium. The address entry corresponds to an access count in the access statistics table. The method also includes the following steps: if the first memory address does not exist in the memory addresses of the storage medium that have been accessed, and there is an unused address entry in the address table, the first memory address is filled in the unused address entry, and the number of accesses corresponding to the unused address entry in the access statistics table is updated.

[0049] In one possible implementation, the method further includes the following steps: if the first memory address does not exist in the memory addresses accessed by the storage medium, and there is no unused address entry in the address table, sending a first interrupt message to the processor core, the first interrupt message indicating that all address entries in the address table have been used, resulting in an access statistics interruption.

[0050] Based on the above possible implementation methods, the processor core can read the memory address in the address table and the number of accesses in the access statistics table as quickly as possible, so that the address table and the access statistics table can be initialized as soon as possible, and then based on the initialized address table and access statistics table, the access count of the subsequently obtained memory addresses can be performed as soon as possible.

[0051] In one possible implementation, the method further includes the following steps: if the first memory address does not exist in the memory addresses accessed by the storage medium, and there is no unused address entry in the address table, multiple access times are decayed to obtain multiple access times after decay; if any access times after decay are less than or equal to the first number threshold, the memory address in the address entry corresponding to any access time is updated to the first memory address, and any access times after decay are updated.

[0052] In one possible implementation, the method further includes the following steps: if there is an access number greater than or equal to a second number threshold among the multiple access numbers, a second interrupt message is sent to the processor core, and the second interrupt message indicates that the access statistics interruption is caused by the memory address with an access number greater than or equal to the second number threshold.

[0053] Based on the above possible implementation method, after the number of accesses reaching the second threshold value exists in the address table, an interrupt message is sent to the processor core to notify the processor core that the access statistics of the storage medium have been interrupted, so that the processor core can read the memory address in the address table and the number of accesses in the access statistics table as soon as possible, so that the processing core can determine the hot data in the storage medium based on the number of accesses reaching the second threshold value, without the need for the processor core to wait for the access statistics cycle to end or wait for the address table to be filled, thereby improving the efficiency of the processor core in determining hot data.

[0054] In one possible implementation, the method further includes the following steps: receiving an information read request from a processor core, the information read request indicating reading access statistics of a storage medium; and sending access statistics to the processor core based on each memory address accessed by the storage medium and the number of times each memory address has been accessed.

[0055] Based on the above possible implementation manner, access statistics information is sent to the processor core so that the processor core can accurately determine the hot data in the storage medium based on the number of accesses to each memory address in the access statistics information.

[0056] In a fifth aspect, a device for determining the heat of a memory page is provided, which is used to execute the method provided in the first aspect or any optional manner of the first aspect.

[0057] In a sixth aspect, a storage medium access statistics device is provided, which is used to execute the method provided in the second aspect or any optional manner of the second aspect.

[0058] In a seventh aspect, a device for determining the page status of a memory page is provided, which is used to execute the method provided in the third aspect or any optional manner of the third aspect.

[0059] In an eighth aspect, an access statistics device for a storage medium is provided, which is used to execute the method provided in the fourth aspect or any optional manner of the fourth aspect.

[0060] In a ninth aspect, a computer device is provided, comprising a processor for executing program code so that the computer device executes a method as provided in any one of the first to fourth aspects or any optional manner of any of the aspects.

[0061] In a tenth aspect, a chip is provided, which includes a logic circuit, and the logic circuit is used to execute the method provided in any one of the first to fourth aspects above or any optional manner of any of the aspects.

[0062] In the eleventh aspect, a processor is provided, which is used to execute the method provided in any one of the first to fourth aspects above or any optional manner of any of the aspects.

[0063] In the twelfth aspect, a computer-readable storage medium is provided, in which at least one program code is stored. The program code is read and executed by a processor to implement a method provided in any one of the first to fourth aspects above or any optional manner of any of the aspects.

[0064] In the thirteenth aspect, a computer program product or computer program is provided, which includes a program code, which is stored in a computer-readable storage medium, a processor reads the program code from the computer-readable storage medium, and the processor executes the program code, so that the device where the processor is located executes the method provided in any one of the above-mentioned first to fourth aspects or various optional implementations of any one of the aspects.

[0065] Based on the implementation methods provided in the above aspects, this application can also be further combined to provide more implementation methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] FIG1 is a diagram of a computer system architecture with hierarchical memory provided by the present application;

[0067] FIG2 is a schematic diagram of the interaction between a processing core and a hierarchical memory provided by the present application;

[0068] FIG3 is a working principle diagram of a visit statistics device provided by the present application;

[0069] FIG4 is an architecture diagram of another computer system with hierarchical memory provided by the present application;

[0070] FIG5 is an architecture diagram of another computer system with hierarchical memory provided by the present application;

[0071] FIG6 is a flow chart of a method for determining a page status of a memory page provided by the present application;

[0072] FIG7 is a flow chart of migration of hot data in a local statistical mode provided by the present application;

[0073] FIG8 is a flow chart of a method for determining the heat of a memory page provided by the present application;

[0074] FIG9 is a flow chart of migration of hot data in a global statistical mode provided by the present application;

[0075] FIG10 is a flowchart of a sliding window semi-attenuation replacement of an access statistics table provided by the present application;

[0076] FIG11 is a flow chart of recording the number of accesses to a memory address provided by the present application;

[0077] FIG12 is a schematic structural diagram of an access statistics device for a storage medium provided by the present application;

[0078] FIG13 is a schematic structural diagram of a device for determining a page status of a memory page provided by the present application;

[0079] FIG14 is a schematic structural diagram of a computer device provided by the present application;

[0080] FIG15 is a schematic structural diagram of a device for determining the heat of a memory page provided by the present application;

[0081] FIG16 is a schematic structural diagram of an access statistics device for another storage medium provided in the present application. DETAILED DESCRIPTION

[0082] In order to facilitate understanding of the specific implementation of the present application, some of the nouns involved in the specific implementation are introduced as follows.

[0083] Memory page: Divide the memory space into partitions of equal size. Each partition is a memory page. Each memory page is referred to by a physical page number. Different memory pages have different physical page numbers. Memory pages are also called physical blocks or page frames.

[0084] Virtual page: Divide the virtual address space of an application into regions of equal size. The size of each region is equal to the size of a memory page. Each region is a virtual page. Each virtual page is referred to by a virtual page number. Different virtual pages have different virtual page numbers. Virtual pages are also called pages or pages.

[0085] Virtual address (VA): is an address in the virtual address space. The virtual address space includes multiple virtual addresses. A virtual address includes a virtual page number of a virtual page and an offset within the page. The offset within the page indicates the address offset of the virtual address in the virtual page.

[0086] Memory address: also known as physical address (PA), memory address is the address in the physical address space. The physical address space is the space provided by the memory (i.e., memory space). The physical address space includes multiple physical addresses. Each physical address includes a physical page number of a physical page and an offset within the page. The offset within the page indicates the address offset of the memory address in the memory page.

[0087] Hot pages: refers to memory pages that are frequently accessed by applications. The data in hot pages is called hot data.

[0088] Cold pages: refers to memory pages that are not frequently accessed by applications. The data in cold pages is called cold data.

[0089] Next, the embodiments of the present application will be described in further detail with reference to the accompanying drawings.

[0090] The storage medium access statistics method provided in this application is applied to a computer system with hierarchical memory. As shown in the computer system architecture diagram with hierarchical memory in Figure 1, the computer system 100 includes memory 101 of multiple media types, a central processing unit (CPU) 102 and an access statistics device 103.

[0091] The multiple media types of memory 101 are different types of storage media. For example, the multiple media types of memory 101 are at least two of dynamic random access memory (DRAM), non-volatile memory (NVM), double data rate synchronous dynamic random access memory (DDR), static random access memory (SRAM), and high bandwidth memory (HBM), wherein NVM is, for example, phase change memory (PCM) and magnetic random access memory (MRAM). In another possible implementation, the multiple media types of memory 101 may also include other types of storage media, and there is at least one memory 101 of the same media type. Here, this application does not limit the media type of each memory 101 in the computer system and the number of memories of the same media type.

[0092] Each memory 101 is also called main memory. As shown in Figure 1, any memory 101 can be provided by a media module of at least one channel, and the media module includes one or more memories. The media types of the memories provided by the same media module may be the same or different. In order to facilitate the interaction between CPU 102 and a memory 101, Figure 1 only shows one memory 101 of one media type, and does not show memories 101 of multiple media types.

[0093] The memories 101 of various media types all have memory levels, and the memory levels of the memories 101 of different media types are different, so that the memories 101 of various media types constitute a hierarchical memory in the computer system 100, wherein the memory 101 with higher data transmission efficiency with the CPU 102 has a higher memory level, and the memory 101 with lower data transmission efficiency with the CPU 102 has a lower memory level.

[0094] For any memory level 101 in the hierarchical memory, if there is a memory of the previous memory level of the memory 101 in the hierarchical memory (referred to as the previous level memory), the hot data stored in the hot page of the memory 101 can be migrated to the previous level memory, so that the processor core 21 in the CPU 102 can subsequently access the cache data of the hot page in the previous level memory, wherein the cache data of the hot page is the cache data of the memory page in the previous level memory, and the cache data may be the same as or different from the data stored in the hot page. If there is a memory of the next memory level of the memory 101 in the hierarchical memory (referred to as the next level memory), the cold data stored in the cold page of the memory 101 can be migrated to the next level memory to free up the storage space of the cold page so that the hot data of the next level memory can be cached to the cold page later.

[0095] For example, as shown in FIG2 , it is assumed that the hierarchical memory includes a primary memory, a secondary memory, and a tertiary memory, wherein the primary, secondary, and tertiary are three memory levels respectively, the primary is the highest memory level, and the tertiary is the lowest memory level. The hot data of at least one hot page with the most access times in the tertiary memory is migrated to the secondary memory, the hot data of at least one hot page with the most access times in the secondary memory is migrated to the primary memory, the cold data of at least one cold page with the least access times in the primary memory is migrated back to the secondary memory, and the cold data of at least one cold page with the least access times in the secondary memory is migrated back to the tertiary memory. When the processor core 21 has an access requirement for a memory page in the tertiary memory, the processor core 21 first queries the cache data of the memory page in the primary memory. If the cache data of the memory page exists in the primary memory, the cache data of the memory page is accessed to access the memory page. If the cache data of the memory page does not exist in the first-level memory, the cache data of the memory page is queried in the second-level memory. If the cache data of the memory page exists in the second-level memory, the cache data of the memory page is accessed to implement the memory page. If the cache data of the memory page does not exist in the second-level memory, the memory page in the third-level memory is accessed.

[0096] FIG2 illustrates a hierarchical memory having three memory levels as an example. In another possible implementation, the hierarchical memory has two memory levels or more than three memory levels. The present application does not limit the number of memory levels in the hierarchical memory.

[0097] The access statistics device 103 is a module in the computer system 100 for implementing the storage medium access statistics method provided in this application. The access statistics device 103 corresponds to any type of memory in the hierarchical memory, for example, the access statistics device 103 corresponds to the primary memory, or the access statistics device 103 corresponds to the secondary memory. When the processor core 21 accesses a memory page in the memory 101 corresponding to the access statistics device 103, the access request of the processor core 21 is sent to the memory 101. The access statistics device 103 can obtain the memory address accessed by the access request and record the number of accesses to the memory address in order to count the number of accesses to the memory address.

[0098] In one possible implementation, obtaining memory addresses and recording access counts can be implemented by different modules in the access statistics device 103. As shown in FIG1 , the access statistics device 103 includes a collection module 31, a statistics module 32, a memory 33, and a compression module 34. The memory 33 is used to store the access counts of the accessed memory addresses. The memory 33 may be, for example, a random access memory (RAM), a read-only memory (ROM), a flash memory, a hard disk drive (HDD), or a solid state drive (SSD). The type of the memory 33 is not limited herein.

[0099] As shown in Figures 1 and 3, assuming that the access statistics device 103 corresponds to any memory 101, the processor core 21 sends an access request to the memory 101, and the collection module 31 collects the memory address accessed by the access request from the access request and sends the collected memory address to the statistics module 32. The memory 33 pre-selects and stores multiple access times. After receiving the memory address, the statistics module 32 stores the memory address locally, establishes a mapping relationship between the memory address and an access time recorded in the memory 33, uses the access time as the access time of the memory address, and modifies the access time in the memory 33 to the actual access time of the memory address within a certain period of time (such as an access statistics cycle). For example, the statistics module 32 also instructs the memory 33 to modify the access time. After the memory 33 modifies the access time to the actual access time, it returns a modification completion response to the statistics module 32 to indicate that the modification of the access time is complete.

[0100] The processor core 21 reads the access statistics information of the memory 101 from the access statistics device 103. The access statistics information includes the accessed memory addresses and the access counts of the accessed memory addresses recorded by the access statistics device 103. For example, the processor core 21 issues an instruction to the access statistics device 103 to upload the access statistics information. The compression module 34 generates access statistics information based on the instruction and the recorded accessed memory addresses and the access counts of the memory addresses, performs data compression on the access statistics information, and uploads the compressed access statistics information to the processor core 21 to reduce the transmission overhead of the access statistics information. The processor core 21 provides the access statistics information to the target application, which is software with at least one of the following functions: based on the access statistics information of any memory 101, identifying the hot and cold memory pages that have been accessed in the memory; if any memory page is identified as a hot page, and there is an upper-level memory of the memory 101 in the hierarchical memory, the data of the memory page is migrated to the upper-level storage medium; if the memory page is identified as a cold page, and there is a lower-level memory of the memory 101 in the hierarchical memory, the data of the memory page is migrated to the lower-level memory.

[0101] FIG1 illustrates an example in which the access statistics device 103 is independent of the CPU 102 and the memory 101. In another possible implementation, as shown in FIG4 , the access statistics device 103 is integrated into the media module where the memory 101 corresponding to the access statistics device 103 is located, so that the access statistics device 103 can obtain access requests issued to the memory 101 in a nearby manner. As shown in FIG5 , the access statistics device 103 is integrated into the CPU 102, so that the access statistics device 103 can obtain access requests issued by the processor core 21 to the corresponding memory 2101 in a nearby manner. When the access statistics device 103 is located in the CPU 102, the access statistics device 103 can be integrated into the memory management unit (MMU) or be independent of the MMU. As another possible implementation, the access statistics device 103 can also be integrated into other types of processors or memory controllers other than the CPU 102, and the functions of the access statistics device 103 can be implemented by the other types of processors or memory controllers.

[0102] Among them, computer system 100, computer system 400 and computer system 500 are similar, and the difference is that the location of access statistics device 103 is different. In addition, computer system 500 does not include compression module 34. For example, if the storage location of memory addresses and the storage location of the number of accesses to memory addresses have been agreed upon between processor core 21 and access statistics device 103, processor core 21 can read the accessed memory addresses and the number of accesses to the accessed memory addresses from the agreed storage location. In this case, there is no need for compression module 34 to perform data compression. Among them, the agreed storage location can be a register or a storage space provided by a memory. In another possible implementation, the access statistics device 103 in computer system 100 and computer system 400 may also not include compression module 34.

[0103] The access statistics device 103 in computer system 100 and computer system 400 is located outside of CPU 102. The method in which processor core 21 reads access statistics information from the access statistics device outside of CPU 102 is called an out-of-band reading method. The access statistics device 103 in computer system 500 is located within CPU 102, and the method in which processor core 21 reads access statistics information from the access statistics device within the CPU is called an in-band reading method. Compared to the out-of-band reading method, the in-band reading method allows processor core 21 to read access statistics information more quickly, thereby improving the efficiency of processor core 21 in obtaining access statistics information. Compared to the in-band reading method, the access statistics device 103 does not need to be located within CPU 102, thus saving the cost of installing the access statistics device 103 within CPU 102.

[0104] Computer system 100, computer system 400 and computer system 500 are all illustrated by taking the example of integrating the various modules in the access statistics device 103 into the same device. In another possible implementation, the various modules in the access statistics device 103 can also be dispersed in different devices in the computer system. For example, the acquisition module 31 in the access statistics device 103 is located in the corresponding memory 101, and the statistics module 32, the memory 33 and the compression module 34 are integrated together and independent of the memory 101 and the CPU 102. Here, this application does not limit the location of the various modules in the access statistics device 103.

[0105] The computer system described above is described using the example of an access statistics device 103 corresponding to a memory of a certain media type. In another possible implementation, each memory in the hierarchical memory can correspond to a different access statistics device 103. Each access statistics device 103 is responsible for collecting memory addresses accessed by access requests issued to the corresponding memory and, based on the collected memory addresses, compiling access statistics for the corresponding memory. This allows the target application to determine hot data and / or cold data in the corresponding memory based on the access statistics for the corresponding memory.

[0106] The computer system introduced above can be deployed in the same computer device or in a computer cluster, which includes multiple computer devices, each of which includes a processor 102. The individual memories 101 in the hierarchical memory can be located in different computer devices in the computer cluster or in the same computer device in the computer cluster. The access statistics device 103 is located in the computer device where the corresponding memory 101 is located.

[0107] Next, based on the computer system introduced above, the access statistics method of the storage medium provided by the present application and the process of determining the page status of the memory page based on the statistical results are introduced in detail.

[0108] Figure 6 is a flow chart of a method for determining the page status of a memory page provided in the present application. The method is applied to any of the computer systems introduced above. The method is implemented through the interaction between an access statistics device in any of the computer systems and a processor core (referred to as a target processor core) running a target application. The method includes the following steps.

[0109] 601. An access statistics device obtains a first memory address accessed by an access request to a storage medium.

[0110] In which, the storage medium is the memory corresponding to the access statistics device in the hierarchical memory of the computer system, and the access request for the storage medium refers to any access request sent to the storage medium, and the access request carries the memory address to be accessed (i.e., the first memory address) to indicate read and write access to the first memory address of the storage medium, wherein read and write access to the first memory address refers to reading data or writing data at the first memory address.

[0111] If any processor core in the computer system needs to access a memory page in the storage medium, it sends an access request to the MMU in its CPU. This access request carries the virtual address to be accessed. The MMU updates the virtual address in the access request to a memory address in the storage medium and sends the updated access request to the storage medium. The storage medium then reads and writes to the memory address based on the access request and returns a read / write completion response. In this way, all access requests to the storage medium in the computer system are sent to the storage medium.

[0112] The access statistics device is configured with an access statistics cycle. During each access statistics cycle, the access statistics device obtains each access request sent to the storage medium. For each access request obtained, the access statistics device parses the memory address in the access request. The parsed memory address is the first memory address, and the number of accesses to the first memory address is counted through the following steps 602 and 603. Because the access statistics device collects the memory address in each access request sent to the storage medium during the access statistics cycle, rather than collecting memory addresses at a sampling rate, it can avoid missing accessed memory addresses and thus avoid inaccurate access statistics information for memory pages caused by missing memory addresses.

[0113] 602. The access statistics device searches for the first memory address from the mapping relationship between the memory addresses accessed by the storage medium and the number of accesses.

[0114] The memory addresses accessed by the storage medium refer to the memory addresses parsed from the access requests sent to the storage medium within an access statistical cycle, that is, the memory addresses accessed by the storage medium. Before obtaining the first memory address, the storage medium may have at least one or no memory addresses accessed. A mapping relationship refers to a mapping relationship between an accessed memory address and the number of accesses to the memory address, where the number of accesses is the actual number of times the memory address is accessed through the storage medium within an access statistical cycle.

[0115] In a possible implementation, the access statistics device records the mapping relationship between the memory addresses accessed by the storage medium and the number of accesses through the address table and the access statistics table. The access statistics device queries the first memory address from the address table to implement this step 602.

[0116] The address table is used to record the memory addresses of the storage medium that have been accessed within an access statistics period, and the access statistics table is used to record the number of times the memory addresses of the storage medium have been accessed.

[0117] Table 1

[0118] Exemplarily, as shown in Table 1 above, the address table includes multiple address entries, for example, M address entries, where M is the address capacity of the address table and M is an integer greater than 0. An address entry is used to record a memory address that has been accessed in the storage medium. As shown in Table 1, an address entry includes a memory address that has been accessed in the storage medium and a valid identifier (VId). The memory address in the address entry occupies multiple bits, such as the memory address "0x0004" in Table 1.

[0119] The valid flag is used to indicate whether the address entry is a valid address entry and occupies 1 bit. As shown in Table 1, the valid flag is 1, indicating that the address entry is a valid address entry, the memory address in the valid address entry is valid, and the memory address is the memory address of the storage medium that has been accessed in the current access statistical period. The number of accesses corresponding to the valid address entry in the access statistics table is valid, which is the number of accesses to the memory address in the valid address entry. The valid flag is 0, indicating that the address entry is an invalid address entry. The invalid address entry may or may not have been filled with a memory address. If the invalid address entry has been filled with a memory address, the memory address in the invalid address entry is invalid. The memory address is not the memory address of the storage medium that has been accessed in the current access statistical period, but may be the memory address of the storage medium that has been accessed before the current access statistical period. The number of accesses corresponding to the invalid address entry in the access statistics table is invalid and cannot be used as the number of accesses to the memory address in the invalid address entry. In another possible implementation, the valid flag is 0, indicating that the address entry is valid, and the valid flag is 1, indicating that the address entry is invalid. If the valid flag in an address entry indicates that the address entry is valid, then the address entry is a valid address entry. If the valid flag in an address entry indicates that the address entry is invalid, then the address entry is an invalid address entry.

[0120] As shown in Table 1, the access statistics table includes multiple access counts (CNT), such as M access counts from CNT(1) to CNT(M). The multiple access counts are preset for each address entry in the address table, that is, any address entry in the address table corresponds to an access count in the access statistics table, indicating that the access count is the number of accesses to the memory address recorded by the address entry. At the beginning of any access statistics cycle, each access count in the access statistics table is set to 0. During the access statistics cycle, each time a memory address is obtained, the access count corresponding to the memory address in the access statistics table is updated to count the number of accesses to the memory address.

[0121] Taking the migration process of hot data in the local statistics mode shown in Figure 7 as an example, initially, the target processor core performs the following three configurations on the access statistics device:

[0122] The first configuration is to configure the access statistics mode of the access statistics device to a local statistics mode.

[0123] The access statistics mode refers to the statistics mode used by the access statistics device to count the access statistics information of the storage medium, and the local statistics mode refers to counting the number of accesses to M different memory addresses obtained continuously in one access statistics cycle.

[0124] The second configuration is to configure the address capacity M of the address table.

[0125] Among them, by configuring the address capacity M, the number of memory addresses recorded in the address table is controlled to control the storage space occupied by the address table, avoiding the address table occupying a large amount of storage space. When providing access statistics to the target application, at most M memory addresses and the number of accesses to M memory addresses are transmitted to the target processor core, thereby reducing transmission overhead.

[0126] The third configuration is to configure the enabling method of the address collection function of the access statistics device.

[0127] For example, the access statistics device includes a threshold register, and a second number threshold is configured in the threshold register. If the access statistics table does not contain an access count greater than or equal to the second number threshold, the address collection function is enabled, and the access statistics device implements address collection by executing the above step 601. If the access statistics table contains an access count greater than or equal to the second number threshold, the address collection function is disabled, and address collection is stopped, thereby controlling the address collection time. For another example, the address table is configured as an enable switch for the address collection function. If there are unused address entries in the address table, the access statistics device is enabled. If there are no unused address entries in the address table, the address collection function is disabled, and address collection is stopped, thereby controlling the address collection time. The valid identifier in the address entry is optional. If the address entry includes a valid identifier, the unused address entry refers to an invalid address entry. If the address entry does not include a valid identifier, the unused address entry refers to an empty address entry that is not filled with a memory address.

[0128] In one possible implementation, the address collection function is implemented by a collection module in the access statistics device. The third configuration can be performed in the collection module. After the address collection function is enabled, the collection module performs address collection by executing step 601 above. After the address collection function is disabled, the address collection module stops collecting addresses.

[0129] As shown in FIG7 , after the access statistics device is configured, during each access statistics cycle, the access statistics device queries whether the memory addresses in the address table are cleared and whether the access counts in the access statistics table are cleared. If the memory addresses exist in the address table, the memory addresses in the address table are cleared and the valid flags in each address entry in the address table are set to 0, thereby setting each address entry to an invalid address entry. If a non-zero access count exists in the access statistics table, the non-zero access count is set to 0, thereby clearing the access count in the access statistics table to 0. After clearing the memory addresses in the address table and clearing the access counts in the access statistics table, the device determines whether the address collection function is enabled. If not, the device waits for the address collection function to be enabled. If the address collection function is enabled, the device collects addresses for each access request sent to the storage medium. For each memory address collected, the device uses the memory address as the first memory address and queries the address table to determine whether the first memory address exists. If the first memory address exists in the address table, the device executes step 603.

[0130] 603. If the first memory address exists in the memory addresses accessed by the storage medium, the access statistics device updates the number of accesses in the mapping relationship where the first memory address is located.

[0131] The number of accesses in the mapping relationship where the first memory address resides is, that is, the number of accesses to the first memory address. The updated number of accesses is the latest number of accesses to the first memory address in the current access statistics period. If the first memory address exists in the address table, that is, the first memory address exists among the memory addresses accessed by the storage medium in the current access statistics, for ease of description, the address entry in the address table where the first memory address resides is referred to as the first address entry, and the number of accesses corresponding to the first address entry in the access statistics table is the number of accesses to the first memory address.

[0132] Taking Figure 7 as an example, the access statistics device queries whether the first memory address exists in the address table. If the first memory address exists in the address table, based on the mapping relationship between the address entry in the address table and the number of accesses in the access statistics, the number of accesses corresponding to the first address entry in the access statistics table is increased by 1 to update the number of accesses to the first memory address.

[0133] If the first memory address does not exist in the address table, the access statistics device cannot query the first memory address. For example, when querying the first memory address, all memory addresses in the address table have been cleared, that is, the address table has not yet recorded the memory addresses of the storage medium accessed in the current access statistics period, and the access statistics device cannot query the first memory address. For another example, when querying the first memory address, there are N memory addresses in the address table. If none of the N memory addresses is the first memory address, the first memory address cannot be queried, where N is greater than 0 and less than or equal to M. The N memory addresses are the memory addresses of the storage medium accessed in the current access statistics period. If none of the N memory addresses is the first memory address, the first memory address does not exist among the memory addresses of the storage medium accessed.

[0134] Next, for the case where the first memory address does not exist in the address table, the processing process of the first memory address is introduced as follows.

[0135] As shown in FIG7 , if the first memory address does not exist in the address table, the access statistics device queries whether there is an unused address entry in the address table. Taking the case where the address table includes a valid identifier as an example, the address table is queried to see whether there is an invalid address entry with a valid identifier of 0. If an invalid address entry exists in the address table, the invalid address entry found is an unused address entry. If no invalid address entry exists in the address table, then no unused address entry exists in the address table. Taking the case where the address table does not include a valid identifier as an example, the access statistics device queries whether there is an empty address entry in the address table. If an empty address entry exists in the address table, the empty address entry found is an unused address entry. If no empty address entry exists in the address table, then no unused address entry exists in the address table.

[0136] Continuing with FIG7 , after querying the unused address entries, if any unused address entries exist in the address table, the access statistics device fills the first memory address in any unused address entry to update the unused address entry to the first address entry, and increments the access count corresponding to the unused entry in the access statistics table by 1 to update the access count for the first memory address. If the unused address entry also includes a valid flag, the valid flag is also set to 1 to update the unused address entry to a valid address entry.

[0137] In any access statistics cycle (such as the current access statistics cycle), each time the access statistics device obtains a memory address, it executes the above steps 602 and 603 for the memory address. In this access statistics cycle, multiple different memory addresses will be obtained, and at most M different memory addresses will be recorded in the address table. For any memory address recorded in the address table, each time the memory address is obtained, the number of accesses to the memory address in the access statistics table will be increased by 1. As the number of times the memory address is obtained increases, the value of the number of accesses to the memory address will also become larger. In this way, the access statistics device can count the actual number of accesses to each memory address recorded in the address table in the access statistics cycle.

[0138] In the local access statistics mode, in any access statistics cycle, if there is no unused address entry in the address table, then each address entry in the address table has been filled with a memory address. If a memory address that does not exist in the address table is obtained, the access statistics device can report it to the target processor core so that the target processor core can read the access count of each collected memory address as soon as possible. Still taking the acquisition of the first memory address as an example, referring to Figure 7, in the local access statistics mode, if the first memory address does not exist in the address table (that is, the first memory address does not exist in the memory addresses that have been accessed by the storage medium) and there is no unused address entry in the address table, the access statistics device stops address collection, sends a first interrupt message to the target processor core, and enters the data return process, wherein the first interrupt message indicates that all address entries in the address table have been used, resulting in an access statistics interruption. This allows the target processor core to read the memory addresses in the address table and the access counts in the access statistics table as soon as possible, so that the access statistics device can initialize the address table and the access statistics table as soon as possible, and then, based on the initialized address table and access statistics table, can count the accesses of the subsequently obtained memory addresses as soon as possible.

[0139] In another possible implementation, the target processor core may also send a stop collection instruction to the access statistics device, instructing the access statistics device to stop address collection. In this case, as shown in Figure 7, within an access statistics cycle, after the access count of the first memory address is updated in the access statistics table, if the stop collection instruction is received, the access statistics device stops address collection and enters the data return process.

[0140] In another possible implementation, when the threshold register is configured with a second number threshold, if there is an access number greater than or equal to the second number threshold among the multiple access numbers in the access statistics table, the access statistics device stops address collection and sends a second interrupt message to the target processor core. The second interrupt message indicates that the access statistics are interrupted because the memory address has an access number greater than or equal to the second number threshold. Taking the case where the access number of a memory address is greater than or equal to the second number threshold to trigger the stop of address collection as an example, as shown in Figure 7, after the access number of the first memory address is updated in the access statistics table, if the stop collection instruction is not received, it is determined whether the updated access number of the first memory address reaches (i.e., whether it is greater than or equal to) the second number threshold. If it reaches the second number threshold, the access statistics device stops address collection, sends a second interrupt message to the second processor core, and enters the data return process. If the updated access number of the first memory address does not reach the second number threshold, the access statistics device continues to collect addresses. In another possible implementation, if there are K access times greater than or equal to the second number threshold in the access statistics table, the access statistics device may also be triggered to stop address collection and send a second interrupt message to the target processor core. K is greater than 1 and less than or equal to M. The value of K can be configured by the target processor core. Here, this application does not limit the value of K.

[0141] For this implementation, after the number of accesses reaching the second threshold value exists in the address table, an interrupt message is sent to the target processor core to notify the target processor core that the access statistics of the storage medium have been interrupted, so that the target processor core can read the memory address in the address table and the number of accesses in the access statistics table as soon as possible, so that the second processing core can determine the hot data in the storage medium based on the number of accesses reaching the second threshold value, without the target processor core having to wait for the end of the access statistics cycle or waiting for the address table to be filled, thereby improving the efficiency of the target processor core in determining hot data.

[0142] The process shown in steps 601 to 603 above is the flow of the access statistics device executing the access statistics method for a storage medium, namely, the access statistics flow for a storage medium in the local statistics mode. In the local statistics mode, the address table is the address window in the local statistics mode, and the access statistics table is the access statistics window in the local statistics mode. During any access statistics cycle, each time a memory address is collected, if the memory address does not exist in the address table and there is an unused address entry in the address table, the access statistics device fills the unused address entry with the memory address to update the memory address stored in the address table based on the memory address. If the memory address exists in the address table and there is no unused address entry in the address table, a first interrupt message is sent to the target processor core to suspend address collection. Subsequently, after the address table is cleared, address collection is resumed. In this way, the address table can record all memory addresses accessed by the storage medium during the access statistics cycle, thereby enabling the address table with fixed address entries to function as a global address window. Therefore, in the local statistics mode, the address table serves as a global address window, which is used to store all memory addresses accessed by the storage medium during the access statistics cycle.

[0143] In the local statistics mode, each time the access statistics device obtains a first memory address, it obtains an updated address table based on the memory addresses stored in the updated address table. For example, if the first memory address does not exist among the memory addresses stored in the address table and there is an unused address entry in the address table, the first memory address is filled in the unused address entry. The access statistics device updates the access count stored in the access statistics table based on the first memory address to obtain an updated access statistics table. For example, if the first memory address exists among the memory addresses stored in the address table, the access count of the first memory address in the access statistics table is increased by 1. For another example, if the first memory address is filled in the unused address entry, the access count corresponding to the unused address entry in the access statistics table is set to 1. As the address table and the address access statistics table are updated, the access statistics device subsequently sends access statistics information of the storage medium to the target processor core based on the memory addresses in the updated address window and the access counts in the updated access statistics window. The target processor core identifies at least one of the hot, cold, and warm memory pages in the storage medium based on the access statistics (as described in steps 604 and 605 below).

[0144] 604. After the first period of time, the access statistics device sends access statistics information of the storage medium to the target processor core based on the latest access count of the memory address accessed by the storage medium.

[0145] Among them, the first duration is the duration from the start time of an access statistical cycle to the end time of address collection of the access statistical cycle. The end time of address collection may be the end time of the access statistical cycle or the time before the end time of the access statistical cycle.

[0146] Based on the configuration of the access statistics device, at the end of an access statistics cycle, upon receiving a stop collection instruction, or upon the presence of an access count greater than or equal to the second threshold in the access statistics table, the access statistics device may be triggered to stop address collection and send an interrupt message (such as a first interrupt message or a second interrupt message) to the target processor core to indicate an access statistics interrupt and enter the data return process. As shown in Figure 7, during the data return process, upon receiving an interrupt message or upon the end of an access statistics cycle, the target processor core sends an information read request to the access statistics device, which instructs the access statistics information of the storage medium to be read. After receiving the access information read request, the access statistics device sends access statistics information to the target processor core based on each memory address accessed by the storage medium and the latest access count of each memory address, thereby implementing data return.

[0147] After the address collection is completed, the access statistics device will no longer add new memory addresses to the address table, nor will it update the number of accesses in the access statistics table. The memory address recorded in the current address table is the memory address to which the storage medium has been accessed after the first period of time, and the number of accesses recorded in the access statistics table is the latest number of accesses to the corresponding memory address after the first period of time. Based on this, the access statistics device generates access statistics information based on each memory address recorded in the address table and the number of accesses to each memory address in the access statistics table. The access statistics information includes each memory address to which the storage medium has been accessed and the number of accesses to each memory address within the first period of time.

[0148] After generating the access statistics, the access statistics device sends an information read response carrying the access statistics to the target processor core. Alternatively, if the access statistics device also has a data compression function, after generating the access statistics, the access statistics device compresses the access statistics to obtain compressed access statistics, and sends an information read response carrying the compressed access statistics to the target processor core, thereby reducing transmission overhead of the access statistics.

[0149] 605. The target processor core receives the access statistical information, and determines, based on the access statistical information, a page status of a memory page to which the memory address accessed by the storage medium belongs, where the page status is used to indicate the access heat of the memory page.

[0150] The memory page to which the accessed memory address belongs is the memory page accessed by the storage medium within the first time period. In one possible implementation, the page state is divided into a hot page state, a cold page state, or a warm page state, wherein the warm page state is an optional state, and different page states indicate different degrees of heat. For example, the degrees of heat indicated by the cold page state, the warm page state, and the hot page state increase in sequence. When the memory page is in the hot page state, the memory page is a hot page; when the memory page is in the cold page state, the memory page is a cold page; and when the memory page is in the warm page state, the memory page is a warm page.

[0151] If the storage medium exists in the hierarchical memory at a level above the previous level, the target processor core determines whether the page status of the memory page accessed from the storage medium is a hot page based on the access statistics, that is, determines whether the accessed memory page is a hot page. If the hierarchical memory does not exist, the target processor core does not need to determine whether the accessed memory page is a hot page.

[0152] Assuming that the upper level memory exists in the hierarchical memory, and continuing to refer to FIG7 , after receiving the access statistics information (compressed or uncompressed) of the storage medium, the target processor core parses the access statistics information to obtain multiple memory addresses that have been accessed by the storage medium and the access counts of the multiple memory addresses. Based on the access counts of the multiple memory addresses, the target processor core determines the hot pages in the storage medium. For example, for the memory addresses belonging to the same memory page among the multiple memory addresses, if the sum of the access counts of the memory addresses of the same memory page is greater than or equal to the third threshold value, the memory page is determined to be a hot page. For each hot page in the storage medium, the target processor core migrates the hot data in each hot page to the upper level memory, such as to a cold page in the upper level memory. Here, the method and process for determining the cold page in the upper level memory are not limited. Alternatively, the target processor core uses the sum of the access counts of the memory addresses of the same memory page as the total access count of the memory page, selects the P (P ≥ 1) hot pages with the highest total access count as the hot pages to be migrated, and migrates the hot data in each hot page to be migrated to the upper level memory.

[0153] If a lower level of memory exists in the hierarchical memory for the storage medium, the target processor core determines, based on the access statistics, whether the page status of the memory page accessed from the storage medium is a cold page state, that is, determines whether the accessed memory page is a cold page. If the lower level of memory does not exist in the hierarchical memory, the target processor core does not need to determine whether the accessed memory page is a cold page.

[0154] Assuming that the next-level memory exists in the hierarchical memory, after parsing the multiple memory addresses that have been accessed by the storage medium and the access counts of the multiple memory addresses from the access statistics, the target processor core determines the cold pages in the storage medium based on the access counts of the multiple memory addresses. For example, for memory addresses belonging to the same memory page among the multiple memory addresses, if the sum of the access counts of the memory addresses of the same memory page is less than or equal to a fourth threshold, the memory page is determined to be a cold page. If there are unaccessed memory pages in the storage medium, the target processor core also determines the unaccessed memory pages as cold pages. For each cold page in the storage medium, the target processor core migrates the cold data in each cold page to the next-level memory. Alternatively, the target processor core uses the sum of the access counts of the memory addresses of the same memory page as the total access count of the memory page, the total access count of the unaccessed cold pages is 0, and Q (Q ≥ 1) cold pages with the lowest total access counts are selected as cold pages to be migrated, and the cold data in each cold page to be migrated is migrated to the next-level memory. The fourth number threshold is greater than or equal to 0 and less than the third number threshold.

[0155] The above is an example of migrating cold data in cold pages and hot data in hot pages after the target processor core determines the cold pages and / or hot pages in the storage medium based on access statistics. In another possible implementation, the target processor core is responsible for determining the page status of the memory pages in the storage medium, but is not responsible for migrating cold data and / or hot data.

[0156] In another possible implementation, the target processor core determines whether the page state of the memory page accessed by the storage medium is a warm page state based on the access statistics information, that is, determines whether the memory page accessed is a warm page. Exemplarily, after parsing the multiple memory addresses accessed by the storage medium and the number of accesses to the multiple memory addresses from the access statistics information, the target processor core determines the warm page in the storage medium based on the number of accesses to the multiple memory addresses. For example, for the memory addresses belonging to the same memory page among the multiple memory addresses, if the sum of the number of accesses to the memory addresses of the same memory page is greater than the fourth number threshold and less than the third number threshold, then the memory page is determined to be a warm page, and the data in the warm page is called warm data. Compared with hot data, the warm data in the storage medium is not frequently accessed. Compared with cold data, the warm data in the storage medium is frequently accessed. Generally, hot data is migrated to the upper level memory, cold data is migrated to the lower level memory, and the warm data in the storage medium is retained, and the warm data is not migrated to other storage media. In another possible implementation, since warm data is not migrated, the target processor core may not execute the step of determining whether the accessed memory page is a warm page.

[0157] The above steps 604 and 605 are both explained by taking the access statistical information including multiple memory addresses accessed by the storage medium and the access counts of the multiple memory addresses as an example. In another possible implementation, the access statistical information includes the memory addresses (i.e., page addresses) of the memory pages accessed by the storage medium and the total access counts of each memory page, but does not include the memory addresses accessed in the accessed memory pages and the access counts of the memory addresses accessed in the memory pages, thereby reducing the number of memory addresses and the number of access counts in the access statistical information, reducing the data volume of the access statistical information, and thereby reducing the transmission overhead of the access statistical information.

[0158] Exemplarily, in step 604, for each memory address in the same memory page in the address table, the access statistics device determines the sum of the access times of each memory address in the same memory page as the total access times of the memory page, thereby being able to obtain the total access times of each memory page accessed by the storage medium. Based on the page addresses of each memory page accessed and the total access times of each memory page, access statistics information is generated and sent to the second processing core. In step 605, the second processing core obtains the total access times of each memory page accessed by the storage medium from the access statistics information, and determines the page status of each memory page based on the total access times of each memory page. There is no need for the target processor core to calculate the total access times of each memory page accessed by the storage medium, which reduces the computational complexity of the target processor core.

[0159] In the related art, the access statistics information (referred to as existing access statistics information) obtained by the target processor core includes the total number of accesses to each memory page of the storage medium and the page address of each memory address. If there is no need to determine the cold pages in the storage medium, the memory pages that have not been accessed must be cold pages. Then, the page addresses and total number of accesses of the memory pages that have not been accessed in the existing access statistics information are redundant information or invalid information, and the page addresses and total number of accesses of the memory pages that have been accessed are valid information. In the case where the access statistics information sent in the present application includes the page addresses of the memory pages that have been accessed and the total number of accesses to the memory pages, the target processor core is provided with the valid information required for determining hot pages and / or cold pages, thereby increasing the proportion of valid information in the access statistics information and increasing the information entropy of the access statistics information, wherein the information entropy is used to reflect the proportion of valid information in the access statistics information.

[0160] The above description is based on the example of the target processor core determining the page status of the memory page accessed by the storage medium based on the access statistical information. In another possible implementation, the page status of the memory page accessed is determined by the access statistics device. Exemplarily, the access statistics device determines the heat of the memory page in the storage medium based on the memory address in the updated address table and the number of accesses in the updated access statistics table. For example, after a first period of time, the access statistics device determines the page status of the memory page accessed by the storage medium based on the latest number of accesses to the memory address accessed by the storage medium, and generates access statistics based on the page status of each memory page accessed by the storage medium and the page address of each memory page. At this time, the access statistics include the page status identifier of each memory page accessed and the page address of each memory page. The access statistics device sends the access statistics to the target processor core. In step 605, the second processing core obtains the page status identifier of each memory page that has been accessed by the storage medium from the access statistical information. Based on the indication of the page status identifier of each memory page, the second processing core can learn the page status of each memory page. There is no need to determine the page status of each memory page based on the total number of accesses to each memory page, thereby reducing the computational complexity of the target processor core.

[0161] The method provided in FIG6 records the access count of the accessed memory addresses through a mapping relationship between the memory addresses accessed by the storage medium and the access count. After obtaining the memory address accessed by the access request for the storage medium, the obtained memory address is queried from the mapping relationship. If the obtained memory address exists among the memory addresses accessed by the storage medium, the access count of the memory address in the mapping relationship is updated to obtain the latest access count of the memory address. As the number of obtained memory addresses increases, the actual access count of the memory addresses accessed by the storage medium can be accurately obtained. Based on the actual access count of the memory addresses accessed by the storage medium, the page status of the memory pages accessed by the storage medium can be accurately identified. In addition, the address capacity of the address table is limited, and the storage space occupied by the address table is relatively small. The address table records the accessed memory addresses, thereby utilizing less storage space and accurately determining the hot pages in the storage medium.

[0162] The above-mentioned Figures 6 and 7 are both explained by taking the access statistics device as an example to count the access statistics information of the corresponding storage medium according to the local statistics mode. In another possible implementation, the access statistics device also supports a statistical method that expands the local statistics mode into a global statistics mode to count the access statistics information of the corresponding storage medium, wherein the global statistics mode refers to counting the M memory addresses with the highest access popularity within the access statistics period. These M memory addresses are also the globally hottest memory addresses in the access statistics period, and M is greater than 1. Among them, the access popularity can be reflected by two dimensions, one dimension is the number of accesses, and the other dimension is the most recent access. For example, the higher the number of accesses to a memory address, the higher the access popularity of the memory address, and the hotter the memory address. However, if the number of accesses is ignored, the more recently the memory address is accessed, the higher the access popularity of the memory address, and the hotter the memory address.

[0163] Assume M = 1000. During a certain access statistics cycle, a storage medium has 10,000 memory addresses accessed. A global statistics model is used to count the 1,000 most popular memory addresses from these 10,000 memory addresses. The global statistics model involves an address window, which is used to store the memory addresses accessed by the storage medium. The address window has an address capacity of M. If the number of memory addresses accessed by the storage medium during an access statistics cycle exceeds M, the address window can only store M accessed memory addresses and cannot store all accessed memory addresses. Therefore, the address window is also called a local address window. During an access statistics cycle, each time a memory address accessed by the storage medium is obtained, the access statistics device records the memory address in the address window until the address window is filled with memory addresses. Then, using a swap-in / swap-out mechanism, the least popular memory address in the address window is swapped out and the newly obtained memory address is swapped into the address window until the access statistics cycle ends. Thus, at the end of the access statistics cycle, the memory address remaining in the address window is the memory address with the highest number of accesses during the access statistics cycle and can be considered the global hottest memory address for the access statistics cycle. If a new memory address is swapped into the address window shortly before the end of an access statistics cycle, the new memory address may have a lower access count during the access statistics cycle due to its shorter access time. However, the new memory address is the most recently accessed. At the end of the access statistics cycle, the memory addresses remaining in the address window will be composed of a portion of the memory addresses with the highest access count during the access statistics cycle and a portion of the memory addresses with the most recent access count. These remaining memory addresses can also be considered the global hottest memory addresses during the access statistics cycle. This global statistics model is equivalent to forming a global address sequence from the memory addresses accessed by the storage medium during the access statistics cycle. A sliding window operation is performed on this address sequence, sliding the address window from the first memory address in the address sequence to the last memory address, thus logically transforming the address window into a global address window. During the sliding process, a swap-in / swap-out mechanism is used to retain the globally hottest memory address in the address sequence within the address window. Therefore, the global statistics model also refers to the sliding window operation that calculates access statistics for the corresponding storage medium during an access statistics cycle.

[0164] Before the access statistics device uses the global access statistics mode to perform access statistics on the storage medium, the target processor core performs the following three configurations on the access statistics device during the process of running the target application:

[0165] The first configuration is to configure the access statistics mode of the access statistics device to the global statistics mode.

[0166] For example, the access statistics device does not have a default access statistics mode, which includes a local statistics mode and a global statistics mode, and the global statistics mode is configured as the access statistics mode of the access statistics device.

[0167] In other embodiments, the access statistics device has a default access statistics mode, and the default access statistics mode does not support modification or configuration. For example, the local statistics mode or the global statistics mode is the default access statistics mode of the access statistics device. In this case, there is no need to configure the access statistics mode of the access statistics device. When subsequently counting memory addresses accessed by the storage medium, the access statistics device can perform statistics according to the default access statistics mode.

[0168] In other embodiments, the access statistics device has a default access statistics mode, and the default access statistics mode supports modification or configuration. For example, initially, the local statistics mode or the global statistics mode is the default access statistics mode of the access statistics device. Subsequently, based on business needs, the default access statistics mode can be configured to: a non-default access statistics mode among the local statistics mode and the global statistics mode. Subsequently, when counting the memory addresses accessed by the storage medium, the access statistics device performs statistics according to the newly configured access statistics mode. Of course, later, based on new business needs, the access statistics mode can also be configured from the non-default access statistics mode back to the default access statistics mode. Accordingly, when counting the memory addresses accessed by the storage medium, the access statistics device performs statistics according to the default access statistics mode.

[0169] The second configuration is to configure the address capacity M of the address window.

[0170] The address window includes M address entries, each of which is used to record a memory address that has been accessed by the storage medium. The address window can be the address table described above. For example, address table 36 with an address capacity of M in FIG11 is the address window. The process of configuring the address capacity M of the address window is similar to the second configuration process described in step 602 and is not further described here.

[0171] In hardware implementation, the address window is implemented by a content addressable memory (CAM). For example, in FIG11 , CAM35 stores an address table 36 serving as an address window. CAM is an associative memory with a fully associative structure. In hardware implementation, the address window may also be implemented by associative memories with other associative structures, such as a group associative structure, a cluster associative structure, or a skewed associative structure. Compared with associative memories with other associative structures, CAM can store more data with a smaller chip footprint. Therefore, when the address capacity M is constant, implementing the address window through CAM can reduce the chip footprint of the address window compared to associative memories with other associative structures. In another possible implementation, the address window can also be implemented through a hash structure, such as a cuckoo hash and other hash structures. Here, the embodiment of the present application does not limit the hardware implementation of the address window.

[0172] For ease of description, the memory used to implement the address window is referred to as the first memory. In one possible implementation, the address capacity M of the address window can determine the type of the first memory. For example, the address capacity M of the address window is determined by the following determination method 1 or determination method 2. Based on the expected chip area and address capacity M, an associative memory is selected from CAM and other associative memories with associative structures as the first memory, and an address table with an address capacity of M is created in the first memory. This address table is also the address window. The selected first memory can meet the dual requirements of the expected chip area and address capacity M. The expected chip area refers to the expected chip area of ​​the first memory, and the address capacity M refers to the expected number of memory addresses that the first memory can store, which is also the maximum address capacity of the address table. Based on this possible implementation, when configuring the address capacity M of the address window, the target processor core obtains the address capacity of the first memory in the access statistics device and configures the address capacity of the first memory as the address capacity M of the address window.

[0173] Determination method 1: Determine the address capacity M based on the migration bandwidth used when performing hot data migration on the corresponding storage medium.

[0174] Hot data migration refers to migrating data in hot pages. Different migration bandwidths correspond to different address capacities M. For example, a migration bandwidth of 1 million bits per second (M / s) corresponds to an address capacity M of 1000, and a migration bandwidth of 2 M / s corresponds to an address capacity M of 2000. Different types of storage media may use the same or different migration bandwidths. Based on this, the target processor core determines the address capacity M corresponding to the migration bandwidth of the storage medium as the address capacity of the address window of the access statistics device corresponding to the storage medium.

[0175] By determining the address capacity M determined by method 1, the number of memory addresses in the address window can meet the migration bandwidth requirements of the storage medium, allowing for effective bandwidth utilization and avoiding ineffective bandwidth utilization due to too many or too few memory addresses in the address window. For example, since the total bandwidth is fixed, if there are too many memory addresses in the address window, the amount of hot data to be migrated increases, and the required migration bandwidth increases, which will occupy more bandwidth and affect other applications, thus preventing effective bandwidth utilization. If there are too few memory addresses in the address window, the amount of hot data to be migrated decreases, reducing the occupied migration bandwidth and wasting some bandwidth, preventing effective bandwidth utilization.

[0176] Determination method 2: determining the address capacity M based on the memory access characteristics (ie, memory access characteristics) of the first application program.

[0177] Among them, the first application is a key application or a hot application in the application scenario where the storage medium is located. The key application refers to the application that provides key business services in the application scenario, and the hot application refers to the application that is frequently used in the application scenario. The application scenario can be a cloud scenario or a non-cloud scenario. The memory access feature is, for example, the expected number of hot pages, wherein the expected number of hot pages refers to the number of hot pages that the first application expects to determine from the storage medium. Different expected numbers of hot pages correspond to different address capacities M. The expected number of hot pages is less than the corresponding address capacity M. For example, if the expected number of hot pages is 500, the corresponding address capacity M can be 1000. If the expected number of hot pages is 1000, the corresponding address capacity M can be 2000.

[0178] For example, different types of applications have different expected numbers of hot pages, or different applications have different expected numbers of hot pages. The address capacity corresponding to the expected number of hot pages of the application served by the storage medium is determined as the address capacity M of the address window, so that the address window can meet the hot page requirements of different applications.

[0179] In another possible implementation, an address table is stored in the first memory, and the target processor core uses the address table as an address window. The maximum address capacity of the address table is configured as the address capacity M of the address window. When subsequently performing access statistics on the storage medium, the access statistics device uses the M address entries in the address table in the first memory as the address window based on the configured address capacity M, and records the memory addresses of the storage medium that have been accessed in the address window.

[0180] The global statistics mode also involves an access statistics window corresponding to the address window. Similarly, in the global statistics mode, the access statistics window is a local statistics window used to record the number of accesses to each memory address in the address window. For example, the access statistics window includes M access times, each of which corresponds to a different address entry in the address window. Each access time is an access count of the memory address in the corresponding address entry. Accordingly, M is the access times capacity of the access statistics window. The access statistics window can be the access statistics table introduced above. The access statistics table can be stored in a memory. For ease of description, the memory storing the access statistics table is referred to as a second memory. Subsequently, when the access statistics device performs access statistics on the storage medium, based on the address capacity M of the configured address window, the M access times of the access statistics table in the second memory are used as the access statistics window. Each time a memory address is stored in the address window, the number of accesses corresponding to the address entry where the memory address is located in the access statistics window is used as the number of accesses to the memory address.

[0181] The third configuration is to configure the enabling method of the address collection function of the access statistics device.

[0182] Among them, this configuration can refer to the third configuration introduced in step 602, and will not be repeated here.

[0183] After the access statistics device is configured, the access statistics device performs access statistics on the corresponding storage medium through a global statistics mode. The global statistics mode is introduced in detail below in conjunction with a flow chart of a memory page heat determination method provided by the present application shown in FIG8 .

[0184] 801. An access statistics device obtains a first memory address accessed by an access request to a storage medium.

[0185] Here, step 801 is similar to step 601 and will not be described in detail here.

[0186] As shown in FIG9 , after the access statistics device is configured, taking the address window as the address table and the access statistics window as the access statistics table as an example, during each access statistics cycle, the access statistics device first checks whether the memory addresses in the address table are cleared and whether the access counts in the access statistics table are cleared. If the memory addresses exist in the address table, the memory addresses in the address table are cleared and the valid flags in each address entry in the address table are set to 0, thereby setting each address entry to an invalid address entry. If a non-zero access count exists in the access statistics table, the non-zero access count is set to 0. After the memory addresses in the address table are cleared and the access counts in the access statistics table are cleared, the device determines whether the address collection function is enabled. If not, the device waits for the address collection function to be enabled. If the address collection function is enabled, the device collects addresses for each access request sent to the storage medium. For each memory address collected, the device uses the memory address as the first memory address and checks whether the first memory address exists in the address table. If the first memory address exists in the address table, the access count corresponding to the first address entry in the access statistics table is incremented by 1 to update the access count for the first memory address. If the first memory address does not exist in the address table, the access statistics device queries the address table for an unused address entry. If an unused address entry exists in the address table, the first memory address is processed in a manner similar to that shown in FIG7. If the first memory address does not exist in the address table (i.e., the first memory address does not exist in the memory addresses of the storage medium that have been accessed) and there is no unused address entry in the address table, the access statistics device proceeds to step 802 to replace a memory address in the address table with the first memory address.

[0187] As the number of collected memory addresses increases, the address window gradually fills with memory addresses. To distinguish the newly collected memory addresses from the memory addresses in the address window, the newly collected memory addresses are referred to as first memory addresses, and the memory addresses in the address window are referred to as second memory addresses. The first memory address in step 801 is the newly collected memory address, i.e., the memory address to be counted.

[0188] 802. The access statistics device updates the memory address stored in the address window according to the first memory address to obtain an updated address window, where the address window is used to store memory addresses accessed in the storage medium in a recent time period.

[0189] The most recent time period refers to: a time period from the start time of the access statistics period to the current time, or a time period from a certain time after the start time to the current time.

[0190] In global statistics mode, the address window is a local address window. If the address window is full of second memory addresses and the first memory address does not exist in the second memory addresses stored in the address storage window, the access statistics device may update one of the second memory addresses in the address window to the first memory address, thereby storing the most recently accessed memory address in the address window. This ensures that the address window stores the memory addresses accessed in the storage medium within the most recent time period. Exemplarily, the processing process in this case is described below through steps 8021 to 8022.

[0191] Step 8021: If the address window has stored M second memory addresses and the first memory address does not exist among the M second memory addresses, the access statistics device determines a third memory address based on the first access count of the M second memory addresses. The third memory address is the memory address with the lowest access popularity among the M second memory addresses. M is the address capacity of the address window, and M is greater than 1.

[0192] The first access count of any second memory address is the access count of the second memory address recorded in the access statistics window. The third memory address is a memory address to be swapped out (ie, to be eliminated) in the address window.

[0193] Taking a first memory address to be counted as an example, after obtaining the first memory address, the access statistics device queries whether the first memory address exists in the address window. If the first memory address exists, the access count of the first memory address in the access statistics window is increased by 1. If the first memory address does not exist in the address window, the address window is queried whether there is an unused address entry. If there is an unused address entry in the address window, it means that the address window has not yet stored M second memory addresses. The access statistics device stores the first memory address in the unused address entry, and sets the access count corresponding to the unused address entry to 1, so as to use the access count corresponding to the unused address entry in the access statistics table as the access count of the first memory address, so that the first memory address becomes the new second memory address. If there is no unused address entry in the address window, it means that M second memory addresses have been stored in the address window, and the first memory address does not exist among the M second memory addresses. The access statistics device then determines the third memory address based on the first access count of the M second memory addresses.

[0194] In a possible implementation, the access statistics device determines the third memory address by attenuation, such as in the following steps A1 and A2.

[0195] A1. The access statistics device performs attenuation processing on the first access times of the M second memory addresses.

[0196] The degree of attenuation of each first access count is determined by the attenuation constant used during the attenuation process. The attenuation constant is represented by A. The attenuation constant A refers to the attenuation coefficient used when performing a sliding window attenuation operation in the global statistical mode. The sliding window attenuation operation refers to a sliding window operation based on an attenuation method. The sliding window attenuation operation includes steps A1, A2, and step 8022. When the target processing core configures the access statistical mode of the access statistical device to the global statistical mode, it also configures the attenuation constant A for the global statistical mode, so that the access statistical device performs attenuation processing on the first access counts of the M second memory addresses according to the attenuation strategy based on the configured attenuation constant A, thereby obtaining M attenuated first access counts. The attenuation strategy can be linear attenuation, exponential attenuation, or nonlinear attenuation. For example, the attenuation strategy is represented by the following formula (1).

[0197] Wherein, C0 is the first access count of any second memory address, and C1 is the decayed C0.

[0198] For another example, the attenuation strategy is expressed by the following formula (2). t1 =AC t0 -B, Δt=t1-t0, t1>t0, 0<A<1 (2)

[0199] Among them, time t0 and time t1 are different logical times. Logical time can be wall clock time or event-driven time. Taking wall clock time as an example, 9:50 is time t0 and 9:51 is time t1. Taking event-driven time as an example, assuming that 100 memory addresses are collected as the event driving time, and each time 100 memory addresses are collected is a time, then the time when 100 memory addresses are collected is time t0, and the time when 100 memory addresses are collected is time t1. t0 is any access count in the access statistics window at time t0 (i.e., the first access count), C t1 It is C t0 The number of accesses after decay from time t0 to time t1, Δt is the logical time between time t0 and time t1, and B is the cardinality, with no restrictions on the value of B. Formulas (1) and (2) above may also have other variations, and this application does not limit the formulas for the decay strategy.

[0200] After obtaining M decayed first access counts, the access statistics device also replaces the first access counts of the M second memory addresses with their respective decayed first access counts, so as to use the decayed first access counts as the access counts of the corresponding second memory addresses.

[0201] Assume that the access statistics window is an access statistics table, and the access numbers in the access statistics table are all first access numbers. The decay strategy is expressed by the above formula (1). Continuing with FIG9 as an example, if the first memory address does not exist in the address table, and there is no unused address entry in the address table, that is, the first memory address does not exist in the M second memory addresses, based on this, the access statistics device divides all access numbers (that is, the first access numbers) in the access statistics table by the decay constant A to achieve decay processing of each access number. For any access number, the quotient after dividing the access number by the decay constant A is used as the access number after decay, and the access number in the access statistics table is updated to the quotient after dividing the access number by the decay constant A.

[0202] Taking the attenuation constant A = 2 as an example, referring to the sliding window semi-attenuation replacement process for the access statistics table shown in FIG10 , if the first memory address does not exist in the address table and there are no unused address entries in the address table, the access statistics device divides the access counts in the access statistics table by 2, and the quotient of each access count after division by 2 replaces the original access count. For example, if the access count with a value of 1 is divided by 2, the quotient is 0, and the access count with a value of 1 is replaced by 0.

[0203] A2. If the first access count of any second memory address decays to a first access count threshold, the access statistics device determines the any second memory address as a third memory address.

[0204] The first access count threshold is an integer greater than or equal to 0. Here, the value of the first access count threshold is not limited. The first access count decaying to the first access count threshold includes the decayed first access count being less than or equal to the first access count threshold.

[0205] After replacing each first access count in the access statistics window with the attenuated first access count, the access statistics device queries whether there is an access count less than or equal to the first access count threshold in the access statistics window. If not, the first memory address is discarded and the process jumps to step 801. Alternatively, the access count in the access statistics window is attenuated again until there is an access count less than or equal to the first access count threshold in the access statistics window. If there is an access count less than or equal to the first access count threshold in the access statistics window, the second memory address to which any access count less than or equal to the first access count threshold belongs is determined as the third memory address. With the first access count threshold being 0, if a first access count in the access statistics window decays to 0, then the first access count is the access count with the smaller value in the access statistics window, and the second memory address to which the first access count belongs is determined as the third memory address.

[0206] Step 8022: The access statistics device updates the third memory address in the address window to the first memory address.

[0207] Each time the access statistics device obtains a first memory address, it updates the number of accesses stored in the access statistics window according to the first memory address to obtain an updated access statistics window. For example, if the first memory address exists in the memory addresses stored in the address window, the number of accesses of the first memory address in the access statistics window is increased by 1. For another example, the access statistics device updates the third memory address in the address window to the first memory address, and updates the number of accesses of the third memory address in the access statistics window to 1 as the number of accesses of the first memory address, so as to achieve the purpose of swapping out the third memory address in the address window, swapping the first memory address into the address window, swapping out the number of accesses of the third memory address in the access statistics window, and swapping the number of accesses of the first memory address into the address window, thereby eliminating the memory address with the lowest access popularity among the M second memory addresses, and the first memory address becomes a second memory address.

[0208] Taking the decay strategy represented by the above formula (1) as an example, assuming that the first threshold value is 0, see Figure 9. After all access times are replaced by the quotient divided by the decay constant A, the access statistics device queries whether there is an access time of 0 in the access statistics table. If not, the first memory address is discarded and address collection continues. If there is an access time of 0, the memory address in the address entry corresponding to the access time of 0 is replaced with the first memory address, such as clearing the memory address in the address entry and filling the first memory address in the address entry to replace the originally stored memory address. After the replacement is completed, in the access statistics table, the access time of 0 corresponding to the address entry is increased by 1. Taking Figure 10 as an example again, there are two access times of 0 in the access statistics table after the decay processing using the decay constant A. One of the access times is selected as the access time of the first memory address, and the selected access time is updated to 1. The other access time of 0 is the access time of the next new memory address to be replaced. The new memory address refers to the memory address that does not exist in the address table.

[0209] The above description uses an example of performing a decay process on the M second memory addresses when the first memory address does not exist in the M second memory addresses. In another possible implementation, in any access statistics period, after the M second memory addresses are stored in the address window, the access statistics device periodically decays the number of accesses in the access statistics window according to the decay period. For a newly acquired first memory address, if the first memory address does not exist in the address window, a third memory address is determined based on the number of accesses in the access statistics table. The decay period may be Δt in formula (2).

[0210] The method of periodic attenuation processing, for example, after each attenuation cycle, the access statistics device performs a decay process on the number of accesses in the access statistics window. For example, at the end of each attenuation cycle, the number of accesses in the access statistics window can be decayed.

[0211] Taking the decay strategy shown in the above formula (2) as an example, assuming A = 0.5, B = 3, the memory address in the address window at time 1 and the number of accesses in the access statistics window are shown in Table 2. After Δt, it reaches time 2. Assuming that address A and address B are not obtained between time 1 and time 2, as shown in Table 3, according to the decay strategy shown in the above formula (2), the number of accesses to address A decays from FF to 7C, and the number of accesses to address B decays from 6 to 0. The access statistics device continues to count in the access statistics table. After Δt after time 2, it reaches time 3. Assuming that address A is obtained multiple times between time 2 and time 3, the number of accesses to address A continues to increase by 1, as shown in Table 4. According to the decay strategy shown in the above formula (2), the number of accesses to address A at time 3 is decayed, so that the address of address A decays to 8C. Assume that address C is obtained from time 2 to time 3 but address B is not obtained. Since the number of accesses to address B decays to 0 (i.e., the first count threshold), as shown in Table 4, the access statistics device updates address B in the address window to address C, so that the number of accesses to address B in the access statistics window becomes the number of accesses to address C. If address C is obtained multiple times during this period, the number of accesses to address C is continuously increased by 1, as shown in Table 4. According to the decay strategy shown in the above formula (2), the number of accesses to address C at time 3 is decayed, so that the number of accesses to address C becomes F.

[0212] The above is explained using the example of obtaining a first memory address. In another possible implementation, the access statistics device can also obtain multiple first memory addresses each time. If N first memory addresses among the multiple first memory addresses are not second memory addresses, the access statistics device determines N third memory addresses by executing step 8021, and updates the first access count of the N third memory addresses to the access count of the N first memory addresses by executing step 8022. If any first memory address is the same as the second memory address, the access count of the first memory address in the access statistics window is increased by 1, where N is greater than 0.

[0213] Step 802 is the sliding window operation performed during the access statistics process. If step 802 is implemented using a decay process, the sliding window operation is also referred to as a sliding window decay operation. During any access statistics cycle, the access statistics device records the access count of each memory address acquired according to the first memory address recording method shown in FIG9 . During this access statistics cycle, when M memory addresses are recorded in the address window, if a new memory address that does not exist in the address window is acquired, a sliding window decay operation is performed on the access statistics window and the address window for the new memory address. Each time the sliding window decay operation is performed, the memory address with the minimum access count originally recorded in the address window is replaced with the new memory address. Before the next sliding window operation is performed, if the new memory address is acquired again, the access count of the new memory address is continuously updated. Therefore, during the next sliding window operation, if the access count of the new memory address is not the minimum access count in the access statistics window, the new memory address may be retained in the address table. If the access count of the new memory address is the minimum access count in the access statistics window, the new memory address may be replaced by the newly acquired new memory address. As the number of sliding window attenuation operations increases, the address table retains the memory address with the highest access frequency in the access statistics period, and the access statistics table retains the access count of the memory address with the highest access frequency. This access count is not the actual access count of the memory address in the access statistics period, but the access count after attenuation. In an access statistics period, the relationship between the number of sliding window attenuation operations S, the attenuation constant A, and the frequency F of the minimum access count of the access statistics window can be expressed as: S = log A (F).

[0214] In one possible implementation, in the early stage of the access statistical cycle, certain memory addresses of the storage medium may be frequently accessed, while in the later stage of the access statistical cycle, the access frequency of these memory addresses will decrease, or even these memory addresses will not be accessed. Therefore, in the early stage of the access statistical cycle, the number of accesses to these memory addresses is relatively large. When the memory address with the lowest access popularity in the address window is determined by attenuation processing, as the number of attenuation processing times increases, the number of accesses to these memory addresses will gradually decay until they are eliminated, thereby retaining the number of accesses to memory addresses with high recent access popularity in the access statistical table. When the hot page is subsequently determined based on the number of accesses to memory addresses with high recent access popularity, the hot page with the highest recent access popularity is determined.

[0215] When determining the third memory address through attenuation processing, it is sufficient to query whether the first number threshold exists in the first access number after attenuation. There is no need to sort the first access number after attenuation. The implementation is simple and the third memory address can be determined quickly.

[0216] The process from steps 801 to 802 described above illustrates another method for counting accesses to storage media, executed by the access counting device, namely, the access counting process in the global counting mode. Compared to the local counting mode, when counting accesses to memory addresses in the global counting mode, the address window that remains after eliminating memory addresses through the sliding window operation is not the M consecutively acquired M distinct memory addresses.

[0217] 803. The access statistics device determines the heat of the memory page in the storage medium according to the memory address in the updated address window.

[0218] The updated address window refers to the address window after the memory address is filled and / or the memory address is updated.

[0219] The updated address window corresponds to the updated access statistics window, and the number of accesses in the updated access statistics window is the number of accesses to each memory address in the updated address window. The access statistics device determines the heat of the memory page in the storage medium based on the memory address in the updated address window and the number of accesses in the updated access statistics window. Exemplarily, if the access statistics cycle ends, or if a stop acquisition instruction is received, or if there is an access number greater than or equal to a second threshold value in the access statistics window, the access statistics device uses each memory address stored in the address window and each access number in the access statistics window as access statistics information for the access statistics cycle, wherein the access statistics window includes the updated first access number and / or the unupdated first access number, wherein the updated first access number refers to the first access number in the access statistics table where the corresponding memory address is updated. The unupdated first access number refers to the first access number in the access statistics table where the corresponding memory address is not updated. For example, if all the second memory addresses in the address window have been updated, the access counts in the access statistics window are all the first access counts after the update; if some of the second memory addresses in the address window have been updated, some of the access counts in the access statistics window are the first access counts after the update; if none of the second memory addresses in the address window have been updated, the access counts in the access statistics window are not updated to the first access counts after the update.

[0220] After obtaining the access statistics information of the access statistics period, the access statistics device determines the heat of the memory page in the storage medium based on the access statistics information. This process is similar to the process of determining the page status of the memory page in step 605 and will not be repeated here. The difference is that in the global statistics mode, since the memory addresses in the access statistics information are mostly the memory addresses with the highest access heat in the recent time period, most of the memory pages accessed by the storage medium are hot pages. Some of the memory addresses collected later in the access statistics information may be determined as cold pages or warm pages due to insufficient counting time. In other embodiments, this part of the memory addresses may not participate in determining the heat of the memory page. In this way, all the memory pages determined to have been accessed are hot pages. In another possible implementation method, the access statistics device can also notify the hot pages in the storage medium to the target processing core, and the target processor core will migrate the hot data in the hot pages. Alternatively, the access statistics device determines the heat of the memory pages in the storage medium based on the access statistics device based on each memory address in the address window and the number of accesses to each memory address, so that the target processing core can migrate the hot data in the hot pages. For example, similar to FIG7 , in FIG9 , based on the configuration of the access statistics device, at the end of an access statistics cycle, or when a stop collection instruction is received, or when the access statistics table has an access count greater than or equal to a second threshold, or when an information read request is received from the processor core, the access statistics device may be triggered to stop address collection and send an interrupt message (such as a first interrupt message or a second interrupt message) to the target processor core to indicate an access statistics interrupt and enter a data return process. In the data return process, the access statistics device sends the access statistics information to the target processor core. After receiving the returned access statistics information (compressed or uncompressed), the target processor core parses the access statistics information and determines at least one of the hot pages, cold pages, and warm pages in the storage medium based on the parsed result, and migrates the hot data in the hot pages to the upper level memory of the storage medium in the hierarchical memory.

[0221] FIG8 provides a method for updating the memory addresses stored in the address window according to the memory addresses obtained when obtaining the memory addresses accessed for the storage access request. As the memory addresses in the address window are continuously updated, the updated address window can store the memory addresses accessed in the storage medium in the recent time period. Then, based on the memory addresses in the updated address window, the heat of the memory pages accessed in the storage medium in the recent time period can be accurately identified. After obtaining the memory addresses accessed for the storage access request, if the address window is full of memory addresses accessed by the storage medium and there is no newly obtained memory address in the address window, the memory address with the lowest access heat in the address window is identified based on the number of accesses to the memory addresses in the address window. The memory address with the lowest access heat in the address window is updated to the newly obtained memory address to eliminate the memory address with the lowest access heat in the address window. By continuously eliminating the memory addresses with low access heat in the address window, the memory address with the highest access heat in the recent time period can be retained in the address window. Then, based on the memory address with the highest access heat in the access statistics process, the hot pages in the storage medium in the recent time period can be accurately identified. Furthermore, based on the decay process, newly acquired memory addresses are used to eliminate memory addresses with low access counts in the address window. After multiple decay processes, the memory addresses in the address window are all memory addresses with higher access counts compared to the eliminated memory addresses, so that the hottest pages in the storage medium with the highest access frequency can be determined based on the access counts of the memory addresses with higher access counts. Furthermore, in the global statistical mode, the access statistics include the access counts of the most frequently accessed memory addresses in the access statistical cycle, rather than the access counts of the first internal page address accessed in the access statistical cycle. Compared to the access statistics sent in the local mode, sending the access statistics in the global statistical mode can provide the target processor core with more effective information required for determining hot pages, further increasing the proportion of effective information in the access statistics and improving the information entropy of the access statistics. In the global statistical mode, the access statistics include the access counts of the most frequently accessed memory addresses in the access statistical cycle, rather than the access counts of all memory addresses accessed in the access statistical cycle. This eliminates the need to determine hot pages in the storage medium based on the access counts of all accessed memory addresses, thereby improving the efficiency of identifying hot pages. Furthermore, by storing the valid information needed to identify hot pages in a small address window and access statistics window, the information utilization per bit of the address window and access statistics window is increased, turning the address window and access statistics window into local windows with high information entropy. Furthermore, when accessing the storage medium and returning statistical information to the target processor core or operating system, the access count in the statistical information is attenuated, further reducing the amount of statistical information and the bandwidth required for returning the information.The access count of the memory address with the highest global access popularity is counted according to the global statistical mode, which can support hot page judgment of small-granularity pages of large-capacity memory, such as 4k-byte pages.

[0222] The attenuation constants described above (e.g., A and B) all support at least one of dynamic or static adjustment. The following uses adjusting attenuation constant A as an example. Adjusting B can be similar to adjusting attenuation constant A.

[0223] Dynamically adjust the decay constant A. For example, the adjustment device determines a threshold expected number based on the business requirements of the application served by the storage medium (such as the expected number of hot pages). The threshold expected number refers to the number of addresses expected to appear in the address window after the decay process, meeting the first number threshold. The adjustment device periodically counts the changes in the number of accesses in the access statistics window and adjusts the value of the decay constant A based on the threshold expected number and the changes in the number of accesses in the access window. Each adjustment configures the adjusted value of the decay constant A as the latest value of the decay constant A in the global statistics mode, so that the access statistics device performs decay processing on the number of accesses in the access statistics window based on the latest configured value of the decay constant A. By continuously adjusting the value of the decay constant A, the first number threshold of the threshold expected number appears in the access statistics window after the decay process. Optionally, the changes in the number of accesses in the access window can be represented by gradient information of the access numbers. The adjustment device can adjust the value of the decay constant A based on the threshold expected number and the changes in the number of accesses in the access window using a gradient ascent method or a gradient descent method.

[0224] The method of statically adjusting the attenuation constant A, for example, also supports the adjustment device setting multiple candidate values ​​for the attenuation constant A, where these multiple candidate values ​​increase or decrease in sequence. Initially, the adjustment device configures the first candidate value among the multiple candidate values ​​as the attenuation constant A. At intervals of a certain length, the adjustment device configures the attenuation constant A to the next candidate value of the current value. Of course, the adjustment device can also use other adjustment methods to dynamically adjust the attenuation constant A. Here, this application does not limit the method of statically adjusting the attenuation constant A.

[0225] The adjustment device described above can be implemented by software, hardware, or a combination of software and hardware. The present application does not limit the implementation of the adjustment device. By dynamically or statically adjusting the attenuation constant A, the access statistics device can attenuate the number of accesses in the access statistics window based on the adjusted attenuation constant to meet the needs of different services.

[0226] The above description only takes the decay strategy as the data replacement strategy as an example to introduce step 802. The access statistics device can also implement step 802 through other data replacement strategies. Next, other data replacement strategies are introduced as follows.

[0227] In one possible implementation, the access statistics device queries the minimum access count among the first access counts of the M second memory addresses, and the second memory address to which the minimum access count belongs is determined to be the third memory address. Exemplarily, a least frequently used (LFU) strategy is adopted to query the minimum access count. For example, the following method 1 or method 2 is adopted to implement the query of the minimum access count using LFU.

[0228] Method 1: Each time the number of accesses in the access statistics window is updated, the access statistics device sorts the first number of accesses in the access statistics window through a linked list. When the address window is full, if the first memory address to be counted does not exist in the address window, the smallest first number of accesses sorted by the linked list is used as the smallest number of accesses, the second memory address to which the smallest number of accesses belongs is determined as the third memory address, and the first number of accesses of the third memory address is updated to the number of accesses of the first memory address.

[0229] Based on this possible implementation method, during the statistical process, as the number of memory addresses obtained increases, the memory addresses with fewer access times among the memory addresses that have been accessed by the storage medium are gradually eliminated, thereby retaining the memory addresses with the highest access popularity in the access statistical period. Based on the number of accesses to the memory addresses with the highest access popularity, it is easy to determine the hottest pages in the storage medium.

[0230] Method 2: The access statistics device sorts the first number of the second memory address of the last access time in the recent period of time through a linked list. When the address window is full, if the first memory address to be counted does not exist in the address window, the smallest first access number sorted by the linked list is used as the minimum access number, the second memory address to which the minimum access number belongs is determined as the third memory address, and the first access number of the third memory address is updated to the access number of the first memory address.

[0231] Based on this possible implementation method, as the number of memory addresses obtained increases, the memory addresses with the lowest recent access popularity among the memory addresses accessed by the storage medium are gradually eliminated, thereby retaining the memory addresses with the highest access popularity in the access statistical period. Based on the number of accesses to the memory addresses with the highest access popularity, it is easy to determine the hottest hot pages in the storage medium.

[0232] In another possible implementation, the access statistics device uses a least recently used (LRU) strategy or a first-in first-out (FIFO) strategy to determine the third memory address. The LRU strategy and the FIFO strategy can also be implemented in a manner similar to the above-described method 1 or method 2. The difference is that the LRU strategy and the FIFO strategy are both implemented based on the access order, and the method of maintaining the order is different, which will not be further described here.

[0233] With respect to the address table and access statistics table introduced above, the access statistics device may store the address table and the access statistics table in any one of the following two storage methods.

[0234] Storage method 1: The access statistics device stores the address table and the access statistics table in the same location.

[0235] Taking the access statistics device 103 shown in Figures 1, 3, 4 and 5 as an example, the address table and the access statistics table are both stored in the memory 33, and the statistics module 32 stores the mapping relationship between the address entries in the address table and the number of accesses in the access statistics table. In an access statistics cycle, the acquisition module 31 performs address acquisition and sends each collected memory address to the statistics module 32. The statistics module counts the accesses to the memory addresses provided by the acquisition module 31 based on the mapping relationship between the address entries in the address table and the number of accesses, the address table and the access statistics table stored in the memory 33 in accordance with the configured local statistics mode or global statistics mode.

[0236] Storage method 2: The access statistics device stores the address table and the access statistics table in different locations.

[0237] Still taking the access statistics device 103 shown in Figures 1, 3, 4, and 5 as an example, and referring to the access count recording flow chart shown in Figure 11, it is assumed that the access statistics device 103 further includes a content-addressable memory (CAM) 35, an address table 36 with an address capacity of M stored in the CAM 35, and an access statistics table 37 stored in the memory 33. In any access statistics cycle, the acquisition module 31 in the access statistics device 103 performs address acquisition and sends each acquired memory address to the CAM 35. After receiving each memory address, the CAM 35 uses the memory address as the first memory address and compares the first memory address with the memory addresses recorded in each address entry in the address table 36 to obtain comparison results corresponding to the M address entries (i.e., M comparison results). A comparison result is used to indicate whether the first memory address is the same as the memory address in the corresponding address entry. As shown in Figure 11, the comparison result can be represented by a matching identifier match, which is used to indicate whether the first memory address matches the memory address in the corresponding address entry (that is, whether they are the same). Match = 1 indicates that the first memory address matches the memory address in the corresponding address entry. Match = 0 indicates that the first memory address does not match the memory address in the corresponding address entry.

[0238] For any address entry, if the address entry is a valid address entry and the first memory address is the same as the memory address in the address entry, the comparison result corresponding to the address entry is match = 1; if the address entry is an invalid address entry, the comparison result corresponding to the address entry is match = 0. Taking Figure 11 as an example, assuming that the first memory address is "0x000f", "0x000f" is the same as the memory address in the third address entry of address table 36, and different from the memory addresses in other address entries, the comparison result corresponding to the third address entry is match = 1, and the comparison results corresponding to the other address entries are all match = 0.

[0239] After obtaining M comparison results, CAM 35 sends the M comparison results to statistics module 32, so that statistics module 32 updates the number of accesses to the first memory address in access statistics table 37 based on the M comparison results. The M comparison results are the query results of CAM 35 for the first memory address in the address table. Statistics module 32 uses CAM 35 to query the first memory address, eliminating the need for statistics module 32 to query the first memory address, thereby reducing the workload of statistics module 32.

[0240] Still taking FIG. 11 as an example, after the statistics module 32 obtains the comparison results corresponding to the M address entries sent by the CAM 35, if the comparison result corresponding to any address entry indicates that the first memory address is the same as the memory address in the address entry, the statistics module 32 determines the number of accesses corresponding to the first address entry (i.e., the number of accesses to the first memory address) based on the mapping relationship between the address entries in the address table and the access counts in the access statistics table, and updates the access count in the access statistics table 37 in the memory 33. For example, in FIG. 11 , the comparison result between the first memory address "0x000f" and the third address entry is match = 1, and the third address entry corresponds to the third access count "0x2" in the access statistics table. The statistics module 32 adds 1 to the third access count "0x2" in the access statistics table to obtain an updated access count.

[0241] The above description uses the example of address table 36 including the first memory address. If the address table does not include the first memory address, statistics module 32 processes the first memory address according to the configured local statistics mode or global statistics mode. In global statistics mode, address table 36 is the address window, access statistics table 37 is the access statistics window, and CAM 35 and memory 33 are the first and second memories in the access statistics device, respectively.

[0242] The above description uses the example of CAM 35 providing M comparison results for the first memory address to statistics module 32. In another possible implementation, if the first memory address does not exist in address table 36, all M comparison results are match = 0. In this case, CAM 35 may not send the M comparison results to statistics module 32, thereby reducing the workload of statistics module 32. If the first memory address does exist in address table 36, only one of the M comparison results is match = 1. In this case, CAM 35 sends the comparison result of match = 1 to statistics module 32 and does not send the other comparison results, thereby reducing the workload of statistics module 32. In another possible implementation, CAM 35 may be replaced with another type of memory. This other type of memory may or may not have the function of comparing input data with stored memory addresses. If it does not have this function, statistics module 32 may be responsible for comparing input data with its stored memory addresses. This application is not limited to other types of memory.

[0243] The above describes the page status determination method of the memory page and the access statistics method of the storage medium provided by the present application. The following describes the device and equipment to which the above method is applied. It should be understood that the device and equipment described below have the same inventive concept as the above method and can achieve the beneficial effects that can be achieved by the above method. The device and equipment of the present application will be described below in conjunction with Figures 12 to 14. It should be understood that the technical features described in the method flow are also applicable to the following devices and equipment.

[0244] FIG12 is a schematic diagram of the structure of an access statistics device for a storage medium provided by the present application. As shown in FIG12 , the access statistics device 1200 includes:

[0245] An acquisition module 1201 is configured to acquire a first memory address accessed by an access request to the storage medium;

[0246] A query module 1202 is configured to query the first memory address from a mapping relationship between memory addresses accessed by the storage medium and the number of accesses;

[0247] The updating module 1203 is configured to update the number of accesses in the mapping relationship where the first memory address is located if the first memory address is among the memory addresses accessed by the storage medium.

[0248] In a possible implementation, the accessed memory address is recorded in an address table, and the number of accesses to the accessed memory address is recorded in an access statistics table, and the address table corresponds to the access statistics table.

[0249] In one possible implementation, the access statistics table includes multiple access times, the address table includes multiple address entries, each address entry is used to record an accessed memory address in the storage medium, and each address entry corresponds to an access time in the access statistics table. The access statistics device 1200 further includes:

[0250] A filling module is used to fill the unused address entry with the first memory address if the first memory address does not exist in the memory addresses accessed by the storage medium and there is an unused address entry in the address table, and to update the number of accesses corresponding to the unused address entry in the access statistics table.

[0251] In a possible implementation, the access statistics device 1200 further includes:

[0252] A first sending module is used to send a first interrupt message to the processor core if the first memory address does not exist in the memory addresses accessed by the storage medium and the unused address entry does not exist in the address table, wherein the first interrupt message indicates that all address entries in the address table have been used, resulting in an access statistics interruption.

[0253] In a possible implementation, the access statistics device 1200 further includes:

[0254] a decay processing module, configured to, if the first memory address does not exist in the memory addresses accessed by the storage medium and the unused address entry does not exist in the address table, perform decay processing on the multiple access times to obtain multiple access times after decay;

[0255] The updating module 1203 is further configured to update the memory address in the address entry corresponding to any access number to the first memory address if any access number after decay is less than or equal to the first threshold value, thereby updating any access number after decay.

[0256] In a possible implementation, the access statistics device 1200 further includes:

[0257] The second sending module is used to send a second interrupt message to the processor core if there is an access number greater than or equal to the second number threshold among the multiple access numbers, and the second interrupt message indicates that the access statistics interruption occurs due to the memory address having an access number greater than or equal to the second number threshold.

[0258] In a possible implementation, the access statistics device 1200 further includes:

[0259] a receiving module, configured to receive an information reading request from a processor core, wherein the information reading request indicates reading access statistics information of the storage medium;

[0260] The third sending module is configured to send the access statistics information to the processor core based on each memory address accessed by the storage medium and the number of times each memory address is accessed.

[0261] The access statistics device 1200 should be the access statistics device in the access statistics method of the above-mentioned storage medium. The various modules in the access statistics device 1200 and the above-mentioned other operations and / or functions are respectively for realizing the various steps and methods implemented by the access statistics device in the access statistics method of the above-mentioned storage medium. For specific details, please refer to the above-mentioned method flow. For the sake of brevity, they will not be repeated here.

[0262] The division of the functional modules described above is used only as an example to illustrate how access statistics device 1200 counts memory address accesses. In actual applications, the aforementioned functions can be assigned to different functional modules as needed. Specifically, the internal structure of access statistics device 1200 can be divided into different functional modules to perform all or part of the functions described above. Furthermore, access statistics device 1200 and the access statistics method in the storage medium described above share the same concept. The specific implementation process is detailed in the access statistics method flow for the storage medium described above and will not be further elaborated here.

[0263] For any of the access statistics devices shown in Figures 1, 3, 4, 5, 12, and 16, the access statistics device can be implemented by a chip, a CPU, an application-specific integrated circuit (ASIC), or a programmable logic device (PLD), wherein the PLD can be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), a data processing unit (DPU), a system on chip (SoC), or any combination thereof. The access statistics device can also implement the above-mentioned storage medium access statistics method through software. When implemented through software, the access statistics device and its various modules can also be software modules.

[0264] FIG13 is a schematic diagram of the structure of a device for determining a page status of a memory page provided by the present application. The device 1300 shown in FIG13 includes:

[0265] An acquisition module 1301 is configured to acquire a first memory address accessed by an access request to a storage medium;

[0266] A query module 1302 is configured to query the first memory address from a mapping relationship between memory addresses accessed by the storage medium and the number of accesses;

[0267] An updating module 1303 is configured to update the number of accesses in the mapping relationship where the first memory address exists if the first memory address is among the memory addresses accessed by the storage medium;

[0268] The determination module 1304 is used to determine the page status of the memory page to which the memory address belongs based on the latest access count of the memory address accessed by the storage medium after a first period of time, wherein the page status is used to indicate the access heat of the memory page.

[0269] In a possible implementation, the accessed memory address is recorded in an address table, and the number of accesses to the accessed memory address is recorded in an access statistics table, and the address table corresponds to the access statistics table.

[0270] In one possible implementation, the access statistics table includes multiple access times, the address table includes multiple address entries, the address entry is used to record a memory address that has been accessed in the storage medium, and the address entry corresponds to an access time in the access statistics table. The update module 1303 is further used to:

[0271] If the first memory address does not exist in the memory addresses accessed by the storage medium, and there is an unused address entry in the address table, the first memory address is filled in the unused address entry, and the number of accesses corresponding to the unused address entry in the access statistics table is updated.

[0272] In a possible implementation, the apparatus 1300 further includes:

[0273] a decay processing module, configured to, if the first memory address does not exist in the memory addresses accessed by the storage medium and the unused address entry does not exist in the address table, perform decay processing on the multiple access times to obtain multiple access times after decay;

[0274] The updating module 1303 is further configured to update the memory address in the address entry corresponding to any access number to the first memory address if any access number after decay is less than or equal to the first number threshold, thereby updating any access number after decay.

[0275] When determining the page status of a memory page, device 1300 is illustrated by the division of the aforementioned functional modules. In actual applications, the aforementioned functions can be assigned to different functional modules as needed, that is, the internal structure of device 1300 can be divided into different functional modules to complete all or part of the functions described above. In addition, device 1200 and the aforementioned method for determining the page status of a memory page are based on the same concept. The specific implementation process is detailed in the aforementioned method for determining the page status of a memory page, and will not be repeated here.

[0276] The implementation of the device 1300 is similar to that of the access statistics device 1200, and the implementation of the device 1300 will not be described in detail here.

[0277] FIG14 is a schematic diagram of the structure of a computer device provided by the present application. As shown in FIG14 , the computer device 1400 includes: a bus 1402, a processor 1404, a memory 1406, a communication interface 1408, and an access statistics device 1410. The processor 1404, the memory 1406, and the communication interface 1408 communicate via the bus 1402. The bus 1402 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, FIG14 shows only one line, but this does not mean that there is only one bus or one type of bus. The bus 1402 may include a path for transmitting information between the various components of the computer device 1400 (e.g., the memory 1406, the processor 1404, and the communication interface 1408). The processor 1404 may include any one or more processors such as a CPU, a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP). The memory 1406 may serve as the internal memory or external memory of the computer device 1400. The memory 1406 may include a volatile memory, such as a random access memory (RAM). The memory 1406 may also include a non-volatile memory, such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD), or a solid state drive (SSD).

[0278] The access statistics device 1410 is used to execute the storage medium access statistics method, memory page page status determination method, or memory page heat determination method provided in this application. The access statistics device 1410 is implemented in the same manner as the access statistics device 1200 and will not be described in detail here. In the case where the access statistics device 1410 is implemented by a processor, the implementation of the access statistics device 1410 can refer to the above-mentioned processor 1404. The memory 1406 stores executable program code. The processor 1404 reads and executes the executable program code, so that the computer device 1400 implements the above-mentioned memory page page status determination method, storage medium access statistics method, or memory page heat determination method.

[0279] The access statistics device 1410 is equivalent to the access statistics device 103 in the computer system 100. Similar to the deployment method of the access statistics device 103, in another possible implementation, the access statistics device 1410 may also be integrated into the processor 1404, such as the MMU in the processor 1404 or other locations other than the MMU. Alternatively, it may be integrated into other types of processors or memory controllers other than the CPU, and the functions of the access statistics device 140 are implemented by other types of processors or memory controllers. In another possible implementation, the access statistics device 1410 may also be integrated into the memory 1406. Here, this application does not limit the location of the access statistics device 1410 in the computer device 1400.

[0280] FIG15 is a schematic diagram of the structure of a device for determining the heat of a memory page provided by the present application. As shown in FIG15 , the device 1500 includes:

[0281] An acquisition module 1501 is configured to acquire a first memory address accessed by an access request to a storage medium;

[0282] An updating module 1502 is configured to update the memory address stored in the address window according to the first memory address to obtain an updated address window, wherein the address window is configured to store memory addresses accessed in the storage medium within a recent period of time;

[0283] The determination module 1503 is configured to determine the heat of the memory page in the storage medium according to the memory address in the updated address window.

[0284] In a possible implementation, the address window is a local address window, and the updating module 1502 includes:

[0285] a determining unit configured to, if the address window has M second memory addresses stored therein and the first memory address does not exist among the M second memory addresses, determine a third memory address based on the first access counts of the M second memory addresses, the third memory address being the memory address with the lowest access popularity among the M second memory addresses, where M is an address capacity of the address window;

[0286] An updating unit, configured to update the third memory address in the address window to the first memory address.

[0287] In a possible implementation manner, the determining unit is configured to:

[0288] performing a decay process on the first access counts of the M second memory addresses;

[0289] If the first access count of any second memory address decays to a first access count threshold, the any second memory address is determined as the third memory address.

[0290] In a possible implementation manner, the determining unit is configured to:

[0291] Querying the minimum access count among the first access counts of the M second memory addresses;

[0292] The second memory address to which the minimum number of accesses belongs is determined as the third memory address.

[0293] In a possible implementation, the address window is a global address window, and the apparatus 1500 further includes:

[0294] A first sending module is used to send a first interrupt message to the processor core if the first memory address does not exist in the memory addresses stored in the address window and there is no unused address entry in the address window. The first interrupt message indicates that all address entries in the address window have been used, resulting in an access statistics interruption. The address entry is used to record a memory address that has been accessed in the storage medium.

[0295] In a possible implementation, the address window includes multiple address entries, each of which is used to record an accessed memory address in the storage medium. The updating module 1502 is configured to:

[0296] If the first memory address does not exist in the memory addresses stored in the address window, and there is an unused address entry in the address window, the first memory address is filled in the unused address entry.

[0297] In a possible implementation, the address window corresponds to an access statistics window, the access statistics window includes a plurality of access times, and the address entry corresponds to one access time in the access statistics window;

[0298] The updating module 1502 is further configured to update the number of accesses stored in the access statistics window according to the first memory address to obtain an updated access statistics window;

[0299] The determination module 1503 is further configured to determine the heat of the memory page in the storage medium according to the memory address in the updated address window and the number of accesses in the updated access statistics window.

[0300] In a possible implementation, the apparatus 1500 further includes:

[0301] The second sending module is used to send a second interrupt message to the processor core if there is an access number greater than or equal to the second number threshold among the multiple access numbers, and the second interrupt message indicates that the access statistics interruption occurs due to the memory address having an access number greater than or equal to the second number threshold.

[0302] In a possible implementation, the apparatus 1500 further includes:

[0303] a receiving module, configured to receive an information reading request from a processor core, wherein the information reading request indicates reading access statistics information of the storage medium;

[0304] A third sending module is configured to send the access statistics information to the processor core based on each memory address in the address window and the number of times each memory address is accessed.

[0305] The first sending module, the second sending module and the third sending module mentioned above may be the same sending module or different sending modules.

[0306] In a possible implementation, the address window is implemented by a content addressable memory (CAM).

[0307] When device 1500 determines the heat of a memory page in a storage medium, the division of the above-mentioned functional modules is used as an example only. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of device 1500 can be divided into different functional modules to complete all or part of the functions described above. In addition, device 1500 and the above-mentioned method for determining the heat of a memory page are based on the same concept. The specific implementation process is detailed in the memory page heat determination method flow in Figure 8 above, and will not be repeated here.

[0308] The implementation of the device 1500 is similar to that of the access statistics device 1200, and the implementation of the device 1500 will not be described in detail here.

[0309] FIG16 is a schematic diagram of the structure of another storage medium access statistics device provided by the present application. The device 1600 shown in FIG16 includes:

[0310] An acquisition module 1601 is configured to acquire a first memory address accessed by an access request to a storage medium;

[0311] The updating module 1602 is configured to update the memory address stored in the address window according to the first memory address to obtain an updated address window, wherein the address window is configured to store memory addresses accessed in the storage medium within a recent period of time.

[0312] In a possible implementation, the address window is a local address window, and the updating module 1602 includes:

[0313] a determining unit configured to, if the address window has M second memory addresses stored therein and the first memory address does not exist among the M second memory addresses, determine a third memory address based on the first access counts of the M second memory addresses, the third memory address being the memory address with the lowest access popularity among the M second memory addresses, where M is an address capacity of the address window;

[0314] An updating unit, configured to update the third memory address in the address window to the first memory address.

[0315] In a possible implementation manner, the determining unit is configured to:

[0316] performing a decay process on the first access counts of the M second memory addresses;

[0317] If the first access count of any second memory address decays to a first access count threshold, the any second memory address is determined as the third memory address.

[0318] In a possible implementation manner, the determining unit is configured to:

[0319] Querying the minimum access count among the first access counts of the M second memory addresses;

[0320] The second memory address to which the minimum number of accesses belongs is determined as the third memory address.

[0321] In a possible implementation, the address window is a global address window, and the apparatus 1600 further includes:

[0322] A first sending module is used to send a first interrupt message to the processor core if the first memory address does not exist in the memory addresses stored in the address window and there is no unused address entry in the address window. The first interrupt message indicates that all address entries in the address window have been used, resulting in an access statistics interruption. The address entry is used to record a memory address that has been accessed in the storage medium.

[0323] In a possible implementation, the address window includes multiple address entries, each of which is used to record an accessed memory address in the storage medium. The updating module 1602 is configured to:

[0324] If the first memory address does not exist in the memory addresses stored in the address window, and there is an unused address entry in the address window, the first memory address is filled in the unused address entry.

[0325] In a possible implementation, the address window corresponds to an access statistics window, the access statistics window includes multiple access times, the address entry corresponds to one access time in the access statistics window, and the updating module 1602 is further configured to:

[0326] The number of accesses stored in the access statistics window is updated according to the first memory address to obtain an updated access statistics window.

[0327] In a possible implementation, the apparatus 1600 further includes:

[0328] The second sending module is used to send a second interrupt message to the processor core if there is an access number greater than or equal to the second number threshold among the multiple access numbers, and the second interrupt message indicates that the access statistics interruption occurs due to the memory address having an access number greater than or equal to the second number threshold.

[0329] In a possible implementation, the apparatus 1600 further includes:

[0330] a receiving module, configured to receive an information reading request from a processor core, wherein the information reading request indicates reading access statistics information of the storage medium;

[0331] A third sending module is configured to send the access statistics information to the processor core based on each memory address in the address window and the number of times each memory address is accessed.

[0332] The first sending module, the second sending module and the third sending module mentioned above may be the same sending module or different sending modules.

[0333] In a possible implementation, the address window is implemented by a content addressable memory (CAM).

[0334] The division of the functional modules described above is used only as an example to illustrate the use of device 1600 in collecting storage medium access statistics. In actual applications, the aforementioned functions can be assigned to different functional modules as needed, i.e., the internal structure of device 1600 can be divided into different functional modules to perform all or part of the functions described above. Furthermore, device 1600 and the aforementioned method for collecting storage medium access statistics share the same concept. The specific implementation process is detailed in the flowchart of the storage medium access statistics method in FIG8 , and will not be further described here.

[0335] The implementation of the device 1600 is similar to that of the access statistics device 1200, and the implementation of the device 1600 will not be described in detail here.

[0336] The present application also provides a computing device for executing the above-mentioned method for determining the page status of a memory page, the method for determining the heat of a memory page, or the method for counting access statistics of a storage medium. The computing device is any electronic device with a computing function, for example, the computing device can be a computer device (as shown in FIG14 ), a chip, a processor, or an electronic device in other hardware forms.

[0337] Taking the computing device as a chip as an example, the present application also provides a chip, which includes a logic circuit, and the logic circuit is used to execute the above-mentioned method for determining the page status of a memory page, the method for determining the heat of a memory page, or the method for counting access statistics of a storage medium. In one possible implementation, the chip also includes a power supply circuit, the logic circuit is coupled to the power supply circuit, and the functional circuit is used to power the logic circuit so that the logic circuit executes the above-mentioned method for determining the page status of a memory page, the method for determining the heat of a memory page, or the method for counting access statistics of a storage medium. Exemplarily, the logic circuit is a CPU, a digital signal processor (DSP), a DPU, a SoC, an ASIC, a CPLD, a PLD, an FPGA, or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, an accelerator card, an accelerator chip, etc.

[0338] Taking the computing device as a processor as an example, the processor is used to execute the above-mentioned memory page page status determination method, memory page heat determination method or storage medium access statistics method. The implementation method of the processor is the same as the above-mentioned logic circuit, and the implementation method of the processor will not be repeated here.

[0339] The present application also provides a computer-readable storage medium, such as a memory including program code, which can be executed by a processor so that the device where the processor is located (such as a computing device) executes the above-mentioned page status determination method of the memory page, the hot page determination method of the memory page, or the access statistics method of the storage medium.

[0340] The present application also provides a computer program product or computer program, which includes program code, which is stored in a computer-readable storage medium. A processor reads the program code from the computer-readable storage medium, and the processor executes the program code, so that the device where the processor is located (such as a computing device) executes the above-mentioned memory page page status determination method, memory page heat determination method or storage medium access statistics method.

[0341] In addition, the present application also provides a device, which can specifically be a chip, component or module, and the device may include a connected processor and memory; wherein the memory is used to store computer execution instructions, and when the device is running, the processor can execute the computer execution instructions stored in the memory to enable the device to execute the above-mentioned memory page page status determination method, memory page heat determination method or storage medium access statistics method.

[0342] Among them, the devices, equipment, computer-readable storage media, computer program products or chips provided in this application are all used to execute the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0343] The above embodiments can be implemented in whole or in part by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded or executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains a collection of one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium. The semiconductor medium may be a solid state disk (SSD).

[0344] The information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, storage, display, etc.), and signals involved in this application are all authorized by the user or fully authorized by all parties, and the collection, use, and processing of relevant data must comply with the relevant laws, regulations, and standards of the relevant countries and regions. For example, the access requests involved in this application are all obtained with full authorization.

[0345] The above is only a specific embodiment of the present application. Those skilled in the art may conceive of changes or substitutions based on the specific embodiment provided in this application, and all such changes or substitutions shall fall within the scope of protection of this application.

Claims

1. A method for determining the heat of a memory page, characterized in that: The method comprises: Obtaining a first memory address accessed by an access request to a storage medium; According to the first memory address, the memory address stored in the address window is updated to obtain an updated address window, wherein the address window is used to store the memory addresses accessed in the storage medium within a recent period of time; The heat of the memory page in the storage medium is determined according to the memory address in the updated address window.

2. The method according to claim 1, characterized in that The address window is a local address window, and updating the memory address stored in the address window according to the first memory address includes: If the address window has stored M second memory addresses, and the first memory address does not exist in the M second memory addresses, a third memory address is determined based on the first access count of the M second memory addresses, where the third memory address is the memory address with the lowest access heat among the M second memory addresses, and M is the address capacity of the address window; The third memory address in the address window is updated to the first memory address.

3. The method according to claim 2, characterized in that The determining the third memory address based on the first access counts of the M second memory addresses comprises: Performing attenuation processing on the first access times of the M second memory addresses; If the first access count of any second memory address decays to a first count threshold, the any second memory address is determined as the third memory address.

4. The method according to claim 2, characterized in that: The determining the third memory address based on the first access counts of the M second memory addresses comprises: Querying the minimum access number among the first access numbers of the M second memory addresses; The second memory address to which the minimum access number belongs is determined as the third memory address.

5. The method according to claim 1, characterized in that The address window is a global address window, and the method further includes: If the first memory address does not exist in the memory addresses stored in the address window and there is no unused address entry in the address window, a first interrupt message is sent to the processor core, and the first interrupt message indicates that all address entries in the address window have been used, resulting in an access statistics interruption, and the address entry is used to record a memory address that has been accessed in the storage medium.

6. The method according to any one of claims 1 to 5, characterized in that The address window includes a plurality of address entries, each of which is used to record a memory address that has been accessed in the storage medium. The updating of the memory address stored in the address window according to the first memory address includes: If the first memory address does not exist in the memory addresses stored in the address window, and there is an unused address entry in the address window, the first memory address is filled in the unused address entry.

7. The method according to any one of claims 1 to 6, characterized in that The address window corresponds to an access statistics window, the access statistics window includes a plurality of access times, the address entry corresponds to an access time in the access statistics window, and the method further includes: According to the first memory address, updating the number of accesses stored in the access statistics window to obtain an updated access statistics window; The heat of the memory page in the storage medium is determined according to the memory address in the updated address window and the number of accesses in the updated access statistics window.

8. The method according to claim 7, characterized in that The method further comprises: If there is an access number greater than or equal to the second number threshold among the multiple access numbers, sending a second interrupt message to the processor core, The second interrupt message indicates that the access statistics interruption is caused by the occurrence of a memory address whose access times is greater than or equal to the second time threshold.

9. The method according to any one of claims 1 to 8, characterized in that The method further comprises: receiving an information read request from a processor core, the information read request indicating reading access statistics information of the storage medium; The access statistics information is sent to the processor core based on each memory address in the address window and the number of accesses to each memory address.

10. The method according to any one of claims 1 to 9, characterized in that The address window is implemented by a content addressable memory CAM.

11. A device for determining the heat of a memory page, characterized in that: The device comprises: An acquisition module, used to acquire a first memory address accessed by an access request to a storage medium; An updating module, configured to update the memory address stored in the address window according to the first memory address, to obtain an updated address window, wherein the address window is used to store the memory addresses accessed in the storage medium within a recent period of time; A determination module is used to determine the heat of the memory page in the storage medium according to the memory address in the updated address window.

12. A computer device, characterized in that: The computer device comprises a processor, and the processor is configured to execute program code so that the computer device performs the method according to any one of claims 1 to 10.

13. A chip, characterized in that: The chip comprises a logic circuit, and the logic circuit is used to execute the method according to any one of claims 1 to 10.

14. A processor, characterized in that: The processor is configured to execute the method according to any one of claims 1 to 10.

15. A computer-readable storage medium, characterized in that: At least one program code is stored in the storage medium, and the at least one program code is read and executed by a processor to implement the method according to any one of claims 1 to 10.

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