Etching method for film layer on side wall surface of opening

Abstract

The present application provides an etching method for a film layer on a side wall surface of an opening, applied to a semiconductor device. The method comprises: placing a semiconductor device on a carrier, the semiconductor device being provided with an opening, and a side wall surface of the opening being plated with a preset film layer; forming a covering layer on a surface of the preset film layer; etching the covering layer by using an ion beam, to remove a partial region of the covering layer, so as to expose a first part of the preset film layer, wherein the first part is the part of the preset film layer located at a preset position and oriented towards the port side of the opening, an incident direction of the ion beam and a surface where the semiconductor device is located are at a first angle, and a value range of the first angle ranges from -90° to 0° and from 0° to 90°, excluding endpoint values; removing the first part of the preset film layer; and removing the remainder part of the covering layer. According to the method, in the process of etching the covering layer, a region affected by a shielding effect can be controlled by configuring the first angle, so that precise control of an etched position is implemented and the accuracy of the etched position is improved.

Description

A method for etching a film layer located on a sidewall surface of an opening

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on September 14, 2023, with application number 202311185219.9 and invention name “A method for etching a film layer located on the sidewall surface of an opening”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of semiconductor process technology, and in particular to a method for etching a film layer located on the surface of an opening sidewall. Background Art

[0003] With the development of semiconductor technology, the integration of semiconductor devices is becoming increasingly higher. Specifically, in applications, semiconductor devices use through-silicon vias (TSVs) to vertically stack multiple chips to reduce the length of interconnections, thereby packaging more functions into the integrated circuit without increasing the planar size of the integrated circuit. It should be noted that in integrated circuits, TSV interconnection can not only achieve less delay, smaller capacitance, and lower inductance, but also allow for higher-speed communication between different chips, a higher number of interconnections, and lower power to connect various circuits.

[0004] Currently, when using through-silicon vias (TSVs) to interconnect different chips, a through-hole is typically created in a semiconductor device, and then metal is plated inside the via to achieve conductivity between the chips. However, depending on the function of the semiconductor device, the TSV may need to connect some devices while disconnecting others. This requires removing metal from specific locations on the TSV sidewalls. However, the accuracy of the etching position when removing the metal layer from specific locations on the TSV sidewalls needs to be improved.

[0005] Summary of the Invention

[0006] In view of this, the present application provides a method for etching a film layer located on the surface of an opening sidewall, so as to improve the accuracy of the etching position when applied to the fabrication of a through silicon via.

[0007] Specifically, this application provides the following technical solutions

[0008] A method for etching a film layer located on a sidewall surface of an opening, applied to a semiconductor device, comprising:

[0009] Placing the semiconductor device on a carrier, wherein the semiconductor device has an opening, and the sidewall surface of the opening is coated with a preset film layer;

[0010] forming a covering layer on the surface of the preset film layer;

[0011] Etching the covering layer using an ion beam to remove a portion of the covering layer and expose a first portion of the preset film layer, where the first portion is a portion of the preset film layer located at a preset position facing the opening port, wherein an incident angle of the ion beam forms a first angle with respect to a surface where the semiconductor device is located, and a value range of the first angle is between -90° and 0° and between 0° and 90°, excluding endpoint values, i.e., excluding -90°, 0°, and 90°;

[0012] removing a first portion of the preset film layer;

[0013] The remaining portion of the cover layer is removed.

[0014] Optionally, the opening is a through hole, and the port shape of the opening is circular; etching the covering layer by using an ion beam to remove a portion of the covering layer to expose the first portion of the preset film layer includes:

[0015] While the cover layer is being etched by the ion beam, the carrier is rotated until a portion of the cover layer is removed to expose the first portion of the preset film layer.

[0016] Optionally, the rotation speed of the carrier ranges from 0 rpm to 80 rpm.

[0017] Optionally, during the process of etching the cover layer, the carrier rotates uniformly.

[0018] Optionally, the opening is a groove, and the port shape of the opening is rectangular; the area to be etched of the cover layer includes multiple sub-areas arranged along a first direction, the multiple sub-areas are equidistant from the carrier, and the first direction is parallel to the sidewalls of the opening and the carrier; etching the cover layer using an ion beam to remove a portion of the cover layer to expose the first portion of the preset film layer includes:

[0019] An ion beam is used to etch a sub-region of the covering layer. After the etching of the sub-region is completed, the etching is stopped. After the carrier is rotated, the ion beam is used to etch another sub-region of the covering layer. The process is repeated until portions of multiple sub-regions of the covering layer are all removed, exposing the first portion of the preset film layer.

[0020] Optionally, the method for stopping etching includes:

[0021] The ion beam is shielded by a shielding plate to stop etching the cover layer.

[0022] Optionally, the method for stopping etching includes:

[0023] Stopping the beam drawing to stop etching the cover layer;

[0024] Optionally, the method for stopping etching includes: stopping etching of the covering layer by extinguishing an ion source.

[0025] Optionally, etching the cover layer by using an ion beam to remove a portion of the cover layer includes:

[0026] The cover layer is etched by using at least one etching method selected from the group consisting of standard ion beam etching, reactive ion beam etching, and chemically assisted ion beam etching to remove a portion of the cover layer.

[0027] Optionally, the etching gas used in the standard ion beam etching is an inert gas.

[0028] Optionally, the etching gas used in the reactive ion beam etching includes an inert gas or a reactive gas.

[0029] Optionally, the etching gas used in the chemically assisted ion beam etching includes at least one of an inert gas and a reactive gas.

[0030] Optionally, the inert gas includes at least one of He, Ne, Ar, Kr, Xe and N2.

[0031] Optionally, the reactive gas includes at least one of F-based, Cl-based, Br-based gas and O2.

[0032] Optionally, the value range of the first angle θ is α-5° to α+5°: tanα=d / h;

[0033] In which, α is the theoretical value of the first angle, d is the size of the opening along the second direction on the cross-sectional view of the semiconductor device, h is the height from the preset film layer to be etched area to the port position of the opening, and the second direction is parallel to the plane where the semiconductor device is located and parallel to the cross-sectional view of the semiconductor device.

[0034] Optionally, the sidewall of the opening is perpendicular to the top surface of the opening, or the sidewall of the opening is not perpendicular to the top surface of the opening.

[0035] Optionally, the sidewall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the sidewall of the opening is the height of the portion to be etched in the preset film layer.

[0036] Optionally, the sidewall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the sidewall of the opening is greater than the height of the portion to be etched in the preset film layer.

[0037] Optionally, the side wall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the side wall of the opening is the same as the height of the side wall.

[0038] Optionally, during the etching of the cover layer,

[0039] The energy of the ion beam when it is extracted ranges from 0 to 2000 eV;

[0040] The ion source power ranges from 0 to 3000W;

[0041] The beam current range of the ion beam when it is extracted is 0-2A, and the gas flow range of the ion source generating the ion beam or the etching chamber where the semiconductor device is located is 0-300 sccm;

[0042] The temperature range of the carrier is: 0℃~300℃.

[0043] The embodiment of the present application provides an etching method for a film layer located on the side wall of an opening. When etching the covering layer, the incident angle of the ion beam and the surface where the semiconductor device is located form a first angle. The value range of the first angle is -90° to 0° and 0° to 90°, excluding the endpoint value. Therefore, in the process of etching the covering layer, the shielding effect of the side wall of the opening on the ion beam can be utilized, so that the ion beam can only etch the portion of the covering layer located above the preset position, and will not etch the portion of the covering layer located below the preset position. Therefore, in the process of etching the covering layer, the area affected by the shielding effect can be controlled by setting the first angle, thereby achieving precise control of the etching position and improving the accuracy of the etching position. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are merely embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without any creative work.

[0045] The structures, proportions, sizes, etc. depicted in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not intended to limit the conditions under which this application can be implemented, and therefore have no substantive technical significance. Any structural modifications, changes in proportional relationships, or adjustments in size, without affecting the efficacy and objectives that can be achieved by this application, should still fall within the scope of the technical contents disclosed in this application.

[0046] FIG1 is a schematic diagram of a through silicon via in a semiconductor device;

[0047] Figures 2 to 5 are schematic diagrams of the etching process of the metal film layer in the current through-silicon via;

[0048] FIG6 is a flow chart of a method for etching a film layer located on a sidewall surface of an opening provided by one embodiment of the present application;

[0049] 7 and 8 are schematic diagrams of two structures in which a cover layer covers a preset film layer in an etching method of a film layer located on a sidewall surface of an opening provided by one embodiment of the present application;

[0050] 9 to 13 are schematic diagrams of an etching process of a method for etching a film layer located on a sidewall surface of an opening provided in one embodiment of the present application;

[0051] 14 to 19 are schematic diagrams showing asymmetric sidewalls of through holes in semiconductor devices;

[0052] FIG20 is a schematic diagram of a groove in a semiconductor device under ideal conditions;

[0053] 11 to 27 are schematic diagrams of an etching process of a method for etching a film layer located on a sidewall surface of an opening provided by another embodiment of the present application;

[0054] 28 to 33 are schematic diagrams showing the asymmetric sidewalls of a groove in a semiconductor device. DETAILED DESCRIPTION

[0055] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0056] It will be apparent to those skilled in the art that various modifications and variations can be made in this application without departing from the spirit or scope of this application. Therefore, this application is intended to cover modifications and variations of this application that fall within the scope of the corresponding claims (technical solutions claimed for protection) and their equivalents. It should be noted that the embodiments provided in the examples of this application can be combined with each other without contradiction.

[0057] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0058] As described in the background art section, when removing the metal layer at a specific location on the sidewall of a through silicon via (TSV), the accuracy of the etching position needs to be improved.

[0059] This is because when currently processing the sidewall film layer at a specific location in a TSV (i.e., removing the metal layer at a specific location on the TSV sidewall), it is necessary to first fill the TSV with a filling material, then use inductively coupled plasma (ICP) to etch the filling material in the TSV back to the specific location, and then use ICP to remove the exposed target sidewall film layer, and finally etch the remaining filling material.

[0060] As shown in FIG1 , FIG1 shows a through silicon via 01 in a semiconductor device, wherein region A is a portion of a film layer to be disconnected; as shown in FIG2 , a filling material 02 is first filled into the through silicon via 01, and the filling material 02 completely fills the through silicon via 01; as shown in FIG3 , an inductively coupled plasma (ICP) is used to etch the filling material 02 in the through silicon via 01, and the filling material 02 is etched back to a specific position, exposing a portion A of the film layer to be disconnected in the through silicon via 01; as shown in FIG4 , the exposed portion A of the film layer to be disconnected in the through silicon via 01 is removed using ICP; and as shown in FIG5 , the remaining portion of the filling material 02 is removed.

[0061] As shown in FIG3 , when the filling material in the TSV is etched using ICP and the filling material is etched back to a specific position, the etching endpoint can only be achieved by controlling the etching depth through the process time because there is no change in the film material. The etching amount of the filling material cannot be effectively guaranteed, thereby affecting the accuracy of the TSV sidewall coating removal position.

[0062] In view of this, an embodiment of the present application provides an etching method for a film layer located on a sidewall surface of an opening, which is applied to a semiconductor device. As shown in FIG6 , the etching method includes:

[0063] S1: placing the semiconductor device on a carrier, wherein the semiconductor device has an opening, and the sidewall surface of the opening is coated with a predetermined film layer. Optionally, the predetermined film layer may be a metal film layer, and the predetermined film layer is formed by a deposition process, but the present application is not limited thereto. In other embodiments of the present application, the predetermined film layer may also be a film layer of other materials, and the predetermined film layer may also be formed by other processes, depending on the specific circumstances.

[0064] S2: forming a covering layer on the surface of the preset film layer;

[0065] S3: etching the cover layer using an ion beam to remove a portion of the cover layer, exposing a first portion of the preset film layer, where the first portion is a portion of the preset film layer located at a preset position facing the opening port, and an incident angle of the ion beam forms a first angle with respect to the surface where the semiconductor device is located, where the first angle ranges from -90° to 0° and from 0° to 90°, excluding endpoint values, i.e., excluding 0°, 90°, and -90°;

[0066] S4: removing the first portion of the preset film layer;

[0067] S5: removing the remaining portion of the covering layer.

[0068] It should be noted that, in this embodiment, the preset position is the boundary position between the to-be-etched area and the non-etched area of ​​the preset film layer.

[0069] Optionally, based on the above embodiments, in one embodiment of the present application, as shown in Figure 7, the covering layer 30, in addition to covering the surface of the preset film layer 20, can also completely fill the opening 10, but the present application is not limited to this. In other embodiments of the present application, as shown in Figure 8, the covering layer 30 may also only cover the surface of the preset film layer 20 and not completely fill the opening 10, depending on the specific circumstances.

[0070] Based on the above embodiments, in one embodiment of the present application, removing the first portion of the preset film layer includes etching the first portion of the preset film layer using an ion beam to remove the first portion of the preset film layer, but the present application is not limited to this. In other embodiments of the present application, a wet etching process can also be used to remove the first portion of the preset film layer, depending on the specific circumstances.

[0071] The embodiment of the present application provides an etching method for a film layer located on the side wall of an opening. When etching the covering layer, the incident angle of the ion beam and the surface where the semiconductor device is located form a first angle. The value range of the first angle is -90° to 0° and 0° to 90°, excluding the endpoint value. Therefore, in the process of etching the covering layer, the shielding effect of the side wall of the opening on the ion beam can be utilized, so that the ion beam can only etch the portion of the covering layer located above the preset position, and will not etch the portion of the covering layer located below the preset position. Therefore, in the process of etching the covering layer, the area affected by the shielding effect can be controlled by setting the first angle, thereby achieving precise control of the etching position and improving the accuracy of the etching position.

[0072] It should be noted that, in the process of etching the covering layer using an ion beam, as shown in FIG7 , if both sides of the upper port of the opening 10 (i.e., the upper surface of the semiconductor device) are also covered with the covering layer 30, then the portions of the covering layer 30 located on both sides of the upper port of the opening 10 will be removed at the same time.

[0073] It should also be noted that in this embodiment, during the etching of the covering layer, any asymmetry in different areas of the opening side wall will be amplified by the shielding effect of the opening side wall on the ion beam, thereby producing a height difference at the etching interface between the covering layer and the predetermined film layer in the area to be etched.

[0074] Optionally, in this embodiment, the area to be etched of the covering layer includes multiple sub-areas arranged along a first direction, and the distances between the multiple sub-areas and the carrier are equal. The first direction is parallel to the side walls of the opening and the carrier. It should be noted that, in the embodiment of the present application, the opening can be a through hole or a groove, and the port shape of the opening can be circular or rectangular. This application does not limit this, and it is described below in combination with specific circumstances.

[0075] Example 1

[0076] Specifically, in one embodiment of the present application, when the opening is a through hole and the port shape of the opening is circular, etching the covering layer using an ion beam to remove a portion of the covering layer to expose the first portion of the preset film layer includes:

[0077] While the covering layer is being etched by an ion beam, the carrier is rotated until a portion of the covering layer is removed, exposing the first portion of the preset film layer; that is, while the multiple sub-regions of the covering layer are being etched by an ion beam, the carrier is rotated until portions of the multiple sub-regions of the covering layer are removed, exposing the first portion of the preset film layer.

[0078] Optionally, in one embodiment of the present application, the rotation speed of the carrier is in the range of 0rpm to 80rpm, that is, during the process of etching the covering layer, the rotation speed of the carrier rotating around the center of the carrier (i.e., rotation) is in the range of 0rpm to 80rpm, but the present application does not limit this, and it depends on the specific situation.

[0079] Specifically, in one embodiment of the present application, during the process of etching the cover layer, the carrier rotates uniformly, so that the etching of the cover layer is more uniform, and thus the subsequent etching of the preset film layer is more uniform.

[0080] Based on any of the foregoing embodiments, in one embodiment of the present application, etching the cover layer using an ion beam to remove a portion of the cover layer includes:

[0081] The covering layer is etched using at least one etching method selected from standard ion beam etching, reactive ion beam etching, and chemically assisted ion beam etching to remove a portion of the covering layer. That is, when etching the covering layer, a standard ion beam etching process, a reactive ion beam etching process, a chemically assisted ion beam etching process, or any combination of a standard ion beam etching process, a reactive ion beam etching process, and a chemically assisted ion beam etching process may be used. This application does not impose any limitation on this, and the specific method depends on the circumstances.

[0082] It should be noted that standard ion beam etching (IBE), also known as ion milling (IBM) or ion sputtering, utilizes the principle of glow discharge to decompose argon gas into argon ions. These argon ions are accelerated by the anode electric field and physically bombard the sample surface to achieve the etching effect. The etching process involves filling the ion source discharge chamber with Ar gas and ionizing it to form a plasma. The ions are then drawn out and accelerated by the grid in a beam-like form. The ion beam, with a certain energy, enters the chamber and strikes the solid surface, bombarding the atoms on the solid surface and causing sputtering to achieve the etching purpose. This is a purely physical etching process. A mask is placed on the workpiece surface to prepare the grooves. Ultimately, the exposed portion is etched away, while the masked portion is retained, forming the desired etched pattern. Reactive Ion Beam Etching (RIBE) is based on ion beam etching (IBE) by adding corrosive gas. Therefore, it not only retains the physical etching ability of the ion beam, but also increases the chemical reaction ability of the corrosive gas to the sample after ionization. It also supports the chemically assisted etching capability of the non-ionized corrosive gas (i.e., chemically-assisted ion beam etching: CAIBE, Chemically-Assisted Ion Beam Etching), which can significantly increase the etching rate and improve the etching quality for materials suitable for chemical assistance.

[0083] Specifically, in one embodiment of the present application, the etching gas used in the standard ion beam etching is an inert gas; the etching gas used in the reactive ion beam etching includes an inert gas or a reactive gas; and the etching gas used in the chemically assisted ion beam etching includes at least one of an inert gas and a reactive gas.

[0084] Optionally, in one embodiment of the present application, the inert gas includes at least one of He, Ne, Ar, Kr, Xe and N2, that is, the inert gas may include one or a combination of He, Ne, Ar, Kr, Xe and N2; the reactive gas includes at least one of F-based, Cl-based, Br-based gas and O2, that is, the reactive gas includes one or a combination of F-based, Cl-based, Br-based gas and O2; the present application does not limit this, and the specific situation depends on the circumstances.

[0085] Specifically, in one embodiment of the present application, the F-based gas may be CF4, CF8, CHF3 or BF3, the Cl-based gas may be HCl, CCl4, BCl3 or Cl2, and the Br-based gas may be HBr; the present application does not limit this, and the specific situation may vary.

[0086] It should be noted that, in actual applications, when the covering layer is etched by standard ion beam etching or reactive ion beam etching, the inert gas or the reactive gas is directly introduced into the ion source that generates the ion beam; when the covering layer is etched by chemically assisted ion beam etching, the inert gas and the reactive gas can be directly introduced into the ion source that generates the ion beam, or can be directly introduced into the etching chamber where the semiconductor device is located. This application does not impose any restrictions on this, and the specific situation depends on the circumstances.

[0087] Based on any of the above embodiments, in one embodiment of the present application, in the process of etching the covering layer using an ion beam, the energy of the ion beam when it is extracted is in the range of 0 to 2000 eV, so as to be compatible with the process capabilities of existing etching equipment, reduce process difficulty, and reduce etching costs; the ion source power is in the range of 0 to 3000 W, so as to be compatible with the process capabilities of existing etching equipment; the beam current when the ion beam is extracted is in the range of 0 to 2 A, so as to be compatible with the process capabilities of existing etching equipment; the gas flow rate introduced into the ion source that generates the ion beam or the etching chamber where the semiconductor device is located is in the range of 0 to 300 sccm, so as to be compatible with the process capabilities of existing etching equipment; the temperature of the carrier is in the range of: 0°C to 300°C, so as to be compatible with the process capabilities of existing etching equipment; the pressure in the etching chamber is in the range of 0.001 mT to 5 mT, so as to be compatible with the process capabilities of existing etching equipment; but this application does not limit this, and the specific situation depends on the circumstances.

[0088] It should be noted that the energy of the ion beam when it is extracted is related to the etching rate and etching effect of the covering layer. The greater the energy of the ion beam when it is extracted, the faster the etching rate, and the greater the energy of the ion beam when it is extracted, the easier it is to etch difficult-to-etch materials; the power of the ion source is different from the power of the conventional ICP, and is a value based on the given process parameters and hardware self-matching; the beam current of the ion beam when it is extracted is related to the etching rate, and is determined according to the required etching rate; the temperature of the carrier and the pressure in the etching chamber are determined according to the specific etching material and structure experiments.

[0089] It should also be noted that, in actual application, due to the existence of a beam divergence angle of the ion beam, the actual angle adopted by the first angle θ is generally the theoretical angle α±5°. Therefore, based on any of the above embodiments, in an embodiment of the present application, the value range of the first angle θ is α-5°~α+5°: tanα=d / h; wherein, α is the theoretical value of the first angle; continuing as shown in Figure 8, d is the size of the opening along the second direction Y on the cross-sectional view of the semiconductor device, that is, the diameter of the through hole; h is the height from the area to be etched of the preset film layer to the port position of the opening, that is, the height of the first part of the preset film layer; wherein, the second direction is parallel to the plane where the semiconductor device is located, and parallel to the cross-section of the semiconductor device.

[0090] In addition, in a specific application process, when the material of the side wall of the opening is different, the material of the preset film layer located on the side wall of the opening and the material of the covering layer covering the preset film layer may also be different. When the material of the covering layer and the material of the preset film layer are different, the selection of the etching gas and / or the proportion of different gases in the etching gas may also be different, depending on the specific situation.

[0091] Specifically, in one embodiment of the present application, when the material of the opening is SiO2, the material of the covering layer is C, and the material of the preset film layer is Cr, C can be etched using RIBE with O2 introduced, and Cr can be etched using a base gas; when the material of the opening is SiO2, the material of the covering layer is optical resin (PR), and the material of the preset film layer is Mo, PR can be etched using RIBE with O2 introduced, and Mo can be etched using a Cl-based gas.

[0092] Optionally, in one embodiment of the present application, the material of the side wall of the through hole is SiO2, the material of the preset film layer is Cr, the material of the covering layer is C, and the aperture value range is 2μm~3μm, that is, the diameter value range of the through hole is 2μm~3μm. When it is necessary to process a film layer 5μm and more away from the through hole port, the incident angle of the ion beam is calculated according to the formula tanα=d / h to obtain an incident angle of approximately 21°~32°. After adjusting the angle according to actual experiments, as shown in Figures 9 and 10, the covering layer is partially removed using the RIBE method with O2 as the gas, exposing the first part of the preset film layer, and then, as shown in Figures 11 and 12, the first part of the preset film layer is removed using Cl-based gas or wet method, and finally, as shown in Figure 13, the remaining part of the covering layer is removed using O2.

[0093] In another embodiment of the present application, the material of the side wall of the through hole is Si3N4, the material of the preset film layer is Mo, the material of the covering layer is C, and the aperture value range is 2μm~3μm, that is, the diameter value range of the through hole is 2μm~3μm. When it is necessary to process a film layer 5μm and above away from the through hole port, the incident angle of the ion beam is calculated according to the formula tanα=d / h to obtain an incident angle of approximately 21°~32°. After adjusting the angle according to actual experiments, the RIBE method with O2 as the gas is used to first remove part of the covering layer to expose the first part of the preset film layer, and then use Cl-based gas or wet method to remove the first part of the preset film layer, and finally use O2 to remove the remaining part of the covering layer.

[0094] In another embodiment of the present application, the material of the side wall of the through hole is SiO2, the material of the preset film layer is Mo, the material of the covering layer is photoresist (PR), and the aperture value range is 2μm~3μm, that is, the diameter value range of the through hole is 2μm~3μm. When it is necessary to process a film layer 5μm and above away from the through hole port, the incident angle of the ion beam is calculated according to the formula tanα=d / h to obtain an incident angle of approximately 21°~32°. After adjusting the angle according to actual experiments, the RIBE method with O2 as the gas is used to first remove part of the covering layer to expose the first part of the preset film layer, and then use Cl-based gas or wet method to remove the first part of the preset film layer, and finally use O2 to remove the remaining part of the covering layer.

[0095] In addition, in a specific application process, when etching the covering layer using an ion beam, different ion beam incident angles can be selected or matched based on the different apertures of the through holes and different modification depths (i.e., the depth of the area to be etched of the covering layer). The calculation formula is tanα=d / h.

[0096] From the above, it can be seen that during the etching process of the covering layer, any asymmetry of different areas of the opening sidewall will be amplified by the shielding effect of the opening sidewall on the ion beam, thereby generating a height difference at the etching interface between the covering layer and the predetermined film layer in the area to be etched.

[0097] Continuing with FIG8 , ideally, the sidewalls of the opening 10 are symmetrical and perpendicular to the top surface of the opening 10; in practical applications, when the sidewalls of the opening are not perpendicular to the top surface of the opening, the asymmetric forms of the sidewalls of the opening 10 are roughly divided into three types, as shown in FIG14 to FIG19 . Given a diameter d of the through hole and a height h of the first portion of the preset film layer 20 to be exposed, the ion beam incident angle is determined according to tanα=d / h. In the structure shown in FIG14 , the sidewalls of the opening are not perpendicular to the top surface of the opening, and the height of the inclined portion of the sidewalls of the opening is h. At this time, the height difference generated by the etching interface of the to-be-etched area of ​​the preset film layer 20 As shown in FIG15 , FIG15 shows the height difference y1 generated at the etching interface after the etching of the to-be-etched area of ​​the preset film layer in the structure shown in FIG14 is completed; in the structures shown in FIG16 and FIG17 , wherein, in the structure shown in FIG16 , the side wall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the side wall of the opening is greater than h; in the structure shown in FIG17 , the side wall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the side wall of the opening is the height of the side wall. In these two structures, the height difference y1 generated at the etching interface of the to-be-etched area of ​​the preset film layer 20 is Wherein, x is the distance that the asymmetric side wall of the opening deviates from the ideal position, β is the angle between the asymmetric side wall of the opening and the ideal position; the direction of the dotted single arrow represents the incident direction of the ion beam, and the incident direction of the ion beam etching different areas is the same as the angle between the upper end face of the opening. As shown in Figures 18 and 19, Figure 18 shows the height difference y2 generated at the etching interface after the etching of the area to be etched of the preset film layer in the structure shown in Figure 16 is completed, and Figure 19 shows the height difference y2 generated at the etching interface after the etching of the area to be etched of the preset film layer in the structure shown in Figure 17 is completed. It should be noted that in actual applications, if a height difference calculated in accordance with the above formula appears in the asymmetric opening, it can be determined that this structure is completed by this process.

[0098] Example 2:

[0099] In another embodiment of the present application, the opening is a groove, and the port shape of the opening is rectangular; etching the covering layer using an ion beam to remove a portion of the covering layer to expose the first portion of the predetermined film layer includes:

[0100] An ion beam is used to etch a sub-region of the covering layer. After the etching of the sub-region is completed, the etching is stopped. After the carrier is rotated, the ion beam is used to etch another sub-region of the covering layer. The process is repeated until portions of multiple sub-regions of the covering layer are all removed, exposing the first portion of the preset film layer.

[0101] It should be noted that, in this embodiment, since the different sub-regions of the covering layer are directly etched in the same etching chamber, in this embodiment of the application, the etching of the different sub-regions of the covering layer can be regarded as a one-step process.

[0102] Based on the above embodiment, in one embodiment of the present application, etching the cover layer by using an ion beam to remove a portion of the cover layer includes:

[0103] The covering layer is etched using at least one etching method selected from standard ion beam etching, reactive ion beam etching, and chemically assisted ion beam etching to remove a portion of the covering layer. That is, when etching the covering layer, a standard ion beam etching process, a reactive ion beam etching process, a chemically assisted ion beam etching process, or any combination of a standard ion beam etching process, a reactive ion beam etching process, and a chemically assisted ion beam etching process may be used. This application does not impose any limitation on this, and the specific method depends on the circumstances.

[0104] Specifically, in one embodiment of the present application, the etching gas used in the standard ion beam etching is an inert gas; the etching gas used in the reactive ion beam etching includes an inert gas or a reactive gas; and the etching gas used in the chemically assisted ion beam etching includes at least one of an inert gas and a reactive gas.

[0105] Optionally, in one embodiment of the present application, the inert gas includes at least one of He, Ne, Ar, Kr, Xe and N2, that is, the inert gas may include one or a combination of He, Ne, Ar, Kr, Xe and N2; the reactive gas includes at least one of F-based, Cl-based, Br-based gas and O2, that is, the reactive gas includes one or a combination of F-based, Cl-based, Br-based gas and O2; the present application does not limit this, and the specific situation depends on the circumstances.

[0106] Specifically, in one embodiment of the present application, the F-based gas may be CF4, CF8, CHF3 or BF3, the Cl-based gas may be HCl, CCl4, BCl3 or Cl2, and the Br-based gas may be HBr; the present application does not limit this, and the specific situation may vary.

[0107] It should be noted that, in actual applications, when the covering layer is etched by standard ion beam etching or reactive ion beam etching, the inert gas or the reactive gas is directly introduced into the ion source that generates the ion beam; when the covering layer is etched by chemically assisted ion beam etching, the inert gas and the reactive gas can be directly introduced into the ion source that generates the ion beam, or can be directly introduced into the etching chamber where the semiconductor device is located. This application does not impose any restrictions on this, and the specific situation depends on the circumstances.

[0108] On the basis of any of the above embodiments, in one embodiment of the present application, the method for stopping etching includes: stopping the etching of the covering layer by blocking the ion beam with a shielding plate; in another embodiment of the present application, the method for stopping etching includes: stopping the beam pulling to stop the etching of the covering layer; in another embodiment of the present application, the method for stopping etching includes: stopping the etching of the covering layer by extinguishing the ion source; in other embodiments of the present application, other methods can also be used to stop the etching of the covering layer. The present application does not limit this, and it depends on the specific circumstances.

[0109] Optionally, in a specific embodiment of the present application, etching the cover layer using an ion beam to remove a portion of the cover layer to expose the first portion of the preset film layer includes:

[0110] The first sub-region of the covering layer is etched by an ion beam, and the etching is stopped after the etching of the sub-region is completed; the carrier is rotated, and the second sub-region of the covering layer is etched by an ion beam again to complete the etching of the area to be etched of the covering layer and expose the first part of the preset film layer.

[0111] Optionally, in one embodiment of the present application, an incident angle of θ is used to etch the first sub-region of the covering layer using an ion beam, that is, the angle between the transmission direction of the ion beam and the surface where the semiconductor device is located is θ; after the etching of the sub-region is completed, the etching is stopped; after the carrier is rotated 180° around the center of the carrier (that is, after the carrier rotates 180°), the incident angle of θ is used again to etch the second sub-region of the covering layer using an ion beam.

[0112] In another embodiment of the present application, an incident angle of θ is used to etch the first sub-region of the covering layer using an ion beam, that is, the angle between the transmission direction of the ion beam and the surface where the semiconductor device is located is θ; after the etching of the sub-region is completed, the etching is stopped; after the carrier is rotated around the ion source that generates the ion beam (that is, after the carrier revolves), an incident angle of -θ is used to etch the second sub-region of the covering layer using an ion beam, and the angle between the transmission direction of the ion beam and the surface where the semiconductor device is located is -θ.

[0113] It should be noted that, in actual application, due to the existence of a beam divergence angle of the ion beam, the actual angle adopted by the first angle θ is generally the theoretical angle α±5°. Therefore, based on any of the above embodiments, in an embodiment of the present application, the value range of the first angle θ is α-5°~α+5°: tanα=d / h; wherein, α is the theoretical value of the first angle; as shown in Figure 20, d is the size of the opening along the second direction Y on the cross-sectional view of the semiconductor device, that is, the width of the groove; h is the height from the preset film layer to be etched area to the port position of the opening; wherein, the second direction is parallel to the plane of the semiconductor device and parallel to the cross-section of the semiconductor device.

[0114] On the basis of any of the above embodiments, in one embodiment of the present application, in the process of etching the covering layer by using an ion beam, the angle selection range of the position of the carrier is 0° to 360°, so that the carrier can rotate 360°; the energy range of the ion beam when it is extracted is 0 to 2000eV, so as to be compatible with the process capabilities of existing etching equipment; the range of the ion source power is 0 to 3000W, so as to be compatible with the process capabilities of existing etching equipment; the range of the beam current when the ion beam is extracted is The range of the gas flow rate of the ion source for generating the ion beam or the etching chamber where the semiconductor device is located is 0 to 300 sccm, which is compatible with the process capabilities of the existing etching equipment; the range of the temperature of the carrier is 0°C to 300°C, which is compatible with the process capabilities of the existing etching equipment; the range of the pressure in the etching chamber is 0.001mT to 5mT, which is compatible with the process capabilities of the existing etching equipment; however, this application does not limit this, and it depends on the specific situation.

[0115] It should be noted that, in a specific application process, when the material of the side wall of the opening is different, the material of the preset film layer located on the side wall of the opening and the material of the covering layer covering the preset film layer may also be different. When the material of the covering layer and the material of the preset film layer are different, the selection of the etching gas and / or the proportion of different gases in the etching gas may also be different, depending on the specific situation.

[0116] Specifically, in one embodiment of the present application, when the material of the opening is SiO2, the material of the covering layer is C, and the material of the preset film layer is Cr, C can be etched using RIBE with O2 introduced, and Cr can be etched using a base gas; when the material of the opening is SiO2, the material of the covering layer is PR, and the material of the preset film layer is Mo, PR can be etched using RIBE with O2 introduced, and Mo can be etched using a Cl-based gas.

[0117] Optionally, in one embodiment of the present application, the material of the side wall of the groove is SiO2, the material of the preset film layer is Cr, the material of the covering layer is C, and the groove diameter ranges from 2μm to 3μm, that is, the width of the groove ranges from 2μm to 3μm. When it is necessary to process a film layer 5μm and more away from the groove port, the incident angle of the ion beam is calculated according to the formula tanα=d / h to obtain an incident angle of approximately 21° to 32°. After adjusting the angle according to actual experiments, as shown in Figures 21 and 22, the RIBE method with O2 as the gas is used to first remove the portion of the covering layer on one side of the groove side wall, and then, as shown in Figures 23 and 24, the portion of the covering layer on the other side of the groove side wall is removed by rotating another angle. Then, as shown in Figures 25 and 26, the first portion of the preset film layer is removed using Cl-based gas or wet method. Finally, as shown in Figure 27, the remaining portion of the covering layer is removed using O2.

[0118] From the above, it can be seen that during the etching process of the covering layer, any asymmetry of different areas of the opening sidewall will be amplified by the shielding effect of the opening sidewall on the ion beam, thereby generating a height difference at the etching interface between the covering layer and the predetermined film layer to be etched area.

[0119] Continuing with FIG20 , ideally, the sidewalls of the opening 10 are symmetrical and perpendicular to the top surface of the opening 10; in practical applications, when the sidewalls of the opening are not perpendicular to the top surface of the opening, the asymmetric forms of the sidewalls of the opening 10 are roughly divided into three types, as shown in FIG28 to FIG33 . Given a groove width d, and a height of the first portion of the preset film layer 20 to be processed being h, the ion beam incident angle is determined according to tanα=d / h. In the structure shown in FIG28 , the sidewalls of the opening are not perpendicular to the top surface of the opening, and the height of the inclined portion of the sidewalls of the opening is h. At this time, the height difference generated by the etching interface of the to-be-etched area of ​​the preset film layer 20 As shown in FIG29, FIG29 shows the height difference y1 generated at the etching interface after the etching of the to-be-etched area of ​​the preset film layer in the structure shown in FIG28; in the structures shown in FIG30 and FIG31, wherein, in the structure shown in FIG30, the side wall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the side wall of the opening is greater than h; in the structure shown in FIG31, the side wall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the side wall of the opening is the height of the side wall. In these two structures, the height difference y1 generated at the etching interface of the to-be-etched area of ​​the preset film layer 20 is Wherein, x is the distance that the asymmetric side wall of the opening deviates from the ideal position, β is the angle between the asymmetric side wall of the opening and the ideal position; the direction of the dotted single arrow represents the incident direction of the ion beam, and the incident direction of the ion beam etching different areas is the same as the angle between the upper end face of the opening. As shown in Figures 32 and 30, Figure 32 shows the height difference y2 generated at the etching interface after the etching of the area to be etched of the preset film layer in the structure shown in Figure 30 is completed, and Figure 33 shows the height difference y2 generated at the etching interface after the etching of the area to be etched of the preset film layer in the structure shown in Figure 31 is completed. It should be noted that in actual applications, if a height difference calculated in accordance with the above formula appears in the asymmetric opening, it can be determined that this structure is completed by this process.

[0120] In summary, in the etching method of the film layer located on the side wall of the opening provided in the embodiment of the present application, when etching the covering layer, the incident angle of the ion beam and the surface where the semiconductor device is located form a first angle, and the value range of the first angle is -90° to 0° and 0° to 90°, excluding the endpoint value. Therefore, in the process of etching the covering layer, the shielding effect of the side wall of the opening on the ion beam can be utilized, so that the ion beam can only etch the portion of the covering layer above the preset position, and will not etch the portion of the covering layer below the preset position. Therefore, in the process of etching the covering layer, the area affected by the shielding effect can be controlled by setting the first angle, thereby achieving precise control of the etching position and improving the accuracy of the etching position.

[0121] The various embodiments in this specification are described in a progressive, parallel, or combined manner. Each embodiment focuses on the differences from other embodiments, and reference can be made to the common and similar parts between the various embodiments. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple. For relevant parts, refer to the description of the methods.

[0122] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for etching a film layer located on the sidewall surface of an opening, applied to a semiconductor device, characterized in that: The method includes: Placing the semiconductor device on a carrier, wherein the semiconductor device has an opening, and a sidewall surface of the opening is plated with a preset film layer; forming a covering layer on the surface of the preset film layer; Etching the cover layer by using an ion beam to remove a portion of the cover layer and expose a first portion of the preset film layer, wherein the first portion is a portion of the preset film layer located at a preset position and facing the opening port, and an incident angle of the ion beam forms a first angle with a surface where the semiconductor device is located, and a value range of the first angle is -90° to 0° and 0° to 90°, excluding endpoint values; removing a first portion of the preset film layer; The remaining portion of the cover layer is removed.

2. The etching method according to claim 1, characterized in that: The opening is a through hole, and the port shape of the opening is circular; Etching the cover layer by using an ion beam to remove a portion of the cover layer to expose the first portion of the preset film layer comprises: While the cover layer is being etched by the ion beam, the stage is rotated until a partial area of ​​the cover layer is removed to expose the first portion of the preset film layer.

3. The etching method according to claim 2, characterized in that: The rotation speed of the carrier stage ranges from 0 rpm to 80 rpm.

4. The etching method according to claim 2, characterized in that: During the process of etching the cover layer, the carrier rotates uniformly.

5. The etching method according to claim 1, characterized in that: The opening is a groove, and the port shape of the opening is a rectangle; the area to be etched of the cover layer includes a plurality of sub-areas arranged along a first direction, the plurality of sub-areas are at equal distances from the carrier, and the first direction is parallel to the side wall of the opening and the carrier; Etching the cover layer by using an ion beam to remove a portion of the cover layer to expose the first portion of the preset film layer comprises: A sub-region of the covering layer is etched using an ion beam. After the etching of the sub-region is completed, the etching is stopped. After the carrier is rotated, another sub-region of the covering layer is etched using the ion beam. The process is repeated until portions of multiple sub-regions of the covering layer are all removed, exposing the first portion of the preset film layer.

6. The etching method according to claim 5, characterized in that: The method for stopping etching comprises: The ion beam is shielded by a shielding plate to stop etching the cover layer.

7. The etching method according to claim 5, characterized in that: The method for stopping etching comprises: The etching of the cover layer is stopped by stopping the beam drawing.

8. The etching method according to claim 5, characterized in that: The method for stopping etching includes: stopping etching the covering layer by extinguishing an ion source.

9. The etching method according to claim 1, characterized in that: Etching the cover layer by using an ion beam to remove a portion of the cover layer includes: At least one of standard ion beam etching, reactive ion beam etching and chemically assisted ion beam etching is used. The covering layer is etched by an etching method to remove a part of the covering layer.

10. The etching method according to claim 9, characterized in that: The etching gas used in the standard ion beam etching is an inert gas.

11. The etching method according to claim 9, characterized in that: The etching gas used in the reactive ion beam etching includes an inert gas or a reactive gas.

12. The etching method according to claim 9, characterized in that: The etching gas used in the chemically assisted ion beam etching includes at least one of an inert gas and a reactive gas.

13. The etching method according to any one of claims 10 to 12, characterized in that: The inert gas includes at least one of He, Ne, Ar, Kr, Xe and N2.

14. The etching method according to any one of claims 10 to 12, characterized in that: The reactive gas includes at least one of F-based, Cl-based, Br-based gases and O2.

15. The etching method according to claim 1, characterized in that: The value range of the first angle θ is α-5° to α+5°: tanα=d / h; Among them, α is the theoretical value of the first angle, d is the size of the opening along the second direction on the cross-sectional view of the semiconductor device, h is the height from the preset film layer to be etched area to the port position of the opening, and the second direction is parallel to the plane where the semiconductor device is located and parallel to the cross-sectional view of the semiconductor device.

16. The etching method according to claim 1, characterized in that: The side wall of the opening is perpendicular to the top surface of the opening, or the side wall of the opening is not perpendicular to the top surface of the opening.

17. The etching method according to claim 16, characterized in that: The side wall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the side wall of the opening is the height of the portion to be etched in the preset film layer.

18. The etching method according to claim 16, characterized in that: The side wall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the side wall of the opening is greater than the height of the portion to be etched in the preset film layer.

19. The etching method according to claim 16, characterized in that: The side wall of the opening is not perpendicular to the top surface of the opening, and the height of the inclined portion of the side wall of the opening is the same as the height of the side wall.

20. The etching method according to claim 1, characterized in that: During the etching of the cover layer, The energy value range of the ion beam when it is extracted is 0 to 2000 eV; The ion source power has a value range of 0 to 3000 W; The beam current range of the ion beam when it is extracted is 0-2A, and the gas flow range of the ion source generating the ion beam or the etching chamber where the semiconductor device is located is 0-300 sccm; The temperature range of the carrier is 0°C to 300°C.

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