Network interface card and method for network interface card comprising controller and local memory

Abstract

A network interface card (NIC) includes a controller and a local memory. The controller is configured to receive a data packet. The data packet includes a data payload, a header, and metadata. The controller is further configured to select a 0-copy buffer from a 0-copy descriptor ring having a host physical address (HPA). The controller is further configured to write the data payload of the data packet to the 0-copy buffer. The controller is further configured to parse the data packet to identify a virtual destination. The controller is further configured to select a virtual buffer from a descriptor ring of the virtual destination, having a virtual address. The controller is further configured to cause a mapping of the virtual address of the selected virtual buffer to the HPA of the 0-copy buffer.

Description

[0001] NETWORK INTERFACE CARD AND METHOD FOR NETWORK INTERFACE

[0002] CARD COMPRISING CONTROLLER AND LOCAL MEMORY

[0003] TECHNICAL FIELD

[0004] The present disclosure relates generally to the field of network computing and, more specifically, to a network interface card and a method for the network interface card comprising a controller and a local memory.

[0005] BACKGROUND

[0006] In the domain of network computing, a receiving (Rx) flow plays a crucial role in the life cycle of a data frame, from the moment the Rx flow enters a physical layer (PHY) of a network interface card (NIC) from a wire to its delivery as a packet to the final consumer software. The Rx flow typically involves three main stages: storing the frame, analysing the frame, and delivering the frame to a host. In order to achieve wire speed, the frame is initially placed in a memory located on the NIC's system-on-chip (SoC) or an external double data rate (DDR) memory on the board. Subsequently, the NIC's firmware or hardware begins the packet analysis process to determine the destination consumer of the packet. Once the analysis is complete, the firmware triggers the delivery of the packet to its destination queue, often through a data transfer operation that takes place over the peripheral component interconnect (PCI) bus.

[0007] In virtualization scenarios, a single physical NIC on a host system may be partitioned into multiple virtual NICs or virtual functions (VFs). Each VF appears and behaves as an independent network interface with its own unique MAC address and configuration. Such VFs may then be allocated to specific virtual machines (VMs) running on the host. When data frames arrive at the physical NIC, the firmware (or the hardware) needs to determine which VF the incoming frame should be forwarded based on factors such as the destination MAC address within a header of the packet or the virtual network identifier (VNI) within a Virtual Extensible LAN (VXLAN) header.

[0008] However, the problem associated with the existing receiving flow is that the placement of the frame in a temporary storage location for analysis requires additional space on the NIC's SoC or external DDR, which leads to increased computation time and costs. In addition, the process of storing the frame for the analysis introduces latency and consumes additional computational power, which can impact the overall performance of the network computing.

[0009] Conventionally, a specialized hardware is used to optimize packet handling. Such hardware is designed to handle data packets at wire-speed, providing high-performance packet processing capabilities. However, the specialized hardware, built to operate at wire-speed and deliver superior performance, is costly to develop and manufacture. Further, once dedicated to a specific task of optimizing packet handling, the specialized hardware may not be repurposed for other functions or reutilized in different aspects of the network communication. Thus, there exists a technical problem of how to store the frame and reduce the overall computational time, costs and latency generated during the RX flow in the conventional data flow control techniques in the NICs.

[0010] Therefore, in light of the foregoing discussion, there exists a need to overcome the aforementioned drawbacks associated with the conventional data flow control techniques in the NICs.

[0011] SUMMARY

[0012] The present disclosure provides a network interface card and a method for the network interface card comprising a controller and a local memory. The present disclosure provides a solution to the existing problem of how to store the frame and reduce the overall computational time, costs and latency generated during the RX flow in the conventional data flow control techniques in the NICs. An objective of the present disclosure is to provide a solution that overcomes at least partially the problems encountered in the prior art and provides an improved network interface card and a method for the network interface card comprising a controller and a local memory, such as by providing a method to receive packets with zero-copy using remapping.

[0013] One or more objectives of the present disclosure are achieved by the solutions provided in the enclosed independent claims. Advantageous implementations of the present disclosure are further defined in the dependent claims. In one aspect, the present disclosure provides a network interface card (NIC). The NIC includes a controller and a local memory. The controller is configured to receive a data packet. The data packet includes a data payload, a header and metadata. The controller is further configured to select a 0-copy buffer from a 0-copy descriptor ring having a host physical address (HP A). The controller is further configured to write the data payload of the data packet to the 0-copy buffer. The controller is further configured to parse the data packet to identify a virtual destination. The controller is further configured to select a virtual buffer from a descriptor ring of the virtual destination, having a virtual address. The controller is further configured to cause a mapping of the virtual address of the selected virtual buffer to the HPA of the 0-copy buffer.

[0014] The NIC may not store an entire frame in a System-on-Chip, SoC’s memory that saves significant time during packet processing. By directly writing the data payload to the 0-copy buffer, the processing time of the data packet is drastically decreased. The decrease in the processing time of the data packet results in quicker data handling and improved overall network performance. Further, since the required buffer size in the SoC is extremely small due to the 0-copy buffer usage, remaining memory space may be utilized for other purposes or, in some cases, eliminated entirely. The utilization of the remaining memory space leads to efficient resource allocation within the NIC and potentially reduces production costs. In addition, the present disclosure enables the use of host memory, which is typically more affordable and potentially unlimited in capacity, unlike SoC memory which may have limitations in terms of size and cost. With access to larger buffers in the host memory, the NIC may process larger frames, supporting higher data volumes and facilitating smoother data transmission. The utilization of multiple buffers for storing incoming frames allows the NIC to process more frames concurrently. The enhanced concurrent processing leads to improved throughput and network efficiency, as the NIC may handle a higher number of packets simultaneously, reducing data bottlenecks.

[0015] In an implementation form, the controller is further configured for RDMA applications. The virtual buffer is selected from a Receive Queue, RQ, of the virtual destination, and the virtual buffer address is the address of the virtual destination. In such implementation, configuring the NIC for the RDMA applications enables efficient data transfer directly to the RQ of the virtual destination, which streamlines data flow for remote direct memory access scenarios.

[0016] In a further implementation form, the controller is further configured to parse the data packet when the data packet is stored in a memory of a host.

[0017] Advantageously, parsing the data packet when stored in the host's memory reduces processing overhead and enhances data packet analysis.

[0018] In a further implementation form, the controller is further configured to copy the header of the data packet to a memory of a host and then parse the data packet.

[0019] In such an implementation, as the controller copies the header to host memory and then parses the data packet, the controller potentially reduces the NIC's processing load and optimizes data parsing.

[0020] In a further implementation form, the controller is further configured to cause an update of the virtual address to HPA by causing a hypervisor to do the update.

[0021] In such an implementation, the controller may utilize the hypervisor to update the virtual address to the HPA, which offloads the task and potentially optimizes address management.

[0022] In a further implementation form, the controller is further configured to cause the mapping of the virtual address of the selected virtual buffer to the HPA of the 0-copy descriptor buffer by doing the mapping.

[0023] In such an implementation, the controller may cause the mapping of the virtual address of the selected virtual buffer to the HPA of the 0-copy descriptor buffer, enhancing buffer management for efficient data transfer.

[0024] In another aspect, the present disclosure provides a method for the NIC, comprising a controller and a local memory. The method includes receiving a data packet, the data packet comprising a data payload, a header and metadata. The method further includes selecting a 0- copy buffer from a 0-copy descriptor ring having a host physical address, HPA. The method further includes writing the data payload of the data packet to the 0-copy buffer. The method further includes parsing the data packet to identify a virtual destination. The method further includes selecting a virtual buffer from a descriptor ring of the virtual destination, having a virtual address. The method further includes causing a mapping of the virtual address of the selected Virtual buffer to the HPA of the 0-copy buffer.

[0025] The disclosed method achieves all the advantages and technical effects of the network interface card of the present disclosure.

[0026] It has to be noted that all devices, elements, circuitry, units, and means described in the present application could be implemented in the software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities, are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be performed by external entities is not reflected in the description of a specific detailed element of that entity, which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements or any kind of combination thereof. It will be appreciated that features of the present disclosure are susceptible to being combined in various combinations without departing from the scope of the present disclosure as defined by the appended claims.

[0027] Additional aspects, advantages, features, and objects of the present disclosure would be made apparent from the drawings and the detailed description of the illustrative implementations construed in conjunction with the appended claims that follow.

[0028] BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The summary above, as well as the following detailed description of illustrative embodiments, is better understood when read in conjunction with the appended drawings. For the purpose of illustrating the present disclosure, exemplary constructions of the disclosure are shown in the drawings. However, the present disclosure is not limited to specific methods and instrumentalities disclosed herein. Moreover, those in the art will understand that the drawings are not to scale. Wherever possible, like elements have been indicated by identical numbers.

[0030] Embodiments of the present disclosure will now be described, by way of example only, with reference to the following diagrams wherein:

[0031] FIG. 1 is a block diagram of a networking system implementing a network interface card, in accordance with an embodiment of the present disclosure;

[0032] FIG. 2 is a flowchart that illustrates a method for the network interface card, in accordance with an embodiment of the present disclosure;

[0033] FIG. 3 is a diagram that depicts an exemplary implementation of a network architecture, in accordance with an embodiment of the present disclosure; and

[0034] FIG. 4 is a diagram that depicts an initialization phase of the network interface card, in accordance with an embodiment of the present disclosure.

[0035] In the accompanying drawings, an underlined number is employed to represent an item over which the underlined number is positioned or an item to which the underlined number is adjacent. A non-underlined number relates to an item identified by a line linking the nonunderlined number to the item. When a number is non-underlined and accompanied by an associated arrow, the non-underlined number is used to identify a general item at which the arrow is pointing.

[0036] DETAILED DESCRIPTION OF EMBODIMENTS

[0037] The following detailed description illustrates embodiments of the present disclosure and ways in which they can be implemented. Although some modes of carrying out the present disclosure have been disclosed, those skilled in the art would recognize that other embodiments for carrying out or practising the present disclosure are also possible.

[0038] FIG. 1 is a block diagram of a networking system implementing a network interface card, in accordance with an embodiment of the present disclosure. With reference to FIG. 1, there is shown a networking system 100 for implementing a network interface card (NIC) 102. The network interface card 102 includes a controller 104 and a local memory 106. The NIC 102 is implemented on a host 128. The host 128 further comprises a host memory 130.

[0039] The host 128 may be a master server or a master machine that is a part of a data center that controls an array of other cloud servers communicatively coupled to it for load balancing, running customized applications, and efficient data management. Examples of the host 128 may include, but are not limited to, a cloud server, an application server, a data server, or an electronic data processing device.

[0040] The network interface card 102 refers to a hardware component that is configured to receive and process data packets within an RX flow of network communication in the networking system 100. Examples of the network interface card 102 may include but are not limited to, a computer port, a network socket, a network interface controller, and any other network interface device.

[0041] The controller 104 corresponds to a processor configured to receive a data packet 112, the data packet 112 comprising a data payload 114, a header 116, and metadata 118. The examples of implementation of the controller 104 may include but are not limited to a central data processing device, a microprocessor, a microcontroller, a complex instruction set computing (CISC) processor, an application-specific integrated circuit (ASIC) processor, a reduced instruction set (RISC) processor, a very long instruction word (VLIW) processor, a state machine, and other processors or control circuitry.

[0042] The local memory 106 is configured to store the header 116 and metadata 118 of the data packet 112. The local memory 106 includes the 0-copy descriptor ring 108. The local memory 106 may be described as a volatile memory. Examples of implementation of the local memory 106 may include, but are not limited to, an Electrically Erasable Programmable Read-Only Memory (EEPROM), Random Access Memory (RAM), Read-Only Memory (ROM), Hard Disk Drive (HDD), Flash memory, Solid-State Drive (SSD), persistent memory, remote direct memory access (RDMA), or CPU cache memory.

[0043] The 0-copy descriptor ring 108 refers to specialized memory structures and data storage techniques that optimize data transfer and processing within the network interface card (NIC) 102. The 0-copy descriptor ring 108 corresponds to a circular data structure used in network interfaces to manage and control the flow of the data packet 112. The term "0-copy" in the 0- copy descriptor ring 108 is indicative of the fact that the data is not duplicated or copied during packet handling, which helps in reducing processing overhead and improving data transfer efficiency. The 0-copy descriptor ring 108 lists pointers to buffers, such as the 0-copy buffer 110 placed in the host memory 130.

[0044] The host memory 130 is configured to store the data packet 112. The host memory 130 includes the 0-copy buffer 110. The 0-copy buffer 110 corresponds to a specialized memory area or region used to temporarily store data packets during their processing within the network interface card 102. The term “0-copy” in the 0-copy buffer 110 is indicative of the fact that the data is not duplicated or copied when it is placed in the 0-copy buffer 110.

[0045] The data packet 112 corresponds to a fundamental unit of data that is transmitted within the networking system 100. The data payload 114 corresponds to actual data that needs to be transmitted from a source device to the network interface card 102. The data payload 114 may include but is not limited to any type of information, such as text, images, videos, or any other digital content. The header 116 corresponds to a part of the data packet 112 that contains control information that helps in the proper routing and processing of the data packet 112 throughout the network. The header 116 may include but is not limited to details such as source and destination addresses, packet sequence numbers, error-checking codes, and other relevant information. The metadata 118 corresponds to additional information related to the data payload. The metadata 118 may include but is not limited to details about data access rights and permissions, ensuring proper security and control over who can view, modify, or delete the data, information about data storage, data types, encoding, compression, and other technical aspects that enable data manipulation and interoperability, information about data quality, accuracy, and validity.

[0046] The network interface card 102 is connected to a virtual destination 120 through a communication network 126. The virtual destination 120 refers to a computer device or a group of computer devices capable of performing computation and processing tasks within the networking system 100. Implementation of the virtual destination 120 encompasses both individual computing units and larger systems, such as servers, clusters, distributed computing nodes, or cloud computing instances. The virtual destination 120 may be part of a local computing environment or geographically distributed across a network. The virtual destination 120 includes a descriptor ring 122. The descriptor ring 122 further includes a virtual buffer 124. The descriptor ring 122 refers to specialized memory structures and data storage techniques that optimize data transfer and processing within the virtual destination 120. The virtual buffer 124 corresponds to a specialized memory area or region used to temporarily store data packets during their processing within the virtual destination 120

[0047] The communication network 126 includes a medium (e.g., a communication channel) through which the NIC 102 communicates with the virtual destination 120. The communication network 126 may be a wired or wireless communication network. Examples of the communication network 126 may include, but are not limited to, Internet, a Local Area Network (LAN), a wireless personal area network (WPAN), a Wireless Local Area Network (WLAN), a wireless wide area network (WWAN), a cloud network, a Long-Term Evolution (LTE) network, a plain old telephone service (POTS), a Metropolitan Area Network (MAN), and / or the Internet. In an implementation, the NIC 102 is virtualised over the communication network 126. Specifically, a virtual input & output (VirtIO) is implemented in the host 128 to share the host memory 130 with the virtual destination 120 over the communication network 126

[0048] In operation, the controller 104 is configured to receive the data packet 112. Moreover, the data packet 112 refers to a unit of data that is transmitted over a network that includes the data payload 114, the header 116, and the metadata 118. In an implementation, the data payload 114 corresponds to an actual data that is being transmitted, such as a file, a message, and the like, and the metadata 118 is additional information about the data packet 112 that provides context or details about the data payload 114 or the data packet 112 itself, such as packet size, time of transmission, data type, and the like that aids in processing or managing the data packet 112.

[0049] In accordance with an embodiment, the controller 104 is configured to write the header 116 of the data packet 112 to the local memory 106. The information stored in the header 116 is used for routing the data packet 112 to a specific destination within the network. In accordance with another embodiment, the controller 104 is configured to write the metadata 118 of the data packet 112 to the local memory 106. Firstly, the controller 104 is configured to receive the data packet 112. Thereafter, the controller 104 is configured to write the metadata 118 of the data packet 112 to the local memory 106. As a result, the controller 104 is configured to efficiently utilize and manage the relevant information within the data packet 112, which improves the efficiency and reduces the overall data processing time.

[0050] The controller 104 is further configured to select the 0-copy buffer 110 from the 0-copy descriptor ring 108 having a host physical address (HP A). The controller 104 is further configured to write the data payload 114 of the data packet 112 to the 0-copy buffer 110. The HPA refers to the physical memory address in the host memory 130 of the NIC 102 where the selected 0-copy buffer 110 is located. The HPA uniquely identifies the memory location where the data payload 114 of the data packet 112 is written. In an implementation, the controller 104 is configured to examine the 0-copy descriptor ring 108 to find an available descriptor entry that corresponds to a free or unallocated 0-copy buffer 110. In such an implementation, the controller 104 is further configured to identify a descriptor entry that has a valid HPA associated with the descriptor ring, indicating that the buffer is available for use. Once the appropriate buffer such as 0-copy buffer 110 is found, the controller 104 is further configured to select the 0-copy buffer 110 for writing the data payload 114 of the received data packet 112. In such an implementation, the data payload 114 is not duplicated or copied while writing, which further helps in reducing data handling overhead and improving data transfer efficiency with reduced delay time.

[0051] The controller 104 is further configured to parse the data packet 112 to identify the virtual destination 120. In an example, the data packet 112 is parsed to extract relevant information from the data packet 112 and organize the relevant information in a structured manner. By parsing the data packet 112 and identifying the virtual destination 120, the controller 104 is configured to use this information for appropriate routing or handling of the data packet 112, ensuring that it reaches its intended destination within the network or system. The ability to extract and organize relevant data from the data packet 112 enables efficient and accurate virtual destination handling by the controller 104.

[0052] In accordance with an embodiment, the controller 104 is configured to parse the data packet 112 when the data packet 112 is stored in the host memory 130 of the host 128. In other words, the data packet is stored in the host memory 130 of the host 128 belonging to the networking system 100. By parsing the data packet 112 in the host memory 130, the controller 104 may efficiently retrieve the necessary information without additional data transfers or delays, thus allowing a quick and streamlined processing of the data packet 112 within the host 128. As a result, the overall performance and throughput of the NIC 102 are improved.

[0053] In accordance with an embodiment, the controller 104 is further configured to copy the header 116 of the data packet 112 to the host memory 130 of a host 128 and then parse the data packet 112. In such an embodiment, the data packet 112 is parsed to identify an address of the specified destination in the header 116 of the data packet 112. Firstly, the data packet 112 is received, the controller 104 is configured to copy the header 116 of the data packet 112 to the host memory 130 of a host 128. Thereafter, the controller 104 is configured to parse the entire data packet 112. As a result, the controller 104 is configured to ensure that the critical header information is readily available in the host memory for quick access and processing to allow an efficient and effective parsing of the data packet 112, optimizing the overall performance and data handling capabilities of the NIC 102.

[0054] In such an embodiment, the controller 104 is configured to copy the header 116 of the data packet 112 to the host memory 130 of the host 128 in order to parse the data packet 112. By copying the header 116 to the host memory 130 before parsing the data packet 112, the controller 104 ensures efficient access to critical header information, streamlining the overall parsing procedure and enhancing the performance of the NIC 102.

[0055] The controller 104 is further configured to select the virtual buffer 124 from the descriptor ring 122 of the virtual destination 120, having a virtual address. In an embodiment, the virtual buffer 124 is selected from a Receive Queue (RQ) of the virtual destination 120. In such an embodiment, the virtual buffer address is the address of the virtual destination 120. The selection of the virtual buffer 124 allows for efficient data processing and storage within the NIC 102, as the Virtual buffer 124 provides a temporary location for the data packet 112 to be analysed, routed, or further processed before reaching its specified virtual destination within the network. The use of the descriptor ring 122 and the virtual buffer 124 are used to provide optimized data handling along with enhancing the overall performance of the NIC 102.

[0056] In accordance with another embodiment, the virtual destination 120 corresponds to a destination virtual function (VF). The virtual buffer 124 refers to a VF buffer selected from the descriptor ring 122 of the destination VF. In such an embodiment, the virtual buffer address is a guest physical address (GPA). In other words, the virtual destination 120 points to a destination virtual function (VF), and the virtual buffer 124 is selected from the descriptor ring 122 associated with the destination VF. The virtual buffer address, in turn, is represented by a guest physical address (GPA), which is a memory address used within the virtualized environment to access data in the guest VM's memory space. As a result, the NIC 102 is configured to facilitate efficient data handling and communication within the virtualized network infrastructure.

[0057] In accordance with an embodiment, the controller 104 is configured for Remote Direct Memory Access (RDMA) applications. As a result, the controller 104 enables direct data transfer between the local memory 106 and the virtual buffer 124 without involving the central processing unit (CPU). The NIC 102 allows for high-speed, low-latency data communication between the host and the virtual destination 120 over the network, making it suitable for applications requiring efficient and fast data transfers.

[0058] In accordance with an embodiment, the controller 104 is further configured to cause an update of the virtual address to HPA by doing the update. By updating the virtual address to HP A, the controller 104 ensures that data may be efficiently and accurately accessed and processed within the physical memory of the host machine enabling seamless communication between the virtualized environment and the underlying hardware, allowing for efficient data handling and management.

[0059] In such an embodiment, the controller 104 is configured to cause an update of the virtual address to HPA by causing a hypervisor to do the update. In other words, the hypervisor is configured to update the virtual address to the HPA of the NIC 102. The hypervisor refers to a software or firmware that creates and manages virtual machines, such as virtual destination 120 on the host. As a result, the hypervisor allows multiple operating systems (OS) or instances to run concurrently on a single physical machine, each within its isolated virtual environment.

[0060] The controller 104 is further configured to cause a mapping of the virtual address of the selected Virtual buffer 124 to the HPA of the 0-copy buffer 110. In accordance with an embodiment, the controller 104 is configured to cause the mapping of the virtual address of the selected Virtual buffer 124 to the HPA of the 0-copy buffer 110 by doing the mapping. In such an embodiment, the controller 104 is configured to cause the mapping of the virtual address (GPA) of the selected Virtual buffer 124 to the HPA of the 0-copy buffer 110 by causing the hypervisor to do the mapping. In other words, the hypervisor is configured to do the mapping of the GPA to the HPA of the 0-copy buffer 110.

[0061] The NIC 102, by using 0-copy buffers 110 and directly writing the data payload 114 of the incoming data packets 112 to the host memory 130, the NIC 102 significantly reduces the need for intermediate storage in its local memory 106. The reduction in the need for intermediate storage in the local memory 106 of the NIC 102 results in faster packet processing since the time-consuming step of storing the entire packet in the local memory 106 is eliminated. The use of 0-copy buffers 110 allows the NIC 102 to handle the data packets 112 more efficiently, reducing latency and improving overall data throughput.

[0062] The NIC's 102 ability to parse incoming data packets 112 and identify the virtual destination 120 enables efficient handling in virtualized environments. By selecting a virtual buffer 124 from the descriptor ring 122 associated with the virtual destination 120 and mapping the virtual address of the virtual buffer 124 to the HPA (Host Physical Address) of the selected 0- copy buffer 110, the NIC 102 streamlines the process of delivering the data packet 112 to the specified virtual destination. The enhanced virtual destination handling ensures that the data packets 112 are efficiently routed to their respective virtual machines or user-space applications, improving the overall performance and responsiveness of virtualized networks.

[0063] The use of 0-copy buffers 110 reduces the need for large local memory 106 storage on the NIC 102, which in turn leads to cost savings in hardware design and manufacturing. By leveraging the host memory 130 for storing data packets 112, the NIC can make use of the host's 128 potentially large and cost-effective memory resources, eliminating the need for expensive dedicated memory on the NIC 102 itself. Thus, the efficient use of memory resources and streamlined packet processing in the NIC's 102 design contributes to a more resource-efficient and cost-effective network interface solution.

[0064] FIG. 2 is a diagram that depicts a flowchart of a method for a network interface card (NIC) comprising a controller and a local memory, in accordance with an embodiment of the present disclosure. FIG. 2 is described in conjunction with elements from FIG. 1. With reference to FIG. 2, there is shown a flowchart of a method 200 for NIC 102 (of FIG. 1). The method 200 includes steps 202-212. Moreover, the NIC 102 (of FIG. 1) is configured to execute the method 200.

[0065] There is provided the method 200 for a network interface card (NIC) 102 comprising the controller 104 (of FIG. 1) and the local memory 106 (of FIG. 1). At step 202, the method 200 includes receiving the data packet 112, the data packet 112 comprising the data payload 114, the header 116, and the metadata 118. In an implementation, as the controller 104 configured in the NIC 102 receives the data packet 112, the controller 104 analyses the incoming data packet 112 to identify the components of the data packet 112 i.e., the data payload 114, the header 116, and the metadata 118.

[0066] At step 204, the method 200 further includes selecting the 0-copy buffer 110 from the 0-copy descriptor ring 108 having the host physical address (HP A). The HPA refers to the physical memory address in the local memory 106 of the NIC 102 where the selected 0-copy buffer 110 is located. The HPA uniquely identifies the memory location where the data payload 114 of the data packet 112 is written.

[0067] At step 206, the method 200 further includes writing the data payload 114 of the data packet 112 to the 0-copy buffer 110. In such an implementation, the controller 104 is further configured to identify a descriptor entry that has a valid HPA associated with the descriptor ring, indicating that the buffer is available for use. Once the appropriate buffer such as 0-copy buffer 110 is found, the controller 104 is further configured to select the 0-copy buffer 110 for writing the data payload 114 of the received data packet 112. In such an implementation, the data payload 114 is not duplicated or copied while writing, which further helps in reducing data handling overhead and improving data transfer efficiency.

[0068] At step 208, the method 200 further includes parsing the data packet 112 to identify the virtual destination 120 virtual function (VF). In an example, the data packet 112 is parsed to extract relevant information from the data packet 112 and organize the relevant information in a structured manner.

[0069] At step 210, the method 200 further includes selecting the Virtual buffer 124 from the descriptor ring 122 of the virtual destination 120, having the virtual address. In an implementation, the virtual buffer 124 is selected from a Receive Queue (RQ) of the virtual destination 120. In such an embodiment, the virtual buffer address is the address of the virtual destination 120. The selection of the virtual buffer 124 allows for efficient data processing and storage within the NIC 102, as the Virtual buffer 124 provides a temporary location for the data packet 112 to be analysed, routed, or further processed before reaching its specified virtual destination within the network. The use of the descriptor ring 122 and the virtual buffer 124 helps in optimizing data handling and enhancing the overall performance of the NIC 102.

[0070] At step 212, the method 200 further includes causing the mapping of the virtual address of the selected Virtual buffer 124 to the HPA of the 0-copy buffer 110. In an implementation, the controller 104 is configured to cause the mapping of the virtual address of the selected virtual buffer 124 to the HPA of the 0-copy buffer 110 by doing the mapping. In such an embodiment, the controller 104 is configured to cause the mapping of the virtual address (GPA) of the selected virtual buffer 124 to the HPA of the 0-copy buffer 110 by causing the hypervisor to do the mapping. In other words, the hypervisor is configured to do the mapping of the GPA to the HPA of the 0-copy buffer 110.

[0071] The method 200, by using 0-copy buffers 110 and directly writing the data payload 114 of the incoming data packets 112 to the host memory 130, the NIC 102 significantly reduces the need for intermediate storage in its local memory 106. The reduction in the need for intermediate storage in the local memory 106 of the NIC 102 results in faster packet processing since the time-consuming step of storing the entire packet in the local memory 106 is eliminated. The use of 0-copy buffers 110 allows the NIC 102 to handle the data packets 112 more efficiently, reducing latency and improving overall data throughput.

[0072] The steps 202 to 212 are only illustrative, and other alternatives can also be provided where one or more steps are added, one or more steps are removed, or one or more steps are provided in a different sequence without departing from the scope of the claims herein.

[0073] There is further provided a computer program product comprising program instructions for performing the method 200 when executed by one or more processors in a network. The computer program product is implemented as an algorithm, embedded in a software stored in a non-transitory computer-readable storage medium. The non-transitory computer-readable storage means may include but are not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. Examples of implementation of computer-readable storage medium, but are not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Random Access Memory (RAM), Read Only Memory (ROM), Hard Disk Drive (HDD), Flash memory, a Secure Digital (SD) card, Solid-State Drive (SSD), a computer-readable storage medium, and / or CPU cache memory.

[0074] FIG. 3 is an exemplary scenario that depicts an architecture of a network interface card (NIC), in accordance with an embodiment of the present disclosure. FIG. 3 is described in conjunction with elements from FIG. 1. With reference to FIG. 3 there is shown an exemplary diagram 300 that depicts the architecture of the NIC 102.

[0075] In an exemplary scenario, there is shown that the host 128 includes the host memory (physical memory) 130. The host memory 130 includes a plurality of memory pages such as a first memory page 304A, a second memory page 304B, a third memory page 304C, a fourth memory page 304D, a fifth memory page 304E, and a sixth memory page 304F. Each of the plurality of memory pages in the host memory 130 refers to a fixed-size block of contiguous memory locations. Each of the plurality of memory pages is the smallest unit of memory that the operating system and hardware work with for memory management purposes. Each of the plurality of memory pages has a unique address.

[0076] The host memory 130 further includes a plurality of buffers such as a first buffer 306A, a second buffer, 306B, and a third buffer 306C. Each of the plurality of buffers refers to a temporary storage area used to hold data or instructions before the data is processed or transferred to the specified destination.

[0077] The virtual destination includes a guest physical memory 302. The guest physical memory 302 includes a plurality of virtual memory pages such as a first virtual memory page 308A, a second virtual memory page 308B, and a third virtual memory page 308C. The guest physical memory 302 further includes a plurality of virtual buffers such as a first virtual buffer 310A, a second virtual buffer 310B, and a third virtual buffer 310C.

[0078] The solid arrows in the FIG. 3 represents a guest-to-host mapping. In an example, the first virtual memory page 308A is mapped to the first memory page 304A, the second virtual memory page 308B is mapped to the second memory page 304B, the third virtual memory page 308C is mapped to the third memory page 304C, the first virtual buffer 310A is mapped to the fourth memory page 304D, the second virtual buffer 310B is mapped to the fifth memory page 304E, and the third virtual buffer 310C is mapped to the sixth memory page 304F

[0079] The host 128 and the virtual destination 120 provide the NIC 102 with the plurality of buffers (As shown by the solid arrows in FIG. 3). In an example when the data packet 112 arrives for the virtual destination 120, a mapping is changed (As shown by the dashed arrows in FIG. 3). The first virtual buffer 310A is mapped to the first buffer 306A that received the data packet 112. Optionally, the fourth memory page 304D to which the first virtual buffer 310A was previously pointed is added to a list of buffers available for the NIC 102 for future use (As shown by the dashed arrow in FIG. 3). The use of the virtual destination 120 in this example is for demonstration only. The virtual destination 120 may also be a user-space application, e.g., an RDMA application.

[0080] FIG. 4 is a diagram that depicts an initialization phase of the network interface card, in accordance with an embodiment of the present disclosure. FIG. 4 is described in conjunction with elements from FIGs. 1, 2, and 3. With reference to FIG. 4, there is shown a diagram 400 that depicts an initialization phase of the NIC 102.

[0081] There is shown the guest-to-host mapping in a tabular form. At a preparation stage, the host 128 allocates the 0-copy buffers 110 to a network device. Further, at a reception stage, the data packet 112 comes in on a wire and is received by a physical layer (PHY) of the host 128. The NIC 102 takes the 0-copy buffer 110 from the 0-copy descriptor ring 108. The NIC 102 writes the data packet 112 to the 0-copy buffer 110 by PCI (Peripheral Component Interconnect) transaction. The NIC 102 parses the data packet 112. While parsing the data packet 112, the data packet 112 is placed on the host memory 130. The NIC 102 copies the headers 116 of the data packet to the local memory 106 for processing internally. The NIC 102 retains the headers 116 locally, without placing the headers 116 on the host memory 130.

[0082] The NIC 102 identifies the virtual destination 120 by parsing the data packet 112. The NIC 102 operates on the header 116 of the data packet 112 to decide what to do with the data packet 112, for example, which virtual destination 120 is required to be selected for sending the data packet 112. Optionally, the NIC 102 copies the header 116 back from the host memory 130. The header 116 is a small portion of data, and a lot less than the whole data packet 112. The NIC 102 retains the headers 116. i.e., the NIC only copies the data payload 114 to a host buffer and copies the headers 116 to local memory 106. As a possible optimization, the headers 116 are never copied to the host buffer, and the necessary metadata 118 is extracted, placed on the 0-copy descriptor ring 108, or 0-copy buffer 110, and handled by a driver.

[0083] The NIC 102 (of FIG.1) takes the virtual buffer 124 from the descriptor ring 122 and notes the GPA and vCPU ID (Virtual CPU ID). The virtual buffer’s 124 GPA is noted as GPA1. The NIC 102 updates the guest to physical memory mapping. The NIC 102 notifies the host 128 to change the physical memory mapping of the buffer provided on the regular queue to point to the host-provided 0-copy buffer 110. Optionally, the physical memory mapping is done by the NIC 102 placing the virtual destination 120 or queue information on the buffer and notifying the host 128. The host then reads the next descriptor of the given queue (or the queue attached to the virtual destination 120) and changes the physical memory mapping. The host 128 is notified by an interrupt. Optionally, the NIC 102 reads the Guest Physical Address (GPA) of the next descriptor in the virtual destination’s regular queue. The NIC 102 then passes the GPA to the host 128 to perform the guest-physical memory mapping. The host 128 is notified by an interrupt. Optionally, the NIC 102 reads the Guest Physical Address of the next descriptor and updates the MMU’s page table itself. The virtual destination 120 is notified directly by an interrupt, without going through the host 128 first.

[0084] The GPAl’s physical address, available via the guest to physical memory mapping, is noted as HPA2. The NIC 102 remaps GPA1 to point to HPA1 and updates the 0-copy descriptor 108 that pointed to HPA1 to now point to HPA2. In an exemplary scenario, the above operations may be performed in NIC 102 and also in the hypervisor depending on the hardware support.

[0085] The present disclosure discloses a novel approach to data processing in a networking system 100 with a SmartNIC (e.g., 1823) and RDMA application, particularly in the context of Virtual Machine and cloud network implementation. The NIC 102 involves the host 128 providing a ring of descriptors that point to host-owned buffers known as "0-copy buffers." When a packet is received, it is directly written to one of these 0-copy buffers without being stored in the device memory along the way. Subsequently, the application's regular buffer (e.g., VM) is mapped to the filled 0-copy buffer, optimizing data transfer, and reducing data handling overhead in the networking system 100.

[0086] Modifications to embodiments of the present disclosure described in the foregoing are possible without departing from the scope of the present disclosure as defined by the accompanying claims. Expressions such as “including”, “comprising”, “incorporating”, “have”, “is” used to describe, and claim the present disclosure are intended to be construed in a non-exclusive manner, namely allowing for items, components or elements not explicitly described also to be present. Reference to the singular is also to be construed to relate to the plural. The word “exemplary” is used herein to mean “serving as an example, instance or illustration”. Any embodiment described as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments or to exclude the incorporation of features from other embodiments. The word “optionally” is used herein to mean “is provided in some embodiments and not provided in other embodiments”. It is appreciated that certain features of the present disclosure, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the present disclosure, which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable combination or as suitable in any other described embodiment of the disclosure.

Claims

CLAIMS1. A network interface card, NIC, (102) comprising a controller (104) and a local memory (106), wherein the controller (104) is configured to receive a data packet (112), the data packet (112) comprising a data payload (114), a header (116) and meta data (118), select a 0-copy buffer (110) from a 0-copy descriptor ring (108) having a host physical address, HP A, write the data payload (114) of the data packet (112) to the 0-copy buffer (HO), parse the data packet (112) to identify a virtual destination (120), select a Virtual buffer (124) from a descriptor ring (122) of the virtual destination (120), having a virtual address, cause a mapping of the virtual address of the selected Virtual buffer (124) to the HP A of the 0-copy buffer (110).

2. The NIC (102) according to claim 1, wherein the controller (104) is further configured for RDMA applications and wherein the virtual buffer (124) is selected from a Receive Queue, RQ, of the virtual destination (120), and the virtual buffer address is the address of the virtual destination (120).

3. The NIC (102) according to claim 1, wherein the virtual destination (120) is a destination virtual function, VF, the virtual buffer (124) is a VF buffer selected from a descriptor ring (122) of the destination VF, and the virtual buffer address is a guest physical address, GPA.

4. The NIC (102) according to any preceding claim, wherein the controller (104) is further configured to write the meta data (118) of the data packet (112) to the local memory (106).

5. The NIC (102) according to any preceding claim, wherein the controller (104) is further configured to write the header (116) of the data packet (112) to the local memory (106).

6. The NIC (102) according to any of claims 1 to 5, wherein the controller (104) is further configured to parse the data packet (112) when the data packet (112) is stored in a memory (130) of a host (128).

7. The NIC (102) according to any of claims 1 to 5, wherein the controller (104) is further configured to copy the header (116) of the data packet (112) to a memory (130) of a host (128) and then parse the data packet (112).

8. The NIC (102) according to any of claims 1 to 5, wherein the controller (104) is further configured to copy the header (116) of the data packet (112) to the local memory (106) and then parse the data packet (112).

9. The NIC (102) according to any preceding claim, wherein the controller (104) is further configured to cause an update of the virtual address to HPA by doing the update.

10. The NIC (102) according to any of claims 1 to 8, wherein the controller (104) is further configured to cause an update of the virtual address to HPA by causing a hypervisor to do the update.

11. The NIC (102) according to any preceding claim, wherein the controller (104) is further configured to cause the mapping the virtual address of the selected Virtual buffer (124) to the HPA of the 0-copy descriptor buffer (110) by doing the mapping.

12. The NIC (102) according to any of claims 1 to 10, wherein the controller (104) is further configured to cause the mapping the virtual address GPA of the selected Virtual buffer (124) to the HPA of the 0-copy descriptor buffer (110) by causing a hypervisor to do the mapping.

13. The NIC (102) according to any preceding claim, wherein the controller (104) is further configured to: copy the data payload (114) of the data packet (112) to a host memory (130), and copy the header (116) of the data packet (112) to the local memory (106).

14. A method (200) for a network interface card, NIC, (102) comprising a controller (104) and a local memory (106), the method (200) comprising receiving a data packet (112), the data packet (112) comprising a data payload (114), a header (116), and meta data (118), selecting a 0-copy buffer (110) from a 0-copy descriptor ring (108) having a host physical address, HP A, writing the data payload (114) of the data packet (112) to the 0-copy buffer (HO), parsing the data packet (112) to identify a virtual destination (120) virtual function, VF, selecting a Virtual buffer (124) from a descriptor ring (122) of the virtual destination (120), having a virtual address, causing a mapping of the virtual address of the selected Virtual buffer (124) to the HP A of the 0-copy buffer (110).

15. A computer program product comprising program instructions for performing the method (200) according to claim 14, when executed by one or more processors in a network.

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