Wafer placement table

WO2025057308A1PCT designated stage expired Publication Date: 2025-03-20NGK INSULATORS LTD
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Patent Information

Application Number
PCT/JP2023/033249
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-09-12
Publication Date
2025-03-20

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Abstract

This wafer placement table 10 includes: a ceramic plate 20 having a wafer placement surface 22 on an upper surface; a cooling plate 30 provided on a lower surface of the ceramic plate 20; a coolant flow passage 32 provided in the cooling plate 30; and a heat insulating hole 40 provided on a side of the coolant flow passage 32 in the cooling plate 30 and reaching a ceiling 47 from a lower surface 38 of the cooling plate 30, the ceiling 47 being positioned higher than 2 / 3 the height of the coolant flow passage 32 from the bottom thereof.
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Description

Wafer mounting table

[0001] The present invention relates to a wafer stage.

[0002] Conventionally, a wafer mounting table has been known that includes a ceramic plate having a wafer mounting surface on its upper surface, a cooling plate provided on the lower surface of the ceramic plate, and a refrigerant flow path provided inside the cooling plate. For example, Patent Document 1 (JP-A-2005-102626) discloses such a wafer mounting table that includes a cooling plate having a first insulating layer provided below the refrigerant flow path and second insulating layers connected to the first insulating layer and provided on both sides of the refrigerant flow path up to a position between one-third and two-thirds of the height of the refrigerant flow path. In Patent Document 1, the refrigerant flow path is insulated from the underside of the cooling plate by covering the first insulating layer and the second insulating layer, thereby suppressing the refrigerant from absorbing heat from the underside of the cooling plate and enhancing the cooling effect of the ceramic plate.

[0003] Japanese Patent Application Laid-Open No. 2021-141228

[0004] In some cases, it is required to maintain a predetermined temperature distribution on the wafer mounting surface of a wafer mounting table. For example, in a wafer mounting table equipped with an electrostatic chuck that electrostatically attracts a wafer, maintaining a uniform temperature distribution on the wafer mounting surface can be a more important performance factor than enhancing the cooling effect. However, although Patent Document 1 can enhance the cooling effect, it does not consider adjusting the temperature distribution on the wafer mounting surface.

[0005] The present invention has been made to solve the above problems, and its main object is to provide a favorable temperature distribution on the wafer mounting surface.

[0006] [1] The wafer mounting table of the present invention comprises: a ceramic plate having a wafer mounting surface on an upper surface thereof; a cooling plate provided on the lower surface of the ceramic plate; a refrigerant flow path provided in the cooling plate; and a heat insulating hole provided in the cooling plate on the side of the refrigerant flow path, the heat insulating hole extending from the lower surface of the cooling plate to a ceiling at a position higher than two-thirds of the height of the refrigerant flow path.

[0007] This wafer mounting table has thermal insulation holes on the sides of the refrigerant flow paths, which extend from the underside of the cooling plate to a ceiling higher than two-thirds of the height of the refrigerant flow paths. In a wafer mounting table including a ceramic plate with a wafer mounting surface on its upper surface, a cooling plate provided on the underside of the ceramic plate, and refrigerant flow paths provided in the cooling plate, when heat is input from the wafer mounting surface side, the refrigerant in the refrigerant flow paths dissipates heat not only through the ceiling of the refrigerant flow paths but also through the sides of the refrigerant flow paths. The heat flux in the cooling plate tends to be relatively high in the areas on the sides of the refrigerant flow paths higher than two-thirds of the height of the refrigerant flow paths, depending on the material of the cooling plate. Providing thermal insulation holes in areas with high heat flux acts as a thermal insulating layer, efficiently suppressing heat dissipation in the surrounding area. Therefore, for example, by providing the above-mentioned thermal insulation holes corresponding to areas of the wafer mounting surface where the temperature would be lower than the desired temperature without the thermal insulation holes, heat dissipation in those areas can be suppressed, allowing the temperature distribution on the wafer mounting surface to approach the desired temperature distribution.

[0008] [2] In the wafer stage of the present invention (the wafer stage described in [1] above), the length between the ceiling of the heat insulating hole and the upper surface of the cooling plate may be 1 mm or more. If this length is 1 mm or more, the wafer stage is less likely to be damaged.

[0009] [3] In the wafer mounting table of the present invention (the wafer mounting table described in [1] or [2] above), the heat insulating holes may be provided between the refrigerant flow paths. The cooling plate may be provided with one or more refrigerant flow paths, and the heat insulating holes may be provided between different portions of one flow path or between two or more different flow paths.

[0010] [4] In the wafer mounting table of the present invention (the wafer mounting table according to any one of [1] to [3] above), the ceiling of the heat insulating hole may have a step or a slope. By providing a step or slope in the ceiling and raising the ceiling in an area where heat dissipation needs to be further suppressed, the temperature distribution on the wafer mounting surface can be made closer to the desired temperature distribution.

[0011] [5] In the wafer mounting table of the present invention (the wafer mounting table described in any one of [1] to [4] above), the thermal conductivity of the cooling plate may be 100 W / (m·K) or more. The higher the thermal conductivity of the cooling plate, the greater the heat flux in the portion of the cooling channel that is higher than the bottom two-thirds of the height of the cooling channel (the portion where the heat insulation holes are provided) tends to be relative to the heat flux in other portions when heat is input from the wafer mounting surface side, and therefore the heat insulation holes are more effective in suppressing heat dissipation.

[0012] [6] In the wafer mounting table of the present invention (the wafer mounting table described in any one of [1] to [5] above), the heat insulation holes may be provided so as to correspond to portions of the wafer mounting surface that would be locally cooled in the absence of the heat insulation holes. This configuration suppresses heat dissipation from the portions of the wafer mounting surface that would be locally cooled, thereby improving the thermal uniformity of the wafer mounting surface. Note that the "portions of the wafer mounting surface that would be locally cooled in the absence of the heat insulation holes" may be confirmed by actually using the wafer mounting table before the heat insulation holes are provided, or by using a wafer mounting table with the heat insulation holes provided and the heat insulation holes filled with the same material as the cooling plate.

[0013] 2A and 2B are longitudinal cross-sectional views of the wafer mounting table 10, a plan view of the wafer mounting table 10, a cross-sectional view taken along line A-A in FIG. 1, a partially enlarged view including the heat insulation hole 40 in FIG. 1, a partially enlarged view of the cross-section B-B in FIG. 2 including the heat insulation hole 40, and a manufacturing process diagram for the wafer mounting table 10, a partially enlarged view corresponding to FIG. 4, showing another example of the heat insulation hole 40, and a partially enlarged view corresponding to FIG. 4, showing another example of the heat insulation hole 40, and a partially enlarged view corresponding to FIG. 5, showing another example of the heat insulation hole 40, and a partially enlarged view corresponding to FIG. 5, showing another example of the heat insulation hole 40, and a partially enlarged view corresponding to FIG. 4 ... diagram illustrating an example of heat flux distribution in a longitudinal cross section of a cooling plate.

[0014] Next, preferred embodiments of the present invention will be described with reference to the drawings. Fig. 1 is a vertical cross-sectional view of a wafer mounting table 10 (a cross-sectional view when the wafer mounting table 10 is cut along a plane including the central axis of the wafer mounting table 10). Fig. 2 is a plan view of the wafer mounting table 10. Fig. 3 is a cross-sectional view taken along line A-A in Fig. 1. Fig. 4 is an enlarged view of a portion of Fig. 1 including the heat insulation hole 40. Fig. 5 is an enlarged view of a portion of the B-B cross-section of Fig. 2 including the heat insulation hole 40.

[0015] The wafer mounting table 10 is used to perform CVD, etching, or the like using plasma on a wafer W. The wafer mounting table 10 includes a ceramic plate 20, a cooling plate 30, and a bonding layer 50.

[0016] Ceramic plate 20 is made of a ceramic material such as alumina or aluminum nitride. Ceramic plate 20 has a wafer mounting surface 22, an electrostatic electrode 23, and a focus ring mounting surface 24. Hereinafter, the focus ring may be abbreviated as "FR."

[0017] The wafer mounting surface 22 is a circular surface provided on the upper surface of the ceramic plate 20. A wafer W is mounted on the wafer mounting surface 22. Although not shown, an annular seal band is formed along the outer edge of the wafer mounting surface 22, and a plurality of small circular protrusions are formed over the entire area surrounded by the seal band. The seal band and the small circular protrusions have the same height, which is, for example, several μm to several tens of μm.

[0018] The electrostatic electrode 23 is a planar mesh electrode or plate electrode, and is connected to a DC power supply (not shown) via a power supply terminal 52. When a DC voltage is applied to the electrostatic electrode 23 from the DC power supply, the wafer W is attracted and fixed to the wafer mounting surface 22 (specifically, the upper surface of the seal band and the upper surfaces of the small circular protrusions) by electrostatic attraction, and when the application of the DC voltage is stopped, the wafer W is released from the attraction and fixation to the wafer mounting surface 22. The power supply terminal 52 is provided so as to extend from the lower surface 28 of the ceramic plate 20 to the lower surface of the electrostatic electrode 23, passing through an insulating tube 56 disposed in one of the terminal holes 54 that vertically penetrates the cooling plate 30 and the bonding layer 50.

[0019] The FR mounting surface 24 is provided in an annular shape around the wafer mounting surface 22. The height of the FR mounting surface 24 is one step lower than the height of the wafer mounting surface 22. An annular focus ring 60 is mounted on the FR mounting surface 24. The focus ring 60 is made of, for example, Si. A circumferential groove 62 is provided above the inner surface of the focus ring 60 to prevent it from coming into contact with the wafer W.

[0020] The cooling plate 30 is formed of a metal material or a metal-ceramic composite material. Metal materials include Al, Ti, Mo, and alloys thereof. Metal-ceramic composite materials include metal matrix composites (MMCs) and ceramic matrix composites (CMCs). Specific examples of such composite materials include a material containing Si, SiC, and Ti (also known as SiSiCTi), a material in which porous SiC is impregnated with Al and / or Si, and a composite material of Al2O3 and TiC. The cooling plate 30 includes a refrigerant flow channel 32 through which a refrigerant can circulate. As shown in FIG. 2 , the refrigerant flow channel 32 is formed in a single stroke across the entire surface of the ceramic plate 20 from one end (inlet 32 ​​in) to the other end (outlet 32 ​​out) in a planar view. In this embodiment, the refrigerant flow channel 32 is formed in a spiral shape in a planar view. The cooling plate 30 can be fabricated, for example, by diffusion bonding multiple layered components. The refrigerant is supplied from a refrigerant circulation device (not shown) to the inlet 32in of the refrigerant flow path 32, passes through the refrigerant flow path 32, and is discharged from the outlet 32out of the refrigerant flow path 32 and returned to the refrigerant circulation device. The refrigerant circulation device can adjust the refrigerant to a desired temperature. The refrigerant is preferably a liquid, and is preferably electrically insulating. Examples of electrically insulating liquids include fluorine-based inert liquids. The cooling plate 30 has heat insulating holes 40 on the sides of the refrigerant flow path 32. The heat insulating holes 40 are provided from the underside 38 of the cooling plate 30 to a ceiling 47 located at a position higher than two-thirds of the height of the refrigerant flow path 32. The heat insulating holes 40 are hollow, and may be filled with air or a gas such as He, or may be a vacuum.

[0021] The bonding layer 50 bonds the lower surface 28 of the ceramic plate 20 to the upper surface 36 of the cooling plate 30. The bonding layer 50 may be, for example, a metal layer formed from solder or a metal brazing material, or a resin layer formed from a resin adhesive.

[0022] The insulation holes 40 will be described with reference to FIGS. 3 to 5. As shown in FIG. 3, the insulation holes 40 are groove-shaped and spaced apart from the refrigerant flow paths 32. As shown in FIGS. 4 and 5, the insulation holes 40 are open to the underside 38 of the cooling plate 30 and are carved straight from the opening to a ceiling 47. The ceiling 47 of the insulation holes 40 is located higher than a plane (a virtual plane S indicated by a two-dot chain line) that is 2h / 3 above the bottom 34 of the refrigerant flow path 32, where h is the height of the refrigerant flow path 32. In this embodiment, the ceiling 47 of the insulation holes 40 is flat and located on a plane (a virtual plane T indicated by a two-dot chain line) that is at the same height as the ceiling 33 of the refrigerant flow path 32. The length a between the ceiling 47 of the insulation holes 40 and the upper surface 36 of the cooling plate 30 is, for example, 1 mm or more and 15 mm or less. The length a may be the same as or different from the length i between the ceiling 33 of the refrigerant flow path 32 and the upper surface 36 of the cooling plate 30. The length i between the ceiling 33 of the refrigerant flow path 32 and the upper surface 36 of the cooling plate 30 is, for example, 2 mm or more and 5 mm or less. The width b of the insulation hole 40 may be set appropriately so that the thickness d between the insulation hole 40 and the refrigerant flow path 32 is a predetermined value or more (for example, 2 mm or more), for example, 2 mm or more and 16 mm or less. The spacing j between the refrigerant flow paths 32 is, for example, 6 mm or more and 20 mm or less. The length c of the insulation hole 40 is, for example, 5 mm or more and 300 mm or less. The length c of the insulation hole 40 may be the length in the direction along the flow direction of the refrigerant flow path 32 (longitudinal direction), or the width b of the insulation hole 40 may be the length in the direction perpendicular to the longitudinal direction and the height direction. The heat removal performance of the insulation hole 40 can be adjusted by adjusting the volume, etc., by adjusting the length a, width b, length c, etc.

[0023] Next, an example of how the wafer mounting table 10 is used will be described. The wafer mounting table 10 is fixed inside a semiconductor process chamber (not shown). A focus ring 60 is placed on the FR mounting surface 24, and a wafer W is placed on the wafer mounting surface 22. In this state, a DC voltage is applied to the electrostatic electrode 23 to attract the wafer W to the wafer mounting surface 22. At the same time, a thermally conductive gas (e.g., He gas) is supplied to a gas passage (not shown) provided inside the wafer mounting table 10 (a passage extending from the underside 38 of the cooling plate 30 to the wafer mounting surface 22). This fills the space surrounded by the underside of the wafer W and the seal band of the wafer mounting surface 22 with gas, thereby improving thermal conduction between the wafer W and the wafer mounting surface 22. The interior of the chamber is then set to a predetermined vacuum atmosphere (or reduced-pressure atmosphere), and an RF voltage is applied to the cooling plate 30 while a process gas is supplied from a showerhead provided on the ceiling of the chamber. This generates plasma between the wafer W and the showerhead. The plasma is then utilized to perform CVD film formation or etching on the wafer W.

[0024] When a wafer W is processed with plasma in this manner, the wafer W becomes hot due to heat input from the plasma. A coolant flows through the coolant flow passage 32 of the wafer mounting table 10, and heat is removed from the wafer W via the ceramic plate 20, the bonding layer 50, and the cooling plate 30. It is desirable to remove heat so that the wafer W has a desired temperature distribution. When heat is input from the wafer mounting surface 22 of the wafer mounting table 10, the coolant in the coolant flow passage 32 removes heat from the ceiling 33 of the coolant flow passage 32 and also from the side surface 35 of the coolant flow passage 32. The heat flux in the cooling plate 30 at this time tends to be relatively large at the sides of the coolant flow passage 32 and above the bottom two-thirds of the height of the coolant flow passage 32, depending on the material of the cooling plate 30. This point will be explained using FIG. 13 . FIG. 13 is an explanatory diagram showing an example of heat flux distribution in a vertical cross section of a cooling plate (without thermal insulation holes). Specifically, Figure 13 is a contour diagram showing an example of the heat flux within a cooling plate when the cooling plate is made of Al, the wafer mounting surface is at 80°C, and a refrigerant at -10°C is flowing through it. Figure 13 shows that the heat flux within the cooling plate tends to be relatively high in areas on the sides of the refrigerant flow path that are higher than the bottom two-thirds of the height of the refrigerant flow path. Providing insulation holes 40 in areas with high heat flux functions as an insulating layer, efficiently suppressing heat dissipation in the surrounding area. Therefore, for example, by providing insulation holes 40 corresponding to areas of the wafer mounting surface 22 where the temperature would be lower than the desired temperature without the insulation holes 40, heat dissipation in those areas can be suppressed, allowing the temperature distribution of the wafer mounting surface 22 to approach the desired temperature distribution.

[0025] Next, a manufacturing example of the wafer support 10 will be described with reference to FIG. 6 . First, an unadjusted wafer support 10A is prepared, including a ceramic plate 20, an unadjusted cooling plate 30A, and a bonding layer 50 ( FIG. 6A ). In the unadjusted wafer support 10A, the ceramic plate 20 and the bonding layer 50 are the same as those of the wafer support 10 described above. The unadjusted cooling plate 30A is the same as the cooling plate 30 except that it does not include the heat insulating holes 40. Next, an adjustment process is performed on the unadjusted wafer support 10A, in which the heat insulating holes 40 are carved from the underside of the unadjusted cooling plate 30A to a ceiling 47 higher than two-thirds of the height of the refrigerant flow path 32 ( FIG. 6B ). In this manner, heat dissipation can be easily suppressed by simply carving the heat insulating holes 40 from the underside 38 of the unadjusted cooling plate 30A.

[0026] Before the adjustment step, a measurement step may be performed to measure the temperature distribution on the wafer mounting surface 22 of the wafer mounting table 10A before adjustment, and in the adjustment step, based on the temperature distribution measured in the measurement step, the heat insulation holes 40 may be engraved so as to correspond to the portions of the wafer mounting surface 22 where the temperature is lower than the desired temperature. In this way, the arrangement and shape of the heat insulation holes 40 can be adjusted according to the measured temperature distribution, making it possible to easily and accurately adjust the amount of heat removal.

[0027] In the wafer mounting table 10 described above, the cooling plate 30 is provided with the heat insulation holes 40 on the sides of the refrigerant flow paths 32, and the heat insulation holes 40 extend from the underside 38 of the cooling plate 30 to the ceiling 47 at a position higher than the bottom two-thirds of the height of the refrigerant flow paths. Therefore, even if there are parts of the wafer mounting surface 22 where the temperature would be lower than the desired temperature if there were no heat insulation holes 40, providing the heat insulation holes 40 corresponding to those parts can suppress heat removal from those parts, and can bring the temperature distribution of the wafer mounting surface 22 closer to the desired temperature distribution.

[0028] Furthermore, it is preferable that the length a between the upper surface 36 of the cooling plate 30 and the ceiling 47 of the heat insulating hole 40 is 1 mm or more. If this length is 1 mm or more, the wafer stage 10 is less likely to be damaged.

[0029] Furthermore, the thermal conductivity of the cooling plate 30 is preferably 100 W / (m·K) or higher. The higher the thermal conductivity of the cooling plate 30, the greater the heat flux in the portion of the cooling plate 30 that is higher than the bottom two-thirds of the height of the cooling channel 32 (the portion where the insulation holes 40 are provided) tends to be relative to the heat flux in other portions, and therefore the heat dissipation suppression effect of the insulation holes 40 is greater. Note that Al and Al alloys have a thermal conductivity of 150 to 200 W / (m·K) and are preferred materials for the cooling plate 30. When the cooling plate 30 is made of Al or an Al alloy, the bonding layer 50 is often a resin layer.

[0030] Furthermore, it is preferable that the heat insulation holes 40 are provided so as to correspond to portions of the wafer mounting surface 22 where the temperature would be locally low if the heat insulation holes 40 were not present. This suppresses heat dissipation from the portions of the wafer mounting surface 22 where the temperature would be locally low, thereby improving the thermal uniformity of the wafer mounting surface 22. Note that examples of portions of the wafer mounting surface 22 where the temperature would be locally low if the heat insulation holes 40 were not present include the vicinity of the inlets 32in of the refrigerant flow paths 32 and locations where the spacing between the refrigerant flow paths 32 is narrow due to the arrangement of the terminal holes 54, etc.

[0031] It goes without saying that the present invention is not limited to the above-described embodiment, and can be embodied in various forms as long as they fall within the technical scope of the present invention.

[0032] For example, in the above-described embodiment, the insulation hole 40 has a flat ceiling 47, but the ceiling 47 does not have to be flat. For example, as shown in FIG. 7 , the insulation hole 40 may have a step 47s in the width direction, or as shown in FIG. 8 , the insulation hole 40 may have a slope 47t in the width direction. Furthermore, as shown in FIG. 9 , the insulation hole 40 may have a step 47s in the length direction, or as shown in FIG. 10 , the insulation hole 40 may have a slope 47t in the length direction. Even if the insulation hole 40 has a flat ceiling 47, if there are areas where heat dissipation is insufficient or if there are areas where heat dissipation should be suppressed and the temperature should be slightly higher, the ceiling 47 in those areas (areas where heat dissipation should be further suppressed) can be positioned higher than other areas, thereby bringing the temperature distribution of the wafer mounting surface 22 closer to the desired temperature distribution.

[0033] In the above-described embodiment, one insulation hole 40 is provided in the gap between the refrigerant flow paths 32 (see gap j in FIG. 4 ). However, multiple insulation holes 40 may be provided, and the ceiling heights of the holes may be the same or different. For example, as shown in FIGS. 11 and 12 , two insulation holes 40, namely, insulation hole 40a and insulation hole 40b, may be provided in the gap between the refrigerant flow paths 32. Furthermore, the heights of the ceilings 47a of insulation hole 40a and 47b of insulation hole 40b may be the same as in FIG. 11 or different as in FIG. 12 . By providing multiple insulation holes 40 in the gap between the refrigerant flow paths 32, it is possible to avoid through-holes and the like provided in the cooling plate 30 while suppressing heat loss around the holes. Furthermore, if the ceiling heights of the multiple insulation holes 40 are different, even if multiple insulation holes 40 with the same ceiling height are provided, there may be areas where heat dissipation is insufficiently suppressed, or there may be areas where heat dissipation should be suppressed and the temperature should be made slightly higher.In this case, by raising the ceiling 47 (ceiling 47b in Figure 12) of such areas (areas where heat dissipation should be further suppressed), the temperature distribution of the wafer mounting surface 22 can be made closer to the desired temperature distribution.

[0034] In the above-described embodiment, one heat insulating hole 40 is provided along the length of the refrigerant flow path 32, but two or more holes may be provided.

[0035] In the above-described embodiment, the insulation holes 40 are provided between the flow paths of the refrigerant flow path 32, but the insulation holes may also be provided on the side of the refrigerant flow path 32, for example, closer to the outer periphery than the outermost flow path.

[0036] In the above-described embodiment, one refrigerant flow path 32 is provided, but two or more refrigerant flow paths 32 may be provided. In this case, the heat insulating holes 40 may be provided between different portions of one refrigerant flow path 32, or may be provided between two or more different refrigerant flow paths 32.

[0037] In the above-described embodiment, the heat insulation holes 40 are groove-shaped along the refrigerant flow path 32, but they may also be hole-shaped with approximately the same width and length. Also, the heat insulation holes 40 are curved along the refrigerant flow path 32, but they may also be linear.

[0038] In the above-described embodiment, the insulation holes 40 are hollow, but they may be filled with a heat insulating material. It is preferable not to fill the insulation holes 40 with a heat insulating material, because a heat insulating layer can be added simply by machining the insulation holes, which makes it easier to suppress heat loss.

[0039] In the above-described embodiment, electrostatic electrode 23 is built into ceramic plate 20 at a position facing wafer mounting surface 22. In addition, an FR adsorption electrode for electrostatically adsorbing focus ring 60 may be provided inside ceramic plate 20 at a position facing FR mounting surface 24.

[0040] In the above-described embodiment, the ceramic plate 20 has the wafer mounting surface 22 and the FR mounting surface 24, but is not limited to this. For example, the ceramic plate 20 may have the wafer mounting surface 22 but not the FR mounting surface 24.

[0041] In the above-described embodiment, the coolant flow path 32 is formed in a spiral shape in a plan view, but is not limited to this. For example, the coolant flow path 32 may be formed in a zigzag shape in a plan view.

[0042] In the above-described embodiment, the wafer mounting table 10 has the electrostatic electrode 23 built into the ceramic plate 20, but the present invention is not limited to this. For example, instead of or in addition to the electrostatic electrode 23, the ceramic plate 20 may have a built-in heater electrode (resistive heating element) or a built-in plasma generating electrode (RF electrode).

[0043] In the above-described embodiment, the wafer mounting table 10 may have a plurality of lift pin holes that penetrate vertically through the wafer mounting table 10. The lift pin holes are holes for inserting lift pins that move the wafer W up and down relative to the wafer mounting surface 22. For example, when the wafer mounting surface 22 is viewed from above, a plurality of lift pin holes are provided at equal intervals along concentric circles of the wafer mounting surface 22.

[0044] Examples of the present invention will be described below, but the present invention is not limited to these examples.

[0045] Example 1 The temperature distribution of the wafer mounting surface 22 of the wafer mounting tables 10A and 10 before and after adjustment was examined by simulating a case in which heat was input from the wafer mounting surface 22 side. Specifically, the temperature distribution of the wafer mounting surface 22 was examined when an external heater was operated to generate heat so that the steady temperature on the wafer mounting surface 22 side was approximately 80°C, and a refrigerant at -10°C was circulated through the refrigerant flow path 32. The cooling plates 30A and 30 before and after adjustment were both made of aluminum. In the adjusted wafer mounting table 10, the ceiling 47 of the insulation hole 40 was the same height as the ceiling 33 of the refrigerant flow path 32, the width b of the insulation hole 40 was 8 mm, the length c of the insulation hole 40 was 100 mm, and the thickness d between the insulation hole 40 and the refrigerant flow path 32 was 3 mm. The temperature distribution of the wafer mounting surface 22 of the wafer mounting tables 10A and 10 before and after adjustment was compared. In the adjusted wafer mounting table 10, the temperature of the portion of the wafer mounting surface 22 above the heat insulation holes 40 increased by about 1.5°C compared to the wafer mounting table 10A before adjustment, and it was found that providing the heat insulation holes 40 can suppress heat dissipation in the surrounding area. From this, it was found that by providing the heat insulation holes 40 so as to correspond to the portion of the wafer mounting surface 22 where the temperature would be lower than the desired temperature without the heat insulation holes 40, heat dissipation in that portion can be suppressed and the temperature distribution of the wafer mounting surface 22 can be made closer to the desired temperature distribution.

[0046] The present invention can be used in semiconductor manufacturing equipment.

[0047] REFERENCE SIGNS LIST 10 wafer mounting table, 10A wafer mounting table before adjustment, 20 ceramic plate, 22 wafer mounting surface, 23 electrostatic electrode, 24 focus ring mounting surface, 28 lower surface, 30 cooling plate, 30A cooling plate before adjustment, 32 coolant flow path, 32in inlet, 32out outlet, 33 ceiling, 34 bottom, 35 side, 36 upper surface, 38 lower surface, 40, 40a, 40b heat insulation hole, 47, 47a, 47b ceiling, 50 bonding layer, 52 power supply terminal, 54 terminal hole, 56 insulating tube, 60 focus ring, 62 circumferential groove, W wafer.

Claims

1. A wafer mounting table comprising: a ceramic plate having a wafer mounting surface on an upper surface thereof; a cooling plate provided on an underside of said ceramic plate; a refrigerant flow path provided in said cooling plate; and an insulating hole provided in said cooling plate to the side of said refrigerant flow path, said insulating hole extending from the underside of said cooling plate to a ceiling that is higher than 2 / 3 of the way down from the bottom of said refrigerant flow path.

2. The wafer mounting table according to claim 1, wherein the length between the ceiling of the heat insulating hole and the upper surface of the cooling plate is 1 mm or more.

3. The wafer mounting table according to claim 1 or 2, wherein the heat insulating holes are provided between the coolant flow paths.

4. The wafer mounting table according to claim 1 or 2, wherein the ceiling of the heat insulating hole has a step or a slope.

5. The wafer stage according to claim 1 or 2, wherein the cooling plate has a thermal conductivity of 100 W / (m·K) or more.

6. The wafer mounting table according to claim 1 or 2, wherein the heat insulation hole is provided so as to correspond to a portion of the wafer mounting surface where the temperature would be locally low if the heat insulation hole were not present.

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