Digital twin-based semiconductor process monitoring system
The digital twin-based semiconductor process monitoring system addresses the challenges of wafer verification and equipment aging by using AI and machine learning to predict defects and optimize production parameters, resulting in improved yield and reduced costs.
Patent Information
- Application Number
- PCT/KR2024/011820
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-12
- Filing Date
- 2024-08-08
- Publication Date
- 2025-03-20
AI Technical Summary
The semiconductor process lacks effective verification of semiconductor wafers and timely response to equipment aging, leading to increased costs and defects due to delayed detection of issues.
A digital twin-based semiconductor process monitoring system that utilizes AI and machine learning algorithms to predict defects and optimize production parameters, integrating data from sensors, images, and videos to simulate and analyze the semiconductor process.
The system significantly improves yield and reduces defects by enabling early detection of issues, optimizing production parameters, and automating quality control, thereby reducing production costs and enhancing productivity.
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Figure KR2024011820_20032025_PF_FP_ABST
Abstract
Description
Digital Twin-Based Semiconductor Process Monitoring System
[0001] The description below is about technology for monitoring semiconductor processes.
[0002] The semiconductor manufacturing process requires improvement due to issues such as insufficient verification of semiconductor wafers, preemptive response to equipment aging, and optimization of production process parameters.
[0003] Semiconductor manufacturing takes several weeks from wafer processing to final chip packaging production. Due to increasing precision, 100% inspection using human and inspection equipment is becoming impossible. Failure to detect defective equipment and wafers early in the process can result in significant costs when discovered later in the process.
[0004] Furthermore, even for the same wafer, the degree of defects varies depending on the aging of equipment in each line. Therefore, simulations must be conducted based on statistics from previous processes, such as yield, sensor data, and measurement data. Optimal parameters must be applied based on the condition of process equipment to improve yield and reduce defects.
[0005] It is possible to predict semiconductor dies or DUTs (device under test) that are expected to have equipment failures or defects during the manufacturing process.
[0006] The entire process flow can be continuously simulated on a FAB (Fabrication) based on a digital twin.
[0007] To improve semiconductor manufacturing processes, a data collection environment can be established for building ultra-large-scale AI based on simulation data.
[0008] In a computer device, at least one processor configured to execute computer-readable instructions contained in a memory, the at least one processor processing a process of simulating a semiconductor process on a digital twin-based FAB (Fabrication) through a data-driven digital twin model consisting of a CPS (Cyber-Physical System) model that derives the same simulation result in a virtual environment based on the past data history of a physical system is provided.
[0009] According to one aspect, the at least one processor can perform virtual metrology at each process step through at least one prediction model among SVM (Support Vector Machine), KNN (K-Nearest Neighbor), and RF (Random Forest) based on sensor data and inspection measurement data collected from the manufacturing facility, to predict a semiconductor die or DUT (device under test) that is expected to have a failure or defect in the equipment during the process.
[0010] According to another aspect, the at least one processor can share simulation results between digital twin models for individual equipment, and perform E2E (End-to-End) simulation by linking simulation results by one digital twin model to another digital twin model as different digital twin models are combined in parallel.
[0011] According to another aspect, the at least one processor includes an EDS (Electrical Die Sorting) yield prediction model for cost reduction of the semiconductor process, and can detect a defective wafer using at least one of sensor data, sound measurement data, image, or video in a post-processing step including chipping detection and prediction through determination of a change in a dicing signal.
[0012] According to another aspect, the at least one processor may include a Hyper Converged Infrastructure (HCI) framework that configures a digital twin system, a server, a learning model, individual equipment, and a service for interaction with workers related to the semiconductor process.
[0013] According to an embodiment of the present invention, a highly powerful automation means can be implemented by building a high-level automation and internal anomaly detection system through a digital twin-based simulation system for semiconductor processes that are highly dependent on complex process parameters and high-performance equipment, thereby enabling groundbreaking quality improvements and productivity enhancements in production sites, and economic benefits can be expected through reduced risks in the semiconductor industry, a national project.
[0014] According to an embodiment of the present invention, it is possible to improve process stability and work efficiency through a composite digital twin system and an HCI (Hyper Converged Infrastructure) framework, minimize production delay problems by observing minute changes in equipment in advance, and automatically predict defective equipment, enabling response without production interruption in an environment using multiple facilities, thereby establishing an economical and efficient production process.
[0015] According to an embodiment of the present invention, a digital twin-digital twin composite simulation system for a semiconductor process can be expanded to all areas where production automation is applied, as well as semiconductors, by enabling prediction of potential results for various condition changes beyond the existing outlier detection range.
[0016] FIG. 1 is a block diagram illustrating an example of the internal configuration of a computer device according to one embodiment of the present invention.
[0017] Figure 2 illustrates an example of establishing an initial data environment in one embodiment of the present invention.
[0018] FIG. 3 illustrates an example of using CNN for detecting abnormal patterns in time series sensing data according to one embodiment of the present invention.
[0019] FIG. 4 illustrates an example of a DT-DT composite simulator structure for a semiconductor process according to one embodiment of the present invention.
[0020] FIG. 5 illustrates an example of a FAB-operating DT system for controlling the entire semiconductor process in one embodiment of the present invention.
[0021] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.
[0022]
[0023] Embodiments of the present invention relate to a technique for monitoring a semiconductor process.
[0024] Embodiments including those specifically disclosed in this specification can build a digital twin-based simulation system for semiconductor processes, thereby improving problems such as lack of wafer verification in semiconductor manufacturing processes, proactive response to equipment aging, and optimization of production process parameters.
[0025] FIG. 1 is a block diagram illustrating an example of a computer device according to an embodiment of the present invention. For example, a semiconductor process monitoring system according to embodiments of the present invention may be implemented by the computer device (100) illustrated in FIG. 1.
[0026] As illustrated in FIG. 1, a computer device (100) may include a memory (110), a processor (120), a communication interface (130), and an input / output interface (140) as components for executing a semiconductor process monitoring method according to embodiments of the present invention.
[0027] The memory (110) is a computer-readable recording medium, and may include a random access memory (RAM), a read only memory (ROM), and a permanent mass storage device such as a disk drive. Here, the ROM and the permanent mass storage device such as the disk drive may be included in the computer device (100) as a separate permanent storage device distinct from the memory (110). In addition, the memory (110) may store an operating system and at least one program code. These software components may be loaded into the memory (110) from a computer-readable recording medium separate from the memory (110). This separate computer-readable recording medium may include a computer-readable recording medium such as a floppy drive, a disk, a tape, a DVD / CD-ROM drive, a memory card, etc. In another embodiment, the software components may be loaded into the memory (110) through a communication interface (130) rather than a computer-readable recording medium. For example, software components may be loaded into the memory (110) of a computer device (100) based on a computer program that is installed by files received over a network (160).
[0028] The processor (120) may be configured to process instructions of a computer program by performing basic arithmetic, logic, and input / output operations. Instructions may be provided to the processor (120) via the memory (110) or the communication interface (130). For example, the processor (120) may be configured to execute instructions received according to program code stored in a storage device such as the memory (110).
[0029] The communication interface (130) may provide a function for the computer device (100) to communicate with other devices via a network (160). For example, requests, commands, data, files, etc. generated by the processor (120) of the computer device (100) according to program codes stored in a recording device such as a memory (110) may be transmitted to other devices via the network (160) under the control of the communication interface (130). Conversely, signals, commands, data, files, etc. from other devices may be received by the computer device (100) via the communication interface (130) of the computer device (100) via the network (160). Signals, commands, data, etc. received via the communication interface (130) may be transmitted to the processor (120) or the memory (110), and files, etc. may be stored in a storage medium (the aforementioned permanent storage device) that the computer device (100) may further include.
[0030] The communication method is not limited, and may include not only a communication method that utilizes a communication network (e.g., a mobile communication network, a wired Internet, a wireless Internet, a broadcasting network) that the network (160) may include, but also short-range wired / wireless communication between devices. For example, the network (160) may include any one or more of a personal area network (PAN), a local area network (LAN), a campus area network (CAN), a metropolitan area network (MAN), a wide area network (WAN), a broadband network (BBN), the Internet, and the like. In addition, the network (160) may include any one or more of a network topology including, but not limited to, a bus network, a star network, a ring network, a mesh network, a star-bus network, a tree, or a hierarchical network.
[0031] The input / output interface (140) may be a means for interfacing with an input / output device (150). For example, the input device may include a device such as a microphone, a keyboard, a camera, or a mouse, and the output device may include a device such as a display or a speaker. As another example, the input / output interface (140) may be a means for interfacing with a device that integrates input and output functions, such as a touchscreen. The input / output device (150) may also be configured as a single device with the computer device (100).
[0032] Furthermore, in other embodiments, the computer device (100) may include fewer or more components than those illustrated in FIG. 1. However, it is not necessary to explicitly illustrate most conventional components. For example, the computer device (100) may be implemented to include at least some of the input / output devices (150) described above, or may further include other components such as a transceiver, a camera, various sensors, a database, and the like.
[0033] Below, a specific embodiment of a digital twin-based semiconductor process monitoring system is described.
[0034] First, in this embodiment, it is possible to predict semiconductor dies or DUTs that are expected to fail or have defects during the manufacturing process. Data collected from manufacturing facilities is composed of complex data such as sensor signals, images, or videos depending on the degree of standardization, and status tracking is possible based on past equipment error history data or normal operation period data. Based on sensor data and inspection measurement data, predictive models such as Support Vector Machine (SVM), K-Nearest Neighbor (KNN), and Random Forest (RF) are used to perform virtual metrology at each process step, thereby predicting in advance whether a chip that has passed the Reconditioning Test (RT) will pass other reliability tests, thereby reducing the cost incurred due to defective chips.
[0035] Furthermore, in this embodiment, the entire process flow can be continuously simulated on a digital twin-based FAB. Digital twin-based FAB monitoring / operation can be applied to semiconductor processes. By managing the entire semiconductor process through a data-driven digital twin model, significant yield improvements and cost reductions can be achieved through early detection of defects. Continuous verification and simulation of the entire process is possible through DT-DT parallel simulation, which combines digital twins in parallel. Based on DT simulation, analysis, diagnosis, prediction, and optimization of the semiconductor process can be performed. By applying a digital twin model to the entire semiconductor process through sensor data from each equipment and wafer image data, overall process control and defective die tracking are possible, while data-driven yield prediction is also possible. Measurement systems and algorithms suitable for post-process equipment, including an Electrical Die Sorting (EDS) yield prediction model for cost reduction in semiconductor processes, can be applied. Furthermore, a framework for machine learning-based equipment error pattern identification can be used to predict equipment defects in advance. Defective wafers can be detected using sensor data, sound measurements, images, or videos in the post-processing stage, such as chipping detection and prediction by judging changes in the dicing signal.
[0036] Furthermore, in this embodiment, a data collection environment for building ultra-large-scale AI can be established based on simulation data. Data generated in a digital twin network (DT network) environment enables preliminary evaluation of process changes in response to customer requests.
[0037] The semiconductor process monitoring system according to the present invention may include a data-based complex digital twin system for process optimization and monitoring that can be operated in a smart factory including the semiconductor industry.
[0038] A semiconductor process monitoring system can be composed of (1) a data-driven DT (Data-Driven Digital Twin) system that utilizes past data history for individual equipment, (2) a DT-DT composite simulation system that can share simulation results between individual DT simulation models, (3) a model for constructing a database using actual process equipment sensor data and estimating optimal parameters for input and predicting output results based on the sensor data, and (4) a framework for controlling DT-DT composite simulation as a single system and a system capable of yield prediction and factory monitoring.
[0039] (1) A data-based digital twin system can be implemented as a CPS (Cyber-Physical System) model that derives identical simulation results in a virtual environment based on past sensor data and system behavior of equipment of a physical system (i.e., FAB process equipment).
[0040] (2) The DT-DT composite simulation system can be implemented as a composite CPS model in the form of a virtual smart factory that can transfer the simulation results of the previous DT model to the next DT model when two or more PT (Physical Twin)-DT pairs exist.
[0041] (3) The semiconductor process monitoring system may include a database capable of storing and exchanging sensor data of equipment to be learned and simulation results of the digital twin system to predict the results of each digital twin model, and a simulation model for predicting the final simulation output results of DT pairs.
[0042] (4) The semiconductor process monitoring system can be composed of a framework of HCI (Hyper Converged Infrastructure) that comprises the entire complex digital twin system and services for servers, learning models, communication with individual facilities, and interaction with workers.
[0043] Figure 2 illustrates an example of establishing an initial data environment in one embodiment of the present invention.
[0044] Referring to FIG. 2, the processor (120) can collect data such as operation and quality generated in the process for the analysis target, and the collected data can be utilized to build a smart system for the semiconductor process.
[0045] To this end, the processor (120) can set a range within which data can be collected and apply deep learning / machine learning functions to each process subject to data collection. A database can be built based on the collected data to store data generated by the digital twin VM (Virtual Metrology).
[0046] In addition, the processor (120) can derive Vital Few through correlation analysis of defects and causal factors using tester (Package Tester) equipment data. At this time, a convolution neural network (CNN)-based autoencoder model can be utilized as an initial prediction model for anomaly detection. Figure 3 illustrates an example of utilizing a 2D-CNN for detecting anomaly patterns in time-series sensing data.
[0047] Additionally, the processor (120) can select a basic model for predicting defects in a semiconductor test process and perform a preliminary test using the basic model.
[0048] In this embodiment, outlier data can be removed during the data collection process using a machine learning algorithm (e.g., Anomaly Detection-SVDD).
[0049] To build a DT system for semiconductor processes, you need to acquire domain knowledge and design components accordingly so that you can disassemble the system step by step and reassemble it into a virtual physical system together with semiconductor equipment and process experts.
[0050] FIG. 4 illustrates an example of a DT-DT composite simulator structure for a semiconductor process according to one embodiment of the present invention.
[0051] Referring to FIG. 4, the semiconductor process monitoring system according to the present invention may include a DT-control interface for identifying an optimization method for individual process equipment based on accumulated data for a semiconductor process and exchanging simulation input / output data between each digital twin VM.
[0052] The DT model can be used to perform appropriate prediction and learning on the digital twin VM by applying models such as data-driven BLSTM (Data-Driven Bidirectional LSTM) to cope with missing data, non-linearly distributed data, and parameter loss, and can then be simulated again to predict virtual outcomes.
[0053] In other words, the DT model can be optimized by defining the type of simulation, such as discrete and continuous events, and applying a time-series-based model, such as data-driven BLSTM, to predict sensor output for input.
[0054] When designing data exchange interfaces, it's difficult to track data relationships between different virtual system models using correlation analysis. However, if digital twins can be used to estimate the input / output results of each CPS model, the final outcome can be predicted based on the results of continuous simulation. To achieve this, an interface can be provided that allows each CPS model to organically receive output results.
[0055] You can build an environment for real-time large-scale data processing and build an interface for the DT-DT model by utilizing distributed streaming platforms such as Apache Kafka, Apache Spark, and Apache Hadoop.
[0056] Furthermore, in this embodiment, a DT-DT system can be constructed to estimate equipment error occurrence patterns using actual process equipment data, and a framework can be provided to monitor multiple VMs.
[0057] As a DT-DT model, the system can be expanded to enable E2E (End-to-End) simulation by linking the results output by one DT system after completing simulation to the next DT.
[0058] In building a DT-DT system, dynamic evolutionary learning can be performed online through parameter learning, function learning, and component learning, and it can be advanced into a model that can perform analysis, design, and optimization based on linkage with real systems.
[0059] In the DT system monitoring framework, the framework of HCI can be configured to comprise the entire complex digital twin system and services for communication with servers, learning models, individual facilities, and interaction with workers.
[0060] Based on the aforementioned integrated DT system, a FAB-operational DT system can be built to control the entire semiconductor process. Figure 5 illustrates an example of a FAB-operational DT system for controlling the entire semiconductor process according to one embodiment of the present invention. If an anomaly is detected in the FAB-operational simulation results, the system can detect potential problems through backtracking of individual process equipment, alerting operators so they can proactively address any potential issues.
[0061] In this embodiment, a FAB-operation DT system can be provided to control the entire semiconductor process and find the optimal process parameters. The FAB-operation DT system can predict the remaining useful life through time, space usage / occupancy, production volume, pass rate, growth rate, work efficiency, equipment operation rate, etc., and further, it can be utilized for learning a super-large AI model that can predict yield and estimate optimal parameters when the system operation conditions are changed through virtual simulations based on various scenarios. Optimal process parameter estimation can be said to be an advanced area of the DT system that can reversely find detailed parameters for each process equipment that are suitable for various characteristics of the chip to be produced when input.
[0062] As described above, according to embodiments of the present invention, a digital twin-based simulation system for semiconductor processes, which are highly dependent on complex process parameters and high-performance equipment, can be used to build a highly advanced automation and internal anomaly detection system, thereby implementing a very powerful automation means, enabling groundbreaking quality improvements and productivity enhancements in production sites, and economic benefits expected through reduced risks in the semiconductor industry, a national project. Furthermore, according to embodiments of the present invention, process stability and work efficiency can be improved through a composite digital twin system and an HCI framework, production delays can be minimized by observing minute changes in equipment in advance, and defective equipment can be automatically predicted, enabling response without production interruption in environments using multiple facilities, thereby establishing an economical and efficient production process. Furthermore, according to embodiments of the present invention, a digital twin-digital twin composite simulation system for semiconductor processes can predict potential outcomes for various condition changes beyond the existing anomaly detection range, making it expandable not only to semiconductors but also to all areas where production automation is applied.
[0063] The devices described above may be implemented as hardware components, software components, and / or a combination of hardware components and software components. For example, the devices and components described in the embodiments may be implemented using one or more general-purpose computers or special-purpose computers, such as a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing instructions and responding to them. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to the execution of the software. For ease of understanding, the processing device is sometimes described as being used alone; however, one of ordinary skill in the art will recognize that the processing device may include multiple processing elements and / or multiple types of processing elements. For example, a processing unit may include multiple processors, or a processor and a controller. Other processing configurations, such as parallel processors, are also possible.
[0064] Software may include a computer program, code, instructions, or a combination of one or more of these, which may configure a processing device to perform a desired operation or may independently or collectively command the processing device. The software and / or data may be embodied in any type of machine, component, physical device, computer storage medium, or device for interpretation by the processing device or for providing instructions or data to the processing device. The software may also be distributed over networked computer systems and stored or executed in a distributed manner. The software and data may be stored on one or more computer-readable recording media.
[0065] The method according to the embodiment may be implemented in the form of program commands that can be executed through various computer means and recorded on a computer-readable medium. In this case, the medium may be one that continuously stores a computer-executable program or one that temporarily stores it for execution or download. In addition, the medium may be various recording means or storage means in the form of a single or multiple hardware combinations, and is not limited to a medium directly connected to a computer system, but may also be distributed over a network. Examples of the medium may include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical recording media such as CD-ROMs and DVDs, magneto-optical media such as floptical disks, and those configured to store program commands, including ROM, RAM, and flash memory. In addition, examples of other media may include recording media or storage media managed by app stores that distribute applications, sites that supply or distribute various software, servers, etc.
[0066] Although the embodiments described above have been described by way of limited examples and drawings, those skilled in the art will appreciate that various modifications and variations can be made based on the above teachings. For example, appropriate results can still be achieved even if the described techniques are performed in a different order than described, and / or components of the described systems, structures, devices, circuits, etc. are combined or combined in a different manner than described, or are replaced or substituted with other components or equivalents.
[0067] Therefore, other implementations, other embodiments, and equivalents to the claims also fall within the scope of the claims described below.
Claims
1. In computer devices, At least one processor configured to execute computer-readable instructions contained in memory Including, At least one processor, A process of simulating semiconductor processes on a digital twin-based FAB (Fabrication) using a data-driven digital twin model consisting of a CPS (Cyber-Physical System) model that derives identical simulation results in a virtual environment based on the past data history of the physical system. A computer device that processes .
2. In paragraph 1, At least one processor, It is to predict semiconductor dies or DUTs (device under test) that are expected to have equipment failures or defects during the process. Performing virtual metrology at each process step using at least one predictive model among SVM (Support Vector Machine), KNN (K-Nearest Neighbor), and RF (Random Forest) based on sensor data and inspection measurement data collected from manufacturing facilities. A computer device characterized by:
3. In paragraph 1, At least one processor, By sharing simulation results between digital twin models for individual equipment, By combining different digital twin models in parallel, the simulation results of one digital twin model are linked to another digital twin model to perform E2E (End-to-End) simulation. A computer device characterized by:
4. In paragraph 1, At least one processor, Includes an EDS (Electrical Die Sorting) yield prediction model for cost reduction in the above semiconductor process, Detecting defective wafers using at least one of sensor data, sound measurement data, images or videos in a post-processing step including chipping detection and prediction by judging changes in dicing signals. A computer device characterized by:
5. In paragraph 1, At least one processor, Including an HCI (Hyper Converged Infrastructure) framework that configures services for interaction with digital twin systems, servers, learning models, individual facilities, and workers related to the above semiconductor process. A computer device characterized by:
Citation Information
Patent Citations
Semiconductor Manufacturing Yield Prediction System and Method based on Machine Learning
KR1020180061769A
Household Spare Power Management System Equipped With ESS Using Renewable Energy Or Grid Power As A Power Source
KR102701010B1
Method and electronic device for guiding semiconductor manufacturing process
US11693386B2
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