Substrate processing method, substrate processing apparatus, and computer storage medium

Abstract

In this substrate processing method for processing a substrate, a metal oxide film pattern is formed by embedding a metal-containing embedding liquid containing Al into a space between resist patterns formed on the substrate by means of a chemically amplified resist, and then removing the chemically amplified resist.

Description

SUBSTRATE PROCESSING METHOD, SUBSTRATE PROCESSING APPARATUS, AND COMPUTER STORAGE MEDIUM

[0001] The present disclosure relates to a substrate processing method, a substrate processing apparatus, and a computer storage medium.

[0002] Patent Document 1 relates to a technique for reversing the pattern in a lithography process, in which a coating composition containing a polysiloxane is applied to a patterned resist film in the process of being formed during development of the resist film or to a patterned resist film after development, and after filling in gaps between the patterns, the resist film is etched away by dry etching or the like to reverse the pattern. The method describes a method for producing a composition to be applied to a patterned resist film, which includes a step (A) of hydrolyzing a hydrolyzable silane in a non-alcoholic hydrophilic solvent to condense it to obtain a hydrolysis condensate, and a step (B) of solvent-substituting the non-alcoholic hydrophilic solvent for the hydrolysis condensate with a hydrophobic solvent, in which the non-alcoholic hydrophilic solvent used in the step (A) is an aliphatic ketone having 3 or 4 carbon atoms, and the hydrophobic solvent is selected from aliphatic or aromatic esters having 5 to 20 carbon atoms, or dialkyl ethers.

[0003] Japanese Patent No. 7112023

[0004] The technology according to the present disclosure forms a pattern with good etching resistance in a lithography process using a chemically amplified resist.

[0005] One aspect of the present disclosure is a substrate processing method for processing a substrate, in which spaces between resist patterns formed on the substrate using chemically amplified resist are filled with a metal-containing filling liquid containing Al, and then the chemically amplified resist is removed to form a metal oxide film pattern.

[0006] According to the present disclosure, a pattern with good etching resistance can be formed in a lithography process using a chemically amplified resist.

[0007] Fig. 1 is a plan view showing an outline of the configuration of a wafer processing system as a substrate processing apparatus for performing a substrate processing method according to an embodiment; Fig. 2 is a front view showing an outline of the configuration of a wafer processing system as a substrate processing apparatus for performing a substrate processing method according to an embodiment; Fig. 3 is an explanatory diagram showing a process of the substrate processing method according to an embodiment; Fig. 4 is an explanatory diagram showing a process of void generation when a filler liquid containing a surfactant is heated; and Fig. 5 is an explanatory diagram showing a process of suppressing the generation of voids by irradiating UV light on the filler liquid containing a surfactant before heating.

[0008] In the so-called lithography process of semiconductor manufacturing, chemically amplified resist (CAR) has been used as a resist when forming a fine pattern on a semiconductor wafer (hereinafter sometimes referred to as a wafer) as a substrate. After the chemically amplified resist is patterned through exposure and development processes, the underlying silicon oxide film or carbon film is etched using the chemically amplified resist as a mask.

[0009] However, as the aspect ratio of resist patterns has increased in recent years due to the miniaturization of patterns, a problem known as pattern collapse is more likely to occur. Because chemically amplified resists are organic resists with low etching resistance, thinning the resists results in insufficient etching of the underlying layer.

[0010] On the other hand, a method is also being considered in which a chemically amplified resist is patterned, and then a silicon oxide film-based hard mask is patterned using a reversal process.

[0011] However, when using a reversal process to pattern a silicon oxide film-based hard mask, the solvent for the silicon oxide material is an organic solvent, so the pattern will dissolve in a positive resist, which may not be applicable.

[0012] The technology according to the present disclosure forms a pattern with good etching resistance in a lithography process using a chemically amplified resist.

[0013] A wafer processing system as a substrate processing apparatus that performs a substrate processing method according to this embodiment will be described below with reference to the drawings. Note that in this specification, elements having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.

[0014] <Wafer Processing System> First, the configuration of a wafer processing system in this embodiment will be described. Figures 1 and 2 are a plan view and a front view, respectively, that schematically show the overall configuration of a wafer processing system 1. In this embodiment, the wafer processing system 1 will be described as an example of a photolithography processing system that performs a resist film forming process and a development process on a wafer W.

[0015] 1, the wafer processing system 1 includes a cassette station 2 into which a cassette C containing a plurality of wafers W is loaded and unloaded, and a processing station 3 equipped with a plurality of various processing devices that perform predetermined processing on the wafers W. The wafer processing system 1 is configured by integrally connecting the cassette station 2 and an interface station 4 that transfers the wafers W between the processing station 3 and an exposure device (not shown) adjacent to the opposite side of the processing station 3. Note that, although two processing stations 3 are installed between the cassette station 2 and the interface station 4 as shown in FIG. 1, one processing station 3 or three or more processing stations 3 may be installed.

[0016] The cassette station 2 is provided with a cassette mounting table 21, a wafer transfer device 22, and a wafer transfer device 23. The cassette mounting table 21 has a plurality of cassette mounting plates 24 arranged in the X direction. The cassette station 2 uses the wafer transfer device 22 or the wafer transfer device 23 to transfer wafers between the cassette C placed on the mounting table 12 and the processing station 3. To this end, the wafer transfer device 22 and the wafer transfer device 23 are each provided with a drive mechanism for movement in each direction, such as the horizontal direction (X direction and Y direction), the up-down direction (Z direction), and around the vertical axis (θ direction), as needed, and may also be provided with a drive mechanism for movement in all directions.

[0017] At least one of wafer transfer device 22 and wafer transfer device 23 is capable of transferring wafers W between cassettes C and processing station 3. The transfer of wafers W to and from processing station 3 refers to, for example, transferring wafers between processing station 3 and a third block G3 that includes a transfer device accessible by wafer transfer device 33 in processing station 3 (described later). Third block G3 may include multiple transfer devices (not shown) arranged vertically.

[0018] An inspection device (not shown) that inspects the wafer W may be provided at a position accessible to either the wafer transfer device 22 or the wafer transfer device 23 .

[0019] The processing station 3 includes multiple blocks, e.g., three blocks G1, G2, and G4 (first, second, and fourth blocks). As shown in FIG. 2, multiple layers 31 each including the first and second blocks G1 and G2 are stacked vertically. For example, the first block G1 is provided on the front side of the processing station 3 (the negative X-direction side in FIG. 1), and the second block G2 is provided on the rear side of the processing station 3 (the positive X-direction side in FIG. 1). The fourth block G4 is provided on the interface station 5 side of the processing station 3 (the positive Y-direction side in FIG. 1) or at a connection point with another adjacent processing station 3. The fourth block G4 may include multiple transfer devices arranged vertically. The aforementioned third block G3 may also be provided within the processing station 3.

[0020] The first block G1 includes a plurality of liquid processing devices, such as a patterning film forming device and a development processing device (both not shown). The patterning film forming device may include, for example, a resist film forming device and an anti-reflection film forming device.

[0021] For example, the plurality of processing devices are arranged in a horizontal line in the first block G1. Note that the number, arrangement, and types of these processing devices in the first block G1 can be selected arbitrarily.

[0022] In these patterning film forming apparatuses and developing treatment apparatuses, for example, a predetermined processing liquid or a predetermined gas is supplied onto the wafer W. In this manner, the patterning film forming apparatus forms a resist film used as a mask when forming a pattern on an underlying film, or forms an anti-reflection film for efficiently performing a light irradiation process, such as an exposure process. On the other hand, in the developing treatment apparatus, a portion of the exposed resist film is removed to form the uneven shape that serves as the mask.

[0023] For example, the second block G2 is provided with vertically and horizontally aligned heat treatment devices (not shown) that perform heat treatments such as heating and cooling of the wafer W. The second block G2 also is provided with vertically (Z direction) and horizontally aligned hydrophobization devices that perform hydrophobization treatment to improve the fixation of the resist liquid to the wafer W, and peripheral exposure devices that expose the peripheral portion of the wafer W, both of which are not shown. The number and arrangement of these heat treatment devices, hydrophobization treatment devices, and peripheral exposure devices can also be selected as desired.

[0024] 1, a wafer transfer area 32 is formed in an area sandwiched between the first block G1 and the second block G2 in a plan view. In the wafer transfer area 32, for example, a wafer transfer device 33 is disposed.

[0025] The wafer transfer device 33 has a transfer arm that is movable in, for example, the Y direction, the front-rear direction, the θ direction, and the Z direction. The wafer transfer device 33 moves within the wafer transfer area 32 and can transfer the wafer W to predetermined devices in the surrounding first block G1, second block G2, third block G3, and fourth block G4. When there are multiple processing stations 3 as in Figure 1, the wafer transfer device 33 provided in the processing station 3 located on the interface station 4 side can transfer the wafer W to predetermined devices in the first, second, and fourth blocks G1, G2, and G4, as well as the fifth block G5 described below.

[0026] A plurality of wafer transfer devices 33 are arranged, for example, one above the other. One wafer transfer device 33 can transfer wafers W to a predetermined device located at the height of the upper layers 31 among the plurality of layers 31 stacked vertically. Another wafer transfer device 33 can transfer wafers W to a predetermined device located at the height of the plurality of layers 31 located below the layer 31. A plurality of wafer transfer regions 32 are provided to enable such transfer of wafers W. Note that the number of wafer transfer devices 33 and the number of layers 31 corresponding to one wafer transfer device 33 can be selected arbitrarily, such as by providing a wafer transfer device 33 for each layer 31.

[0027] The wafer transfer area 32, the first block G1, or the second block G2 may also include a shuttle transfer device (not shown). The shuttle transfer device linearly transfers wafers W between a space adjacent to one side of the processing station 3 and another space adjacent to the opposite side.

[0028] The interface station 4 includes a fifth block G5 equipped with a plurality of transfer devices, and a wafer transfer device 41 and a wafer transfer device 42. The interface station 4 uses the wafer transfer device 41 or the wafer transfer device 42 to transfer the wafer W between the fifth block G5, where the wafer W is transferred by the wafer transfer device 33, and an exposure device (not shown). To this end, the wafer transfer device 41 and the wafer transfer device 42 are each provided with a drive mechanism for movement in each direction, such as the X direction, the Y direction, the up / down Z direction, and around the vertical axis (θ direction), as needed, and may also be provided with a drive mechanism for movement in all directions. At least one of the wafer transfer device 41 and the wafer transfer device 42 can support the wafer W and transfer the wafer W between the transfer device in the fifth block G5 and the exposure device (not shown).

[0029] A cleaning device for cleaning the surface of the wafer W and the aforementioned peripheral exposure device may be provided in a position within the interface station 4 that is accessible by either the wafer transfer device 41 or the wafer transfer device 42.

[0030] The inspection device may be provided in the cassette station 2 as described above, but it may also be provided in the processing station 3 and the interface station 4 at a position accessible by any of the wafer transport device arms 33, 41, 42 (33, 41, 42 in FIG. 1 or FIG. 2) provided inside each of them.

[0031] The wafer processing system 1 described above is provided with at least one controller 100, as shown in FIG. 1 . The controller 100 processes computer-executable instructions that cause the wafer processing system 1 to perform the various processes described in this disclosure. The controller 100 may be configured to control each element of the wafer processing system 1 to perform the various processes described herein. In one embodiment, part or all of the controller 100 may be included in the wafer processing system 1. The controller 100 may include a processor, a storage unit, and a communication interface. The controller 100 is implemented, for example, by a computer. The processor may be configured to read from the storage unit a program that provides logic or routines that enable the various control operations to be performed, and to execute the read program to perform the various control operations. This program may be stored in the storage unit in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit and read from the storage unit by the processor for execution. The medium may be various computer-readable storage media or a communication line connected to the communication interface. The storage medium may be temporary or non-temporary. The processing unit may be a CPU (Central Processing Unit) or one or more circuits. The storage unit may include a RAM (Random Access Memory), a ROM (Read Only Memory), a HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface may communicate with the wafer processing system 1 via a communication line such as a LAN (Local Area Network).

[0032] <Operation of Wafer Processing System> The wafer processing system 1 is configured as described above. Next, an example of wafer processing performed using the wafer processing system 1 configured as described above will be described.

[0033] First, a cassette C containing a plurality of wafers W is carried into the cassette station 2 of the wafer processing system 1 and placed on the cassette mounting plate 24. Next, the wafers W in the cassette C are sequentially removed by the wafer transfer device 22 or the wafer transfer device 23 and transferred to the delivery device in the third block G3.

[0034] The wafer W transferred to the transfer device in the third block G3 is supported by the wafer transfer device 33 and transferred to the hydrophobization treatment device provided in the second block G2, where hydrophobization treatment is performed. The wafer W is then transferred by the wafer transfer device 33 to the resist film forming device, where a resist film is formed on the wafer W, and then transferred to the heat treatment device, where a pre-bake treatment is performed, before being transferred to the transfer device in the fifth block G5. When there are multiple processing stations 3 as shown in FIGS. 1 and 2 , the wafer W is temporarily placed in the transfer device in the fourth block G4 before being transferred to the transfer device in the fifth block G5, and then transferred between the multiple wafer transfer devices 33. If necessary, the wafer W may be transferred by the wafer transfer device 33 to a peripheral exposure device, where the peripheral edge of the wafer is exposed.

[0035] The wafer W transferred to the delivery device in the fifth block G5 is transferred to the exposure device by the wafer transfer device 41 and the wafer transfer device 42, and is subjected to exposure processing with a predetermined pattern. Note that the wafer W may be cleaned in a cleaning device before the exposure processing.

[0036] The exposed wafer W is transferred to a transfer device in the fifth block G5 by the wafer transfer device 41 and the wafer transfer device 42. Thereafter, the wafer W is transferred to a heat treatment device by the wafer transfer device 33 and subjected to post-exposure baking.

[0037] The wafer W that has been subjected to post-exposure baking is transferred by the wafer transfer device 33 to a developing treatment device and developed. After development is completed, the wafer W is transferred by the wafer transfer device 33 to a heat treatment device 40 and subjected to post-baking.

[0038] Thereafter, the wafer W is transferred by the wafer transfer device 33 to the delivery device in the third block G3, and then transferred by the wafer transfer device 22 or 23 in the cassette station 2 to a cassette C on a predetermined cassette mounting plate 24. In this way, a series of photolithography steps is completed.

[0039] It should be noted that the wafer processing system of the present disclosure is not limited to the configuration and operation described above. For example, in the above embodiment, the wafer processing system 1 is directly connected to an exposure apparatus (not shown) and wafers W are transferred between the interface station 4 and the exposure apparatus. However, the wafer processing system does not need to be directly connected to the exposure apparatus. In that case, for example, the wafer W is transferred from the cassette station 2 to the processing station 3, where it undergoes the necessary processing, and then transferred back to the cassette station 2 for removal from the system. Furthermore, unnecessary processing equipment listed above may not be provided in the wafer processing system, or even if it is provided, processing may not be performed in that processing equipment.

[0040] <Embodiment of Substrate Processing Method> A substrate processing method according to an embodiment can be implemented by the above-described wafer processing system 1, and the process will be described below in order. Figure 3 is a schematic diagram illustrating a side cross section of a portion of a wafer W processed by the substrate processing method according to an embodiment.

[0041] In this example, as shown in FIG. 3A, an SOC film 52 is formed on a silicon base substrate 51 of a wafer W, and an SOG film 53 is formed on the SOC film 52. A resist pattern 54 made of a chemically amplified resist material is then formed on the SOG film 53. These processes are performed, for example, using the patterning film forming apparatus located in the first block G1, an exposure apparatus (not shown), a development processing apparatus located in the first block G1, and a heat treatment apparatus located in the second block G2, for example. The resist pattern 54 is formed by exposure processing using EUV irradiation. For reference, in this example, the thickness of the SOC film 52 is 55 nm, the thickness of the SOG film 53 is 10 nm, the height of the resist pattern 54 is 25 nm, and the width of the recesses between the patterns of the resist pattern 54 is approximately 14 nm.

[0042] Next, as shown in FIG. 3B, the wafer W is irradiated with UV light, for example, with a wavelength of 172 nm, in an inert gas atmosphere, for example, a nitrogen gas atmosphere. This makes the resist pattern 54 hydrophilic. This hydrophilicity is beneficial for the subsequent filling process with a metal-containing chemical solution. Furthermore, UV irradiation smoothes the surface of the resist pattern 54, thereby slimming the pattern itself. From this perspective, for example, if the pattern is made wider than the target CD in a previous development process and then slimmed by UV irradiation, it is possible to prevent pattern collapse. Such a UV irradiation device is, for example, a UV irradiation device located in the second block G2 that irradiates the wafer with UV light within a casing.

[0043] Next, the wafer W is spin-coated with an organic metal material 61 as a filling liquid in, for example, a spin coater as a film forming device for patterning, to fill in the gaps between the patterns. In this case, a solvent that does not dissolve the chemically amplified resist is used for the organic metal material 61. In this example, an Al-containing carboxylic acid solution is used as the organic metal material 61, and water is used as the solvent.

[0044] An example of the composition of the aluminum carboxylate solution used as the embedding liquid is one with the following blending ratios: acrylic acid, lactic acid, acetic acid, etc. are used as the carboxylic acid. Al → 0.01 wt% to 4 wt% Carboxylic acid → 0.05 wt% to 20.00 wt% Water → 80 wt% to 99.9 wt%

[0045] However, when water is used as the solvent, it is preferable to add a surfactant to prevent uneven coating and improve coating properties because water has a high surface tension. Various surfactants can be used as the surfactant to be added, but fluorine-based surfactants, which have good wettability, are suitable for the technology of the present disclosure. However, other types of surfactants, such as silicon-based surfactants and hydrocarbon-based surfactants, are also applicable to the technology of the present disclosure.

[0046] In this example, the embedding height of the organic metal material 61 is, for example, 20 nm, which is lower than the height of the resist pattern 54. When the organic metal material 61 is embedded between patterns by spin coating, a thin layer of the organic metal material 61 may remain on the upper surface of the resist pattern 54. This thin layer is called overburden. To remove this, it is proposed to rotate the wafer W while supplying solvent vapor of the organic metal material 61 toward the upper surface of the resist pattern 54 after embedding the organic metal material 61 by spin coating. In this example, the solvent is water, so water vapor can be supplied toward the upper surface of the wafer W. This process can be performed by providing a supply unit for supplying solvent vapor within the spin coating apparatus.

[0047] 3(d), the wafer W is irradiated with UV light having a wavelength of, for example, 172 nm in an oxygen-containing atmosphere, such as an air atmosphere. This converts the organic metal material 61 into a metal oxide film (MOx), and the resist pattern 54 is removed by the generated ozone. The UV irradiation device described above can be used as the device for irradiating UV.

[0048] When removing the resist pattern 54, the wafer W may be irradiated with UV light in an oxygen-containing atmosphere and then heat-treated. In this case, a known heat treatment device that heats the wafer in an oxygen-containing atmosphere, such as that located in the second block G2, may be used. The heating temperature is, for example, 300° C. or higher. By heating the wafer after UV irradiation in this manner, the resist pattern 54 can be more effectively removed and the organometallic material 61 can be completely converted into a metal oxide (FIG. 3( e)).

[0049] Through the above process, a pattern that is the reverse of the resist pattern 54 can be formed on the wafer W using the organic metal material 61.

[0050] After the heating following UV irradiation, the surface of the wafer W may be washed with a solvent capable of dissolving the resist pattern 54, such as PGMEA or IPA, in order to more reliably remove the resist pattern 54 completely.

[0051] After the reversal pattern of the resist pattern 54 is formed on the wafer W using the organic metal material 61, the SOG film 53 is etched, for example, using a CF-based gas plasma (FIG. 3(f)), and then the SOC film 52 is etched, for example, using an oxygen-based gas plasma, thereby forming the reversal pattern of the resist pattern 54 on the base substrate 51 of the wafer W, as shown in FIG. 3(g).

[0052] The pattern formed by the organic metal material 61 inverts the resist pattern and functions as a mask pattern for the metal oxide, which has high etching resistance. Therefore, when forming a resist pattern using a chemically amplified resist before inversion, the film thickness can be made thinner than before, which can prevent the pattern from collapsing. For reference, aluminum has a high melting point (2015°C), which is higher than the melting point of a silicon oxide film (1710°C), and therefore has high resistance to ion sputtering. Therefore, for example, Al ２ O ３ This allows etching of silicon oxide and carbon using this as a mask.

[0053] Furthermore, when using a silicon oxide-based hard mask as considered in the conventional reversal process, an organic solvent was used as the solvent. However, in the above-described embodiment, a metal oxide mask pattern is used, and water can be used as the solvent for the coating, making it possible to prevent the positive resist pattern from dissolving. In other words, the technology of the present disclosure can also be applied to positive resist patterns. Furthermore, after applying the organometallic material, etching is not required, and metal oxide patterning (the reverse pattern of the resist pattern 54) can be achieved by simply irradiating with UV light and performing heat treatment, as described above.

[0054] In the embodiment described above, UV irradiation was performed first and then heat treatment was performed in the reversal process after the organic metal material 61 was embedded between the resist pattern 54. However, if a certain amount of time can be tolerated, it is possible to remove the resist pattern 54 by UV irradiation alone. On the other hand, it is also possible to remove the resist pattern 54 by heat treatment alone without UV irradiation, by sublimation caused by heating. However, in this case, the dissolution and volatilization of the resist pattern 54 proceeds rapidly, which may result in a corresponding increase in surface roughness.

[0055] Furthermore, in the above-described embodiment, the heat treatment is performed after UV irradiation, but the UV irradiation and the heat treatment may be performed in parallel, or after a certain amount of time has passed since the UV irradiation, the UV irradiation and the heat treatment may be performed in parallel.

[0056] The substrate processing method according to the embodiment described above is carried out using a wafer processing system 1 as a substrate processing apparatus. In this case, the program for the substrate processing method that runs on the control unit 100 may be stored in a computer-readable storage medium so that it is executed by the wafer processing system 1.

[0057] According to the findings of the inventors, when a wafer is coated with an embedding liquid containing a fluorochemical surfactant and then subjected to a heat treatment, as shown in Figure 4(a), the fluorochemical surfactant 73 gathers in the surface layer of the embedding liquid (e.g., an aluminum acrylate solution) 72 spin-coated onto the silicon substrate 71 of the wafer W. The fluorochemical surfactant 73 is shown schematically as being divided into a hydrophilic portion 73a and a hydrophobic portion 73b.

[0058] If the wafer W is then subjected to a heat treatment, for example, at 500° C., gas derived from the acrylic acid in the aluminum acrylate solution remains on the interface between the silicon substrate 71 and the filling liquid 72, forming voids V, as shown in FIG. 4( b). The acrylic acid in the aluminum acrylate solution evaporates due to heating, and as a result, the voids V are not completely removed, and aluminum oxide 75 (e.g., Al ２ O ３ ) and remains in the original state.

[0059] In this regard, by irradiating with UV light before the heat treatment as described above, the fluorochemical surfactant 73 collected in the surface layer of the filling liquid 72 as shown in FIG. 5(a) can be removed as shown in FIG. 5(b). This makes it easier for gases derived from acrylic acid to escape. Therefore, if heating is continued thereafter, the acid (e.g., acrylic acid) in the filling liquid 72 evaporates without generating voids as shown in FIG. 5(c), and void-free aluminum oxide 75 (e.g., Al) is formed as shown in FIG. 5(d). ２ O ３ ) can be formed on the silicon substrate 71. This technique is effective when a surfactant with a high boiling point is added to the embedding liquid.

[0060] As described above, if the wafer is first irradiated with UV light after the filling liquid has been applied and then heated, this is also effective in suppressing the generation of voids.

[0061] In an embodiment of the present disclosure, as an example, the resist may be a chemically amplified resist for EUV exposure (EUV-oriented CAR), and the exposure process may be an exposure process using EUV irradiation. In this case, EUV is likely to be absorbed at the upper part of the EUV-oriented CAR film and not easily reach the lower part, which can result in uneven and insufficient etching resistance of the formed pattern. Furthermore, pattern formation by EUV exposure is easier to form finer patterns than conventional exposures such as KrF, ArF, and i-line, and the width of the recesses between patterns into which the metal-containing filling liquid enters is small, e.g., 5 nm to 20 nm, resulting in the formation of a finer metal oxide film pattern using the metal-containing filling liquid. In other words, by forming a metal oxide film pattern rather than forming a pattern using the EUV-oriented CAR itself, it is thought that it is easier to obtain a finer pattern than conventional exposure processes prior to EUV exposure, while maintaining uniform and high etching resistance of the pattern.

[0062] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims. For example, the components of the above-described embodiments may be arbitrarily combined. Such an arbitrary combination naturally provides the functions and effects of each of the components involved in the combination, and also provides other functions and effects that are apparent to those skilled in the art from the description of this specification.

[0063] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that would be apparent to a person skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0064] The following configuration examples also fall within the technical scope of the present disclosure. (1) A substrate processing method for processing a substrate, comprising filling spaces between resist patterns formed with a chemically amplified resist with an Al-containing metal-containing filling liquid, and then removing the chemically amplified resist to form a metal oxide film pattern. (2) The substrate processing method according to (1), wherein the chemically amplified resist is a resist for EUV exposure, and the resist pattern is formed by exposing the chemically amplified resist on the substrate to EUV radiation. (3) The substrate processing method according to (1), wherein, after filling spaces between the resist patterns with the Al-containing metal-containing filling liquid, the chemically amplified resist is at least UV-irradiated or heated to remove the chemically amplified resist. (4) The substrate processing method according to (3), wherein, after filling spaces between the resist patterns with the Al-containing metal-containing filling liquid, the chemically amplified resist is UV-irradiated, and then the chemically amplified resist is heated to remove the chemically amplified resist. (5) The substrate processing method according to (3), wherein, after filling the gaps between the resist patterns with the Al-containing metal-containing filling liquid, the chemically amplified resist is removed after a period in which UV irradiation and heating are simultaneously performed on the chemically amplified resist. (6) The substrate processing method according to any one of (1) to (5), wherein the Al-containing metal-containing filling liquid contains Al as a main component of the metal component, a carboxylic acid as an organic component, and a liquid insoluble in a resist polymer as a solvent. (7) The substrate processing method according to (6), wherein the liquid insoluble in a resist polymer is water. (8) The substrate processing method according to (7), wherein, before filling the gaps between the resist patterns formed by the chemically amplified resist with the Al-containing metal-containing filling liquid, the resist pattern is irradiated with UV light in an inert gas atmosphere. (9) A substrate processing apparatus for processing a substrate, comprising: a coating processing unit that fills the gaps between the resist patterns formed by the chemically amplified resist with the Al-containing metal-containing filling liquid; and at least one of a UV irradiation unit and a heating processing unit that subsequently removes the chemically amplified resist.(10) A readable computer storage medium storing a program that runs on a computer of a control unit that controls a substrate processing apparatus to cause the substrate processing apparatus to execute a substrate processing method, the substrate processing method comprising filling spaces between resist patterns formed by chemically amplified resist with a metal-containing filling liquid containing Al, and then removing the chemically amplified resist to form a metal oxide film pattern.

[0065] 1 Wafer processing system 54 Resist pattern 61 Organic metal material 100 Control unit W Wafer

Claims

1. A substrate processing method for processing a substrate, comprising the steps of filling spaces between a resist pattern formed on the substrate using a chemically amplified resist with an Al-containing metal-containing filling liquid, and then removing the chemically amplified resist to form a metal oxide film pattern.

2. A substrate processing method according to claim 1, wherein the chemically amplified resist is a resist for EUV exposure, and the resist pattern is formed by subjecting the chemically amplified resist on the substrate to an exposure process using EUV irradiation.

3. The substrate processing method according to claim 1, further comprising the steps of: filling the spaces between the resist patterns with the Al-containing metal-containing filling liquid; and then removing the chemically amplified resist by at least UV irradiation or heating the chemically amplified resist.

4. The substrate processing method according to claim 3, further comprising the steps of: filling spaces between the resist patterns with the Al-containing metal-containing filling liquid; irradiating the chemically amplified resist with UV light; and then heating the chemically amplified resist to remove the chemically amplified resist.

5. The substrate processing method according to claim 3, wherein after filling the spaces between the resist patterns with the Al-containing metal-containing filling liquid, the chemically amplified resist is subjected to a period of simultaneous UV irradiation and heating, and then the chemically amplified resist is removed.

6. A substrate processing method according to any one of claims 1 to 5, wherein the Al-containing metal-containing filling liquid contains Al as a main component of the metal component, a carboxylic acid as an organic component, and a liquid insoluble in a resist polymer as a solvent.

7. The substrate processing method according to claim 6, wherein the liquid insoluble in the resist polymer is water.

8. The substrate processing method according to claim 7, further comprising irradiating the resist pattern with UV light in an inert gas atmosphere before filling spaces between the resist pattern formed by the chemically amplified resist with the Al-containing metal-containing filling liquid.

9. A substrate processing apparatus for processing a substrate, comprising: a coating processing section for filling spaces between resist patterns formed on the substrate by a chemically amplified resist with an Al-containing metal-containing filling liquid; and at least one of a UV irradiation section and a heating processing section for thereafter removing the chemically amplified resist.

10. A readable computer storage medium storing a program that runs on a computer of a control unit that controls a substrate processing apparatus to cause the substrate processing apparatus to execute a substrate processing method, the substrate processing method comprising filling spaces between a resist pattern formed on the substrate by a chemically amplified resist with an Al-containing metal-containing filling liquid, and then removing the chemically amplified resist to form a metal oxide film pattern.

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