Layered ceramic electronic component, electronic device, and method for manufacturing layered ceramic electronic component

Abstract

This layered ceramic electronic component is characterized by: including a layered body, roughly rectangular in shape, in which dielectric layers and internal electrode layers are layered in alternation, and an external electrode provided on, of six surfaces of the layered body, an end surface of the layered body from which the internal electrode layers are drawn out; the external electrode extending from the end surface to regions on the end-surface side of four adjacent surfaces that are adjacent to the end surface; and on the end surface and the four adjacent surfaces, the thickness of the external electrode being greater in the regions closer to the four corners of the end surface.　

Description

Multilayer ceramic electronic component, electronic device, and method for manufacturing multilayer ceramic electronic component

[0001] The present invention relates to a multilayer ceramic electronic component, an electronic device, and a method for manufacturing a multilayer ceramic electronic component.

[0002] For example, the external electrodes of a multilayer ceramic capacitor are formed by immersing a roughly rectangular parallelepiped laminate in which dielectric layers and internal electrode layers are alternately stacked in a bath of conductive paste and applying the conductive paste to the end faces of the laminate (see, for example, Patent Document 1).

[0003] JP 2019-91800 A

[0004] However, at the corners of each end face of the laminate, where the corners are the boundaries between the other two adjacent faces, the conductive paste tends to be thin, and there is a risk that the surface of the laminate may be exposed.

[0005] The present invention has been made in view of the above-mentioned problems, and has an object to provide a multilayer ceramic electronic component, an electronic device, and a method for manufacturing a ceramic electronic component that can ensure sufficient thickness of external electrodes.

[0006] A multilayer ceramic electronic component of the present invention comprises a laminate having a substantially rectangular parallelepiped shape in which dielectric layers and internal electrode layers are alternately stacked, and external electrodes provided on end faces of the laminate from which the internal electrode layers are drawn out, among six faces of the laminate, wherein the external electrodes extend from the end faces to regions on the end face sides of four adjacent faces adjacent to the end faces, and the thickness of the external electrodes is greater in regions on the end faces and the four adjacent faces that are closer to the four corners of the end faces.

[0007] In the above-described multilayer ceramic electronic component, when one of the four adjacent surfaces is viewed from the front, the thickness of the external electrode at the corner may be 2.5 times or more the thickness of the external electrode at the end portion of the region on the end face side of the four adjacent surfaces that is closer to the center of the laminate, and may be 1.2% or more of the dimension of one side of the end face.

[0008] In the above-described multilayer ceramic electronic component, the edges of the external electrodes may be substantially V-shaped when one of the four adjacent surfaces is viewed from the front.

[0009] In the above-described multilayer ceramic electronic component, when one of the four adjacent surfaces is viewed from the front, if a dimension of the external electrode in a direction in which the end surface faces is defined as E and a dimension of a longest side of the end surface is defined as S, an angle (θ) of the approximately V-shape may satisfy the formula S / 2E<tan(θ / 2)<S / E.

[0010] An electronic device of the present invention includes a multilayer ceramic electronic component and a circuit board on which the multilayer ceramic electronic component is mounted, the multilayer ceramic electronic component including a laminate having a substantially rectangular parallelepiped shape in which dielectric layers and internal electrode layers are alternately stacked, and external electrodes provided on end faces of the laminate from which the internal electrode layers are extended, among six faces of the laminate, the external electrodes extending from the end faces to regions on the end face sides of four adjacent faces adjacent to the end faces, and the thickness of the external electrodes increasing in regions on the end faces and the four adjacent faces closer to the four corners of the end faces.

[0011] A method for manufacturing a multilayer ceramic electronic component of the present invention includes the steps of: forming a laminate having a substantially rectangular parallelepiped shape in which dielectric layers and internal electrode layers are alternately stacked; and forming external electrodes by applying and baking a conductive paste to end faces of the laminate from which the internal electrode layers are drawn out, among the six faces of the laminate; wherein, in the step of forming the external electrodes, the orientation of the laminate is maintained so that each of the four corners of the end faces is at the lowest position in the vertical direction, and the corners are immersed in a reservoir of the conductive paste provided vertically below the laminate, and then the laminate is lifted up from the reservoir, thereby applying the conductive paste to the end faces.

[0012] The above manufacturing method may include a step of polishing the laminate so as to round the four corners before the step of forming the external electrodes.

[0013] In the above manufacturing method, the conductive paste may contain nickel or copper as a main component.

[0014] According to the present invention, it is possible to ensure that the external electrodes covering the corners of the laminate have a sufficient thickness.

[0015] FIG. 1 is a perspective view showing an example of a multilayer ceramic capacitor. FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line A-A in FIG. 1. FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor taken along line B-B in FIG. 2. FIG. 4 is a cross-sectional view of the multilayer ceramic capacitor taken along line C-C in FIG. 2. FIG. 5A is a plan view of the top surface of the multilayer ceramic capacitor as viewed from the front. FIG. 5B is a plan view of the side surface of the multilayer ceramic capacitor as viewed from the front. FIG. 6A is a plan view of one end surface of the multilayer ceramic capacitor as viewed from the front. FIG. 6B is a plan view of the other end surface of the multilayer ceramic capacitor as viewed from the front. FIG. 7A is a plan view of the top surface of a comparative multilayer ceramic capacitor as viewed from the front. FIG. 7B is a plan view of the side surface of the comparative multilayer ceramic capacitor as viewed from the front. FIG. 8A is a plan view of one end surface of the comparative multilayer ceramic capacitor as viewed from the front. FIG. 8B is a plan view of the other end surface of the multilayer ceramic capacitor as viewed from the front. FIG. 9 is a cross-sectional view of an external electrode covering a corner of a laminate. Fig. 10 is a flowchart showing an example of a manufacturing process for a multilayer ceramic capacitor. Fig. 11 is a cross-sectional view showing a green sheet forming process, an internal electrode pattern forming process, and a lamination and pressure bonding process. Fig. 12 is a plan view showing an example of a base electrode layer forming process by a dipping method. Fig. 13 is a plan view showing an example of a base electrode layer forming process by a dipping method. Fig. 14 is a plan view showing an example of a base electrode layer forming process by a dipping method. Fig. 15 is a plan view showing an example of a base electrode layer forming process by a dipping method. Fig. 16 is a plan view showing an example of a base electrode layer forming process by a dipping method. Fig. 17 is a plan view showing an example of a base electrode layer forming process by a dipping method.

[0016] [Embodiments] (Configuration of Multilayer Ceramic Capacitor) Fig. 1 is a perspective view showing an example of a multilayer ceramic capacitor 1. Fig. 2 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line A-A in Fig. 1. Fig. 3 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line B-B in Fig. 2. Fig. 4 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line CC in Fig. 2.

[0017] The multilayer ceramic capacitor 1 has a laminate 2 having a substantially rectangular parallelepiped shape and external electrodes 3 a, 3 b provided on a pair of opposing end faces 2A, 2B of the laminate 2. The multilayer ceramic capacitor 1 is an example of a multilayer ceramic electronic component. Other examples of multilayer ceramic electronic components include a multilayer ceramic varistor and a multilayer ceramic thermistor, and in this embodiment, the multilayer ceramic capacitor 1 is used as a representative example of these.

[0018] 1 to 4 show mutually orthogonal X, Y, and Z directions. The X direction is the length (L) direction of the multilayer ceramic capacitor 1 and coincides with the direction in which a pair of end faces 2A, 2B of the laminate 2 face each other. The Y direction is the width (W) direction of the multilayer ceramic capacitor 1 and coincides with the direction in which a pair of side faces 2E, 2F of the laminate 2 face each other. The Z direction is the height (T) direction of the multilayer ceramic capacitor 1 and coincides with the direction in which the upper surface 2C and the lower surface 2D of the laminate 2 face each other and the stacking direction of the laminate 2.

[0019] The laminate 2 has an upper surface 2C, a lower surface 2D, a pair of end surfaces 2A and 2B, and a pair of side surfaces 2E and 2F. The upper surface 2C and the lower surface 2D are generally flat surfaces that face each other in the stacking direction, the pair of end surfaces 2A and 2B are generally flat surfaces that face each other in the length direction, and the pair of side surfaces 2E and 2F are generally flat surfaces that face each other in the width direction. The upper surface 2C, the lower surface 2D, and the side surfaces 2E and 2F are examples of four adjacent surfaces that are adjacent to the end surfaces 2A and 2B.

[0020] Fig. 2 shows a cross section of the laminate 2 taken in the stacking direction near the center in the width direction, Fig. 3 shows a cross section of the laminate 2 taken in the stacking direction near the center in the length direction, and Fig. 4 shows a cross section of the laminate 2 taken in the stacking direction near the center in the height direction.

[0021] The laminate 2 has a laminated structure in which dielectric layers 22, mainly composed of a ceramic material that functions as a dielectric, and internal electrode layers 23 are alternately laminated, and a pair of cover layers 20, 21 are further laminated so as to sandwich the dielectric layers 22 and the internal electrode layers 23 from both sides in the lamination direction. In the laminate 2, the portion sandwiched between a pair of internal electrode layers 23 adjacent to each dielectric layer 22 contributes to the electrostatic capacitance of the multilayer ceramic capacitor 1, and is sometimes called a "capacitive layer."

[0022] The cover layers 20 and 21 sandwich the capacitive layer from both sides in the stacking direction. Both ends of the cover layers 20 and 21 in the longitudinal direction have curved surfaces.

[0023] The laminate 2 also has side margins 40, 41 that form the side surfaces 2E, 2F. The side margins 40, 41 extend along the length direction and sandwich the laminated region of the internal electrode layers 23 and the dielectric layers 22, i.e., the capacitive layer, from both sides in the width direction. The side margins 40, 41 are mainly composed of the same ceramic material as the dielectric layers 22.

[0024] The internal electrode layers 23 have a generally rectangular shape when viewed from the front in the stacking direction, and face each other in the stacking direction across the dielectric layer 22. One ends of the internal electrode layers 23 are alternately drawn out to the end faces 2A, 2B along the stacking direction and connected to the external electrodes 3 a, 3 b.

[0025] The dielectric layer 22 is, for example, a compound represented by the general formula ABO ３ The main phase is a ceramic material having a perovskite structure represented by the formula: ３－α (α indicates a small number). For example, the ceramic material includes BaTiO ３ (barium titanate), CaZrO ３ (Calcium zirconate), CaTiO ３ (Calcium titanate), SrTiO ３ (strontium titanate), MgTiO ３ (magnesium titanate), Ba that forms a perovskite structure １-ｘ－ｙ Ca ｘ Sr ｙ Ti １－ｚZr ｚ O ３ (0≦x≦1, 0≦y≦1, 0≦z≦1) and the like. １-ｘ－ｙ Ca ｘ Sr ｙ Ti １－ｚ Zr ｚ O ３ are barium strontium titanate, barium calcium titanate, barium zirconate, barium titanate zirconate, calcium titanate zirconate, barium calcium titanate zirconate, etc. The thickness of the dielectric layer 22 is, for example, 0.3 to 4.0 μm or less.

[0026] The internal electrode layers 23 are mainly composed of base metals such as Ni (nickel), Cu (copper), and Sn (tin). Noble metals such as Pt (platinum), Pd (palladium), Ag (silver), and Au (gold), or alloys containing these metals, may also be used as the internal electrode layers 23. The thickness of the internal electrode layers 23 is, for example, 0.05 to 0.6 μm or less.

[0027] The external electrodes 3a, 3b cover the end faces 2A, 2B of the laminate 2 that face each other in the longitudinal direction of the multilayer ceramic capacitor 1. The external electrodes 3a, 3b extend onto the upper surface 2C, the lower surface 2D, and the side surfaces 2E, 2F. However, the external electrodes 3a, 3b are spaced apart from each other on the surfaces of the upper surface 2C, the lower surface 2D, and the side surfaces 2E, 2F.

[0028] The external electrodes 3a, 3b each include a base electrode layer 30a, 30b and a plating layer 31a, 31b. The plating layers 31a, 31b cover the inner base electrode layers 30a, 30b. Examples of the main components of the base electrode layers 30a, 30b include metals such as Ni (nickel) and Cu (copper), while examples of the main components of the plating layers 31a, 31b include metals such as Ni (nickel) and Sn (tin). The plating layers 31a, 31b may be provided as multiple metal layers with different main components.

[0029] 1, the external electrodes 3a, 3b do not have a uniform thickness, but are formed so that they become thicker in regions closer to the four corners of the end faces 2A, 2B that are the vertices of the laminate 2. Therefore, the regions of the external electrodes 3a, 3b that cover each corner are formed so as to protrude outward in the X, Y, and Z directions. The shapes of the external electrodes 3a, 3b are described in detail below.

[0030] (Shape of External Electrodes) Fig. 5A is a plan view of the top surface 2C of the multilayer ceramic capacitor 1 as viewed from the front, and Fig. 5B is a plan view of the side surface 2F of the multilayer ceramic capacitor 1 as viewed from the front. Fig. 6A is a plan view of one end surface 2A of the multilayer ceramic capacitor 1 as viewed from the front, and Fig. 6B is a plan view of the other end surface 2B of the multilayer ceramic capacitor 1 as viewed from the front. In Figs. 5A, 5B, 6A, and 6B, parts of the laminate 2 hidden by the external electrodes 3a, 3b are indicated by dotted lines.

[0031] 5B, 6A, and 6B show a circuit board 90 on which the multilayer ceramic capacitor 1 is mounted in an electronic device 9 such as a computer. Flat electrode pads 91 are provided on the circuit board 90. The multilayer ceramic capacitor 1 is mounted on the circuit board 90 with solder 92, with the external electrodes 3 a, 3 b in contact with the electrode pads 91.

[0032] The external electrodes 3a, 3b extend from the end faces 2A, 2B to regions 2Ca, 2Cb, 2Da, 2Db, 2Ea, 2Eb, 2Fa, and 2Fb on the end faces 2A, 2B sides of the upper face 2C, the lower face 2D, and the side faces 2E, 2F. The thicknesses of the external electrodes 3a, 3b increase in the regions of the end faces 2A, 2B, the upper face 2C, the lower face 2D, and the side faces 2E, 2F that are closer to the four corners 2a1 to 2a4, 2b1 to 2b4 of the end faces 2A, 2B.

[0033] Therefore, the external electrodes 3a, 3b have the greatest thickness in the regions covering the corners 2a1 to 2a4, 2b1 to 2b4. On the other hand, the external electrodes 3a, 3b have the smallest thickness in the central portions of the end faces 2A, 2B and in the intermediate portions between the adjacent corners 2a1 to 2a4, 2b1 to 2b4. The external electrodes 3a, 3b are formed by a dipping method, which will be described later, so as to protrude outward from the laminate 2 at the corners 2a1 to 2a4, 2b1 to 2b4.

[0034] In this way, sufficient thickness of the external electrodes 3a, 3b is ensured at the corners 2a1 to 2a4, 2b1 to 2b4 of the laminate 2.

[0035] Furthermore, the edges of the external electrodes 3a, 3b form a substantially V-shape when the top surface 2C or the side surface 2F is viewed from the front. Therefore, the external electrodes 3a, 3b covering the corners 2a1 to 2a4, 2b1 to 2b4 extend long outward from the laminate 2, making it difficult for moisture to reach the internal electrode layers 23 from the outside near the corners 2a1 to 2a4, 2b1 to 2b4. The bottom surface 2D and the side surface 2E of the multilayer ceramic capacitor 1 are not shown from the front, but are similar to those in FIGS. 5A and 5B, respectively. The angle θ of the substantially V-shape may be substantially the same on the top surface 2C and the side surface 2F, or may be different.

[0036] The angle θ is calculated as the angle formed by approximate straight lines L1a, L2a, L1b, and L2b drawn along the edges toward the side surfaces 2E and 2F from two reference points Pa and Pb on each edge of the external electrodes 3a and 3b on the top surface 2C where the distance D between the edges of the external electrodes 3a and 3b in the length direction (X direction) of the multilayer ceramic capacitor 1 is maximum. Specifically, the angle θ on the external electrode 3a side is determined by the approximate straight lines L1a and L2a, and the angle θ on the external electrode 3b side is determined by the approximate straight lines L1b and L2b.

[0037] Symbol G indicates an enlarged portion of the edge of the external electrode 3a. An approximate straight line L2a can be obtained by, for example, using the least squares method for the coordinates (x, y) of multiple sampling points Pi (i = 1 to N (positive integer)) on the edge detected at predetermined intervals in the X or Y direction. The other approximate straight lines L1a, L1b, and L2b can also be obtained by a similar method. The angle θ on the bottom surface 2D and on each of the side surfaces 2E and 2F is also determined in the same manner as above.

[0038] 7A is a plan view of the top surface 2C of the comparative multilayer ceramic capacitor 1a, and FIG. 7B is a plan view of the side surface 2F of the comparative multilayer ceramic capacitor 1a. FIG. 8A is a plan view of one end surface 2A of the comparative multilayer ceramic capacitor 1a, and FIG. 8B is a plan view of the other end surface 2B of the comparative multilayer ceramic capacitor 1a. In FIGS. 7A, 7B, 8A, and 8B, components common to FIGS. 5A, 5B, 6A, and 6B are designated by the same reference numerals, and their description will be omitted. Portions of the laminate 2 hidden by the external electrodes 3aa and 3ba are indicated by dotted lines.

[0039] 7B, 8A, and 8B show a circuit board 90 on which the multilayer ceramic capacitor 1a is mounted in an electronic device 9. The multilayer ceramic capacitor 1a is mounted on the circuit board 90 with solder 92a in a state in which the external electrodes 3aa and 3ba are in contact with electrode pads 91.

[0040] Unlike the multilayer ceramic capacitor 1 of the embodiment, the thickness of the external electrodes 3aa, 3ba increases toward the center of the end faces 2A, 2B. The external electrodes 3aa, 3ba extend from the end faces 2A, 2B to the regions 2Ca, 2Cb, 2Da, 2Db, 2Ea, 2Eb, 2Fa, and 2Fb on the end faces 2A, 2B sides of the upper surface 2C, the lower surface 2D, and the side surfaces 2E, 2F. The thickness of the external electrodes 3aa, 3ba increases toward the centers of the regions 2Ca, 2Cb, 2Da, 2Db, 2Ea, 2Eb, 2Fa, and 2Fb on the upper surface 2C, the lower surface 2D, and the side surfaces 2E, 2F. Therefore, the thickness of the external electrodes 3aa, 3ba is smallest in the regions covering the corners 2a1 to 2a4 and 2b1 to 2b4.

[0041] The multilayer ceramic capacitor 1 of the embodiment and the comparative multilayer ceramic capacitor 1a are compared below. The thickness of the regions covering the corners 2a1 to 2a4 and 2b1 to 2b4 of the external electrodes 3a and 3b of the embodiment can be made thicker than that of the comparative external electrodes 3aa and 3ba. Therefore, according to the embodiment, it is possible to effectively prevent moisture from entering the inside of the laminate 2 at the corners 2a1 to 2a4 and 2b1 to 2b4.

[0042] Furthermore, because the external electrodes 3a, 3b of the embodiment protrude outward at the corners 2a1 to 2a4, 2b1 to 2b4, the posture of the multilayer ceramic capacitor 1 is stable, for example, when the multilayer ceramic capacitor 1 is packaged. As a result, the multilayer ceramic capacitor 1 of the embodiment is less likely to be packaged in an inclined posture than the comparative multilayer ceramic capacitor 1a. Furthermore, because the contact area between the external electrodes 3a, 3b and the solder 92 of the embodiment can be made larger than the contact area between the external electrodes 3aa, 3ba and the solder 92a of the comparative multilayer ceramic capacitor 1, the connection strength between the multilayer ceramic capacitor 1 and the circuit board 90 is improved compared to the comparative multilayer ceramic capacitor 1a.

[0043] Furthermore, in a front view of the side surface 2F, the external electrodes 3a and 3b of the embodiment are recessed in the center in the stacking direction, whereas the external electrodes 3aa and 3ba of the comparison example are bulged in the center in the stacking direction. Therefore, the contact angle between the external electrodes 3a and 3b of the embodiment and the solder 92 is larger than the contact angle between the external electrodes 3aa and 3ba of the comparison example and the solder 92a. This reduces excessive wetting of the solder 92 with the external electrodes 3a and 3b of the embodiment compared to the external electrodes 3aa and 3ba of the comparison example.

[0044] 9 is a cross-sectional view of the external electrode 3a covering the corner 2a2 of the laminate 2. FIG. 9 shows a cross-section of the external electrode 3a along the side surface 2F of the laminate 2 when viewed from the front. The thickness of the plating layer 31a is substantially uniform except at the end, whereas the thickness of the base electrode layer 30a increases the closer to the corner 2a2. In other words, the shape of the external electrode 3a described above is based on the shape of the base electrode layer 30a. The same applies to the other external electrode 3b.

[0045] The thickness Da of the external electrode 3a at the corner 2a2 is defined as the distance from the surface of the corner 2a2 to the surface of the external electrode 3a, for example, along a normal line NL to the tangent line TL of the corner 2a2. The thickness Da of the external electrode 3a at the corner 2a2 is at least 2.5 times the thickness Db of the external electrode 3a at the end e of the laminate 2 toward the center in the region 2Ca of the upper surface 2C where the external electrode 3a extends. It is preferable that the thickness Da is at least 1.2% of the height (T) or width (W) of the laminate 2, which corresponds to the length of one side of the end face 2A, because this thickness Da makes it difficult for the surface of the laminate 2 to be exposed. Here, the thickness Db of the external electrode 3a at the end e may be measured at a position one-tenth (E / 10) of the dimension E of the external electrode 3a in the longitudinal direction, as viewed from the edge of the external electrode 3a on the upper surface 2C. In this example, the thicknesses Da and Db of one external electrode 3a are given, but the thickness of the other external electrode 3b is also the same as above.

[0046] S / 2E<tan(θ / 2)<S / E...(1)

[0047] 5A and 5B, the angle θ of the substantially V-shaped portion formed by the edges of the external electrodes 3a satisfies the above formula (1) in relation to the dimension E of the external electrodes 3a in the longitudinal direction and the dimension S of the longest side of the end face 2A, which is preferable because the external electrodes 3a at the corners 2a2 become longer and the moisture resistance of the multilayer ceramic capacitor 1 can be improved. Here, the dimension S of the longest side of the end face 2A is the longer of the height (T) and width (W) of the laminate 2. Note that, although the angle θ on one external electrode 3a side is shown in this example, the same applies to the angle on the other external electrode 3b side.

[0048] 10 is a flowchart showing an example of a manufacturing process for the multilayer ceramic capacitor 1. This manufacturing process is an example of a method for manufacturing a multilayer ceramic electronic component.

[0049] 11 is a cross-sectional view showing the green sheet forming step St1, the internal electrode pattern forming step St2, and the lamination and pressure bonding step St3. FIG. 11 shows a cross section of the multilayer ceramic capacitor 1 along the lamination direction and the length direction.

[0050] (Green Sheet Formation Process) First, the green sheet formation process St1 is performed. In the green sheet formation process St1, green sheets 7a and 7b are formed by applying a ceramic slurry to a substrate (not shown). The ceramic slurry is obtained by wet-mixing a dielectric material obtained by adding various additive compounds (such as sintering aids) to ceramic powder, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer. The ceramic slurry is then applied to the substrate by, for example, a die coater method or a doctor blade method, to form green sheets 7a and 7b, which are then dried. The substrate is, for example, a PET (polyethylene terephthalate) film.

[0051] The additive compounds for the ceramic powder include oxides of Mg (magnesium), Mn (manganese), V (vanadium), Cr (chromium), rare earth elements (Y (yttrium), Sm (samarium), Eu (europium), Gd (gadolinium), Tb (terbium), Dy (dysprosium), Ho (holmium), Er (erbium), Tm (thulium), and Yb (ytterbium)), as well as oxides or glasses of Co (cobalt), Ni, Li (lithium), B (boron), Na (sodium), K (potassium), and Si (silicon).

[0052] (Internal Electrode Pattern Forming Process) Next, the internal electrode pattern forming process St2 is performed. In the internal electrode pattern forming process St2, the internal electrode patterns 6a and 6b are formed by applying conductive paste to the green sheets 7a and 7b, respectively. The internal electrode patterns 6a and 6b become the internal electrode layers 23 after firing. The internal electrode patterns 6a and 6b are shifted from each other by half a pitch in the X direction.

[0053] In the internal electrode pattern forming process St2, a metal conductive paste containing an organic binder for forming the internal electrodes is printed on the green sheets 7a, 7b by gravure printing or the like, to form the multiple internal electrode patterns 6a, 6b at a distance from each other. A dielectric is added to the conductive paste as a co-material. The internal electrode patterns 6a, 6b may be formed by a vacuum deposition method such as sputtering, without being limited to printing.

[0054] (Laminating and Press-bonding Step) Next, the laminating and press-bonding step St3 is performed. In the laminating and press-bonding step St3, a plurality of green sheets 7a, 7b are alternately laminated and pressed together.

[0055] The plurality of green sheets 7a, 7b are sandwiched and pressed between other green sheets 7c, 7d, which will become cover layers 20, 21 after firing, from above and below in the stacking direction. An internal electrode pattern 6b is formed on the surface of the bottommost green sheet 7d by the same method as in the internal electrode pattern forming step St2. Examples of pressing means include, but are not limited to, an isostatic press.

[0056] (Cutting Step) Next, the cutting step St4 is performed. In the cutting step St4, the pressed green sheets 7a to 7d are cut, for example, by a blade along a plurality of cutting lines LW extending vertically and horizontally at regular intervals. This separates the green sheets 7a to 7d into a plurality of pre-fired laminates 2. FIG. 11 shows the cutting lines LW extending along the width direction of the laminate 2. Ends of the internal electrode patterns 6a and 6b are exposed on end faces 2A and 2B, which are the cut surfaces of the laminate 2. The processes from the green sheet forming step St1 to the cutting step St4 are an example of a process for forming the laminate 2.

[0057] (Polishing Step) Next, the polishing step St5 is performed. In the polishing step St5, the laminate 2 is polished by a technique such as barrel polishing, thereby rounding the corners 2a1 to 2a4, 2b1 to 2b4 of the laminate 2. As a result, the corners 2a1 to 2a4, 2b1 to 2b4 have a curved shape, and the thickness of the external electrodes 3a, 3b can be made greater than if polishing were not performed. Note that the polishing step St5 is not necessarily performed.

[0058] (Firing Step) Next, the firing step St6 is performed. In the firing step St6, the laminate 2 before firing is heated in a N ２ After the binder is removed in the atmosphere, the laminate is fired for about 1 hour at a firing temperature of 1200°C or higher in a reducing atmosphere with an oxygen partial pressure of 0.003 Pa, thereby sintering the particles in the laminate 2. As a result, in the laminate 2, the green sheets 7a to 7d become the dielectric layer 22 and the cover layers 20 and 21, and the internal electrode patterns 6a and 6b become the internal electrode layer 23.

[0059] Next, the base electrode layer forming step St7 is performed. The base electrode layer forming step St7 is an example of a step of forming the external electrodes 3 a, 3 b by applying a conductive paste to the end faces 2A, 2B of the laminate 2 and baking the paste.

[0060] In the base electrode layer forming step St7, a conductive paste containing, for example, metal powder, glass frit, binder, and solvent is applied to the end faces 2A and 2B of the laminate 2, the upper face 2C, the lower face 2D, and the regions 2Ca, 2Cb, 2Da, 2Db, 2Ea, 2Eb, 2Fa, and 2Fb on the end faces 2A and 2B of the laminate 2. After the conductive paste is applied, the base electrode layers 30a and 30b are formed by drying. The binder and solvent evaporate by baking. The conductive paste is applied by a dipping method as described below.

[0061] 12 to 17 are plan views showing an example of the base electrode layer forming step St7 using a dipping method. In the base electrode layer forming step St7, first, the orientation of the laminate 2 is maintained so that the corners 2a1 to 2a4 of one end face 2A are at their lowest positions in the vertical direction G, and the corners 2a1 to 2a4 are immersed in a reservoir 8 of conductive paste 80 and then lifted out of the reservoir 8, thereby applying the conductive paste 80 to the end face 2A. Next, the orientation of the laminate 2 is maintained so that the corners 2b1 to 2b4 of the other end face 2B are at their lowest positions in the vertical direction G, and the corners 2b1 to 2b4 are immersed in a reservoir 8 of conductive paste 80 and then lifted out of the reservoir 8, thereby applying the conductive paste 80 to the end face 2B. In this way, the conductive paste is applied to both end faces 2A and 2B in the same manner, and therefore, in the following example, only one end face 2A will be described as an example.

[0062] 12, a dipping device (not shown) is used to maintain the orientation of the laminate 2 so that the corner 2a1 is at the lowest position in the vertical direction G. A storage tank 8 is provided below the laminate 2 in the vertical direction G. The orientation of the laminate 2 is maintained so that the distance between the corner 2a1 and the liquid surface of the conductive paste 80 in the storage tank 8 is shorter than the distance between the other corners 2a2 to 2a4 and the liquid surface.

[0063] 13 , while maintaining the above-mentioned posture, the laminate 2 is moved vertically downward by a dipping device and immersed in a storage tank 8. At this time, at least the inner region of a substantially triangle connecting corners 2a1, 2a2, and 2a4 of end surface 2A of laminate 2 is immersed in conductive paste 80.

[0064] 14, the laminate 2 is moved vertically upward by a dipping device while maintaining the above-mentioned posture, and is then lifted out of the storage tank 8. At this time, conductive paste 81 is applied to the corner 2a1 and its surrounding area that have been immersed in the conductive paste 80. Because the posture of the laminate 2 is maintained so that the corner 2a1 is at the lowest position in the vertical direction G, the applied conductive paste 81 collects at the corner 2a1 due to gravity, forming drips 81a. As a result, the thickness of the base electrode layer 30a increases the closer it is to the corner 2a1.

[0065] After the conductive paste 81 applied around the corner 2a1 has dried, the dipping device changes the posture of the laminate 2 so that the corner 2a2 is at the lowest position in the vertical direction G. The dipping device moves the laminate 2 vertically downward while maintaining the posture described above and immerses it in the storage tank 8. At this time, at least the region inside the approximate triangle connecting the corners 2a1, 2a2, and 2a3 on the end surface 2A of the laminate 2 is immersed in the conductive paste 80.

[0066] 15, the laminate 2 is moved vertically upward by the dipping device while maintaining the above-mentioned posture, and is then lifted out of the storage tank 8. As a result, the area on the laminate 2 where the conductive paste 81 is applied spreads from the periphery of the corner 2a1 to the periphery of the corner 2a2. The newly applied, undried conductive paste 81 gathers at the corner 2a2 due to gravity, forming drips 81b. As a result, in the area where the conductive paste 81 is newly applied, the thickness of the base electrode layer 30a increases the closer it is to the corner 2a2.

[0067] After the conductive paste 81 applied around the corner 2a2 has dried, the dipping device changes the posture of the laminate 2 so that the corner 2a3 is at the lowest position in the vertical direction G. The dipping device moves the laminate 2 vertically downward while maintaining the posture described above and immerses it in the storage tank 8. At this time, at least the region inside the approximate triangle connecting the corners 2a2, 2a3, and 2a4 on the end surface 2A of the laminate 2 is immersed in the conductive paste 80.

[0068] 16, the laminate 2 is moved vertically upward by the dipping device while maintaining the above-mentioned posture, and is then lifted out of the storage tank 8. As a result, the area on the laminate 2 where the conductive paste 81 is applied expands from the periphery of the corners 2a1 and 2a2 to the periphery of the corner 2a3. The newly applied, undried conductive paste 81 gathers at the corner 2a3 due to gravity, forming a drip 81c. As a result, in the area where the conductive paste 81 is newly applied, the thickness of the base electrode layer 30a increases the closer it is to the corner 2a3.

[0069] After the conductive paste 81 applied around the corner 2a3 has dried, the dipping device changes the posture of the laminate 2 so that the corner 2a4 is at the lowest position in the vertical direction G. The dipping device moves the laminate 2 vertically downward while maintaining the posture described above and immerses it in the storage tank 8. At this time, at least the region inside the approximate triangle connecting the corners 2a1, 2a3, and 2a4 on the end surface 2A of the laminate 2 is immersed in the conductive paste 80.

[0070] Next, as shown in FIG. 17 , the laminate 2 is moved vertically upward by a dipping device while maintaining the above-mentioned posture, and is then lifted out of the storage tank 8. As a result, the area on the laminate 2 where the conductive paste 81 is applied expands from the periphery of the corners 2a1 to 2a3 to the periphery of the corner 2a4. The newly applied, undried conductive paste 81 gathers at the corner 2a4 due to gravity, forming a drip 81d. As a result, in the area where the conductive paste 81 is newly applied, the thickness of the base electrode layer 30a increases the closer it is to the corner 2a4. Thereafter, the conductive paste 81 around the corner 2a4 also dries.

[0071] Thus, in the base electrode layer forming step St7, the laminate 2 is immersed in the reservoir 8 with the corners 2a1 to 2a4 at the vertically lowest position, whereby the base electrode layer 30a is formed on the end face 2A so that its thickness increases toward the corners 2a1 to 2a4. Similarly, the laminate 2 is immersed in the reservoir 8 with the corners 2b1 to 2b4 at the vertically lowest position, whereby the base electrode layer 30b is formed on the end face 2B so that its thickness increases toward the corners 2b1 to 2b4. Therefore, according to the manufacturing process of the embodiment, it is possible to ensure sufficient thickness of the external electrodes 3a, 3b covering the corners 2a1 to 2a4, 2b1 to 2b4. Alternatively, a mold may be prepared for the end surface 2A so that the thickness of the base electrode layer 30a increases toward the corners 2a1 to 2a4, and the conductive paste 81 may be poured into the mold, impregnating the end surface 2A of the laminate 2 with the paste, followed by drying, to form the base electrode layer 30a. A similar method may also be used for the end surface 2B.

[0072] Furthermore, since the laminate 2 is immersed in the conductive paste 80 in an inclined position with the corners 2a1 to 2a4 and 2b1 to 2b4 at their vertically lowest positions, the conductive paste 81 applied to the upper surface 2C, lower surface 2D, and side surfaces 2E and 2F of the laminate 2 has a substantially V-shaped edge. Therefore, the external electrodes 3a and 3b have a substantially V-shaped edge on the upper surface 2C, lower surface 2D, and side surfaces 2E and 2F of the laminate 2.

[0073] The conductive pastes 80, 81 used to form the base electrode layers 30a, 30b are preferably made primarily of nickel or copper, since this allows the use of common metal materials with good electrical conductivity. However, the primary components of the conductive pastes 80, 81 are not limited to these and may be other metals. The base electrode layer forming step St7 may be performed before the firing step St6. In this case, the base electrode layers 30a, 30b are fired simultaneously with the laminate 2.

[0074] (Plating Step) Next, the plating step St8 is performed. In the plating step St8, plated layers 31a and 31b are formed by, for example, electrolytic plating so as to cover the base electrode layers 30a and 30b. In this manner, the multilayer ceramic capacitor 1 is manufactured.

[0075] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as described in the claims.

Claims

1. A multilayer ceramic electronic component comprising: a laminate having a generally rectangular parallelepiped shape in which dielectric layers and internal electrode layers are alternately stacked; and external electrodes provided on end faces of the laminate from which the internal electrode layers are pulled out, of the six faces of the laminate, the external electrodes extending from the end faces to areas on the end face sides of four adjacent faces adjacent to the end faces, and the thickness of the external electrodes is greater in the areas of the end faces and the four adjacent faces that are closer to the four corners of the end faces.

2. The multilayer ceramic electronic component according to claim 1, characterized in that, when one of the four adjacent surfaces is viewed from the front, the thickness of the external electrode at the corner is 2.5 times or more the thickness of the external electrode at the end portion toward the center of the laminate, within the region on the end face side of the four adjacent surfaces, and is 1.2% or more of the dimension of one side of the end face.

3. The multilayer ceramic electronic component according to claim 1, wherein the edge of said external electrode is substantially V-shaped when one of said four adjacent faces is viewed from the front.

4. The multilayer ceramic electronic component according to claim 3, characterized in that, when one of the four adjacent faces is viewed from the front, the dimension of the external electrode in the direction in which the end face faces is E, and the dimension of the longest side of the end face is S, the angle (θ) of the approximately V-shape satisfies the formula S / 2E<tan(θ / 2)<S / E.

5. An electronic device comprising: a multilayer ceramic electronic component; and a circuit board on which the multilayer ceramic electronic component is mounted, the multilayer ceramic electronic component comprising: a laminate having a substantially rectangular parallelepiped shape in which dielectric layers and internal electrode layers are alternately stacked; and external electrodes provided on end faces of the laminate from which the internal electrode layers are pulled out, among six faces of the laminate, the external electrodes extending from the end faces to areas on the end face sides of four adjacent faces adjacent to the end faces, the thickness of the external electrodes being greater in areas of the end faces and the four adjacent faces closer to the four corners of the end faces.

6. A method for manufacturing a multilayer ceramic electronic component, comprising: a step of forming a laminate having a substantially rectangular parallelepiped shape in which dielectric layers and internal electrode layers are alternately stacked; and a step of forming external electrodes by applying and baking a conductive paste to the end faces of the laminate from which the internal electrode layers are pulled out, among the six faces of the laminate, wherein in the step of forming the external electrodes, the orientation of the laminate is maintained so that each of the four corners of the end faces is at the lowest position in the vertical direction, and the corners are immersed in a reservoir of the conductive paste provided vertically below the laminate, and then the laminate is lifted up from the reservoir to apply the conductive paste to the end faces.

7. The method for producing a multilayer ceramic electronic component according to claim 6, further comprising the step of polishing said laminate so as to round said four corners prior to the step of forming said external electrodes.

8. The method for producing a multilayer ceramic electronic component according to claim 6 or 7, wherein the conductive paste contains nickel or copper as a main component.

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