Semiconductor device manufacturing system, manufacturing method, and server

WO2025074555A1PCT designated stage expired Publication Date: 2025-04-10HITACHI HIGH TECH CORP
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Patent Information

Application Number
PCT/JP2023/036318
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-10-05
Publication Date
2025-04-10

AI Technical Summary

Technical Problem

The prior art is difficult to detect and correct three-dimensional geometric defects caused by Boeing or -notch shapes in the depth direction, and it is impossible to effectively optimize the processing conditions in the depth direction.

Method used

The characteristic quantity change information of secondary electronic data or interfering optical data acquired from CD-SEM in the server and optimize the forging parameters based on these data, especially the processing conditions in the depth direction are optimized at each forging step.

Benefits of technology

The detection and correction of shape defects that cannot be detected by top-view geometric dimension data is realized, the processing conditions in the depth direction are optimized, and the manufacturing quality and efficiency of semiconductor equipment are improved.

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Abstract

The purpose of the present invention is to provide a system for deriving an optimum processing condition in a depth direction of an etching shape by detecting a shape defect that cannot be obtained from only the geometric dimension data of a top view. Thus, a semiconductor device manufacturing system according to the present invention is characterized in that: an etching parameter optimization is performed in at least one etching step on the basis of correlation data between an etching parameter and the amount of change in a feature amount, and an acquired amount of change in the feature amount; the feature amount is a value obtained from secondary electron data or interference light data from the surface of a sample; the amount of change in the feature amount is the difference between the feature amount and a target value of the feature amount; the acquired amount of change in the feature amount is the amount of change in the feature amount acquired for each depth of an etching shape formed by the semiconductor manufacturing device; and each etching step is a step of a processing condition of the semiconductor manufacturing device corresponding to each depth of the etching shape formed by the semiconductor manufacturing device.
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Description

Semiconductor device manufacturing system, manufacturing method, and server

[0001] The present invention relates to a semiconductor device manufacturing system, a manufacturing method, and a server.

[0002] Plasma etching systems are currently part of the semiconductor manufacturing toolset for producing semiconductor devices approaching atomic-level miniaturization. One of the requirements for device manufacturing equipment is improved uniformity. It has been proven that simply measuring the lateral dimensions of semiconductor devices from the top surface of the wafer and then performing uniformity based on that measurement data is insufficient for achieving near-atomic-level semiconductor device manufacturing. For example, while CD-SEM is one of the measurement tools mentioned above, the top-view geometric dimension data obtained from CD-SEM only captures the surface dimensions of the pattern, making it impossible to measure bowing or notch shapes slightly deeper than the surface. As a result, even with the same critical dimension (CD) value, three-dimensional geometric defects in the pattern cannot be detected. Failure to detect these defects clearly leads to defects in the ion implantation and CVD processes after etching. Furthermore, these defect shapes are related not only to the sample temperature during etching but also to the plasma characteristics, necessitating complex etching parameter control. As disclosed in Patent Document 1, the conventional technology is a technology that achieves uniform CD values ​​within the wafer surface and improves the wafer surface yield by feeding back CD value variations within the wafer surface based on CD values, which are top-view geometric dimension data, to the temperature value of an electrostatic chuck.

[0003] Patent No. 5925943

[0004] However, because the conventional technology is a technique for uniforming the CD value, it cannot address defects such as bowing or notching in the depth direction even though the CD value is the same. Furthermore, because the technology relies on feedback to the electrostatic chuck temperature, it cannot address defects in the pattern shape caused by plasma characteristics. Furthermore, bowing and notch shapes are significantly affected by the processing conditions corresponding to the depth direction of the etching shape, so optimization of the processing conditions for each depth is required. However, since the conventional technology cannot estimate the cross-sectional shape, it cannot address optimization of the processing conditions for each depth. Therefore, the present invention aims to provide a system that detects shape defects that cannot be obtained from top-view geometric dimension data alone and derives optimal processing conditions for the depth direction of the etching shape.

[0005] In order to solve the above-mentioned problems, one representative semiconductor device manufacturing system of the present invention is a semiconductor device manufacturing system that controls etching parameters to obtain a desired processing result of a semiconductor manufacturing apparatus, and is characterized in that the etching parameters are optimized in at least one etching step based on correlation data between the etching parameters and changes in a feature quantity and the acquired changes in the feature quantity, the feature quantity is a value obtained from secondary electron data or interference light data from the surface of a sample, the changes in the feature quantity are the differences between the feature quantity and target values ​​of the feature quantity, the acquired changes in the feature quantity are changes in the feature quantity acquired for each depth of an etching shape formed by the semiconductor manufacturing apparatus, and each of the etching steps is a step of processing conditions of the semiconductor manufacturing apparatus corresponding to each depth of an etching shape formed by the semiconductor manufacturing apparatus.

[0006] According to the present invention, it is possible to detect shape defects that cannot be obtained from top-view geometric dimension data alone and derive optimal processing conditions for the etching shape depth direction. Furthermore, users can non-destructively optimize etching processing recipes (processing conditions) to prevent device defects without observing the wafer cross section when or before a device defect occurs. Furthermore, by subdividing etching steps in the etching depth direction and repeating the optimization cycle, users can reduce the number of attempts to optimize etching parameters until ideal device electrical characteristics are obtained. Other issues, configurations, and advantages will become clearer from the description of the following embodiments.

[0007] FIG. 1 is a schematic diagram of a semiconductor device manufacturing system according to a first embodiment. FIG. 2 is a correlation diagram between a pattern shape and a secondary electron profile. FIG. 3 is a correlation diagram between a pattern shape and a secondary electron profile for predetermined etching parameters. FIG. 4A is a flowchart showing an example of an etching parameter optimization cycle. FIG. 4B is a flowchart showing another example of an etching parameter optimization cycle. FIG. 5 is a correlation diagram between an etching step and an optimization cycle. FIG. 6 is a correlation diagram between the number of trials and a device failure rate. FIG. 7 is a conceptual diagram of a prediction model for optimal etching parameters in a second embodiment.

[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Note that the present invention is not limited to this embodiment. In addition, in the description of the drawings, the same parts are designated by the same reference numerals.

[0009] In one embodiment of the present invention, a server stores correlation data between the amount of change in feature quantity obtained from a secondary electron profile obtained from a top view of a wafer (also referred to as a sample) by a CD-SEM and the etching parameters in an etching step corresponding to the depth direction of the etching shape, and controls the etching parameters in a semiconductor manufacturing device based on the correlation data. The following describes the embodiment.

[0010] [First Embodiment] A first embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a schematic diagram of a semiconductor device manufacturing system according to the first embodiment. The semiconductor device manufacturing system 10 comprises a group of devices including a semiconductor manufacturing apparatus (etching apparatus) 105, a CD-SEM PC 101, a semiconductor manufacturing apparatus PC 102, and a semiconductor inspection apparatus 104 (e.g., a CD-SEM), and a server 103. The purpose of this diagram is to explain the performance improvement of the semiconductor device manufacturing system, which is important in semiconductor manufacturing.

[0011] The etching process recipe is input into the semiconductor manufacturing equipment PC 102 or transferred from the server 103 to the PC 102 and executed. After execution, the etching equipment 105 transmits the instruction values ​​according to the contents of the process recipe to each device in the etching equipment, and the etching process is performed. Figure 1 shows only the main devices and components, including a wafer temperature control power supply, a temperature control electrode (heater / Peltier element), an RF power supply for high-frequency application, a microwave power supply for plasma generation, plasma generation gas, a magnetic field generating coil for adjusting plasma density, an electrostatic adsorption electrode (electrostatic chuck), and a lower electrode. A sample wafer is placed on the sample stage and etched by plasma processing. The executed process recipe can be saved in the server 103 via the semiconductor manufacturing equipment PC 102.

[0012] In this embodiment, etching parameter control will be explained by dividing it into two systems related to plasma characteristics such as sample temperature and plasma density, which have a large effect on the defect shape of devices. That is, a sample temperature control system and a plasma characteristic control system. The difference between these systems is that the etching parameters are those that can directly control the equipment, while the plasma characteristics and sample temperature are the results (collectively referred to as the etching environment) after adjusting the etching parameters.

[0013] The temperature etching parameters related to the sample temperature control system are instruction values ​​for a system (temperature control system) that controls the temperature of temperature control elements inside the sample stage, such as heater elements or Peltier elements. For example, they are instruction values ​​for controlling the current value of the power supply connected to the heater element, and include the current value and the on / off frequency of a switch for bypassing and releasing the current.

[0014] Furthermore, etching parameters of plasma characteristics related to the plasma characteristic control system can be broadly divided into the following three categories: instruction values ​​for a system for controlling the power for plasma generation (such as a high-frequency power supply that supplies high-frequency power for plasma generation), instruction values ​​for a system for controlling the distribution of plasma after plasma generation, and instruction values ​​for a bias application system (such as a high-frequency power supply that supplies high-frequency power to the sample stage) that draws plasma-generated ions and electrons from the plasma into the sample stage after plasma generation. Instruction values ​​for the system for controlling the power for plasma generation include, for example, the voltage value, frequency value, and application time of microwave power. Instruction values ​​for the system for controlling the distribution of plasma after plasma generation include, for example, the current value of the coil power supply and the angle of the phase control plate on the microwave path. Instruction values ​​for the bias application system that draws plasma-generated ions and electrons into the sample stage include, for example, the voltage value, frequency value, application time, capacitance value of a variable capacitor for matching, variable reactance value, etc. of an RF power supply connected to the sample stage.

[0015] The etched sample is transported to a semiconductor inspection device 104 (e.g., a CD-SEM). In FIG. 1, a CD-SEM recipe is input into a CD-SEM PC 101, and a predetermined measurement is performed. Here, an electron beam is used in the measurement, and feature values ​​are calculated based on the amount of secondary electrons (secondary electron data) after irradiation with a primary electron beam. Here, a feature value obtained from the intensity profile of the amount of secondary electrons (secondary electron profile) is used as a representative feature value. Other feature values ​​include those using illuminance data and those obtained by differentiating the intensity profile (feature values ​​obtained from the secondary electron profile derived from the etching shape of the sample are sometimes called profile feature values). The measurement results can be saved in a server 103 via the PC 101.

[0016] Using the stored measurement data, the sample yield is visualized based on the distribution of feature quantities within the sample surface, and if the required yield value is not met, the processing recipe for performing the etching process again is modified. Even if the CD value is the same, if there is a difference in feature quantities, it is considered that there is a problem with the pattern shape. This will be explained in more detail below.

[0017] (Secondary Electron Profile) Figure 2 is a correlation diagram between pattern shape and secondary electron profile. In Figure 2, a schematic diagram of the device pattern shape is shown on the left, and a schematic diagram of the secondary electron amount intensity profile (secondary electron profile) is shown on the right. The TopCD values ​​of all pattern shapes in Figure 2 are the same. Because differences in the amount of secondary electrons occur depending on the acceleration voltage, there is an optimal acceleration voltage that makes it easy to extract defective shapes. Here, we will use a bowing shape as an example of a defective shape to explain how the secondary electron amount profile changes when the acceleration voltage is high and when it is low, and the concept of which is optimal. Note that the device pattern shape may also be called the etching shape when it is a shape formed by etching.

[0018] 2(a) illustrates the case where the acceleration voltage applied to the primary electrons is high (acceleration voltage: Vh1). (a-1) shows the pattern shape when there is a bowing shape (defective shape). Because the penetration depth of the primary electrons at the acceleration voltage is deep, a large amount of secondary electrons seeps out from the sidewalls of the pattern, and as a result, the intensity of the secondary electrons is also large. Therefore, the difference (change amount) j-k between the feature value of the pattern shape (secondary electron intensity at the center of the top surface of the pattern) when there is a bowing shape, which reduces the width of the pattern shape, and the feature value when the width of the pattern shape is the normal target shape shown in (a-2) is large, making it easy to detect the bowing shape.

[0019] 2(b) illustrates the case where the acceleration voltage applied to the primary electrons is low (acceleration voltage: Vl1). Because the difference in secondary electron intensity (the amount of change in the feature quantity), h-i, between the presence of a bowing shape shown in (b-1) and the presence of the target shape shown in (b-2) is small, it is difficult to detect the bowing shape. As described above, adjusting the acceleration voltage applied to the primary electrons during electron beam irradiation affects the ease of detecting pattern shape defects, so it is important to optimally adjust the acceleration voltage.

[0020] As explained above, since the profile feature values ​​also contain information about the etching shape in the etching depth direction, calculating the difference in feature values ​​within the sample surface makes it possible to determine defects such as bowing shapes in the etching depth direction, which cannot be obtained from planar dimensional data obtained from a top view alone. This can also be done by tilting the sample using the tilt function of the CD-SEM to calculate changes in feature values, thereby calculating more detailed changes in feature values. Alternatively, the electron beam irradiated onto the sample can be tilted to calculate changes in feature values. Incidentally, the electron beam can be irradiated by tilting the sample stage on which the sample is placed, or by tilting the electron beam itself.

[0021] (Features and Etching Parameters) Next, we will explain the correlation between features and etching parameters. Figure 3 shows the correlation between pattern shape and secondary electron profile for a given etching parameter. As an example, the pattern shape and features at the outer periphery of the sample (sample edge or wafer edge), the pattern shape and features at the center of the sample (sample center or wafer center), and the temperature and plasma density environments at each location are shown. Here, as an example, the device at the sample center is the target pattern shape, the temperature at the sample center is T2, and the plasma density is P2. The device at the sample edge is where the bowing shape is defective, and the temperature at the sample edge is T1 and the plasma density is P1. Figure 3 shows a graph schematically illustrating the pattern shapes at the sample edge and sample center, with the vertical axis z and the horizontal axis B. L1 to L4 are the film type switching lines. The shaded areas indicate the shape differences between the sample edge and sample center. The area of ​​the shape difference (area difference) is ∫ΔBdz. Here, there are two methods for optimizing the etching parameters: one is to obtain ∫ΔBdz and the other is to optimize without obtaining it. These will be explained below.

[0022] (Method 1) Method 1 is a method of controlling etching parameters without specifying ∫ΔBdz. First, ∫ΔBdz can be expressed as Equation 1 using function Q. ∫ΔBdz = Q((f-a)-(g-a)) ...Equation 1 Next, if the sample temperature difference is ΔT = T1-T2 and the plasma density difference is ΔP = P1-P2, ∫ΔBdz can also be expressed as Equation 2 using function R. ∫ΔBdz = R(ΔT, ΔP) ...Equation 2 From Equations 1 and 2, Q(f-g) = R(ΔT, ΔP) Therefore, f-g can be expressed as Equation 3 using function Z. f-g = Z(ΔT, ΔP) ...Equation 3 Ideally, f-g = 0, so from Equation 3, the values ​​of T and P at which Z(ΔT, ΔP) = 0 can be found.

[0023] (Method 2) Method 2 is a method for controlling etching parameters by specifying ∫ΔBdz. First, ∫ΔBdz is determined by measuring CD in real time at L1 to L4 using an OCD (Optical Critical Dimension). In this case, the measurement points in the depth direction should be stacked films of different film types. In the case of the same film, the sample can be split and measured using an SEM or TEM. Of course, SEM and TEM can also be used for stacked films. ∫ΔBdz can be expressed as in Equation 4 using a predetermined function R: ∫ΔBdz = R(ΔT, ΔP)...Equation 4. Ideally, ∫ΔBdz = 0, so the values ​​of T and P at which R(ΔT, ΔP) = 0 can be determined from Equation 4. The derivation of the function described in this disclosure is not particularly limited, but it can be determined inductively from experiments.

[0024] In the first embodiment, Method 1 is adopted, so there is no need to determine the geometrical dimension difference. On the other hand, Method 2 can be adopted in the second embodiment, which will be described later. A flowchart will be described below in which an optimization cycle is introduced as a method for optimizing etching parameters using Method 1. In addition to the etching parameters described below, it is possible to appropriately select or combine the sample temperature in the sample temperature adjustment system, the plasma characteristics in the plasma characteristics control system, and the like.

[0025] <Optimization Cycle (1)> Figure 4A is a flowchart showing an example of an etching parameter optimization cycle. First, after etching the sample, N measurement points are selected. N is a number greater than 1 relative to the number of parameters to be determined. In this embodiment, for example, two points are selected: the sample center and the sample edge. For simplicity's sake, in this embodiment, the plasma density is not changed, and the only parameter to be determined is temperature, so the above two measurement points are sufficient. Next, the sample temperature T and plasma density P are measured at the selected positions, and the feature quantities are also measured. Next, the sample temperature difference ΔT and plasma density difference ΔP between the sample center and the sample edge are calculated, and the amount of change (e.g., f-g in Figure 3) is calculated, which is the difference between the feature quantities.

[0026] Next, by referencing Equation 3, which is the correlation data between the etching parameters and the change in the feature quantity, the target f-g and the reference point of the sample center T2, P2 are set to calculate the value of function Z. As explained above, if P1 of the sample edge is the same as P2, T1 of the sample edge can be calculated from Equation 3. If the target feature difference f-g is 0, the feature quantity itself can be set as the target, and T1 can also be calculated from Equation 3 in this case. This becomes the temperature at the sample edge that creates the target shape. In this case, the temperature near the edge of the sample stage is adjusted to satisfy T1 as the etching parameter Ep. Taking into account the heat input balance from the plasma, the temperature near the edge of the sample stage is adjusted and etching is performed so that the temperature of the sample edge becomes T1. For example, the temperature near the edge of the sample stage can be adjusted by controlling the current value of a heater element or Peltier element located near the sample edge inside the sample stage, or by controlling the temperature of a coolant located near the sample edge. Next, the electrical characteristics of the device on the sample are checked. If the criteria are met, the process ends. If not, the process is repeated, starting with setting the target feature difference, to achieve optimization of the etching parameters (etching parameter optimization cycle (1)).

[0027] <Optimization Cycle (2)> The explanation in FIG. 4A assumes that the sample temperature and plasma density are measured, the correlation with the feature values ​​is calculated, and etching parameters that can reproduce the optimal sample temperature and plasma density are calculated. Alternatively, there is a method of directly calculating the correlation between the difference in feature values ​​and the etching parameters without measuring the sample temperature or plasma density, thereby directly determining the etching parameters. FIG. 4B is a flowchart showing another example of the etching parameter optimization cycle. First, after etching the sample, N measurement points are selected. N is a number greater than 1 relative to the number of parameters to be determined. For example, in this embodiment, two points are selected: the sample center and the sample edge. Next, the etching parameter Ep at the selected positions is stored in a database (DB1) in the server. The feature values ​​at the selected positions are also measured and stored in DB1. Next, the change (e.g., f-g in FIG. 3) is calculated, which is the difference in the feature values ​​between the selected positions, the sample center and the sample edge. DB1 stores data on the distribution of the etching parameter Ep and the feature values ​​on the sample surface. Based on a specified feature value, the etching parameter Ep with a high correlation is calculated from DB1, enabling control to ensure a uniform in-plane distribution. Here, the difference in the characteristic amount (for example, f−g) and the etching parameter Ep can be expressed as in Equation 5 using a function W: f−g=W(Ep) Equation 5

[0028] Next, a target f-g is set to calculate the value of the function W by referencing Equation 5, which is the correlation data between the etching parameters and the change in the feature quantity. From Equation 5, the etching parameter Ep that will result in the target shape of the sample edge from the reference point, the sample center Ep0, is determined, and etching is performed. If the target feature quantity difference f-g is 0, the feature quantity itself can be set as a target, and Ep can also be determined using Equation 5. Furthermore, if W in Equation 5 is unknown, Ep that will achieve the target feature quantity can be estimated by machine learning from the combination of Ep and feature quantities stored in DB1 (see the second embodiment). Next, the electrical characteristics of the device on the sample are checked, and if the criteria are met, the process ends. If not, the process is repeated, starting with setting the target feature quantity difference, thereby optimizing the etching parameters (etching parameter optimization cycle (2)). While the above-described flow allows the etching parameter Ep to be determined without the difficult process of measuring the sample temperature and plasma density, the increased number of parameters required to determine the correlation between the feature quantity difference and Ep makes parameter estimation more difficult.

[0029] (Etching Steps and Optimization Cycle) The optimization cycle for etching parameters described above can be applied individually to each step (hereinafter referred to as "etching step") in which a processing recipe for a semiconductor manufacturing device corresponding to each predetermined etching depth is executed (see FIG. 3). FIG. 5 is a correlation diagram between etching steps and optimization cycles. FIG. 5 shows an example in which there are five etching steps. The optimization cycle to be applied may be either FIG. 4A or 4B.

[0030] FIG. 5(a) shows the case where the etching parameter optimization cycle was not applied. In this case, it is obvious that defective shapes such as bowing cannot be controlled and are significantly manifested. FIG. 5(b) shows the case where the optimization cycle was applied only to etching step 1. If the contribution rate of etching step 1 to the pattern shape is large, a significant improvement compared to FIG. 5(a) can be seen, but the contribution rate must be considered separately. FIG. 5(c) shows the case where the optimization cycle was applied to all etching steps. In this case, a significant improvement compared to FIG. 5(a) is possible without the need to consider the contribution rate.

[0031] If the etching steps that have a high contribution rate to the etching shape are known in advance, a method of applying an optimization cycle only to specific etching steps as shown in Figure 5(b) is preferable in terms of time efficiency of optimization. On the other hand, if the contribution rate is unknown, a method of applying an optimization cycle to all etching steps as shown in Figure 5(c) may be preferable in terms of time efficiency of optimization. In short, if it does not take much time to identify the contribution rate of each etching step to the etching shape, the method of Figure 5(b) is good, and if it takes a long time to identify the contribution rate, the method of Figure 5(c) is good.

[0032] Next, we compare the number of trials required for the device's electrical characteristics to meet the criteria when the etching parameter optimization cycle is applied and when it is not. The number of trials refers to the process of performing an etching process by changing the etching parameters to approach the desired electrical characteristics and then measuring the electrical characteristics. Figure 6 shows the correlation between the number of trials and the device failure rate. The vertical axis shows the device failure rate based on the electrical characteristics check, and the horizontal axis shows the number of etching trials performed on the sample. The relationship between the number of trials required to reach the threshold at which the electrical characteristics meet the criteria and are deemed OK and the application of the optimization cycle is expressed as Equation 6: R (all optimization cycles applied) < S (no optimization cycles applied) ... Equation 6. Equation 6 shows that applying the optimization cycle reduces the number of trials, thereby reducing total costs, including labor and equipment operating costs.

[0033] In the first embodiment, an example was shown in which the difference in spatial feature values ​​was utilized to optimize the etching parameters for each etching step corresponding to the depth direction of the etching shape. Here, the explanation was based on feature values ​​calculated from a secondary electron profile using a CD-SEM, but a similar etching parameter optimization flow can also be applied to feature values ​​calculated from an interference light profile using an OCD.

[0034] Second Embodiment In the first embodiment, the most time-consuming part is optimizing the etching parameters based on the change in the feature quantities. In the second embodiment, an example is described in which machine learning is used to process the optimization part. FIG. 7 is a conceptual diagram of a prediction model for optimal etching parameters in the second embodiment. Data such as measured feature quantities, feature quantity differences, etching parameters Ep, plasma characteristics, and sample temperatures are stored in a database (DB1) in a linked form. This stored data can be used as existing experimental data to obtain functions Z and W in the figure using a machine learning technique. By inputting the change in the feature quantities into Z and W, the optimal etching parameters Ep can be obtained. Alternatively, even without directly obtaining Z and W, it is possible to utilize AI to estimate Ep, which reproduces the change in the feature quantities that result in a target shape.

[0035] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit and scope of the present invention. For example, in the above embodiments, a server was described as a component that controls etching parameters. However, a virtual domain, a PC terminal, or a mobile terminal may be used instead of a server, and the same effects can be achieved using communication methods other than SMB communication, such as FTP communication or NFS communication. Furthermore, in the above embodiments, optimization of etching parameters was performed by a server, but this may also be achieved by an application implemented on a platform provided in a semiconductor device manufacturing system. Furthermore, in the above embodiments, an etching system was used as an example of semiconductor manufacturing equipment, but similar effects can be achieved with other manufacturing equipment, such as a plasma CVD system, an ashing system, or a surface modification system. Furthermore, in the above embodiments, a CD-SEM was used as an example of semiconductor inspection equipment, but similar effects can be achieved with other inspection equipment, such as an OCD, a TEM, or an XRR.

[0036] The present invention is not limited to the following embodiments, which may be included in the content of the present invention: (Aspect 1) A semiconductor device manufacturing system that controls etching parameters to achieve a desired processing result of a semiconductor manufacturing apparatus, wherein the etching parameters are optimized in at least one etching step based on correlation data between the etching parameters and a change in a feature quantity and an acquired change in the feature quantity, the feature quantity is a value obtained from secondary electron data or interference light data from the surface of a sample, the change in the feature quantity is a difference between the feature quantity and a target value of the feature quantity, the acquired change in the feature quantity is a change in the feature quantity acquired for each depth of an etching shape formed by the semiconductor manufacturing apparatus, and each of the etching steps is a step of processing conditions of the semiconductor manufacturing apparatus corresponding to each depth of an etching shape formed by the semiconductor manufacturing apparatus. (Aspect 2) A semiconductor device manufacturing system that controls etching parameters to achieve a desired processing result in a semiconductor manufacturing equipment, wherein the etching parameters are optimized in at least one etching step based on correlation data between a temperature or plasma characteristic of a sample and a change in a feature quantity and on the acquired change in the feature quantity, wherein the feature quantity is a value obtained from secondary electron data or interference light data from the surface of the sample, wherein the change in the feature quantity is a difference between the feature quantity and a target value of the feature quantity, wherein the acquired change in the feature quantity is a change in the feature quantity acquired for each depth of an etching shape formed by the semiconductor manufacturing equipment, and wherein each of the etching steps is a step of processing conditions of the semiconductor manufacturing equipment corresponding to each depth of an etching shape formed by the semiconductor manufacturing equipment. (Aspect 3) The semiconductor device manufacturing system according to Aspect 1 or 2, wherein the optimization of the etching parameters is optimizing an instruction value to a temperature control system of a sample stage on which the sample is placed.(Aspect 4) The semiconductor device manufacturing system according to any one of Aspects 1 to 3, wherein the optimization of the etching parameters is optimizing an instruction value for a radio frequency power supply that supplies radio frequency power for generating plasma, or optimizing an instruction value for a radio frequency power supply that supplies radio frequency power to a sample stage on which the sample is placed. (Aspect 5) The semiconductor device manufacturing system according to any one of Aspects 1 to 4, wherein the feature amount is obtained while changing a voltage applied to primary electrons of a CD-SEM. (Aspect 6) The semiconductor device manufacturing system according to any one of Aspects 1 to 5, wherein the etching parameter corresponding to the change in the feature amount is estimated using machine learning. (Aspect 7) The semiconductor device manufacturing system according to any one of Aspects 1 to 6, wherein the change in the feature amount is the difference between the feature amount at the edge of the sample and the feature amount at the center of the sample. (Aspect 8) The semiconductor device manufacturing system according to any one of Aspects 1 to 7, wherein the semiconductor device manufacturing system includes a platform on which an application that executes the optimization of the etching parameters is implemented. (Aspect 9) A semiconductor device manufacturing method for controlling etching parameters to achieve a desired processing result of a semiconductor manufacturing equipment, comprising: a step of acquiring a feature amount from secondary electron data or interference light data from a surface of a sample; and a step of optimizing the etching parameters in at least one etching step based on correlation data between the etching parameters and a change amount of the feature amount and the acquired change amount of the feature amount, wherein the change amount of the feature amount is a difference between the acquired feature amount and a target value of the feature amount, and the acquired change amount of the feature amount is a change amount of the feature amount acquired for each depth of an etching shape formed by the semiconductor manufacturing equipment, and each of the etching steps is a step of processing conditions of the semiconductor manufacturing equipment corresponding to each depth of an etching shape formed by the semiconductor manufacturing equipment.(Aspect 10) A semiconductor device manufacturing method for controlling etching parameters to achieve a desired processing result of a semiconductor manufacturing equipment, comprising the steps of: acquiring a feature amount from secondary electron data or interference light data from a surface of a sample; and optimizing etching parameters in at least one etching step based on correlation data between a temperature or plasma characteristic of the sample and a change in the feature amount and the acquired change in the feature amount, wherein the change in the feature amount is a difference between the acquired feature amount and a target value of the feature amount, and the acquired change in the feature amount is an amount of change in the feature amount acquired for each depth of an etching shape formed by the semiconductor manufacturing equipment, and each of the etching steps is a step of processing conditions of the semiconductor manufacturing equipment corresponding to each depth of an etching shape formed by the semiconductor manufacturing equipment. (Aspect 11) A server provided in the semiconductor device manufacturing system according to any one of Aspects 1 to 8, and configured to perform the optimization of the etching parameters.

[0037] 10...Semiconductor device manufacturing system, 101...PC for CD-SEM, 102...PC for semiconductor manufacturing equipment, 103...Server, 104...Semiconductor inspection equipment, 105...Semiconductor manufacturing equipment

Claims

1. A semiconductor device manufacturing system that controls etching parameters to achieve a desired processing result of a semiconductor manufacturing equipment, wherein the etching parameters are optimized in at least one etching step based on correlation data between the etching parameters and changes in a feature quantity and the acquired changes in the feature quantity, the feature quantity being a value obtained from secondary electron data or interference light data from the surface of a sample, the changes in the feature quantity being the difference between the feature quantity and a target value of the feature quantity, the acquired changes in the feature quantity being the changes in the feature quantity acquired for each depth of an etching shape formed by the semiconductor manufacturing equipment, and each of the etching steps being a step of processing conditions of the semiconductor manufacturing equipment corresponding to each depth of an etching shape formed by the semiconductor manufacturing equipment.

2. A semiconductor device manufacturing system which controls etching parameters to obtain a desired processing result of a semiconductor manufacturing equipment, wherein the etching parameters are optimized in at least one etching step based on correlation data between a temperature or plasma characteristic of a sample and a change in a feature quantity and the acquired change in the feature quantity, wherein the feature quantity is a value obtained from secondary electron data or interference light data from the surface of the sample, the change in the feature quantity is the difference between the feature quantity and a target value of the feature quantity, the acquired change in the feature quantity is the change in the feature quantity acquired for each depth of an etching shape formed by the semiconductor manufacturing equipment, and each of the etching steps is a step of processing conditions of the semiconductor manufacturing equipment corresponding to each depth of an etching shape formed by the semiconductor manufacturing equipment.

3. A semiconductor device manufacturing system according to claim 1 or 2, characterized in that the optimization of the etching parameters comprises optimizing instruction values ​​for a temperature control system of a sample stage on which the sample is placed.

4. A semiconductor device manufacturing system as described in claim 1 or 2, characterized in that the optimization of the etching parameters is optimization of an instruction value to a high frequency power source that supplies high frequency power to generate plasma, or optimization of an instruction value to a high frequency power source that supplies high frequency power to a sample stage on which the sample is placed.

5. A semiconductor device manufacturing system according to claim 1 or 2, wherein the characteristic amount is obtained while changing a voltage applied to a primary electron beam of a CD-SEM.

6. A semiconductor device manufacturing system as described in claim 1 or 2, characterized in that the etching parameters corresponding to the amount of change in the feature amount are estimated using machine learning.

7. A semiconductor device manufacturing system according to claim 1 or 2, characterized in that the change in the feature amount is the difference between the feature amount at the edge of the sample and the feature amount at the center of the sample.

8. A semiconductor device manufacturing system according to claim 1 or 2, further comprising a platform on which an application for executing the optimization of the etching parameters is implemented.

9. A semiconductor device manufacturing method for controlling etching parameters to obtain a desired processing result of a semiconductor manufacturing equipment, comprising: a step of acquiring a feature amount from secondary electron data or interference light data from a surface of a sample; and a step of optimizing an etching parameter in at least one etching step based on correlation data between the etching parameter and a change amount of the feature amount and the acquired change amount of the feature amount, wherein the change amount of the feature amount is a difference between the acquired feature amount and a target value of the feature amount, and the acquired change amount of the feature amount is an amount of change in the feature amount acquired for each depth of an etching shape formed by the semiconductor manufacturing equipment, and each of the etching steps is a step of processing conditions of the semiconductor manufacturing equipment corresponding to each depth of an etching shape formed by the semiconductor manufacturing equipment.

10. A semiconductor device manufacturing method for controlling etching parameters to obtain a desired processing result of a semiconductor manufacturing equipment, comprising: a step of acquiring a feature quantity from secondary electron data or interference light data from a surface of a sample; and a step of optimizing etching parameters in at least one etching step based on correlation data between the temperature or plasma characteristics of the sample and a change in the feature quantity and the acquired change in the feature quantity, wherein the change in the feature quantity is a difference between the acquired feature quantity and a target value of the feature quantity, and the acquired change in the feature quantity is an amount of change in the feature quantity acquired for each depth of an etching shape formed by the semiconductor manufacturing equipment, and each of the etching steps is a step of processing conditions of the semiconductor manufacturing equipment corresponding to each depth of an etching shape formed by the semiconductor manufacturing equipment.

11. A server provided in the semiconductor device manufacturing system according to claim 1 or 2, wherein optimization of the etching parameters is performed.

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